CN110149115A - Reduce the method for synthesization radio frequency system two-way phase-locked loop frequency traction - Google Patents
Reduce the method for synthesization radio frequency system two-way phase-locked loop frequency traction Download PDFInfo
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- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
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Abstract
A kind of method reducing the traction of synthesization radio frequency system two-way phase-locked loop frequency disclosed by the invention, it is desirable to provide a kind of pair of input signal loss is small, is able to suppress interference signal, weakens the method for frequency pulling.The technical scheme is that: in synthesization radio frequency system, locking phase module is divided into two phase-locked loops of PLL1 and PLL2, two frequencies of F1, F2 of two frequency homologous are locked, and are locked in the same reference source 10MHz compensation crystal oscillator (TCXO) respectively；Phaselocked loop draws the input of selected amplifier and output from two exactly opposite directions, phase-locked loop constantly compares the phase difference of the frequency dividing of two frequency homologous output frequencies and the output amplifier 10MHz temperature compensating crystal oscillator TCXO output frequency of reference source, this phase difference is converted into DC voltage by low-pass filter, drive voltage controlled oscillator, quick lock in crystal oscillator makes the frequency accuracy of crystal oscillator and long-term stability track standard frequency source and change.
Description
Technical field
The present invention relates to one kind can be widely applied to the rf integrations system such as measurement, radar, communication, navigation, main to apply
In the two-way Design of PLL method for reducing local frequency traction, its object is to improve the stabilization of complex electronic equipment function
Property, each electronic functionalities module Frequency spectrum quality and frequency accuracy in rf integration system are improved, ensures information transmission
With the precision of acquisition.
Background technique
In the prior art, many electronic equipments will work normally, it usually needs external input signal and internal vibration
It is synchronous to swing signal, can realize this purpose using phase-locked loop.Phaselocked loop is by phase discriminator (PD), loop filter (LF)
With three basic element of character compositions of voltage-controlled oscillator (VCO).It is a phase error control system, it by reference signal with
Phase between output signal is compared, and generates phase error voltage to adjust the phase of output signal, to reach and refer to
Purpose of the signal with frequency.Phase discriminator in phaselocked loop is also known as phase comparator, is used to comparator input signal.Its effect is inspection
The phase difference of input signal and output signal is surveyed, and the phase signal that will test out is converted into the output of uD (t) voltage signal, it should
The control voltage uC (t) of voltage controlled oscillator is formed after the low-pass filtered device filtering of signal, it is real to the frequency of oscillator output signal
Apply control.When uc (t) is changed over time, the frequency of oscillation ω u of voltage controlled oscillator is also changed over time, and phaselocked loop enters " frequency
Rate traction ", automatically tracks the frequency of capturing input signal, phaselocked loop is made to enter the state of locking, and keep the shape of ω 0=ω i
State is constant.The phase of phase discriminator and voltage controlled oscillator output signal, output voltage correspond to the function of the two signal phase differences.
Loop filter is to filter out high fdrequency component and noise, to guarantee performance required by loop.Voltage controlled oscillator is by loop filter
The control of output voltage draws close frequency of oscillation to the frequency of input signal, until the frequency of the two is identical, so that VCO is exported
The phase of signal and the phase of input signal keep certain specific relationship, achieve the purpose that PGC demodulation.In phaselocked loop, pressure
Controlling oscillator is a voltage-frequency-transposition arrangement, and as controlled oscillator in ring, its frequency of oscillation is with input control
The variation (in fact, only in a certain range linear change) of voltage linear, when being slightly larger than K, due to phase instantaneous in one week
Poor average growth rate is different, so that discriminator output error voltage is known as about one asymmetric non-sine beat waveform,
Its frequency is to input the difference of frequency and frequency of oscillation, and belonging to has the case where DC component.This non-sine beat voltage acts on
On VCO, its frequency of oscillation is made to make the cyclically-varying of corresponding rule therewith, final average oscillation frequency deviates VCO centre frequency
And drawn close to input frequency, this is frequency pulling phenomenon.
Synthesization radio frequency system has concentrated multiple functional modules, have it is small in size, functional density is high, interconnecting relation is compact,
The features such as electromagnetic environment is complicated, synthesization radio frequency energy are completed at the same time multiple complex tasks；Each functional module works at the same time；It is main
There are two types of realization means, and one is the mentality of designing based on special hardware circuit is used, every radio-frequency apparatus realization one is specific
Function；Another kind is that have the function of preferable functional expansionary and collection based on the universal circuit design form of function segmentation
Close flexibility.Two kinds of designs while the main problem faced are frequency spectrum resource anxiety and Frequency spectrum quality.Frequency spectrum resource anxiety is to be
The objective reality for design of uniting mainly solves the problems, such as Frequency spectrum quality during equipment is realized.It is accurate comprising distortion spectrum and frequency
Spend two aspects.Its source of distortion spectrum is hole seam leakage, intermodulation combination frequency and the non-linear growth of frequency spectrum, can be passed through
Very big improvement is obtained to the Design of Reinforcement inside individual feature, for example takes reverse frequency paths in T/R component, up and down
The shared local oscillator of row, each functional module take shared reference source to reduce combined non-linearity frequency spectrum product.Frequency accuracy is substantially
It is mainly determined by reference source, but is easily received interference and deteriorates.This is because: the synthesis and decomposition of frequency mainly have phaselocked loop
Circuit is completed, and for phase-locked loop circuit as the Key Circuit for generating each local oscillator, phase detection gain is high, and loop is quick to frequency interferences
Sense, close frequencies, which can interact, generates the effect of frequency directing, i.e. frequency pulling.The influence of its frequency pulling is to change reality
The frequency accuracy of border output or input, so that upper layer grade influences performance even function.Other can generate frequency and lead
The reason of drawing further include: synthesization radio-frequency apparatus is vibrated, the external unordered interference of burst, the environment such as intentional frequency directing interference
It influences.Due to the frequency association between each functional module of transmitting-receiving subassembly, this effects diffuse to whole equipment, cause function
It can decline or disabler.
With the fast development of wireless navigation and measuring technique, on the realization way in the fields such as space flight measurement and control and navigation, communication, radar
Diameter be continuously available it is abundant and perfect, also brought while promoting observing and controlling reliability radio-frequency apparatus quantity increase, equipment room it is electric
The difficulties such as magnetic environment complexity, systems bulky, test operation maintenance workload are big, personnel demand is more.Integrating rf terminal is
One complicated electronic system, for Installed System Memory in multi-signal, electromagnetic environment is complicated, and system manages access to spuious, interference
The inhibition of signal is more demanding, no matter takes integrated channel chip scheme, or use traditional independent component implementation,
It requires to solve the problems, such as that comprehensive radio frequency system is influenced by external electromagnetic Environmental coupling, principal contradiction is to reduce to the greatest extent
Frequency pulling in machine.In recent years, the appearance based on generalization Hardware platform design theory, for develop high efficiency-cost ratio, low cost,
The synthesis rf terminal of favorable expandability provides solid technical foundation.Measuring system integrated level is improved, reduces system bulk, subtract
Light system weight reduces general assembly, difficulty of test and workload.In this context, it solves or weakens the demand of frequency pulling more
Add urgent.
Summary of the invention
The purpose of the present invention is place in view of the shortcomings of the prior art, provide it is a kind of have it is high-efficient, input is believed
Number loss is small, and the isolation between output signal is good, load force is strong, frequency spectrum is pure, is able to suppress interference signal, weakens frequency and leads
That draws reduces the method for synthesization radio frequency system two-way phase-locked loop frequency traction.
Above-mentioned purpose of the invention can be obtained by following measures, a kind of reduction synthesization radio frequency system two-way locking phase
The method of ring frequency pulling, with following technical characteristic: reducing in frequency pulling circuit in the reference source of synthesization radio frequency system
Separately design the output amplifier of the amplification attenuator circuit and 10MHz reference source of the output of two-way local oscillator；And locking phase module is divided
For two phase-locked loops of PLL1 and PLL2, two frequencies of F1 low-pass filter, F2 low-pass filter of two frequency homologous are locked,
And it is locked in the 10MHz temperature compensating crystal oscillator TCXO of the same reference source respectively；For per the defeated of phase-locked loop all the way
Out, the amplifying circuit of designing gain g1, g2 and differential loss are L1, L2 and gain g1=L1, the decaying electricity of gain g2=L2
Road；The two kinds of circuit forms amplified again of decaying again and/or first decay first are amplified in phaselocked loop output selection, by the defeated of selected amplifier
Enter and is drawn with output from two exactly opposite directions, the uniform grounding through hole of layout density between input and output, to subtract
Small amplifier output and input between coupling；To avoid parallel coupling, by the layout direction of two-way amplifier at opposite direction
Or at vertical direction；Attenuator and amplifier input and output each other, by the output amplifier of reference source along rectilinear direction
Arrangement is guaranteed along signal path with reducing interstage coupling without turning back；Phase-locked loop constantly compares two frequency homologous outputs
The phase difference of the output amplifier 10MHz Voltage Controlled Crystal Oscillator output frequency of the frequency dividing and reference source of frequency, passes through low pass
This phase difference is converted into DC voltage by filter, drives voltage controlled oscillator VCO, and quick lock in crystal oscillator joins 10MHz
Examine the frequency accuracy and long-term stability tracking standard frequency of the temperature compensating crystal oscillator TCXO of the output amplifier in source
Rate source and change.
The present invention has the advantages that compared with the prior art.
It is high-efficient, small to the loss of input signal.The present invention is using first N2 operational amplifier module to input
The small signal of 10MHz carries out bandpass filtering, and the signal after bandpass filtering enters amplification, and phase-locked loop circuit conduct is inputted after amplification
Reference signal.Low gain (g3), high reverse isolation degree (S12) operational amplifier used inside N2 10MHz amplification module,
On the one hand 10MHz reference signal saturation distortion is prevented, another aspect high-isolation reduces output signal to the negative anti-of input terminal
Feedback signal, output signal are coupled to decaying to (g3-S12) for input, decay to L3, L3=after designing N2 operational amplifier
G3, N1 the and N2 electrical combination are 2*L3+ (g3-S12)=3*g3-S12 for the isolation of 10MHz.Two-way phaselocked loop is defeated
Out F1 low-pass filter amplifying circuit and.Two-way phaselocked loop output F2 low-pass filter amplification circuit module design method is similar,
The difference is that the latter is for output F1 bandpass filter frequency and F2 bandpass filter Frequency Design；Reference source and two-way lock
Phase loop circuit has high-efficient, low in energy consumption, small to the loss of input signal, isolation between output signal is good, load force is strong,
The features such as frequency spectrum is pure.
Small to input signal loss, the isolation between output signal is good.It for 10dB is low that the present invention, which uses gain design,
The output signal of power consumption one chip amplifier N4 is lower than 1dB compression point, therefore has the good linearity, the low intermediate frequency signal of output
By capacitor C14 AC coupled, the sum of the forward gain and reverse isolation of N4 are the isolation of signal echo, therefore signal echo
Isolation is 10dB+20dB=30dB, the attenuator circuit decaying being made of resistance R2, R3, R4 10dB so that forward signal is decayed,
Echo-signal decays 10dB again, therefore the total signal isolation of low local oscillator is greater than 50dB.The present invention uses low-power consumption one chip amplifier
The type selecting of N5 and the difference of low-power consumption one chip amplifier N4 essentially consist in working frequency range, gain design 10dB, low-power consumption list
The output signal of piece amplifier N5 is lower than 1dB compression point, therefore has the good linearity, and the low intermediate frequency signal of output passes through
C14 AC coupled, the sum of forward gain and reverse isolation of N5 are the isolation of signal echo, therefore signal echo isolation is
10dB+20dB=30dB is decayed by the attenuator circuit that resistance R7, R8, R9 are formed so that forward signal decaying 10dB, echo-signal
Decay 10dB again, therefore the total signal isolation of low local oscillator is also greater than 50dB.
The present invention is due to using operational amplifier N2 and low-noise amplifier N4, N5, and there are two benefits, first, letter
The coupling of number reverse transfer reduces 30dB or more；Second, output impedance is low therefore load capacity is strong；Pass through C5, C6, C7 parallel circuit
Design, targetedly filtered out the higher hamonic wave of 10MHz temperature compensating crystal oscillator TCXO, therefore have good frequency spectrum matter
Amount.
The present invention separately designs amplification attenuator circuit for the output of two-way local oscillator, and operational amplifier N2 passes through by VCC pin 5
Inductor L6 is met, and the ground capacitor C11 that connects constitutes the first power source deoupling circuit, the VDDR pin of two-way phase-locked loop chip N3
Inductor L9 is met by the of 12, series connection ground capacitor C19 constitutes second source decoupling circuit；By two-way phase-locked loop chip N3 pin 14
Inductor L10 is met, concatenated ground capacity C21 constitutes third power source deoupling circuit, and three power source deoupling circuits inhibit and pass through
The spurious signal of power supply line conduction, so that the local oscillation signal of two-way fl transmission is mentioned by the isolation that reverse transfers intercouple
High 60dB, thus weakens frequency pulling significantly.
Detailed description of the invention
Fig. 1 is the flow chart that the present invention reduces the traction of synthesization radio frequency system two-way phase-locked loop frequency；
Fig. 2 is to reduce frequency pulling circuit theory schematic diagram for Fig. 1 reference source；
Fig. 3 is to reduce frequency pulling from the output local oscillator of two different frequent points of C15 and C14 doubleway output respectively for Fig. 1
Circuit theory schematic diagram.
Specific embodiment
Refering to fig. 1.According to the present invention, reduce in frequency pulling circuit in the reference source of synthesization radio frequency system and separately design
The output amplifier of the amplification attenuator circuit and 10MHz reference source of the output of two-way local oscillator；And by locking phase module be divided into PLL1 and
Two phase-locked loops of PLL2, lock two frequencies of F1 low-pass filter, F2 low-pass filter of two frequency homologous, and lock respectively
It is scheduled on the 10MHz temperature compensating crystal oscillator TCXO of the same reference source；For the output per phase-locked loop all the way, design increases
Benefit is the amplifying circuit of g1, g2 and differential loss is L1, L2 and gain g1=L1, the attenuator circuit of gain g2=L2；Phaselocked loop is defeated
Select first to amplify the two kinds of circuit forms amplified again of decaying again and/or first decay out, by the input of selected amplifier and output from
Two exactly opposite directions are drawn, and the uniform grounding through hole of layout density, defeated to reduce amplifier between input and output
Coupling between entering and exporting；To avoid parallel coupling, by the layout direction of two-way amplifier at opposite direction or at vertical
Direction；Attenuator and amplifier input and output each other, the output amplifier of reference source is arranged along rectilinear direction, to reduce
Interstage coupling guarantees along signal path without turning back；Phase-locked loop constantly compares the frequency dividing of two frequency homologous output frequencies
With the phase difference of the output amplifier 10MHz Voltage Controlled Crystal Oscillator output frequency of reference source, by low-pass filter by this
Phase difference is converted into DC voltage, drives voltage controlled oscillator VCO, and quick lock in crystal oscillator makes the output of 10MHz reference source
The frequency accuracy and long-term stability of the temperature compensating crystal oscillator TCXO of amplifying circuit tracks standard frequency source and changes.
Refering to Fig. 2.Reference source reduce frequency pulling circuit include: by Voltage Controlled Crystal Oscillator VCO output pin 1,
Reference the source crystal oscillator N1, N1 of 2 earth capacitor C of GND pin are grounded by the connected other ground capacity C2 connect of VCC pin 4, is connect
Ground capacitor C2 forms LC filter circuit by inductor L1；N1 passes through 3 series capacitance C3 of pin, resistance R1 connection operational amplifier
The anode IN+ of N2 pin 3 forms attenuator circuit；N2 pin 2 is grounded, and N2 connects capacitor C4 series electrical by the end Q of its pin 1
Sensor L2, L3, and be connected in parallel on inductor L2, between L3 and the parallel connection electricity of the capacitor C5 at the both ends L2, L3, capacitor C6, capacitor C7
Road；Operational amplifier N2 is by meeting inductor L6 by VCC pin 5, and the ground capacitor C11 that connects constitutes the first power decoupling electricity
Road.
Output amplifier and capacitor C3, the resistance R1 for the 10MHz reference source being connected with operational amplifier N2 are formed
Attenuator circuit, by operational amplifier N2 control terminal pin 1, be grounded 2 earth capacitor C of GND pin reference source crystal oscillator N1,
N1 passes through the LC filter circuit that VCC pin 4 is connected, and is put by the operation of 3 series capacitance C3 of pin, resistance R1 connection anode IN+
Big device N2, the N2 with comparator output terminal pin 1 connect capacitor C4 series reactor L2, L3 by the end Q of N2 pin 1, with
And it is connected in parallel on inductor L2, between L3 and the parallel circuit of the capacitor C5 at the both ends L2, L3, capacitor C6, capacitor C7.By ground capacity
The filter circuit that C2 connection inductor L1 is constituted is that N1 is powered on reference to source crystal oscillator, and N1 output 10MHz signal is exchanged by capacitor C3
Then coupling adjusts 3 anode IN of input operational amplifier N2 pin after the amplitude of the 10MHz signal of N1 output by resistance R1+,
Operational amplifier N2 passes through negative terminal IN as high-speed comparator-The connected ground capacity C10 of pin 4, pin 5 pass through connected electricity
Sensor L6 is N2 power-up, and it is power supply coupling capacitor that inductor L6, which inputs tip node connection ground connection C11, realizes that Zero-cross comparator, N1 are defeated
10MHz signal maintains the DC static operating point of N2, leads to inside N2 by C3, R1 AC coupled into operational amplifier N2 out
Negative feedback amplifier circuit is crossed, realizes output pin 1 to the signal isolation between input pin 3, output has to be exchanged by C4
It is coupled to the parallel circuit 10MHz signal output of capacitor C5, capacitor C6, capacitor C7, so that isolation of the N1 with respect to N3 is greater than
40dB realizes the high-isolation process being referenced between two-way output local oscillator.It includes passing through that output 10MHz reference signal, which passes through,
The parallel circuit 10MHz signal output of capacitor C5, capacitor C6, capacitor C7, and be referenced between two-way output local oscillator it is high every
From spending journey.10MHz harmonic wave is filtered out by 5 rank low-pass filters connecting with N2, operational amplifier N2 input impedance is high, output
Impedance is low, therefore carrying load ability is strong, and the impedance variations of rear class and the influence of standing wave, the isolation from output end to input terminal reach
To 30dB or more, the high-isolation being referenced between two-way output local oscillator is realized.F1 (F2) is by amplification attenuator circuit to F2
(F1) decaying of backward echo signal, reduces two-way phase-locked loop circuit shown in Fig. 3 to the frequency pulling of reference source,
10MHz compensation crystal of the operational amplifier N2 being connect with the temperature compensating crystal oscillator TCXO of reference source to reference source
The 10MHz signal of oscillator TCXO input carries out bandpass filtering, by connecting with reference source 10MHz compensation crystal oscillator TCXO
Signal after bandpass filtering enters amplification, and phase-locked loop circuit is inputted after amplification as reference signal.With the 10MHz temperature of reference source
Low gain (g3), the high reverse isolation degree (S12) used inside compensated crystal oscillator TCXO connection 10MHz amplification module is low
Noise amplifier, on the one hand prevents 10MHz reference signal saturation distortion, and another aspect high-isolation reduces output signal to defeated
Enter the negative-feedback signal at end, what output signal was coupled to temperature compensating crystal oscillator TCXO input decays to (g3-S12), if
L3, L3=g3 are decayed to after meter low noise, N1, N2 electrical combination are 2*L3+ (g3-S12)=3* for the isolation of 10MHz
g3-S12.Circuit has high-efficient, low in energy consumption, small to the loss of input signal, and isolation between output signal is good, load force
By force, the features such as frequency spectrum is pure.
Refering to Fig. 3.The two-way local oscillator being connected with the parallel circuit of capacitor C5, capacitor C6, capacitor C7 generates and amplification decaying
Circuit realizes the reduction frequency pulling between local oscillator jointly.Two-way local oscillator generates and amplification attenuator circuit includes: two-way phaselocked loop
Chip N3 pin 1 capacitor C18 in sequential series, resistance R8, capacitor C11 and its concatenated low-power consumption one chip amplifier of capacitor C11
The N5 and concatenated capacitor C15 of low-power consumption one chip amplifier N5 pin 1, the inductance being connected between C15 and above-mentioned N5 pin 1
Device L8, the ground capacitor C16 and resistance R6 at inductor L8 output end both ends further include that low-power consumption one chip amplifier N5 draws
Ground capacity C8, the inductor L4 connected on 23 output contact of foot, the inductor L5 in parallel on pin 19 of pin 20, pin 17
The ground capacity 22 of connection, the concatenated capacitor 20 of pin 15, passes through the inductor connect by 22 input terminal of ground capacity, pin 14
L10 and last time concatenated ground capacity C21, and ground resistance R2, series electrical are connect by the capacitor C9 in sequential series of pin 22, side
Resistance R3, side meet ground resistance R4, series capacitance C12 and low-power consumption one chip amplifier N4.Low-power consumption one chip amplifier N4 pin 1 is gone here and there
Join capacitor C14, the inductor L7 connect by capacitor C14 input terminal, the concatenated resistance R5 in the both ends inductor L7 and ground capacity
C13.Two-way phase-locked loop chip N3 pin 22 exports low local oscillator, exports high local oscillator by pin 11, by pin 12, pin 14,
The filter circuit that the concatenated L10C21 of pin 17 is constituted is powered on reference source crystal oscillator N1, and capacitor C20 AC coupled passes through pin 15
10MHz signal is inputted to two-way phase-locked loop chip N3.The low local oscillation signal of 61MHz of two-way phase-locked loop chip N3 output passes through series connection
The attenuator circuit decaying of capacitor C9, other connecting resistance R2, series resistance R3, side connecting resistance R4 composition, it is low to be concatenated capacitor C12 feeding
Power consumption one chip amplifier N4, output level are lower than the 1dB compression point 10dB or less of low-power consumption one chip amplifier N4.Two-way phaselocked loop
Chip N3 meets ground resistance R9 through side by the high local oscillation signal of the capacitor C18 output in sequential series of pin 1, series resistance R8,
Side connects the attenuator circuit decaying of ground resistance R7 composition, and high local oscillation signal is put by being concatenated capacitor C171 feeding low-power consumption monolithic
Big device N5 output level is lower than the 1dB compression point 10dB or less of N5.
Operational amplifier N2 is by meeting inductor L6 by VCC pin 5, and the ground capacitor C11 that connects constitutes the first power supply
Decoupling circuit, inductor L9 is met by the VDDR pin 12 of two-way phase-locked loop chip N3, and series connection ground capacitor C19 constitutes the second electricity
Source decoupling circuit；Inductor L10 is met by two-way phase-locked loop chip N3 pin 14, concatenated ground capacity C21 constitutes third power supply
Decoupling circuit.
In an alternate embodiment of the invention, reduce the two-way phaselocked loop of frequency pulling, including circuit design and level budget, shielding
Be isolated, the aspect of frequency planning three.Each function realization means are introduced individually below.
It shields and is isolated
For electric reference source 10MHz compensation crystal oscillator TCXO, and using N3 as the two-way local oscillation circuit of core chips, respectively
It is designed to the shielding cavity with parting bead and cover board, shielding design purpose is to reduce space radiation, and isolation purpose is to cut off spuious letter
Number feedback control loop.Reduce slit leakage on parting bead, medium couples on circuit printing plate, the Conduction coupling on circuit power line,
Four kinds of means such as local oscillation signal near-field space radiation come the detailed process realized, combined by the integrated approach promoted shielding with every
From effect.
Reduce there are three types of the slit leakage major ways on parting bead: circuit power pin is fed, different function circuit divides chamber,
Sunk type cover board on shielding cavity, by way of the feed-through capacitor of parting bead feed, reduce shielding cavity shielded partitions
Aperture, while improving power supply chip power supply rejection ratio (PSRR)；By way of different function circuit divides chamber, isolation reference
Each functional circuit modules such as source, two-way phaselocked loop；By way of the sunk type cover board on shielding cavity, increase shielding cavity
On shielding cover board effective contact area.
Medium couples:
By the 10MHz temperature compensating crystal oscillator TCXO for reference source, and using N3 as the two-way local oscillator of core chips
Circuit, hardware material object multilayer circuit board design, by radiate stronger signal wire be designed to signal wire lower planes decoupling micro-strip
Line, multilayer circuit board top layer zoning lay complete ground wire around two-way phase-locked loop circuit circuit, in two-way phaselocked loop electricity
Increase coupling linear distance between the different function area of road；Coupling resistance is promoted by square crossing cabling between each layer of circuit board
It is anti-, reduce signal wire coupled RF signal energy.
Conduction coupling:
It radiates stronger signal and passes through the signal that circuit on board supply line conducts, in certain alignment interval, electricity in circuit is set
The LC decoupling circuit of source pin, decay spurious signal；By in circuit signal wire conduct it is spuious, setting output local oscillator low pass or
Person exports local oscillator band pass filter circuit, is inhibited for the concrete condition in signal transmission path in circuit, decays unrelated
Signal.
Near-field space radiation:
The 10MHz temperature compensating crystal oscillator TCXO of reference source is controlled, and using N3 as the two-way local oscillation circuit of core chips,
The level magnitudes of signal in circuit, reduce local oscillator radiation source output power, signal higher for frequency in circuit, take with
Lower two ways: (1) the 10MHz temperature compensating crystal oscillator TCXO of reference source, and using N3 as the two-way sheet of core chips
The circuit circuit multipoint high-frequency that shakes is grounded, and (2) reduce the 10MHz temperature compensating crystal oscillator TCXO of reference source, and are with N3
The two-way local oscillation circuit circuit ring flow area of core chips；Signal lower for frequency, takes following two mode: (1) joining
The 0MHz temperature compensating crystal oscillator TCXO in source 1 is examined, and using N3 as the two-way local oscillation circuit circuit partition cloth of core chips
Office, (2) inhibit local oscillator harmonic wave.
To reduce the small slit leakage of shielded partitions, connection uses feed-through capacitor between circuit board, and circuit cover board uses sunk type
Design, so that without slit, relatively independent between tri- amplifying circuits of N2, N4, N5；PCB design selects dielectric constant relatively high
Material as the circuit substrate, increase the loss that signal passes through circuit board medium；By on circuit power line every certain
Spacing increases decoupling capacitor, and the spurious signal of circuit output is reflected back source, and capacitor of uncoupling cutting spurious signal passes through power supply
The propagation path of line；It is controlled by level and reduces the radiation of spurious signal near-field space.
The 10MHz temperature compensating crystal oscillator TCXO of reference source, and using N3 as the two-way local oscillation circuit of core chips
Frequency present in circuit has reference source fref(10MHz), one local oscillator LO of frequency conversion1, two local oscillator LO of frequency conversion2, three local oscillator LO of frequency conversion3,
Then combination frequency are as follows: n1fref±n2LO1±n3LO2±n4LO3, frequency selection purposes should meet following formula:
GCD(LO1, LO2, LO3)=fref
GCD(LO1, LO2, LO3)=Clk
LO1≠pLO2≠qLO3
Wherein p, q are integer.It is intended that each secondary fundamental wave and its harmonic wave different frequencies, reduce frequency pulling from frequency planning.
Above in conjunction with attached drawing to the present invention have been described in detail, it is to be noted that being described in examples detailed above
Preferred embodiment only of the invention, is not intended to restrict the invention, and for those skilled in the art, the present invention can
To there is various modifications and variations, all within the spirits and principles of the present invention, any modification, equivalent replacement, improvement and so on,
It should be included within scope of the presently claimed invention.
Claims (12)
1. a kind of method for reducing the traction of synthesization radio frequency system two-way phase-locked loop frequency, has following technical characteristic: in synthesis
The reference source for changing radio frequency system reduces the amplification attenuator circuit and 10MHz that the output of two-way local oscillator is separately designed in frequency pulling circuit
The output amplifier of reference source, " generation of two-way local oscillator and the isolation circuit being connected with the output amplifier；And by locking phase mould
Block is divided into two phase-locked loops of PLL1 and PLL2, locks F1 low-pass filter, the F2 low-pass filter two of two frequency homologous
Frequency, and it is locked in the 10MHz temperature compensating crystal oscillator TCXO of the same reference source respectively；For per phase-locked loop all the way
Output, the amplifying circuit and differential loss of designing gain g1, g2 are L1, L2 and gain g1=L1, the decaying of gain g2=L2
Circuit；The two kinds of circuit forms amplified again of decaying again and/or first decay first are amplified in phaselocked loop output selection, by selected amplifier
Input is drawn with output from two exactly opposite directions, the uniform grounding through hole of layout density between input and output, with
Reduce amplifier output and input between coupling；To avoid parallel coupling, by the layout direction of two-way amplifier at Xiang Fanfang
To or at vertical direction；Attenuator and amplifier input and output each other, by the output amplifier of reference source along straight line side
To arrangement, to reduce interstage coupling, guarantee along signal path without turning back；It is defeated that phase-locked loop constantly compares two frequency homologous
The phase difference of the output amplifier 10MHz Voltage Controlled Crystal Oscillator output frequency of the frequency dividing and reference source of frequency out, by low
This phase difference is converted into DC voltage by bandpass filter, drives voltage controlled oscillator VCO, and quick lock in crystal oscillator makes 10MHz
The frequency accuracy and long-term stability of the temperature compensating crystal oscillator TCXO of the output amplifier of reference source tracks standard
Frequency source and change.
2. reducing the method for synthesization radio frequency system two-way phase-locked loop frequency traction as described in claim 1, it is characterised in that:
Reference source reduces the output amplifier that frequency pulling circuit includes: the 10MHz reference source being connected with operational amplifier N2, and
The attenuator circuit of capacitor C3, resistance R1 composition passes through operational amplifier N2 control terminal pin 1, ground connection 2 earth of GND pin
The LC filter circuit that reference the source crystal oscillator N1, N1 of capacitor C is connected by VCC pin 4, passes through 3 series capacitance C3 of pin, resistance R1
The operational amplifier N2 of anode IN+ is connected, the N2 with comparator output terminal pin 1 connects capacitor C4 by the end Q of N2 pin 1
Series reactor L2, L3, and be connected in parallel on inductor L2, between L3 and the capacitor C5 at the both ends L2, L3, capacitor C6, capacitor C7
Parallel circuit.
3. reducing the method for synthesization radio frequency system two-way phase-locked loop frequency traction as claimed in claim 2, it is characterised in that:
The filter circuit being made of ground capacity C2 connection inductor L1 is that N1 is powered on reference to source crystal oscillator, and N1 output 10MHz signal passes through
Capacitor C3 AC coupled, input operational amplifier N2 draws after the amplitude of the 10MHz signal of N1 output is then adjusted by resistance R1
3 anode IN of foot+, operational amplifier N2 as high-speed comparator pass through negative terminal IN-The connected ground capacity C10 of pin 4, pin 5 are logical
Connected inductor L6 is crossed as N2 power-up, it is power supply coupling capacitor that inductor L6, which inputs tip node connection ground connection C11, realizes zero passage
Compare, 10MHz reference signal is exported by the parallel circuit of capacitor C5, capacitor C6, capacitor C7.
4. reducing the method for synthesization radio frequency system two-way phase-locked loop frequency traction as described in claim 1, it is characterised in that:
The operational amplifier N2 connecting with the temperature-compensating TCXO of reference source carries out band logical to the 10MHz signal that reference source 10MHz is inputted
Filtering, compared with the signal after the 10MHz temperature compensating crystal oscillator TCXO connection bandpass filtering with reference source enters N2
Device operational amplification circuit inputs phase-locked loop circuit as reference signal after amplification.
5. reducing the method for synthesization radio frequency system two-way phase-locked loop frequency traction as described in claim 1, it is characterised in that:
The low gain g3 used inside the 10MHz amplification module being connect with the 10MHz temperature compensating crystal oscillator TCXO of reference source
The N2 operational amplifier of amplifying circuit, high reverse isolation degree (S12) on the one hand prevents 10MHz reference signal saturation distortion, another
Aspect high-isolation reduces negative-feedback signal of the output signal to input terminal, and output signal is coupled to temperature compensating crystal oscillation
Device TCXO input decays to low gain g3- isolation S12.
6. reducing the method for synthesization radio frequency system two-way phase-locked loop frequency traction as described in claim 1, it is characterised in that:
Decay to L3, L3=g3 after design low noise, with reference to source crystal oscillator N1, operational amplifier N2 electrical combination for 10MHz every
It is 2*L3+ (g3-S12)=3*g3-S12 from degree.
7. reducing the method for synthesization radio frequency system two-way phase-locked loop frequency traction as described in claim 1, it is characterised in that:
The two-way local oscillator being connected with operational amplifier N2 generates and isolation circuit includes: that two-way phase-locked loop chip N3 pin 1 is in sequential series
Capacitor C18, resistance R8, capacitor C11 and its concatenated low-power consumption one chip amplifier N5 of capacitor C11 and low-power consumption monolithic put
The concatenated capacitor C15 of device N5 pin 1 greatly, the inductor L8 being connected between C15 and above-mentioned N5 pin 1, inductor L8 output end
The ground capacitor C16 and resistance R6 at both ends further include connecting on 23 output contact of low-power consumption one chip amplifier N5 pin
Ground capacity C8, inductor L4, the inductor L5 in parallel on pin 19 of pin 20, pin 17 connect ground capacity 22,
The concatenated capacitor 20 of pin 15, passes through the inductor L10 connect by 22 input terminal of ground capacity, pin 14 and last time concatenated ground connection
Capacitor C21, and ground resistance R2 connect by the capacitor C9 in sequential series of pin 22, side, series resistance R3, side connect ground resistance
R4, series capacitance C12 and low-power consumption one chip amplifier N4.
8. reducing the method for synthesization radio frequency system two-way phase-locked loop frequency traction as described in claim 1, it is characterised in that:
1 series capacitance C14 of low-power consumption one chip amplifier N4 pin, the inductor L7 connect by capacitor C14 input terminal, the both ends inductor L7 string
The resistance R5 and ground capacity C13 of connection.
9. reducing the method for synthesization radio frequency system two-way phase-locked loop frequency traction as described in claim 1, it is characterised in that:
Two-way phase-locked loop chip N3 pin 22 exports low local oscillator, exports high local oscillator by pin 11, passes through pin 12, pin 14, pin
The filter circuit that L10, the capacitor C21 of 17 series reactors are constituted is powered on reference source crystal oscillator N1, and capacitor C20 AC coupled is logical
It crosses pin 15 and inputs 10MHz signal to two-way phase-locked loop chip N3.
10. reducing the method for synthesization radio frequency system two-way phase-locked loop frequency traction as described in claim 1, feature exists
In: two-way phase-locked loop chip N3 output the low local oscillation signal of 61MHz by series capacitance C9, other connecting resistance R2, series resistance R3,
The attenuator circuit decaying of other connecting resistance R4 composition, is concatenated capacitor C12 and is sent into low-power consumption one chip amplifier N4, output level is lower than
The 1dB compression point 10dB or less of low-power consumption one chip amplifier N4.
11. reducing the method for synthesization radio frequency system two-way phase-locked loop frequency traction as described in claim 1, feature exists
In: two-way phase-locked loop chip N3 connects ground resistance through side by the high local oscillation signal of the capacitor C18 output in sequential series of pin 1
R9, series resistance R8, the other attenuator circuit decaying for connecing ground resistance R7 composition, high local oscillation signal are sent by being concatenated capacitor C171
Enter the 1dB compression point 10dB or less that low-power consumption one chip amplifier N5 output level is lower than N5.
12. reducing the method for synthesization radio frequency system two-way phase-locked loop frequency traction as described in claim 1, feature exists
In: operational amplifier N2 is by meeting inductor L6 by VCC pin 5, and the ground capacitor C11 that connects constitutes the first power decoupling electricity
Road, inductor L9 is met by the VDDR pin 12 of two-way phase-locked loop chip N3, and series connection ground capacitor C19 constitutes second source decoupling
Circuit；Inductor L10 is met by two-way phase-locked loop chip N3 pin 14, concatenated ground capacity C21 constitutes third power decoupling electricity
Road.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112147583A (en) * | 2020-11-25 | 2020-12-29 | 四川斯艾普电子科技有限公司 | High-integration brick type TR assembly |
| CN112711042A (en) * | 2021-01-14 | 2021-04-27 | 福建江夏学院 | Clock adjusting circuit and method for stably capturing Beidou satellite signals |
| CN114844061A (en) * | 2022-06-07 | 2022-08-02 | 合肥工业大学 | Non-frequency coupling phase locking method for high-proportion new energy to be accessed into power grid |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101228695A (en) * | 2005-07-21 | 2008-07-23 | 艾利森电话股份有限公司 | Method and apparatus for transceiver frequency synthesis |
| CN105187060A (en) * | 2015-07-23 | 2015-12-23 | 中国电子科技集团公司第四十一研究所 | Phase-locked loop circuit with low-phase noise and implementation method thereof |
| CN106059576A (en) * | 2016-06-01 | 2016-10-26 | 电子科技大学 | Double-frequency oscillator design method |
| CN107147408A (en) * | 2017-05-08 | 2017-09-08 | 王昭 | A kind of device for reducing the traction of Direct conversion transmitter frequency |
| CN207603612U (en) * | 2018-02-28 | 2018-07-10 | 成都维星科技有限公司 | A kind of clock circuit for anti-interference antenna |
| CN207852924U (en) * | 2018-02-28 | 2018-09-11 | 成都维星科技有限公司 | A kind of ultrathin 4 channel anti-interference antenna |
-
2019
- 2019-03-28 CN CN201910245815.9A patent/CN110149115A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101228695A (en) * | 2005-07-21 | 2008-07-23 | 艾利森电话股份有限公司 | Method and apparatus for transceiver frequency synthesis |
| CN105187060A (en) * | 2015-07-23 | 2015-12-23 | 中国电子科技集团公司第四十一研究所 | Phase-locked loop circuit with low-phase noise and implementation method thereof |
| CN106059576A (en) * | 2016-06-01 | 2016-10-26 | 电子科技大学 | Double-frequency oscillator design method |
| CN107147408A (en) * | 2017-05-08 | 2017-09-08 | 王昭 | A kind of device for reducing the traction of Direct conversion transmitter frequency |
| CN207603612U (en) * | 2018-02-28 | 2018-07-10 | 成都维星科技有限公司 | A kind of clock circuit for anti-interference antenna |
| CN207852924U (en) * | 2018-02-28 | 2018-09-11 | 成都维星科技有限公司 | A kind of ultrathin 4 channel anti-interference antenna |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112147583A (en) * | 2020-11-25 | 2020-12-29 | 四川斯艾普电子科技有限公司 | High-integration brick type TR assembly |
| CN112147583B (en) * | 2020-11-25 | 2021-02-23 | 四川斯艾普电子科技有限公司 | High-integration brick type TR assembly |
| CN112711042A (en) * | 2021-01-14 | 2021-04-27 | 福建江夏学院 | Clock adjusting circuit and method for stably capturing Beidou satellite signals |
| CN112711042B (en) * | 2021-01-14 | 2023-05-05 | 福建江夏学院 | Clock adjusting circuit and method for stable capturing of Beidou satellite signals |
| CN114844061A (en) * | 2022-06-07 | 2022-08-02 | 合肥工业大学 | Non-frequency coupling phase locking method for high-proportion new energy to be accessed into power grid |
| CN114844061B (en) * | 2022-06-07 | 2024-03-26 | 合肥工业大学 | Non-frequency coupling phase locking method for high-proportion new energy access power grid |
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