CN110137135A - The method for forming conductive layer - Google Patents

The method for forming conductive layer Download PDF

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Publication number
CN110137135A
CN110137135A CN201910465396.XA CN201910465396A CN110137135A CN 110137135 A CN110137135 A CN 110137135A CN 201910465396 A CN201910465396 A CN 201910465396A CN 110137135 A CN110137135 A CN 110137135A
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CN
China
Prior art keywords
layer
metal layer
metal
conductive layer
titanium nitride
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Pending
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CN201910465396.XA
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Chinese (zh)
Inventor
刘冲
吴继科
曹秀亮
丁同国
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Priority to CN201910465396.XA priority Critical patent/CN110137135A/en
Publication of CN110137135A publication Critical patent/CN110137135A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/2855Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/7685Barrier, adhesion or liner layers the layer covering a conductive structure

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

The present invention provides a kind of methods for forming conductive layer, the step of forming conductive layer includes: that dielectric layer is formed on the substrate first, then the first metal layer is formed using physical gas-phase deposition, then the first titanium nitride layer is formed on the first metal layer, finally second metal layer is formed on first titanium nitride layer, wherein, the first metal layer, first titanium nitride layer and second metal layer constitute conductive layer, it reaches unanimity in the grain growth direction of the first metal layer formed by physical gas-phase deposition, so that the grain growth direction of each layer is reached unanimity in first titanium nitride layer and second metal layer on the first metal layer and crystal grain intersection gap reduces, to reduce the surface roughness of the conductive layer, it is given an account of when avoiding the dielectric layer of conductive layer and segment thickness described in subsequent etching Bump defects are formed in electric layer, improve product yield.

Description

The method for forming conductive layer
Technical field
The present invention relates to technical field of manufacturing semiconductors, in particular to a kind of method for forming conductive layer.
Background technique
In semiconductor devices, conductive layer is generally titanium coating, the first titanium nitride layer and the aluminum metal layer stacked gradually, institute It states conductive layer to be generally deposited on dielectric layer, and is used to form top layer circuit layer.In order to form above-mentioned top layer circuit layer, technology people Member needs one photoresist layer of spin coating on the conductive layer, carries out photoetching to photoresist layer to form top layer electricity on photoresist layer Road pattern, and top level circuit diagram case is transferred on the conductive layer to obtain top layer circuit layer.
But at present after the dielectric layer of etching conductive layer and segment thickness is to form top layer circuit layer, it is located at conductive layer Crystal grain intersection bottom dielectric layer on be easy to produce bump defects, cause product yield to reduce.
Summary of the invention
The purpose of the present invention is to provide a kind of methods for forming conductive layer, to solve etching conductive layer and segment thickness Protrusion is led to the problem of when dielectric layer is to form top layer circuit layer on dielectric layer.
In order to solve the above technical problems, the present invention provides a kind of method for forming conductive layer, comprising:
One substrate is provided, is formed with metal interconnecting layer on the substrate;
Dielectric layer is formed, the dielectric layer covers the metal interconnecting layer;
The first metal layer is formed using physical gas-phase deposition, the first metal layer covers the dielectric layer;
The first titanium nitride layer is formed on the first metal layer;And
Form second metal layer on first titanium nitride layer, wherein the first metal layer, the first titanium nitride layer and Second metal layer constitutes conductive layer.
Optionally, in the method for forming conductive layer, the first metal layer is formed using magnetron sputtering technique.
Optionally, in the method for forming conductive layer, when forming the first metal layer using magnetron sputtering technique, technique Intracavitary pressure is passed through argon of the flow between 60scc~100scc between 1mtorr~10mtorr, and in process cavity Gas.
Optionally, in the method for forming conductive layer, using the metallic plasma physical vapour deposition (PVD) of ionization Technique forms the first metal layer.
Optionally, in the method for forming conductive layer, using the metallic plasma physical vapour deposition (PVD) of ionization When technique forms the first metal layer, the pressure in process cavity is passed through stream between 10mtorr~30mtorr, and in process cavity Measure the argon gas between 40scc~80scc.
Optionally, in the method for forming conductive layer, the material of the first metal layer is titanium.
Optionally, in the method for forming conductive layer, the crystal orientation of the first metal layer reaches unanimity and hangs down Directly in the substrate surface, so that being formed in the second metal layer on the first metal layer and first titanium nitride layer Surface roughness be less than or equal to 0.4nm.
Optionally, in the method for forming conductive layer, the material of the second metal layer is aluminium.
Optionally, in the method for forming conductive layer, the first titanium nitride layer is formed using physical gas-phase deposition And second metal layer.
Optionally, in the method for forming conductive layer, the first titanium nitride layer and the are formed using magnetron sputtering technique Two metal layers.
To sum up, the step of present invention provides a kind of method for forming conductive layer, forms conductive layer includes: first on substrate Dielectric layer is formed, the first metal layer is then formed using physical gas-phase deposition, is then formed on the first metal layer First titanium nitride layer finally forms second metal layer on first titanium nitride layer, wherein the first metal layer, first Titanium nitride layer and second metal layer constitute conductive layer, pass through the grain growth for the first metal layer that physical gas-phase deposition is formed Direction is reached unanimity, thus further such that the crystalline substance of the first metal layer and the second metal layer on first titanium nitride layer The direction of growth reaches unanimity grain, crystal grain intersection gap is smaller, surface roughness reduces and surface reflectivity is high, to reduce The surface roughness of the conductive layer, because of the first metal layer when avoiding conductive layer described in subsequent etching and the dielectric layer Grain growth cause the crystal grain intersection gap of the second metal layer excessive again so as to cause shape on the dielectric layer in a jumble At bump defects, product yield is improved.
Detailed description of the invention
Fig. 1 is the step flow chart of the formation conductive layer of the embodiment of the present invention;
Fig. 2-Fig. 6 is the semiconductor schematic diagram in each step of the formation conductive layer of the embodiment of the present invention;
Fig. 7-Fig. 8 is other two kinds of semiconductor structure schematic diagrames of the embodiment of the present invention;
Wherein, description of symbols:
100- substrate, 101- metal interconnecting layer, 110- dielectric layer, 121- the first metal layer, the first titanium nitride layer of 122-, 123- second metal layer, the second titanium nitride layer of 124-, 125- anti-reflecting layer.
Specific embodiment
The method proposed by the present invention for forming conductive layer is made further specifically below in conjunction with the drawings and specific embodiments It is bright.According to following explanation and claims, advantages and features of the invention will be become apparent from.It should be noted that attached drawing is all made of Very simplified form and use non-accurate ratio, only to it is convenient, lucidly aid in illustrating the mesh of the embodiment of the present invention 's.In addition, the structure that attached drawing is shown is often a part of practical structures.Particularly, each attached drawing needs the emphasis shown Difference uses different ratios sometimes.
General conductive layer includes at least titanium coating, the first titanium nitride layer and the aluminum metal layer stacked, generallys use at present Chemical vapor deposition process forms titanium coating, and the grain growth direction of the titanium coating formed in this way is more mixed and disorderly, titanium On the dielectric layer, titanium coating can regard the substrate of the conductive layer as to layer deposition, if the crystal grain of this substrate of titanium coating The direction of growth is disorderly and unsystematic, uneven the first titanium nitride layer and the aluminum metal layer that first will affect on subsequent titanium coating of grain size Formation, aluminum metal layer therein is especially influenced, since the thickness of aluminum metal layer is many compared to remaining several thickness, so titanium This substrate grain growth direction of metal layer is disorderly and unsystematic, and the crystal orientation that will lead to aluminum metal layer is mixed and disorderly, grain size is different, crystal boundary The problems such as place gap is larger, surface roughness increases is amplified, and so as to cause entire conductive layer crystal grain intersection, there are gaps, brilliant The gap of grain intersection is easy in the etching process of the dielectric layer in subsequent conductive layer and segment thickness to influence the uniformity of etching, The speed place more smooth than crystal grain of crystal grain apertured position etching is slow, under identical etch period, above one layer have crystal grain seam The position of gap will form protrusion on one layer below, so in the dielectric layer of etching conductive layer and segment thickness, it is thicker The gap position of the crystal grain intersection of aluminum metal layer is formed on the first titanium nitride layer, titanium coating and dielectric layer one by one immediately below Protrusion finally generates obvious protrusion on the dielectric layer, product yield is caused to reduce, so the formation conductive layer for needing one kind new Method is come when improving the dielectric layer of etching conductive layer and segment thickness to form final top side integrated circuit layer, on the dielectric layer Generate the situation of protrusion.
Based on the above issues, the present invention provides a kind of method for forming conductive layer, is the embodiment of the present invention with reference to Fig. 1, Fig. 1 Formation conductive layer step flow chart, the step of formation conductive layer includes:
S10: a substrate is provided, is formed with metal interconnecting layer on the substrate.
S20: forming dielectric layer, and the dielectric layer covers the metal interconnecting layer;
S30: the first metal layer is formed using physical gas-phase deposition, the first metal layer covers the dielectric layer;
S40: the first titanium nitride layer is formed on the first metal layer;And
S50: second metal layer is formed on first titanium nitride layer, wherein the first metal layer, the first titanium nitride Layer and second metal layer constitute conductive layer.
Specifically, please referring to Fig. 2-Fig. 6, Fig. 2-Fig. 6 is half in each step of the formation conductive layer of the embodiment of the present invention Conductor schematic diagram.
Firstly, being formed with metal interconnecting layer 101 on the substrate 100 as shown in Fig. 2, provide a substrate 100.Specifically, The substrate 100 can be one of monocrystalline silicon, polysilicon, amorphous silicon, and the substrate 100 is also possible to GaAs, silicon is sowed Compound etc., the substrate 100 can also have silicon or silicon upper epitaxial layer structure on insulating layer;The substrate 100 can also be Other semiconductor materials, will not enumerate here.It can have N trap or p-well or gate structure or more in the substrate 100 Layer dielectric layer or multilayer circuit layer etc..In the present embodiment, the step of metal interconnecting layer 101 for example, form a gold medal Belong to layer, the metal layer covers the substrate 100;One photoresist layer of spin coating on the metal layer;To the photoresist layer into Row photoetching, and to metal layer progress dry etching to form the metal interconnecting layer 101, the metal interconnecting layer 101 Material generally selects copper or aluminium, and the metal interconnecting layer 101 can be the either circuit layer on the substrate 100.
Further, as shown in figure 3, forming dielectric layer 110, the dielectric layer 110 covers the metal interconnecting layer 101, Specifically, the material of the dielectric layer 110 can choose silica.The dielectric layer 110 serves not only as dielectric Layer separates its upper layer and its lower layer, and the substrate 100 and metal can be protected mutual in the film layer of subsequent etching thereon Even layer 101 is accidentally etched.In the present embodiment, dielectric layer 110 is formed by chemical vapor deposition process, such as plasmarized Learn gas-phase deposition.
Then, as shown in figure 4, forming the first metal layer 121, the first metal layer using physical gas-phase deposition The 121 covering dielectric layers 110.Specifically, the material of the first metal layer 121 is titanium, in addition, the first metal layer 121 it is also an option that tantalum metal layer, the first metal layer 121 can choose the art, and any one is suitable for being formed The metal material of conductive layer, the application do not do any restriction to the selection of the first metal layer 121.Magnetron sputtering can be used Technique forms the first metal layer 121, the pressure in process cavity is controlled between 1mtorr~10mtorr, to process cavity Inside it is passed through argon gas of the flow between 60scc~100scc.At normal temperature, the power for controlling the radio-frequency power supply in process cavity exists 3000w or so forms high-frequency electric field between the anode and cathode in process cavity, and the intracavitary argon gas of anode ionization process is near anode Highdensity Ar+ ion is generated, Ar+ ion can accelerate to move and hit to the Titanium (target) of cathode under electric field action Titanium (target), the energy of Ar+ ion can be transferred to Titanium so that solid Titanium is knocked out titanium atom, be knocked out Titanium atom move across plasma and reach the surface of the dielectric layer 110 to form grain growth and be orientated the institute that reaches unanimity State the first metal layer 121.It further, in the present embodiment, can also be using the metallic plasma physical vapor of ionization Depositing operation forms the first metal layer 121.First is being formed using the metallic plasma physical gas-phase deposition of ionization When metal layer, the pressure in process cavity is controlled between 10mtorr~30mtorr, and be passed through into process cavity flow between Argon gas between 40scc~80scc.Using radio frequency plasma body technique by solid Titanium plasma sputter, formed TI+ from Son has added negative bias voltage on the substrate 100 at this time, thus TI+ ion can vertically towards 110 apparent motion of dielectric layer with The first metal layer 121 is formed, described first formed using the metallic plasma physical gas-phase deposition of ionization The crystal orientation height of metal layer 121 is consistent.Wherein, experiment shows the metallic plasma physical vapour deposition (PVD) work using ionization The grain growth direction of the first metal layer 121 of the skill than being formed using magnetron sputtering technique is more consistent, and surface is more smooth.? In the present embodiment, in conjunction with Fig. 6, pass through the grain growth direction for the first metal layer 121 that physical gas-phase deposition is formed Reach unanimity, crystal grain intersection gap it is small, for subsequent deposition the first titanium nitride layer 122 and second metal layer 123 laid it is good The biggish second metal layer 123 of thickness that good substrate, especially subsequent growth go out, so that 123 grain growth of second metal layer Direction reaches unanimity, crystal grain intersection gap reduces and surface roughness reduces, avoid the entire conductive layer of subsequent etching and The grain growth when dielectric layer 110 because of the second metal layer 123 and the first metal layer 121 is mixed and disorderly, crystal grain has a common boundary Place gap is excessive and causes to form bump defects on the dielectric layer 110.In the present embodiment, by magnetron sputtering technique, or The crystal orientation for the first metal layer 121 that the metallic plasma physical gas-phase deposition of person's ionization is formed tends to one Cause and perpendicular to 100 surface of substrate so that being subsequently formed in the first metal layer 121 and first titanium nitride layer The surface roughness of the second metal layer 123 on 122 is less than or equal to 0.4nm.
Further, as shown in figure 5, forming the first titanium nitride layer 122 on the first metal layer 121.Specifically, institute State the sum of thickness of the first metal layer 121 and first titanium nitride layer 122 between Between.If described The material selection tantalum metal of one metal layer 121 can then select tantalum metal layer to replace first titanium nitride layer 122.In this reality It applies in example, first titanium nitride layer 122 is formed using physical gas-phase deposition, for example, being formed using magnetron sputtering technique First titanium nitride layer 122.Pass through the crystal growth side for first titanium nitride layer 122 that physical gas-phase deposition is formed To reaching unanimity.
Finally, as shown in fig. 6, forming second metal layer 123 on first titanium nitride layer 122, wherein described first Metal layer 121, the first titanium nitride layer 122 and second metal layer 123 constitute conductive layer.Specifically, the second metal layer 123 Material is aluminium, and the thickness of the second metal layer 123 is between 3.9um~4.1um, because of the second metal layer 123 Thickness is far longer than the first metal layer 121 and first titanium nitride layer 122, so the crystalline substance of the second metal layer 123 The parameters such as the grain direction of growth, the size in crystal grain intersection gap directly affect conductive layer and segment thickness described in subsequent etching The uniformity of dielectric layer 110, so by magnetron sputtering technique, or the metallic plasma physical vapour deposition (PVD) work of ionization Skill, which forms the first metal layer 121, not only ensure that the grain growth direction of itself is reached unanimity, and also ensure described second The grain growth direction of metal layer 123 is reached unanimity and crystal grain intersection gap is smaller.In the present embodiment, using physics gas Phase depositing operation forms the second metal layer 123, for example, forming the second metal layer 123 using magnetron sputtering technique, leads to The crystal growth direction for crossing the second metal layer 123 of physical gas-phase deposition formation reaches unanimity, and surface roughness is small.
It further, is other two kinds of semiconductor structures signal of the embodiment of the present invention with reference to Fig. 7 and Fig. 8, Fig. 7-Fig. 8 Figure, as shown in fig. 7, in the present embodiment, it, can also be in the second metal layer after forming the second metal layer 123 The second titanium nitride layer 124 is formed on 123, wherein the first metal layer 121, the first titanium nitride layer 122, second metal layer 123 And second titanium nitride layer 124 constitute final conductive layer.Specifically, the thickness of second titanium nitride layer 124 betweenBetween.In the present embodiment, second titanium nitride layer 124 is formed using physical gas-phase deposition, For example, forming second titanium nitride layer 124 using magnetron sputtering technique.Described the formed by physical gas-phase deposition The crystal growth direction of nitride titanium layer 124 reaches unanimity.
It in the present embodiment, can also be in second gold medal as shown in figure 8, after forming the second metal layer 123 Belong to and sequentially form the second titanium nitride layer 124 and anti-reflecting layer 125 on layer 123, wherein the first metal layer 121, first nitrogenizes Titanium layer 122, second metal layer 123, the second titanium nitride layer 124 and the anti-reflecting layer 125 constitute final conductive layer.Specifically Ground forms the anti-reflecting layer 125, the thickness of the anti-reflecting layer 125 using chemical vapor deposition process in the present embodiment BetweenBetween, the material of the anti-reflecting layer 125 can choose the silica of doping nitrogen, the anti-reflective The reflectivity of the conductive layer can be reduced by penetrating layer 125, improve the reliability of product.In conjunction with Fig. 6 and Fig. 7, the conductive layer Include at least: the first metal layer 121, the first titanium nitride layer 122 and second metal layer 123, the conductive layer can also roots It include the first metal layer 121, the first titanium nitride layer 122, second metal layer 123 and the second titanium nitride according to actual conditions selection Layer 124, alternatively, including the first metal layer 121, the first titanium nitride layer 122, second metal layer 123, the second titanium nitride layer 124 and the anti-reflecting layer 125.
To sum up, the step of present invention provides a kind of method for forming conductive layer, forms conductive layer includes: first on substrate Dielectric layer is formed, the first metal layer is then formed using physical gas-phase deposition, is then formed on the first metal layer First titanium nitride layer finally forms second metal layer on first titanium nitride layer, wherein the first metal layer, first Titanium nitride layer and second metal layer constitute conductive layer, pass through the grain growth for the first metal layer that physical gas-phase deposition is formed Direction is reached unanimity, thus further such that in second metal layer on the first metal layer and first titanium nitride layer Grain growth direction is reached unanimity, crystal grain intersection gap is smaller, surface roughness reduces and surface reflectivity is high, to reduce The surface roughness of the conductive layer, when avoiding conductive layer described in subsequent etching and the dielectric layer because of first metal The grain growth of layer causes the crystal grain intersection gap of the second metal layer excessive again so as to cause on the dielectric layer in a jumble Bump defects are formed, product yield is improved.
Foregoing description is only the description to present pre-ferred embodiments, not to any restriction of the scope of the invention, this hair Any change, the modification that the those of ordinary skill in bright field does according to the disclosure above content, belong to the protection of claims Range.

Claims (10)

1. a kind of method for forming conductive layer characterized by comprising
One substrate is provided, is formed with metal interconnecting layer on the substrate;
Dielectric layer is formed, the dielectric layer covers the metal interconnecting layer;
The first metal layer is formed using physical gas-phase deposition, the first metal layer covers the dielectric layer;
The first titanium nitride layer is formed on the first metal layer;And
Second metal layer is formed on first titanium nitride layer, wherein the first metal layer, the first titanium nitride layer and second Metal layer constitutes conductive layer.
2. forming the method for conductive layer as described in claim 1, which is characterized in that form described the using magnetron sputtering technique One metal layer.
3. forming the method for conductive layer as claimed in claim 2, which is characterized in that form the first gold medal using magnetron sputtering technique When belonging to layer, the pressure in process cavity be passed through between 1mtorr~10mtorr, and in process cavity flow between 60scc~ Argon gas between 100scc.
4. forming the method for conductive layer as described in claim 1, which is characterized in that using the metallic plasma object of ionization Physical vapor deposition technique forms the first metal layer.
5. forming the method for conductive layer as claimed in claim 4, which is characterized in that using the metallic plasma object of ionization When physical vapor deposition technique forms the first metal layer, the pressure in process cavity is between 10mtorr~30mtorr, and technique The intracavitary argon gas for being passed through flow between 40scc~80scc.
6. such as the method according to any one of claims 1 to 5 for forming conductive layer, which is characterized in that the first metal layer Material be titanium.
7. forming the method for conductive layer as described in claim 1, which is characterized in that the crystal orientation of the first metal layer becomes In consistent and perpendicular to the substrate surface, so that being formed in described on the first metal layer and first titanium nitride layer The surface roughness of second metal layer is less than or equal to 0.4nm.
8. forming the method for conductive layer as described in claim 1, which is characterized in that the material of the second metal layer is aluminium.
9. forming the method for conductive layer as described in claim 1, which is characterized in that form the using physical gas-phase deposition Titanium nitride layer and second metal layer.
10. forming the method for conductive layer as claimed in claim 9, which is characterized in that form first using magnetron sputtering technique Titanium nitride layer and second metal layer.
CN201910465396.XA 2019-05-30 2019-05-30 The method for forming conductive layer Pending CN110137135A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116723762A (en) * 2023-08-08 2023-09-08 荣芯半导体(淮安)有限公司 MIM capacitor and preparation method thereof

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Publication number Priority date Publication date Assignee Title
US6207568B1 (en) * 1998-11-27 2001-03-27 Taiwan Semiconductor Manufacturing Company Ionized metal plasma (IMP) method for forming (111) oriented aluminum containing conductor layer
CN101038907A (en) * 2006-03-15 2007-09-19 国际商业机器公司 Method for forming interconnect structure and the formed interconnect structure
CN103123909A (en) * 2011-11-18 2013-05-29 无锡华润上华科技有限公司 Aluminum interconnecting wire and preparation method thereof
CN103474390A (en) * 2012-06-07 2013-12-25 无锡华润上华科技有限公司 Aluminum metal wire making method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6207568B1 (en) * 1998-11-27 2001-03-27 Taiwan Semiconductor Manufacturing Company Ionized metal plasma (IMP) method for forming (111) oriented aluminum containing conductor layer
CN101038907A (en) * 2006-03-15 2007-09-19 国际商业机器公司 Method for forming interconnect structure and the formed interconnect structure
CN103123909A (en) * 2011-11-18 2013-05-29 无锡华润上华科技有限公司 Aluminum interconnecting wire and preparation method thereof
CN103474390A (en) * 2012-06-07 2013-12-25 无锡华润上华科技有限公司 Aluminum metal wire making method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116723762A (en) * 2023-08-08 2023-09-08 荣芯半导体(淮安)有限公司 MIM capacitor and preparation method thereof

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