CN110069271A - Upgrade method, main control chip and the chip of chip - Google Patents
Upgrade method, main control chip and the chip of chip Download PDFInfo
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- CN110069271A CN110069271A CN201910334806.7A CN201910334806A CN110069271A CN 110069271 A CN110069271 A CN 110069271A CN 201910334806 A CN201910334806 A CN 201910334806A CN 110069271 A CN110069271 A CN 110069271A
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- 238000004891 communication Methods 0.000 claims abstract description 108
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- 238000012423 maintenance Methods 0.000 description 8
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
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Abstract
This application provides a kind of upgrade method of chip, main control chip and chips, wherein the upgrade method of the chip, comprising: main control chip obtains upgrade file；Wherein, main control chip is for upgrading the chip of multiple levels, wherein each level includes at least one chip；The communication passage between storage chip in the chip of main control chip foundation and each level；Wherein, storage chip is the storage chip that program is stored in chip；Main control chip selects the chip of level corresponding with upgrade file according to upgrade file in the chip of all levels；Wherein, the chip of all levels includes the chip that each level of communication passage is established with main control chip；Main control chip passes through communication passage, upgrade file is issued to the storage chip in the chip of level corresponding with upgrade file, it realizes the disposably upgrading to all chips in the chip of level corresponding with upgrade file, while also achieving the grading control to electronic equipment.
Description
Technical field
The present invention relates to electronic technology fields, and in particular to a kind of upgrade method of chip, main control chip and chip.
Background technique
With the development of electronic technology, the use of electronic equipment is more and more common in all trades and professions.Currently on the market mostly
Several electronic equipments is all to carry out assembling it to the module in electronic equipment as made of the identical module assembled of multiple functions
Before, the chip in modules that can be assembled respectively to needs first carries out hardware debugging and software download, finally to all moulds
Module is carried out being assembled into complete machine and be dispatched from the factory after block completes hardware debugging and software download.
Since electronic equipment is by constituting by completing hardware debugging and each standalone module after software download, in electricity
In the use process of sub- equipment in the future, if wanting to modify to the chip in module each in electronic equipment, then need to electricity
Chip in sub- equipment in each standalone module carries out software upgrading, at this point, then needing module all in electronic equipment is only
Vertical carry out software upgrading, considerably increases the maintenance difficulties of maintenance personnel, improves maintenance cost.
So being badly in need of a kind of upgrade method for chip in standalone modules more in electronic equipment, to solve containing multiple
In the electronic equipment of standalone module the problem of modules scaling difficulty.
Summary of the invention
In view of this, the main purpose of the present invention is to provide a kind of upgrade method of chip, main control chip and chip, with
Solve the problems, such as modules scaling difficulty in but standalone module equipment identical containing multiple functions.
First aspect present invention discloses a kind of upgrade method of chip, comprising:
Main control chip obtains upgrade file；Wherein, the main control chip is used to upgrade the chip of multiple levels,
In, each level includes at least one chip；
The communication passage between storage chip in the chip of the main control chip foundation and each level；Wherein, described
Storage chip is the storage chip that program is stored in the chip；
The main control chip selects opposite with the upgrade file according to the upgrade file in the chip of all levels
Answer the chip of level；Wherein, the chip of all levels includes each level that communication passage is established with the main control chip
Chip；
The upgrade file is written to described with the upgrade file phase by the communication passage by the main control chip
Storage chip in the chip of corresponding level.
Optionally, in above-mentioned method, between the storage chip in the chip of the main control chip foundation and each level
Communication passage mode, comprising:
The communication passage between storage chip in the chip of the main control chip foundation and the first level；
The main control chip, which controls, establishes connection between the chip of the storage chip and previous level in the chip of latter level
Circulation passage, wherein the chip of the previous level and the chip of latter level belong in the chip of the multiple level except first
The chip of level except the chip of level.
Optionally, in above-mentioned method, between the storage chip in the chip of the main control chip foundation and each level
Communication passage, comprising:
Selector in chip of the main control chip by controlling each level, establishes itself and each level
The communication passage between storage chip in chip.
Optionally, in above-mentioned method, the main control chip is according to the upgrade file, in the chip of each level
In storage chip select the chip of corresponding with upgrade file level, comprising:
Storage of the main control chip according to the file name in the upgrade file, in the chip of each level
Chip selects the chip of level corresponding with the upgrade file.
Second aspect of the present invention discloses a kind of upgrade method of chip, comprising:
Chip responds the control of main control chip, establishes the connection between the storage chip in the chip and the main control chip
Circulation passage；
The chip responds the main control chip and operates for the control of the selection level chip of upgrade file, described in determination
The relationship of chip and the upgrade file；
The chip passes through the relationship of itself and the upgrade file, receives the upgrading text that the main control chip issues
Part.
Optionally, in above-mentioned method, the chip is the chip of the first level, wherein the chip responds master control core
The communication passage between the storage chip in the chip and the main control chip is established in the control of piece, comprising: the chip is rung
The communication passage between the storage chip in itself and the main control chip is established in the control for answering the main control chip；
The chip is the chip of the level in addition to the chip of the first level in the chip of multiple levels；Wherein, the core
Piece responds the control of main control chip, establishes the communication passage between the storage chip in the chip and the main control chip, wraps
Include: the chip responds the control of the main control chip, establishes between the storage chip in itself and the chip of previous level
Communication passage.
Optionally, in above-mentioned method, the chip passes through the relationship of itself and the upgrade file, receives the master control
The upgrade file that chip issues, comprising:
The chip belongs to the chip of the corresponding level of the upgrade file, and the chip receives and stores the master control core
The upgrade file that piece issues is to the storage chip；
The chip is not belonging to the chip of the corresponding level of the upgrade file, and the chip is ignored under the main control chip
The upgrade file of hair.
Third aspect present invention discloses a kind of main control chip, comprising:
Acquiring unit, for obtaining upgrade file；Wherein, the main control chip is for rising the chip of multiple levels
Grade, wherein each level includes at least one chip；
Establish unit, for establish and the chip of each level in storage chip between communication passage；Wherein, described
Storage chip is the storage chip that program is stored in the chip；
Selecting unit, for according to the upgrade file, storage chip selection in the chip of all levels with it is described
The chip of the corresponding level of upgrade file；Wherein, the chip of all levels includes establishing connection with the main control chip to lead to
The chip of each level in road；
Upgrade unit, for by the communication passage, the upgrade file to be written to the described and upgrade file
Storage chip in the chip of corresponding level.
It is optionally, described to establish unit in above-mentioned main control chip, comprising:
First establishes subelement, for establish and the chip of the first level in storage chip between communication passage；
Second establishes subelement, for the chip by a upper level, establishes the storage core in the chip with next level
Communication passage between piece；Wherein, the chip of a upper level is the current layer that communication passage is established with the main control chip
The chip of a upper level for the chip of grade.
Fourth aspect present invention discloses a kind of chip, comprising:
First response unit establishes the storage chip in the chip and the master for responding the control of main control chip
Control the communication passage between chip；
Second response unit, for responding the main control chip for the control behaviour of the selection level chip of upgrade file
Make, determines the relationship of the chip and the upgrade file；
Receiving unit, for by the relationship of itself and the upgrade file, receive the main control chip issue it is described
Upgrade file.
Compared with prior art, the present invention includes the following advantages:
The invention discloses a kind of upgrade method of chip, main control chip and chips, in chip provided by the present invention
In upgrade method, the chip of level corresponding with upgrade file is selected in the chip of all levels by main control chip, and is led to
It crosses established communication passage and issues upgrade file into the chip of level corresponding with upgrade file, wherein the connection established
Circulation passage are as follows: the communication passage between storage chip in the chip of main control chip foundation and each level, it is disposable right to realize
The upgrading of all chips in the chip of level corresponding with upgrade file, while also achieving the classification control to electronic equipment
System, so that the control operating process to the chip in different levels in electronic equipment is more convenient, solves containing multiple identical
In the electronic equipment of functional module the problem of modules scaling difficulty, convenient for containing the electronic equipment of multiple identical function modules
Operation and maintenance.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
The embodiment of invention for those of ordinary skill in the art without creative efforts, can also basis
The attached drawing of offer obtains other attached drawings.
Fig. 1 is a kind of structural schematic diagram of the upgrade-system of chip disclosed in the embodiment of the present application；
Fig. 2 is a kind of flow diagram of the upgrade method of chip disclosed in the embodiment of the present application；
Fig. 3 is a kind of main control chip structural schematic diagram disclosed in the embodiment of the present application；
Fig. 4 is a kind of structural schematic diagram for establishing unit disclosed in the embodiment of the present application；
Fig. 5 is the structural schematic diagram that another kind disclosed in the embodiment of the present application establishes unit；
Fig. 6 is a kind of structural schematic diagram of selecting unit disclosed in the embodiment of the present application；
Fig. 7 is a kind of chip structure schematic diagram disclosed in the embodiment of the present application；
Fig. 8 is the structural schematic diagram of the second response unit of one kind disclosed in the embodiment of the present application；
Fig. 9 is a kind of structural schematic diagram of receiving unit disclosed in the embodiment of the present application.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
In this application, the terms "include", "comprise" or any other variant thereof is intended to cover non-exclusive inclusion,
So that the process, method, article or equipment for including a series of elements not only includes those elements, but also including not having
The other element being expressly recited, or further include for elements inherent to such a process, method, article, or device.Do not having
There is the element limited in the case where more limiting by sentence "including a ...", it is not excluded that in the mistake including the element
There is also other identical elements in journey, method, article or equipment.
It, can be with except the realizations of functions of the equipments is realized except through an independent electronic equipment in existing technology
Large scale electronic equipment is constituted by assembling each independent electronic equipment, each independent electronic equipment is made to cooperate to realize
The function of equipment.For example, the equipment of food processing assembly line is exactly by multiple independent electronic equipments in food processing factory
What is constituted has the large scale equipment of processed food function.
In an independent electronic equipment, contain multiple functional modules.It wherein, include identical in multiple functional modules
The module of function and the module of different function.And by assembling each independent electronic equipment, make each independent electronics
Equipment cooperates in the large scale equipment for the functions of the equipments realized, each independent electronic equipment included in the equipment,
Equally with multiple functional modules in above-mentioned independent electronic equipment.
Wherein, the module in multiple functional modules contained in above-mentioned electronic equipment is made of different types of chip
's.Therefore, the module of multiple functional modules contained in above-mentioned electronic equipment can also be considered as is assembled by each different chips
Made of chip.In the process upgraded to the chip in each functional module, also correspond to by each different chipsets
The process that chip in chip made of dress is upgraded.
It should be noted that during upgrading to above-mentioned functional module, as to by each different chipsets
During chip in chip made of dress is upgraded, matching between main control chip and each functional module can be passed through
It closes, completes the upgrading to each functional module, as, main control chip and the core as made of each different chip assemblings can be passed through
Each upgrading to the chip as made of each different chip assemblings is completed in cooperation between piece.Wherein, main control chip with it is each
Cooperation between functional module can complete the upgrading to modules in electronic equipment in chip upgrade system.
Wherein, the control chip upgraded for control function module is main control chip, and with the core in functional module
The corresponding chip as made of each different chip assemblings of piece, is mainly used for the control by responding main control chip, carries out phase
Corresponding upgrading or data forwarding.
It should be noted that may include for controlling each core in the above-mentioned electronic equipment containing multiple functional modules
The main control chip of piece upgrading, can not also include the main control chip for controlling each chip upgrade.Certainly, which removes
Each chip constitutes outer, wherein the chip is the chip as made of the assembling of each chip, it is also possible to including other function device
Part.Be primarily related in the present invention: to containing multiple functional modules electronic equipment in functional module in each chip,
Or by each core in each functional module in the large scale equipment that assembles of electronic equipment containing multiple functional modules
Piece, and the main control chip of upgrading control is carried out to above-mentioned each chip.Other component and the present invention in electronic equipment is without too
More associations, just no longer describes one by one.
It should also be noted that, the upgrade method of chip, can be applied to chip system, wherein the chip system is needle
To the module in the above-mentioned electronic equipment containing multiple functional modules, the chip system constructed when being upgraded, as, the core
Piece system is the chip system constructed when being upgraded for the chip in the above-mentioned electronic equipment containing multiple functional chips.
Chip in the chip system is equal to a certain extent in the module in above-mentioned electronic equipment or above-mentioned electronic equipment
Chip.
As shown in Figure 1, chip system includes: the chip of main control chip 101 and multiple levels, each level includes at least one
A chip.
Main control chip 101 is used for: being upgraded to the chip in the chip of multiple levels.
Wherein, main control chip 101 is connected with the chip 102 of the first level, and main control chip 101 passes through the chip of the first level
102 are connected with the chip 103 of the second level, and main control chip 101 passes through the chip 102 of the first level and the chip of the second level
103 are connected with the chip 104 of third level, and so on, main control chip 101 by the chip of previous level successively with later layer
The chip of grade establishes a connection.Wherein, the number of levels of the chip for the level being connected with main control chip 101 can be any
Number.
By taking chip system shown in FIG. 1 as an example, which includes: the chip of 3 levels, and each level includes one
A chip.
Main control chip 101 is connected by Master Communications line with the chip 102 of the first level.Specifically, main control chip 101 is logical
Cross the field programmable gate array (Field-Programmable in Master Communications line and the chip 102 of the first level
Gate Array, FPGA) chip is connected, the selector in chip that main control chip 101 passes through Master Communications line and the first level
It is connected.
Wherein, the selector in the chip 102 of the first level is connected with storage chip, in the chip 102 in the first level
Fpga chip respectively in the chip 102 of the first level selector and storage chip be connected.It should be noted that first layer
Chip in the chip 102 of grade is made of fpga chip, selector and storage chip, in the chip 102 of the first level,
It can be containing any chip, wherein the chip is the chip being made of fpga chip, selector and storage chip.
Main control chip 101 is connected by downloading notice line with the selector in the chip 102 of the first level, main control chip
101 are also connected by chip select line with the selector in the chip 102 of the first level.
Main control chip 101 is connected by the chip 102 of the first level with the chip 103 of the second level.Specifically, master control core
The fpga chip in chip 102 that piece 101 passes through the first level carries out the extension of Master Communications line, so that the chip of the second level
103 being connected by fpga chip in the chip 102 of the first level and main control chip 101.Wherein, the chip of the second level
It includes: that the chip 103 of the second level leads to that 103, which are connected by the fpga chips in the chip 102 of the first level with main control chip 101,
The fpga chip crossed in the chip 102 of the first level is connected with the fpga chip in the chip 103 of the second level, the second level
The fpga chip in chip 102 that chip 103 passes through the first level, is connected with the selector in the chip 103 of the second level.
Wherein, the selector in the chip 103 of the second level is connected with storage chip, in the chip 103 of the second level
Fpga chip respectively in the chip 103 of the second level selector and storage chip be connected.It should be noted that the second level
Chip 103 in chip be to be made of fpga chip, selector and storage chip.It, can in the chip 103 of second level
To contain any chip, wherein the chip is the chip being made of fpga chip, selector and storage chip.
Main control chip 101 expands module by IO, and the connection for establishing the selector in the chip 103 with the second level is closed
System.Wherein, main control chip 101 is expanded module by IO and is established, so that downloading notice line and chip select line expand module by IO, builds
The connection relationship between selector and main control chip 101 in the chip 103 of vertical second level.
Main control chip 101 is connected by the chip 102 of the first level with the chip 103 of the second level.Specifically, master control core
The fpga chip in chip 103 that piece 101 passes through the second level carries out the extension of Master Communications line, so that the chip of third level
104 are connected by the fpga chip in the chip 103 of the second level.Wherein, the chip 103 of the second level passes through the first level
Fpga chip in chip is connected with main control chip 101, and therefore, the chip 104 of third level is equivalent to through the second level
Chip 103 and the chip of the first level 102 and main control chip 101 establish connection relationship.
Wherein, the chip of the fpga chip in chip that the chip 104 of third level passes through the second level and the first level
In fpga chip establish a connection, comprising: the chip 104 of third level passes through the FPGA in the chip 103 of the second level
Chip establishes the fpga chip connection relationship in the chip 104 with third level, and the chip 104 of third level passes through the second level
Chip 103 in fpga chip, establish the connection relationship with the selector in the chip 104 of third level.
It should be noted that the selector in chip 104 in third level is connected with storage chip, the core of third level
Fpga chip in piece 104 respectively in the chip 104 of third level selector and storage chip be connected.There is still a need for explanations
It is that the chip in the chip 104 of third level is made of fpga chip, selector and storage chip, third level
In chip 103, any chip can be contained, wherein the chip is made of fpga chip, selector and storage chip
Chip.
Main control chip 101 expands module by IO, and the connection for establishing the selector in the chip 104 with third level is closed
System.Wherein, main control chip 101 expands module by IO, so that the selector in the chip 104 of third level passes through downloading notice
Line and chip select line establish a connection with main control chip 101.
It should be noted that when the selector and main control chip 101 that are not belonging in the chip 102 of the first level pass through downloading
It when notice line and chip select line establish connection, needs to expand module by IO, wherein IO expansion module is equivalent to provide to expand and connect
Mouthful, the interface can be used for the selector in the chip 103 of the second level or the selector in the chip 104 of third level with
Main control chip 101 establishes communication passage.Wherein, IO expands interface provided by module and is not restricted to for the second level
Connection of the selector between main control chip 101 in chip 103 in selector or the chip of third level 104, can be with
It is the connection between the selector and main control chip in the chip of any level.
It, can also it should be further noted that the chip connecting with main control chip 101 to be divided into the standard of which level
Being divided by the function of the chip and with the order of connection of main control chip 101, it is also possible to artificially to divide.Specifically
, the chip 102 of the first level in this chip system is the chip directly to establish a connection with main control chip 101, first
Chip in the chip 102 of level belongs to same functional module, as, first in the electronic equipment upgraded
The function of chip in the chip 102 of level is identical.Contain multiple independent chips in the chip 102 of first level, it is each
Chip is identical in addition to function, and the chip and device in other one standalone feature chips of composition are also identical.
It still needs to further illustrate, the chip for being divided into same level in the electronic equipment upgraded,
The functional module of the chip functions ownership of the chip is also possible to different.That is, in addition to can be in the electronic equipment
The chip for belonging to same function is divided into the chip of the first level, the core for belonging to same function another in the electronic equipment
Piece is divided into except the chip of other levels, it is of course also possible to be divided into several layers the identical chip of same function is belonged to
The chip of grade.
When the chip for wanting one of the chip in the electronic equipment to a variety of different function types identical function carries out
When upgrading, then need to carry out level division to the chip in the electronic equipment.Wherein, when the level of the chip for the upgrading to be divided
When dividing more than two layers, main control chip controls to be established between the chip of the storage chip and previous level in the chip of latter level
Communication passage.Wherein, the chip of previous level and the chip of latter level belong in the chip of multiple levels except the first level
The chip of level except chip.
It needs to be illustrated, main control chip is by extension Master Communications line, so that depositing in the chip of latter level
Communication passage is established between storage chip and the chip of previous level.
Wherein, in the chip 103 of the second level and the chip 104 of third level, the chip 102 of the second level relative to
The chip 101 of first level just needs to establish storage chip in the chip 102 with the second level by the chip 101 of the first level
Communication passage.It is to need to pass through first layer for the link relation between the chip 102 and main control chip 101 of the second level
What the chip 102 of grade was established.It can similarly obtain, the link relation between the chip 103 and main control chip 101 of third level will also lead to
The chip 103 of the chip 102 and the second level of crossing the first level is established.
Main control chip 101 is connected by downloading notice line with the selector in the chip 102 of the first level, main control chip
101 are also connected by chip select line with the selector in the chip 102 of the first level.Selector in the chip of latter level can be with
Module is expanded by IO, is connected by downloading notice line with the selector in the chip of latter level, can similarly pass through piece
Route selection is connected with the selector in the chip of latter level.
It is each to the electronic equipment for being able to achieve functions of the equipments above by an independent electronic equipment, or by assembling
Independent electronic equipment constitutes large scale equipment to realize the electronic equipment of functions of the equipments, constructs chip upgrade system presented above
System, can be used to upgrade the modules in multiple functional modules in above-mentioned electronic equipment.
The chip system provided based on the above embodiment, another embodiment of the application additionally provide a kind of upgrading side of chip
Method, referring to FIG. 2, the described method comprises the following steps:
S201, main control chip obtain upgrade file.
Wherein, main control chip is for upgrading the chip of multiple levels, wherein each level includes at least one core
Piece.
It should be noted that main control chip can obtain what user submitted by the data transmission interface in main control chip
The chip of upgrade file, a certain level which is used to connect main control chip upgrades.
Also it should be further noted that main control chip is to carry out in the chip system for controlling the chip of each level
The chip of upgrading.
The communication passage between storage chip in the chip of S202, main control chip foundation and each level.
Wherein, storage chip is the storage chip that program is stored in chip.
It should be noted that the selector in chip of the main control chip by controlling each level, is established and each level
Chip in storage chip between communication passage.
Wherein, as shown in connection with fig. 1, main control chip establish and the chip of each level in storage chip between connection
Channel, comprising: main control chip issues high level signal to the chip of each level by downloading notice line, and high level signal is enabled
The pin for the downloading notice line being connected with selector in the chip of each level, and then control the storage in main control chip and chip
The foundation of communication passage between chip.
It should be noted that the signal that main control chip is issued by downloading notice line can may be low electricity for high level
It is flat.Above content is pointed out that the downloading for the chip for enabling each level by high level signal notifies wire pin, certainly,
The downloading notice wire pin of the chip of each level can be enabled by low level signal.
In example in conjunction with Fig. 1 chip system shown, the specific content as shown in Figure 2 of step S202, comprising:
Main control chip 101 establishes the communication passage with storage chip in the chip 102 of the first level respectively, establishes and second
The communication passage of storage chip in the chip 103 of level, the connection for establishing storage chip in the chip 104 with third level are logical
Road.
Specifically, main control chip 101 issues high electricity by selector of the downloading notice line into the chip 102 of the first level
Ordinary mail number, the pin of the enabled downloading notice line being connected with the selector in the chip 102 of the first level of high level signal.
It should be noted that the selector in chip of the main control chip 101 by controlling each level, establish itself and it is every
The communication passage between storage chip in the chip of one level.
Main control chip 101 notifies line by the downloading that the selector in the chip 103 with the second level is connected, to the second layer
Selector in the chip 103 of grade issues high level signal, the selection in the enabled chip 103 with the second level of high level signal
The pin for the downloading notice line that device is connected, and then the core of the fpga chip and the second level in the chip 102 of the first level of control
The foundation of the communication passage between storage chip in piece 103.
Because main control chip 101 by the selector in the chip 102 of enabled first level, is established and first layer
The chip 102 of grade establishes communication passage by Master Communications line.So the chip 103 when the second level passes through to the first level
Chip 102 in fpga chip carry out the extension of Master Communications line, and main control chip 101 is made to issue enable signal to the second level
Chip 103 in selector so that the fpga chip in the chip 103 of the second level and the chip 102 of the first level is established
Communication passage is also equivalent to, and main control chip 101 carries out the extension of Master Communications line by the chip 102 to the first level, is established
103 communication passage of chip of main control chip 101 and the second level.
Specifically, main control chip 101 makes master control chip 101 pass through downloading notice line and third by I/O expansion module
Selector in the chip 104 of level is connected.Main control chip 101 is connected by the selector in the chip 104 with third level
Downloading notify line, the selector into the chip 104 of third level to issue high level signal, high level signal is enabled, with the
The pin for the downloading notice line that selector in the chip 104 of three levels is connected, and then in the chip 103 of the second level of control
The foundation of the communication passage between storage chip in fpga chip and the chip of third level 104.
Because main control chip 101 by the selector in the chip 103 of enabled second level, is established and first layer
The communication passage that the chip 103 of fpga chip and the second level in the chip 102 of grade is established by Master Communications line, so,
When the chip 104 of third level carries out the extension of Master Communications line by fpga chip in the chip 103 to the second level, and make
Main control chip 101 issues selector of the enable signal into the chip 104 of third level so that the chip 104 of third level with
Fpga chip in the chip 103 of second level establishes communication passage, is also equivalent to, and main control chip 101 is by the second layer
The chip 102 of grade carries out the extension of Master Communications line, establishes 104 communication passage of chip of main control chip 101 Yu third level.
By examples detailed above it can be seen that main control chip establish and each level chip in storage chip between connection
The mode in channel, comprising:
The communication passage between storage chip in the chip of main control chip foundation and the first level；
Main control chip controls that connection is established between the chip of the storage chip and previous level in the chip of latter level is logical
Road.
Wherein, the chip of previous level and the chip of latter level belong in the chip of multiple levels the core for removing the first level
The chip of level except piece.
The control of S203, chip response main control chip, establish the connection between storage chip and main control chip in chip
Channel.
Selector choosing when the pin for the downloading notice line being connected when main control chip is enabled with selector in chip, in chip
The connection state for selecting switching Master Communications line and chip, the connection for establishing main control chip between the storage chip of chip are logical
Road, the above process can be understood as being that main control chip notifies the chip in each level to prepare upgrading.
In example in conjunction with Fig. 1 chip system shown, the specific content as shown in Figure 2 of step S203, comprising:
The chip 104 of the chip 102 of first level, the chip 103 of the second level and third level responds master control respectively
The control of chip 101 is established the communication passage between the storage chip in the chip 102 of the first level and main control chip 101, is built
The communication passage between storage chip and main control chip 101 in the chip 103 of vertical second level, and establish third level
Communication passage in chip 104 between storage chip and main control chip 101.
Specifically, the selector in the chip 101 of the first level receives high level signal instruction, select Master Communications
Line is connect with the storage chip in the chip 102 of the first level, establishes the storage chip in the chip 102 of the first level and master control
Communication passage between chip 101.
Specifically, the selector in the chip 103 of the second level receives high level signal instruction, selection will
Fpga chip in the chip 102 of first level passes through in the chip 103 of the extension of Master Communications line and the second level
Storage chip connection, establish the FPGA core in the storage chip in the chip 103 of the second level and the chip 102 of the first level
Communication passage between piece.
Specifically, the selector in the chip 104 of third level receives high level signal instruction, selection will
Fpga chip in the chip 103 of second level passes through in the chip 104 of the extension of Master Communications line and third level
Storage chip connection, establish the FPGA core in the storage chip in the chip 104 of third level and the chip 103 of the second level
Communication passage between piece.
By examples detailed above it can be seen that chip responds the control of main control chip if chip is the chip of the first level, establish
The communication passage between storage chip and main control chip in chip, comprising: chip responds the control of the main control chip, establishes
The communication passage between storage chip and the main control chip in itself.
If chip is the chip of the level in addition to the chip of the first level in the chip of multiple levels, chip responds master control core
The communication passage between storage chip and main control chip in chip is established in the control of piece, comprising: chip responds main control chip
Control, establishes the communication passage between the storage chip in itself and the chip of previous level.
S204, main control chip select level corresponding with upgrade file according to upgrade file in the chip of all levels
Chip.
Wherein, the chip of all levels includes the chip that each level of communication passage is established with main control chip.
For main control chip according to upgrade file, that is arrived selected in all levels by chip select line is corresponding with upgrade file
The chip of level.When main control chip has chosen the chip of level corresponding with upgrade file by chip select line, just mean
Be determined that the upgrade file is to be used to the chip of the level for choosing chip select line be upgraded.
It should be noted that main control chip can be according to the file name in upgrade file, by chip select line in all layers
The chip of selection level corresponding with upgrade file in the chip of grade.Specifically, main control chip can by chip select line it is enabled with
The chip select pin of the corresponding chip of upgrade file selects level corresponding with upgrade file in the chip of currently all level in fact
Chip.Optionally, main control chip, can in such a way that chip select line enables the chip select pin of chip corresponding with upgrade file
To be the chip select pin for sending chip selection signal to chip by chip select line.
The file name of the file name of upgrade file based on main control chip, the upgrade file can be main control chip
By being parsed to upgrade file, the file name of obtained upgrade file.
It still needs to be further illustrated, chip select line is corresponding pass with the relationship of the chip in the chip of each level
System, as, the chip in the chip of each level has corresponding chip select line.Main control chip can be by selecting the layer
The corresponding chip select line of all chips, chooses the chip of the level in the chip of grade.
In example in conjunction with Fig. 1 chip system shown, step S204 is specific as shown in Fig. 2, main control chip 101 is according to liter
Grade file, selection and upgrading in the chip 104 of the chip 102 of the first level, the chip 103 of the second level or third level
The detailed process of the chip of the corresponding level of file are as follows:
File name of the main control chip 101 according to upgrade file, by chip select line the first level chip 102, second
The chip of level corresponding with upgrade file is selected in the chip 103 of level and the chip 104 of third level.
If upgrade file is upgraded for the chip 101 to the first level, main control chip 101 just passes through first
The corresponding chip select line of chip 102 of level sends chip selection signal to the chip 102 of the first level, main control chip 101 is made to choose the
The chip of one level.
If upgrade file is upgraded for the chip 103 to the second level, main control chip 101 just passes through second
The corresponding chip select line of chip 103 of level sends chip selection signal to the chip 103 of the second level, main control chip 101 is made to choose the
The chip 103 of two levels.
If upgrade file is upgraded for the chip 104 to third level, main control chip 101 just passes through third
The corresponding chip select line of chip 104 of level sends chip selection signal to the chip 104 of third level, main control chip 101 is made to choose the
The chip 104 of three levels.
It should be noted that if main control chip 101 determined the upgrade file be for the chip 102 to the first level into
Row upgrading, then main control chip 101 just sends chip selection signal by the corresponding chip select line of chip 102 of the first level, selection the
The chip 102 of one level.If the chip 103 of the second level, then main control chip 101 is corresponding by the chip 103 of the second level
Chip select line send chip selection signal, select the second level the corresponding chip select line of chip 103, and so on, if other levels
Chip, the corresponding chip select line of chip that main control chip just passes through other levels sends chip selection signal, selection and upgrade file pair
The chip for other levels answered.
It can be seen that in one embodiment, main control chip 101 can determine whether out the corresponding level chip of upgrade file,
Chip selection signal is sent to the chip select pin of chip using the corresponding chip select line of level chip determined, with real currently all level
Chip in corresponding with the upgrade file level of selection chip.
In addition, in another embodiment, main control chip 101 can also send different types of choosing letter by chip select line
Number, to determine the corresponding relationship of upgrade file and all level chips.
Specifically, main control chip 101 determines the corresponding level chip of upgrade file, it is corresponding using determining level chip
Chip select line sends the chip selection signal of the first kind, such as high level letter to the chip select pin of the corresponding level chip of upgrade file
Number；The layer that main control chip 101 is connected using the corresponding chip select line of level chip in addition to determining level chip to chip select line
The chip select pin of grade chip, sends the chip selection signal of Second Type, such as low level signal.
S205, chip response main control chip for upgrade file selection level chip control operation, determine chip with
The relationship of upgrade file.
It should be noted that control operation of the chip response main control chip for the selection level chip of upgrade file, really
Determine the relationship of chip and upgrade file.It executes, it is intended that chip can respond main control chip according to upgrade file, in all levels
Chip in corresponding with the upgrade file level of selection chip operation, determine the relationship of itself and upgrade file.
It should also be noted that, control operation of the chip response main control chip for the selection level chip of upgrade file,
Determine that the mode of the relationship of chip and upgrade file can be with are as follows: receive the chip selection signal that main control chip is issued by chip select line, really
The relationship of fixed itself and upgrade file.
In example in conjunction with Fig. 1 chip system shown, step S205 specifically:
The chip select pin of the chip 101 of first level receives, and the chip 102 of main control chip 101 to the first level is corresponding
The chip selection signal that chip select line is sent, determines the chip 102 of the first level and the relationship of upgrade file.
The chip select pin of the chip 103 of second level receives, and the chip 103 of main control chip 101 to the second level is corresponding
The chip selection signal that chip select line is sent, determines the chip 103 of the second level and the relationship of upgrade file.
The chip select pin of the chip 104 of third level receives, and the chip 104 of main control chip 101 to third level is corresponding
The chip selection signal that chip select line is sent, determines the chip 104 of third level and the relationship of upgrade file.
Specifically, chip judges that chip select pin receives the chip selection signal that chip select line issues, then in a kind of embodiment
It determines itself to belong to the corresponding chip of upgrade file.Chip judges that chip select pin does not receive the piece choosing letter that chip select line issues
Number, it is determined that go out and itself is not belonging to the corresponding chip of upgrade file.
Certainly, in another embodiment, the class for the chip selection signal that chip is issued according to the received chip select line of chip select pin
Type, to determine the relationship of itself and upgrade file.Specifically, chip identifies that the chip selection signal that chip select line issues is the first kind
Signal, it is determined that itself belong to the corresponding chip of upgrade file；Chip identifies that the chip selection signal that chip select line issues is second
The signal of type, it is determined that itself be not belonging to the corresponding chip of upgrade file.
S206, main control chip pass through communication passage, the chip of transmission upgrade file to each level.
It should be noted that main control chip is logical by the connection established with the storage chip in the chip of each level
Road issues upgrade file to the storage chip in the chip of each level.
In example in conjunction with Fig. 1 chip system shown, the specific content as shown in Figure 2 of step S206, comprising:
The chip 103 with the chip 102 of the first level, the second level that main control chip 101 is established by step S202
And the communication passage of the storage chip in the chip 104 of third level, upgrade file is sent into the chip 102 of the first level
Storage chip, send upgrade file to the storage chip in the chip 103 of the second level, and send upgrade file to third
Storage chip in the chip 104 of level.
S207, chip judge the relationship of itself and upgrade file.
Wherein, after chip receives upgrade file, it is thus necessary to determine that the relationship of itself and upgrade file.Specifically, chip can
To pass through the received chip selection signal of chip select line, to determine the relationship of itself and upgrade file.
Chip itself and the relationship of upgrade file include: the chip that chip belongs to the corresponding level of upgrade file and chip not
Belong to the chip of the corresponding level of upgrade file.When upgrade file is for upgrading to chip itself, chip itself with
The relationship of upgrade file are as follows: chip belongs to the chip of the corresponding level of upgrade file.When upgrade file is not intended to chip certainly
When body is upgraded, the relationship of chip itself and upgrading text are as follows: chip is not belonging to the chip of the corresponding level of upgrade file.
In example in conjunction with Fig. 1 chip system shown, setting upgrade file belongs to the corresponding liter of chip of the second level
Grade file, then in this example, the judging result of step S207 is specifically as shown in Figure 2:
The chip 102 of first level judges the relationship of itself and upgrade file are as follows: the chip 102 of the first level is not belonging to rise
The chip of the grade corresponding level of file.The chip 103 of second level judges the relationship of itself and upgrade file are as follows: the second level
Chip 103 belongs to the chip of the corresponding level of upgrade file.The chip 104 of third level judges the relationship of itself and upgrade file
Are as follows: the chip 104 of third level is not belonging to the chip of the corresponding level of upgrade file.
It should be noted relationship of the chip according to itself and upgrade file, Lai Zhihang step S208.
S208, chip ignore upgrade file or receive and store upgrade file.
Wherein, when chip judges the relationship of itself and upgrade file are as follows: chip is not belonging to the corresponding level of upgrade file
Chip, then chip ignores upgrade file.When chip judges the relationship of itself and upgrade file are as follows: it is opposite that chip belongs to upgrade file
The chip of level is answered, then chip receives and stores upgrade file.
It should also be noted that, then chip receives upgrading text when chip belongs to the chip of the corresponding level of upgrade file
Part is simultaneously upgrade file storage chip stored in the chip.
It is still to be illustrated, the mode that chip ignores upgrade file, which can be, first to be received the upgrade file and delete again
The upgrade file is also possible to first receive the upgrade file and stores storage chip of the upgrade file into chip, can be with
It is that chip neither receives upgrade file nor stores the upgrade file, certainly, chip can also not make upgrade file any
Reaction movement.
In example in conjunction with Fig. 1 chip system shown, the specific content as shown in Figure 2 of step S208, comprising:
The chip 102 of first level ignores upgrade file.
It should be noted that the mode that the chip 102 of the first level ignores upgrade file can be with are as follows: the chip of the first level
102 reception the upgrade file after delete the upgrade file.
The chip 103 of second level receives and stores upgrade file.
It should be noted that the chip 103 of the second level receives upgrade file, and upgrade file is stored in the second level
Chip 103 in storage chip.
The chip 104 of third level ignores upgrade file.
Similarly, the chip 104 of third level ignores the mode of upgrade file and may be: the chip 104 of third level is first
The upgrade file is deleted after receiving the upgrade file.
By examples detailed above it can be seen that chip passes through the relationship of itself and the upgrade file, receives main control chip and issue
The upgrade file.
Specifically, chip is determined itself to belong to the corresponding chip of upgrade file, then the upgrading that main control chip issues is received
File, and the upgrade file is written to itself storage chip.Chip determines itself to be not belonging to the corresponding chip of upgrade file,
The upgrade file is deleted again after then can receive the upgrade file that main control chip issues.
It should be noted that from step S206 to the content of step S208: main control chip is incited somebody to action by communication passage
Upgrade file is written to the storage chip in the chip of level corresponding with the upgrade file.
It should also be noted that, upgrade file is written in the chip of the corresponding level of the upgrade file by main control chip
After storage chip, main control chip can discharge the chip select pin of chip, i.e. main control chip is not passing through piece of the chip select line to chip
Pin is selected to send chip selection signal.
Optionally, main control chip can also discharge selector in the chip of each level and connect again by downloading notice line
Downloading notice line pin, with realize notify the chip upgrade of each level to terminate.Certainly, main control chip can use and pass through
The pin for the downloading notice line that downloading notice line selector into the chip of each level connects sends the mode of release signal, real
Now to the release of pin.
After the chip of each level receives the release signal again, then download communication line can be disconnected by selector and is deposited
Store up the communication passage between chip.
The upgrade method for the chip that the present embodiment is shown is carried out by three-level of the number of levels of the chip in chip system
It shows.It is right referring again to above-mentioned method when the chip number of levels in the chip system upgraded is more than three-level
The chip of each level is upgraded in chip system.No matter in chip system the level of chip quantity, upgrade method with it is upper
It states shown method and has no the similarities and differences, just no longer repeat one by one.
The upgrade method of chip provided in this embodiment is selected in the chip of all levels and upgrading by main control chip
The chip of the corresponding level of file, and upgrade file is issued to level corresponding with upgrade file by established communication passage
Chip in, wherein the communication passage established are as follows: main control chip establish and each level chip in storage chip between
Communication passage, realize the disposably upgrading to all chips in the chip of level corresponding with upgrade file, while also real
The grading control to electronic equipment is showed, so that more just to the control operating process of the chip in different levels in electronic equipment
Victory solves the problems, such as modules scaling difficulty in the electronic equipment containing multiple identical function modules, convenient for containing multiple
The operation and maintenance of the equipment of function equal modules.
The embodiment of the present application also provides a kind of main control chips, with reference to Fig. 3, comprising:
Acquiring unit 301, for obtaining upgrade file.
Wherein, main control chip is for upgrading the chip of multiple levels, wherein each level includes at least one core
Piece.
Establish unit 302, for establish and the chip of each level in storage chip between communication passage
Wherein, storage chip is the storage chip that program is stored in chip.
Selecting unit 303, for the storage chip selection and upgrading text according to upgrade file, in the chip of all levels
The chip of the corresponding level of part.
Wherein, the chip of all levels includes the chip that each level of communication passage is established with main control chip.
Upgrade unit 304, for core of the text write-in part to level corresponding with upgrade file will to be upgraded by communication passage
Storage chip in piece.
In the present embodiment, layer corresponding with upgrade file is selected in the chip of all levels by selecting unit 303
The chip of grade, and upgrade file is issued to upgrade unit 304 by the communication passage that established unit 302 is established, wherein it is built
The communication passage that vertical unit 302 is established are as follows: the connection between storage chip in the chip of main control chip foundation and each level
It realizes the disposably upgrading to all chips in the chip of level corresponding with upgrade file, while also achieving pair in channel
The grading control of electronic equipment, so that the control operating process to the chip in different levels in electronic equipment is more convenient, solution
Determined modules scaling difficulty in the electronic equipment containing multiple identical function modules the problem of, convenient for containing multiple identical function
The operation and maintenance of the electronic equipment of energy module.
The course of work of each unit disclosed in each embodiment of the present invention and the liter of chip provided in an embodiment of the present invention
Grade method is identical, and details are not described herein again.
Optionally, in another embodiment of the application, referring to fig. 4, unit is established, comprising:
First establishes subelement 401, for establish and the chip of the first level in storage chip between communication passage.
Second establishes subelement 402, for the chip by a upper level, establishes the storage in the chip with next level
Communication passage between chip.
Wherein, the chip of a upper level is the upper level that the chip of current level of communication passage is established with main control chip
Chip.
In the present embodiment, subelement 401 and second is established by first establish the foundation of subelement 402 and each level
Communication passage between the storage chip of chip.Make master control chip by established communication passage issue upgrade file to
The chip of the corresponding level of upgrade file is realized disposably to all chips in the chip of level corresponding with upgrade file
Upgrading, while the grading control to electronic equipment is also achieved, it, can be disposably to same layer in electronic equipment by grading control
The chip of grade is all upgraded, more convenient to the control operation of the chip in different levels in electronic equipment, is solved and is contained
There is the problem of modules scaling difficulty in the electronic equipment of multiple identical function modules, convenient for containing multiple function equal modules
Electronic equipment operation and maintenance.
The course of work of each unit disclosed in each embodiment of the present invention and the liter of chip provided in an embodiment of the present invention
Grade method is identical, and details are not described herein again.
Optionally, in another embodiment of the application, referring to Fig. 5, unit is established, comprising:
Third establishes subelement 501, for the selector in the chip by controlling each level, establish itself with it is each
The communication passage between storage chip in the chip of level.
The course of work of each unit disclosed in each embodiment of the present invention and the liter of chip provided in an embodiment of the present invention
Grade method is identical, and details are not described herein again.
Optionally, in another embodiment of the application, referring to Fig. 6, selecting unit, comprising:
Subelement 601 is selected, for the storage core according to the file name in upgrade file, in the chip of each level
Piece selects the chip of level corresponding with upgrade file.
The course of work of each unit disclosed in each embodiment of the present invention and the liter of chip provided in an embodiment of the present invention
Grade method is identical, and details are not described herein again.
The embodiment of the present application also provides a kind of chips, with reference to Fig. 7, comprising:
First response unit 701 establishes the storage chip in the chip and master control for responding the control of main control chip
Communication passage between chip.
Second response unit 702 is operated for responding main control chip for the control of the selection level chip of upgrade file,
Determine the relationship of chip and upgrade file.
Receiving unit 703 receives the upgrade file that main control chip issues for passing through the relationship of itself and upgrade file.
In the present embodiment, the control that main control chip is responded by the first response unit 701, establishes depositing in the chip
The communication passage between chip and main control chip is stored up, the second response unit 702 responds the selection that main control chip is directed to upgrade file
The control of level chip operates, and determines the relationship of chip and upgrade file, and receiving unit 703 receives the upgrading that main control chip issues
File is realized the disposably upgrading to all chips in the chip of level corresponding with upgrade file, while being also achieved pair
The grading control of electronic equipment, so that the control operating process to the chip in different levels in electronic equipment is more convenient, solution
Determined modules scaling difficulty in the electronic equipment containing multiple identical function modules the problem of, convenient for containing multiple identical function
The operation and maintenance of the electronic equipment of energy module.
The course of work of each unit disclosed in each embodiment of the present invention and the liter of chip provided in an embodiment of the present invention
Grade method is identical, and details are not described herein again.
Optionally, in another embodiment of the application, referring to Fig. 8, the second response unit, comprising:
First response subelement 801 establishes the storage chip in itself and institute for responding the control of the main control chip
State the communication passage between main control chip.
Wherein, for the first response subelement 801 when chip is the chip of the first level, chip responds the control of main control chip
System, establishes the communication passage between storage chip and main control chip in chip.
Second response subelement 802, the control of the main control chip is responded for chip, establishes the storage chip in itself
Communication passage between the chip of previous level.
Wherein, outer layer of the second response subelement 802 when the chip for removing the first level in the chip that chip is multiple levels
When the chip of grade, chip responds the control of main control chip, and the connection established between storage chip and main control chip in chip is logical
Road.
The course of work of each unit disclosed in each embodiment of the present invention and the liter of chip provided in an embodiment of the present invention
Grade method is identical, and details are not described herein again.
Optionally, in another embodiment of the application, referring to Fig. 9, receiving unit, comprising:
Receiving subelement 901 receives and stores master control when for belonging to the chip of the corresponding level of upgrade file when chip
The upgrade file that chip issues is to storage chip.
Ignoring unit 902, when for being not belonging to the chip of the corresponding level of upgrade file when chip, ignoring under main control chip
The upgrade file of hair.
The course of work of each unit disclosed in each embodiment of the present invention and the liter of chip provided in an embodiment of the present invention
Grade method is identical, and details are not described herein again.
All the embodiments in this specification are described in a progressive manner, same and similar portion between each embodiment
Dividing may refer to each other, and each embodiment focuses on the differences from other embodiments.Especially for system or
For system embodiment, since it is substantially similar to the method embodiment, so describing fairly simple, related place is referring to method
The part of embodiment illustrates.System and system embodiment described above is only schematical, wherein the conduct
The unit of separate part description may or may not be physically separated, component shown as a unit can be or
Person may not be physical unit, it can and it is in one place, or may be distributed over multiple network units.It can root
According to actual need that some or all of the modules therein is selected to achieve the purpose of the solution of this embodiment.Ordinary skill
Personnel can understand and implement without creative efforts.
Professional further appreciates that, unit described in conjunction with the examples disclosed in the embodiments of the present disclosure
And algorithm steps, can be realized with electronic hardware, computer software, or a combination of the two, in order to clearly demonstrate hardware and
The interchangeability of software generally describes each exemplary composition and step according to function in the above description.These
Function is implemented in hardware or software actually, the specific application and design constraint depending on technical solution.Profession
Technical staff can use different methods to achieve the described function each specific application, but this realization is not answered
Think beyond the scope of this invention.
The foregoing description of the disclosed embodiments enables those skilled in the art to implement or use the present invention.
Various modifications to these embodiments will be readily apparent to those skilled in the art, as defined herein
General Principle can be realized in other embodiments without departing from the spirit or scope of the present invention.Therefore, of the invention
It is not intended to be limited to the embodiments shown herein, and is to fit to and the principles and novel features disclosed herein phase one
The widest scope of cause.
Claims (10)
1. a kind of upgrade method of chip characterized by comprising
Main control chip obtains upgrade file；Wherein, the main control chip is for upgrading the chip of multiple levels, wherein
Each level includes at least one chip；
The communication passage between storage chip in the chip of the main control chip foundation and each level；Wherein, the storage
Chip is the storage chip that program is stored in the chip；
The main control chip selects layer corresponding with the upgrade file according to the upgrade file in the chip of all levels
The chip of grade；Wherein, the chip of all levels includes the core that each level of communication passage is established with the main control chip
Piece；
The upgrade file is written to described corresponding with the upgrade file by the main control chip by the communication passage
Storage chip in the chip of level.
2. the method according to claim 1, wherein the main control chip is established in the chip with each level
The mode of communication passage between storage chip, comprising:
The communication passage between storage chip in the chip of the main control chip foundation and the first level；
The main control chip controls that connection is established between the chip of the storage chip and previous level in the chip of latter level is logical
Road, wherein the chip of the previous level and the chip of latter level belong in the chip of the multiple level except the first level
Chip except level chip.
3. method according to claim 1 or 2, which is characterized in that the main control chip establishes the chip with each level
In storage chip between communication passage, comprising:
Selector in chip of the main control chip by controlling each level, establishes the chip of itself and each level
In storage chip between communication passage.
4. the method according to claim 1, wherein the main control chip is according to the upgrade file, each
Storage chip in the chip of the level selects the chip of level corresponding with the upgrade file, comprising:
Storage chip of the main control chip according to the file name in the upgrade file, in the chip of each level
Select the chip of level corresponding with the upgrade file.
5. a kind of upgrade method of chip characterized by comprising
Chip responds the control of main control chip, and the connection established between the storage chip in the chip and the main control chip is logical
Road；
The chip responds the main control chip for the control operation of the selection level chip of upgrade file, determines the chip
With the relationship of the upgrade file；
The chip passes through the relationship of itself and the upgrade file, receives the upgrade file that the main control chip issues.
6. according to the method described in claim 5, it is characterized in that, the chip is the chip of the first level, wherein the core
Piece responds the control of main control chip, establishes the communication passage between the storage chip in the chip and the main control chip, wraps
Include: the chip responds the control of the main control chip, establishes the connection between the storage chip in itself and the main control chip
Circulation passage；
The chip is the chip of the level in addition to the chip of the first level in the chip of multiple levels；Wherein, the chip is rung
The communication passage between the storage chip in the chip and the main control chip is established in the control for answering main control chip, comprising: institute
The control that chip responds the main control chip is stated, the connection established between the storage chip in itself and the chip of previous level is logical
Road.
7. according to the method described in claim 5, it is characterized in that, the chip passes through the pass of itself and the upgrade file
System, receives the upgrade file that the main control chip issues, comprising:
The chip belongs to the chip of the corresponding level of the upgrade file, and the chip receives and stores under the main control chip
The upgrade file of hair is to the storage chip；
The chip is not belonging to the chip of the corresponding level of the upgrade file, and the chip ignores what the main control chip issued
The upgrade file.
8. a kind of main control chip characterized by comprising
Acquiring unit, for obtaining upgrade file；Wherein, the main control chip is used to upgrade the chip of multiple levels,
Wherein, each level includes at least one chip；
Establish unit, for establish and the chip of each level in storage chip between communication passage；Wherein, the storage
Chip is the storage chip that program is stored in the chip；
Selecting unit, for the storage chip selection and the upgrading according to the upgrade file, in the chip of all levels
The chip of the corresponding level of file；Wherein, the chip of all levels includes establishing communication passage with the main control chip
The chip of each level；
Upgrade unit, for the upgrade file being written to described opposite with the upgrade file by the communication passage
Answer the storage chip in the chip of level.
9. main control chip according to claim 8, which is characterized in that described to establish unit, comprising:
First establishes subelement, for establish and the chip of the first level in storage chip between communication passage；
Second establishes subelement, for the chip by a upper level, establish storage chip in the chip with next level it
Between communication passage；Wherein, the chip of a upper level is the current level that communication passage is established with the main control chip
The chip of a upper level for chip.
10. a kind of chip characterized by comprising
First response unit establishes storage chip and the master control core in the chip for responding the control of main control chip
Communication passage between piece；
Second response unit, for responding the main control chip for the control operation of the selection level chip of upgrade file, really
The relationship of the fixed chip and the upgrade file；
Receiving unit receives the upgrading that the main control chip issues for passing through the relationship of itself and the upgrade file
File.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN113254044A (en) * | 2021-06-07 | 2021-08-13 | 深圳市蔚来芯科技有限公司 | High-reliability image chip remote upgrading method and system |
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