CN110058459B - Liquid crystal display panel and liquid crystal display device comprising same - Google Patents

Liquid crystal display panel and liquid crystal display device comprising same Download PDF

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Publication number
CN110058459B
CN110058459B CN201910153779.3A CN201910153779A CN110058459B CN 110058459 B CN110058459 B CN 110058459B CN 201910153779 A CN201910153779 A CN 201910153779A CN 110058459 B CN110058459 B CN 110058459B
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alignment layer
substrate
liquid crystal
thickness
crystal display
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CN110058459A (en
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邱长儒
朱夏青
林凤琳
陈俐君
陈傅丞
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Innolux Corp
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Innolux Display Corp
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Abstract

A liquid crystal display panel and a liquid crystal display apparatus including the same, the liquid crystal display panel including: a first substrate; a second substrate arranged opposite to the first substrate; the first alignment layer is arranged on the first substrate, and the edge of the first alignment layer is provided with at least one bent structure when viewed from a top view direction; and a liquid crystal layer arranged between the first substrate and the second substrate.

Description

Liquid crystal display panel and liquid crystal display device comprising same
The application is a divisional application, the application number of the parent case: 201410232000.4, filing date: year 2014, day 5, month 28, title: a liquid crystal display panel and a liquid crystal display device including the same.
Technical Field
The present invention relates to a liquid crystal display panel and a liquid crystal display device including the same, and more particularly, to a liquid crystal display panel having an alignment layer with a novel structure and a liquid crystal display device including the same.
Background
As display technologies have been advanced, all devices have been developed to be small, thin and light, and thus, the conventional cathode ray tube has been developed into a liquid crystal display device. In particular, liquid crystal display devices are used in a wide variety of fields, and display devices such as mobile phones, notebook computers, video cameras, music players, mobile navigation devices, and televisions, which are used in daily life, are used as display panels.
The brightness, contrast, color and visual angle of the lcd panel are the main parameters for determining the viewing effect of the lcd device. With the development of liquid crystal display devices, the panels currently in mainstream or development can be classified into: twisted Nematic (TN), Vertical Alignment (VA), and in-plane alignment (IPS).
The vertical alignment liquid crystal display panel needs to help the injected liquid crystal molecules to be arranged through the alignment layer, so that the effect of adjusting the bright and dark display is achieved. However, since the Thin Film Transistor (TFT) substrate and the Color Filter (CF) substrate have patterns and the alignment layer is usually coated with a uniform thickness, a step difference occurs on the surface of the alignment layer, and the step difference will cause abnormal rubbing or monomer aggregation, which affects the alignment of the liquid crystal.
In view of the above, there is a need to develop a liquid crystal display panel capable of improving the rubbing abnormality of the alignment layer or the monomer aggregation, so as to improve the liquid crystal alignment abnormality and further improve the display effect of the liquid crystal display panel.
Disclosure of Invention
The invention aims to provide a liquid crystal display panel and a liquid crystal display device comprising the same, so as to solve the problem of abnormal liquid crystal alignment and further improve the display effect of the liquid crystal display panel and the liquid crystal display device.
Another objective of the present invention is to provide a method for manufacturing a liquid crystal display panel, which can manufacture the liquid crystal display panel.
To achieve the above object, the present invention provides a liquid crystal display panel comprising: a first substrate, on which a pixel electrode, a data line and a scan line are disposed; a second substrate disposed opposite to the first substrate; the first alignment layer is arranged on the first substrate, the data line, the scanning line and the pixel electrode; and a liquid crystal layer arranged between the first substrate and the second substrate. The first alignment layer on one of the data line and the scanning line has a second thickness, and the first thickness is greater than the second thickness.
Generally, the thickness of the data lines and/or the scan lines of the lcd panel is larger than that of the pixel electrodes. In the liquid crystal display panel of the invention, the first thickness of the first alignment layer on the pixel electrode is designed to be larger than the second thickness of the first alignment layer on the data line or/and the scanning line, so that the height difference between the pixel electrode and the surface of the first alignment layer on the data line or/and the scanning line can be reduced, the problem of abnormal rubbing of the alignment layer or monomer aggregation is further improved, and the display effect of the liquid crystal display panel is further improved.
In addition, the invention also provides a preparation method of the liquid crystal display panel, which comprises the following steps: providing a first substrate and a second substrate, wherein a pixel electrode, a data line and a scanning line are arranged above the first substrate, and the second substrate is arranged opposite to the first substrate; forming a first alignment layer on the first substrate, the data lines, the scanning lines and the pixel electrodes, wherein the first alignment layer on the pixel electrodes has a first thickness, the first alignment layer on one of the data lines and the scanning lines has a second thickness, and the first thickness is greater than the second thickness; and injecting a liquid crystal layer between the first substrate and the second substrate.
In the method for manufacturing the liquid crystal display panel of the present invention, a patterning means commonly used in the art may be used to pattern the alignment layer to have different thicknesses. For example, a relief printing plate (APR plate) with a special microstructure can be used to directly fabricate a patterned alignment layer by transfer printing; or forming an alignment layer with uniform thickness, and performing photolithography and etching to obtain a patterned alignment layer; or coating an alignment layer with uniform thickness, patterning the alignment layer in an embossing mode before curing, and curing the alignment layer. However, the patterning of the alignment layer is not limited to these methods.
In the liquid crystal display panel and the method for manufacturing the same of the present invention, as long as the first thickness (T1) of the first alignment layer on the pixel electrode is greater than the second thickness (T2) of the first alignment layer of the data line and/or the scan line, the problem of photo-alignment abnormality can be improved. Preferably, the ratio (T1/T2) between the first thickness and the second thickness is between 1 and 10 (1 ≦ T1/T2 ≦ 10); more preferably between 1 and 5 (1. ltoreq. T1/T2. ltoreq.5); and most preferably between 2 and 4 (2. ltoreq. T1/T2. ltoreq.4). However, the thickness ratio can be adjusted according to the distance between the pixel electrode, the data line and the scan line and the surface of the first substrate, and is not limited to the range of the thickness ratio.
In the liquid crystal display panel and the manufacturing method thereof of the invention, a color filter unit and a black matrix are also arranged on the second substrate. In addition, a second alignment layer is formed on the color filter unit and the black matrix. The second alignment layer on the color filter unit has a fourth thickness, the second alignment layer on the black matrix has a fifth thickness, and the fourth thickness is smaller than the fifth thickness. In some embodiments, the color filter partially covers the black matrix, and the thickness of the second alignment layer at the overlapping portion of the color filter and the black matrix is smaller than the thickness of the second alignment layer at the non-overlapping portion of the color filter and the black matrix.
In the liquid crystal display panel and the method for manufacturing the same of the present invention, at least one spacer is further disposed on the first substrate or the second substrate, and preferably, the spacer is disposed on the second substrate. When the first substrate and the second substrate are assembled, the spacer can be arranged between the first substrate and the second substrate, so that a predetermined space is formed between the first substrate and the second substrate, and the subsequent injection of liquid crystal molecules is facilitated. When the spacer is disposed on the first substrate, the first alignment layer covers the spacer and has a third thickness, and the third thickness is smaller than the first thickness and the second thickness. Preferably, the second substrate is provided with a spacer, and the second alignment layer covers the spacer and has a third thickness, and the third thickness is smaller than the fourth thickness and the fifth thickness; meanwhile, the third thickness is smaller than the first thickness and the second thickness. In some cases, the third thickness of the alignment layer on the spacers approaches 0nm, which is almost not measured.
In the liquid crystal display panel and the method for fabricating the same of the present invention, the first substrate may further include a thin film transistor device, wherein the thin film transistor device includes: the semiconductor layer is arranged on the insulating layer, the source electrode and the drain electrode are arranged on the semiconductor layer, and the source electrode and the drain electrode are separated by a preset distance to form a channel region. The first alignment layer is also disposed on the thin film transistor device, wherein the first alignment layer on the source and the drain has a sixth thickness, the first alignment layer in the channel region has a seventh thickness, and the sixth thickness is smaller than the seventh thickness.
In addition, in the liquid crystal display panel and the manufacturing method thereof of the invention, a protective layer is further formed on the first substrate to cover the data lines, the scanning lines and the thin film transistor elements. The passivation layer has an opening to expose the drain of the tft device, the pixel electrode is disposed on the passivation layer and extends toward the opening to electrically connect to the drain, wherein the first alignment layer in the opening has an eighth thickness, and the sixth thickness of the first alignment layer on the drain (more specifically, on the pixel electrode on the drain) is smaller than the eighth thickness.
Furthermore, in the liquid crystal display panel and the method for manufacturing the same of the present invention, the first alignment layer disposed outside the thin film transistor device (more specifically, in the region where the pixel electrode is disposed on the first substrate without the thin film transistor device) has a first thickness, and the first thickness is greater than the sixth thickness.
In the liquid crystal display panel and the method for manufacturing the same of the present invention, the material of the alignment layer (including the first alignment layer and the second alignment layer) is not particularly limited, and may be the alignment layer material commonly used in the art, such as Polyimide (PI), Polyvinylcinnamate (PVCN), Polymethylmethacrylate (PMMA), and the like, but the invention is not limited thereto. Preferably, the alignment layer material of the present invention is polyimide.
In the liquid crystal display panel and the method for manufacturing the same of the present invention, in addition to designing the thickness of the alignment layer (including the first alignment layer and the second alignment layer), at least one protrusion structure, at least one protuberance, or a combination thereof may be formed on the surface of the alignment layer. Preferably, the first substrate includes a display region and a non-display region, and the protrusion structure and the protrusion are disposed on the first alignment layer on the non-display region corresponding to the first substrate. In addition, the second substrate may also include a display region and a non-display region, which correspond to the display region and the non-display region of the first substrate, respectively, and the protrusion structures and the protrusions are also disposed on the second alignment layer on the non-display region corresponding to the second substrate. Preferably, the protrusion structure and the protuberance are disposed on the edge region of the first alignment layer and/or the second alignment layer. The design of the protrusion structure and the protrusions can enhance the pressure and adhesion of the edge of the alignment layer to the substrates (including the first substrate and the second substrate), reduce the overflow of the alignment layer material and the film shrinkage during curing, and further prevent the alignment layer from shifting.
The material of the alignment layer, whether it is the first alignment layer or the second alignment layer, may be the same as the material of the protrusion structure and/or the protuberance disposed thereon. In addition, the protrusion structures and/or the protuberances are preferably integrally formed with the alignment layer. Here, a relief or a mask having a specific microstructure corresponding to the protrusion structure and/or the protuberance may be used so that the alignment layer is formed simultaneously with or separately from the protrusion structure and/or the protuberance provided thereon. Here, the term "protrusion structure" means that the height of the protrusion top from the surface of the alignment layer exceeds 30 nm; the term "protrusion" refers to a height of the top of the protrusion from the surface of the alignment layer less than 30 nm. In addition, in the present invention, the protrusion structure has an uneven surface, or the protrusion structure has a ridge-like structure.
In the liquid crystal display panel and the method for manufacturing the same of the present invention, the viscosity of the alignment layer material is related to the degree of polymerization or the type of the polymer. For example, when the same polymer material is used, the higher the polymerization degree, the higher the viscosity of the alignment layer material. Therefore, in one embodiment of the present invention, the alignment layer is made of a material with high viscosity, such as: polymers of higher molecular weight. In this case, at least one protrusion structure, at least one protuberance, or a combination thereof may be formed on the surface of the alignment layer. Preferably, the protrusion structure and the protuberance are formed on the surface of the alignment layer at the same time. In addition, when the protrusion structure is formed on the surface of the alignment layer, the ratio of the height of the protrusion structure (more specifically, the height of the top of the protrusion structure from the surface of the alignment layer) to the thickness of the alignment layer adjacent to the protrusion structure is between 2 and 10. In one embodiment of the present invention, the alignment layer is made of a material with a low viscosity, such as: a polymer having a relatively low molecular weight. In this case, a bump may be formed on the surface of the alignment layer; in addition, the edge of the alignment layer may further have at least one curved structure. Here, the "curved structure" may include a structure formed by an arc type, a broken line type, a wave type, or a combination thereof.
In the liquid crystal display panel and the method for manufacturing the same of the present invention, the alignment layer (including the first alignment layer and the second alignment layer) may selectively include a plurality of particles. Wherein, the particle size of the non-display area is larger than that of the display area. Here, the "particle" may be a crystal nucleus, a crystal, a grain, an aggregate, or the like, and is within the range defined by the particle of the present invention as long as a significant granular shape is formed in the alignment layer. In particular, in some embodiments, the protuberances may be formed by a plurality of particle aggregates, in addition to a relief or mask having a specific microstructure.
In addition, in the liquid crystal display panel and the preparation method thereof, a frame glue is used for combining the first substrate and the second substrate. Therefore, the liquid crystal display panel of the invention further comprises a frame glue positioned between the first substrate and the second substrate. The frame glue can selectively cover part of the alignment layer; more specifically, the sealant may selectively cover the edge region of the alignment layer. When the alignment layer is further provided with the protruding structures and/or the bumps, the sealant preferably covers the protruding structures and/or the bumps; due to the design of the protrusion structure and/or the bulge, the contact area between the frame glue and the alignment layer can be increased, and the peeling of the frame glue and the alignment layer can be reduced.
In addition to the foregoing liquid crystal display panel, the present invention also provides a liquid crystal display device, including: a backlight module; and the liquid crystal display panel is arranged on the backlight module.
Drawings
Fig. 1 is a schematic diagram of a liquid crystal display panel according to a preferred embodiment of the invention.
Fig. 2 is a partial schematic view of a tft substrate of an lcd panel according to a preferred embodiment of the invention.
Fig. 3 is a schematic cross-sectional view of a tft substrate of an lcd panel according to a preferred embodiment of the invention.
Fig. 4A and 4B are partially enlarged schematic views of a tft substrate of an lcd panel according to a preferred embodiment of the invention.
FIG. 5 is a cross-sectional view of a color filter substrate of a liquid crystal display panel according to a preferred embodiment of the invention.
FIG. 6 is a schematic view of a first alignment layer of a liquid crystal display panel on a TFT substrate according to a preferred embodiment of the invention.
Fig. 7A to 7D are schematic cross-sectional views of a first alignment layer in a non-display region of a liquid crystal display panel according to a preferred embodiment of the invention.
Fig. 8A to 8C are schematic cross-sectional views of a first alignment layer in a non-display region of a liquid crystal display panel according to a preferred embodiment of the invention.
Fig. 9A is a schematic view illustrating a space between a first alignment layer and sealant of a liquid crystal display panel according to a preferred embodiment of the invention.
Fig. 9B is a schematic view illustrating a space between the first alignment layer and the sealant of the lcd panel according to another preferred embodiment of the invention.
FIG. 10 is a schematic view of a first alignment layer of a liquid crystal display panel according to a preferred embodiment of the invention.
FIG. 11 is a partial schematic view of a first alignment layer of a liquid crystal display panel on a TFT substrate according to another preferred embodiment of the invention.
Fig. 12 is a schematic view of a liquid crystal display device of the present invention.
In the drawings, the main reference symbols indicate:
1 thin film transistor substrate, 11 first substrate, 12 scanning lines, 13 data lines, 14 thin film transistor units, 141 gates, 142 insulating layers, 143 semiconductor layers, 1441 sources, 1442 drains, 1443 channel regions, 145 protective layers, 1451 openings, 15 pixel electrodes, 16 first alignment layers, 161 protrusion structures, 162 bumps, 163 surfaces, 164 particles, 17 storage electrodes, 2 color filter substrates, 21 second substrate, 22 color filter units, 23 black matrix, 24 protective layers, 25 common electrode layers, 26 second alignment layers, 3 spacers, 4 liquid crystal layers, 5 sealant, 6 wirings, 7 liquid crystal display devices, D display regions, H1 height, H2 height, N non-display regions, P edge regions, T thickness, T1 first thickness, T2 second thickness, T3 third thickness, T4 fourth thickness, T5 fifth thickness, T6 sixth thickness, T7 seventh thickness, T9 thickness.
Detailed Description
The following description is provided for illustrative purposes only, and is not intended to limit the scope of the present disclosure. The invention is capable of other and different embodiments and its several details are capable of modification in various other respects, all without departing from the spirit and scope of the present invention.
Fig. 1 is a schematic view of a liquid crystal display panel according to a preferred embodiment of the invention. The liquid crystal display panel of the present embodiment includes: a thin film transistor substrate 1, a color filter substrate 2, a plurality of spacers 3, a liquid crystal layer 4 and a sealant 5. The thin film transistor substrate 1 and the color filter substrate 2 are oppositely arranged, the spacer 3 and the liquid crystal layer 4 are arranged between the thin film transistor substrate 1 and the color filter substrate 2, and the thin film transistor substrate 1 and the color filter substrate 2 are combined by the frame glue 5. Next, the structures of the thin film transistor substrate 1 and the color filter substrate 2 of the liquid crystal display panel of the present invention and the manufacturing method thereof will be described in detail, respectively.
First, as shown in fig. 2 and fig. 3, wherein fig. 2 is a schematic top view of the thin film transistor substrate of the liquid crystal display panel of the present embodiment, and fig. 3 is a schematic cross-sectional view of the thin film transistor substrate of the liquid crystal display panel of the present embodiment along a section line a-a' of fig. 2. The thin film transistor substrate of the present embodiment includes: a first substrate (not shown) having a scan line 12, a data line 13, a tft unit 14, a pixel electrode 15 and a storage electrode 17 disposed thereon. Here, two adjacent scan lines 12 and two adjacent data lines 13 define a pixel unit; in a pixel unit, the pixel unit includes a thin film transistor unit 14, a pixel electrode 15 and a storage electrode 17, and the pixel electrode 15 is disposed between two adjacent scan lines 12 and two adjacent data lines 13. Here, the materials of the scan lines 12, the data lines 13, and the storage electrodes 17 may be conductive materials commonly used in the art, such as metals, alloys, metal oxides, metal oxynitrides, or other electrode materials commonly used in the art; and is preferably a metallic material.
Next, as shown in fig. 3, the thin film transistor substrate of the present embodiment includes: a first substrate 11, a data line 13, a scan line (not shown), and a tft unit 14, wherein the data line 13, the scan line (not shown), and the tft unit 14 are disposed on the first substrate 11. In the thin film transistor unit 14, it includes: a gate electrode 141 disposed on the first substrate 11; an insulating layer 142 (also referred to as a gate insulating layer) covering the gate 141 and the first substrate 11; a semiconductor layer 143 disposed on the insulating layer 142; a source electrode 1441 and a drain electrode 1442 disposed on the semiconductor layer 143, wherein the source electrode 1441 and the drain electrode 1442 are separated by a predetermined distance to form a channel region 1443. Here, the insulating layer 142 also covers the data line 13 and the scan line (not shown). In the present embodiment, the thin film transistor unit 14 can be manufactured by a conventional thin film transistor process, and therefore, the details thereof are not repeated herein. In addition, the first substrate 11 is a substrate commonly used in the art, such as a glass substrate, a plastic substrate, a silicon substrate, a ceramic substrate, and the like. Furthermore, the gate electrode 141 may be made of a conductive material commonly used in the art, such as a metal, an alloy, a metal oxide, a metal oxynitride, or other electrode materials commonly used in the art; and preferably a metal material, but the present invention is not limited thereto. As the material of the insulating layer 142, a gate insulating layer material commonly used in the art, such as silicon nitride (SiN); the semiconductor layer 143 may also be made of semiconductor layer materials commonly used in the art, including: amorphous silicon, polycrystalline silicon, organic materials such as P13, DH4T, pentacene ring, and the like; however, the present invention is not limited thereto.
After the data lines 13, the scan lines (not shown) and the tft elements 14 are formed, as shown in fig. 3, a passivation layer 145 is further formed to cover the data lines 13, the scan lines (not shown) and the tft elements 14. The passivation 145 has an opening 1451 to expose the drain 1442. Next, a pixel electrode 15 is formed, which is disposed on the protection layer 145 and extends toward the opening 1451 to electrically connect to the drain 1442. Here, the material of the protection layer 145 may be a passivation layer material such as silicon oxide, which is commonly used in the art. In addition, the pixel electrode 15 may be a patterned electrode layer commonly used in the art, such as a zigzag electrode or a zigzag electrode; and the material of the pixel electrode 15 may be a transparent conductive material commonly used in the art, such as a transparent electrode material of a metal oxide such as ITO, IZO, etc.
Finally, as shown in fig. 3, a photo-alignment monomer is further coated on the passivation layer 145 and the pixel electrode 15, and a first alignment layer 16 is formed after curing. In the present embodiment, the first alignment layer 16 does not have a uniform thickness, but the thickness of the first alignment layer 16 is adjusted according to the height of the component structure below the first alignment layer 16, so that the height difference (step difference) of the surface of the first alignment layer 16 can be minimized. Here, a patterned alignment layer can be directly fabricated by a transfer method using a relief printing plate (APR plate) having a special microstructure; or forming an alignment layer with uniform thickness, and performing photolithography and etching to obtain a patterned alignment layer; or coating the alignment layer with uniform thickness, patterning the alignment layer in an embossing mode before curing to make the alignment layer have different thicknesses, and curing the alignment layer to obtain the product. However, the patterning of the alignment layer is not limited to these methods. After the above processes, the thin film transistor substrate of the present embodiment is completed. Next, the thickness design of the first alignment layer 16 of the present embodiment will be described in detail.
Fig. 4A is an enlarged schematic view of a data line region of the tft substrate of this embodiment. The first alignment layer 16 on the pixel electrode 15 has a first thickness T1, the first alignment layer 16 of the data line 13 has a second thickness T2, and the first thickness T1 is greater than the second thickness T2. Preferably, the ratio (T1/T2) between the first thickness T1 and the second thickness T2 is between 1 and 10 (1. ltoreq. T1/T2. ltoreq.10); more preferably between 1 and 5 (1. ltoreq. T1/T2. ltoreq.5); and most preferably between 2 and 4 (2. ltoreq. T1/T2. ltoreq.4). In the embodiment, the first thickness T1 may be between 0.1 μm and 0.2 μm, and the second thickness T2 may be between 0.01 μm and 0.08 μm; however, the present invention is not limited to the above thickness range, and the object of the present invention can be achieved by reducing the height difference of the surface of the first alignment layer 16 as long as the component structure under the first alignment layer 16 is higher and the thickness of the first alignment layer 16 is thinner. Here, only the data line region is partially illustrated, however, those skilled in the art will understand that the scan line region may also be designed with the same thickness of the first alignment layer as the data line region.
In addition, as shown in fig. 4B, the thin film transistor device region of the thin film transistor substrate of the present embodiment is partially enlarged. The first alignment layer 16 on the source 1441 and the drain 1442 has a sixth thickness T6, the first alignment layer 16 in the channel region 1443 has a seventh thickness T7, and the sixth thickness T6 is smaller than the seventh thickness T7. In addition, the first alignment layer 16 in the opening 1451 has an eighth thickness T8, and the sixth thickness T6 of the first alignment layer 16 on the drain 1442 is smaller than the eighth thickness T8. Furthermore, the first alignment layer 16 disposed outside the thin film transistor device 14 (more specifically, the region of the first substrate 11 where the pixel electrode 15 is disposed without the thin film transistor device 14) has a first thickness T1, and the first thickness T1 is greater than a sixth thickness T6 of the first alignment layer 16 on the drain 1442.
As shown in fig. 4A and 4B, in the present embodiment, the thickness of the first alignment layer 16 in different regions is adjusted such that the thickness of the first alignment layer 16 decreases with the increase of the component structure below the first alignment layer 16, thereby achieving the purpose of reducing the height difference (level difference) of the surface of the first alignment layer 16. Therefore, the problems of abnormal brushing or monomer aggregation which are caused by the step difference of the first alignment layer 16 and influence on the liquid crystal alignment and the like can be prevented, and the display effect of the liquid crystal display panel is improved.
Next, as shown in fig. 5, a cross-sectional view of the color filter substrate of the liquid crystal display panel of the present embodiment is shown. The color filter substrate of the present embodiment includes: a second substrate 21, a color filter 22 and a black matrix 23. The color filter units 22 and the black matrix 23 are disposed on the second substrate 21, and the black matrix 23 is disposed between two adjacent color filter units 22. Then, a passivation layer 24, a common electrode layer 25 and a second alignment layer 26 are further sequentially formed on the color filter unit 22 and the black matrix 23, thereby completing the color filter substrate of the present embodiment. Here, the material of the passivation layer 24 is the same as the material of the passivation layer 145 (shown in fig. 3) on the tft substrate, and thus is not described herein again. In addition, the common electrode layer 25 of the present embodiment may be a flat electrode layer commonly used in the art, and the material thereof may be a transparent conductive material commonly used in the art, such as a transparent electrode material of a metal oxide such as ITO, IZO, etc. Moreover, the second alignment layer 26 of the present embodiment is prepared by the same method as the first alignment layer, and therefore, the description thereof is omitted. It is to be noted that the second alignment layer 26 of the present embodiment does not have a uniform thickness, but the thickness of the second alignment layer 26 is adjusted according to the height of the component structure under the second alignment layer 26, so that the height difference (step difference) of the surface of the second alignment layer 26 can be minimized. Next, the thickness design of the second alignment layer 26 of the present embodiment will be described in detail.
As shown in fig. 5, the second alignment layer 26 on the color filter unit 22 has a fourth thickness T4, the second alignment layer 26 on the black matrix 23 has a fifth thickness T5, and the fourth thickness T4 is smaller than the fifth thickness T5. Here, the fourth thickness T4 may be between 0.01 μm and 0.08 μm, and the fifth thickness T5 may be between 0.1 μm and 0.2 μm; however, the present invention is not limited to the above thickness range, and the height difference of the surface of the second alignment layer 26 can be reduced by the present invention as long as the thickness of the second alignment layer 26 is thinner as the device structure covered by the second alignment layer 26 is higher. In addition, the color filter 22 partially covers the black matrix 23, and at this time, the thickness T9 of the second alignment layer 26 where the color filter 22 overlaps the black matrix 23 is smaller than the thickness of the second alignment layer 26 where the color filter 22 does not overlap the black matrix 23 (i.e., the position indicated by the fourth thickness T4).
In addition, the liquid crystal display panel of the present embodiment further includes at least one spacer 3 disposed between the thin film transistor substrate 1 and the color filter substrate 2 (as shown in fig. 1). More specifically, the spacer 3 is disposed on the second substrate 21, and the second alignment layer 26 covers the spacer 3; the second alignment layer 26 on the spacer 3 has a third thickness T3, and the third thickness T3 is smaller than the fourth thickness T4 and the fifth thickness T5. If the thickness of the spacer 3 is compared with the thickness of the first alignment layer 16 on the tft substrate (please refer to fig. 3), the third thickness T3 is smaller than the first thickness T1 of the first alignment layer 16 on the pixel electrode 15 and the second thickness T2 of the first alignment layer 16 of the data line 13. In some embodiments, the third thickness T3 of the second alignment layer 26 on the spacer 3 is relatively thin, even approaching 0nm (i.e., not measurable by Scanning Electron Microscopy (SEM)).
In the present embodiment, the material of the alignment layer (including the first alignment layer 16 and the second alignment layer 26) is not particularly limited, and may be the alignment layer material commonly used in the art, such as Polyimide (PI), Polyvinylcinnamate (PVCN), Polymethylmethacrylate (PMMA), and the like, but the invention is not limited thereto. Preferably, the alignment layer material of the present embodiment uses polyimide with high viscosity.
After the thin film transistor substrate 1 and the color filter substrate 2 are completed, as shown in fig. 1, the thin film transistor substrate 1 and the color filter substrate 2 are combined and bonded by the sealant 5, and the liquid crystal molecules are injected to form the liquid crystal layer 4, thereby completing the liquid crystal display panel of the present embodiment. In order to improve the adhesion between the first alignment layer 16 and the second alignment layer 26 and the sealant 5 (please refer to fig. 1, fig. 3, and fig. 5), the edge regions of the first alignment layer 16 and the second alignment layer 26 of the present embodiment are further designed with a microstructure. Next, the microstructures of the edge regions of the first alignment layer 16 and the second alignment layer 26 of the present embodiment will be described in detail; the edge regions of the first alignment layer 16 and the second alignment layer 26 may have the same or different designs, and only the first alignment layer 16 is described herein, and the second alignment layer 26 is not described herein again.
FIG. 6 is a schematic view of a first alignment layer of the LCD panel of this embodiment on a TFT substrate. As shown in fig. 6, in the liquid crystal display panel of the present embodiment, the first alignment layer 16 is disposed on the tft substrate 1, and a protrusion 161 and a plurality of protrusions 162 are further disposed on the edge region P of the first alignment layer 16. When the thin film transistor substrate 1 defines the display region D and the non-display region N, the protrusion structures 161 and the protrusions 162 on the first alignment layer 16 are disposed on the non-display region N of the thin film transistor substrate 1. In the present embodiment, the material of the first alignment layer 16 is the same as the material of the protrusion structures 161 and the protrusions 162, and the protrusion structures 161 and the protrusions 162 are integrally formed with the first alignment layer 16. Here, the protrusion structures 161 may be formed at the same time as the first alignment layer 16 is formed using a relief or mask corresponding to the pattern of the first alignment layer 16 and the protrusion structures 161 thereon; and a relief or mask corresponding to the pattern of the first alignment layer 16 and the protrusion structures 161 and the protrusions 162 thereon may also be used to form the protrusion structures 161 and the protrusions 162 at the same time as the first alignment layer 16. However, in other embodiments, the protrusions 162 may be formed by particles (including nuclei, crystals, grains, or aggregates) generated when the alignment layer material is polymerized, without using a relief or mask corresponding to the pattern of the protrusions 162.
FIG. 7A to FIG. 7D are schematic cross-sectional views of the first alignment layer of the liquid crystal display panel of the embodiment at the non-display area N along the line B-B'. As shown in fig. 7A, the ratio of the height H1 of the protrusion structure 161 of the first alignment layer 16 from the surface 163 of the first alignment layer 16 to the thickness T of the alignment layer 16 adjacent to the protrusion structure 161 is between 2 and 10. Here, the height H1 may be between 150nm and 300nm, and the thickness T may be between 10nm and 100 nm; however, the present invention is not limited to the above thickness range, and the protrusion 161 has a significant height above the first alignment layer 16, so as to enhance the pressure and adhesion of the edge of the alignment layer to the substrate, reduce the problems of overflow of the alignment layer material and shrinkage of the cured alignment layer, and further prevent the alignment layer from shifting. In addition, a plurality of protrusions 162 are disposed beside the protrusion structures 161 on the first alignment layer 16; here, the height H2 of the protrusions 162 may be between 5nm and 30nm, but the present invention is not limited thereto. Furthermore, the protrusion structure 161 shown in FIG. 7A has a side perpendicular to the surface 163 of the first alignment layer 16; however, in other embodiments, both sides of the protrusion structure 16 may have an inclined surface (as shown in fig. 7B); or the protrusion structure 16 has a circular arc shape (as shown in fig. 7C); or one side of the protrusion structure 16 is perpendicular to the surface 163 of the first alignment layer 16 (as shown in fig. 7D); however, the present invention is not limited thereto. In addition, the protrusion structures 161 shown in fig. 7A to 7D are each represented by a flat surface; however, in other embodiments, the protrusion 161 may have a flat surface, such as a ridge structure.
FIG. 8A to FIG. 8C are schematic cross-sectional views of the first alignment layer of the liquid crystal display panel of the embodiment at the non-display area N along the section line C-C'. Generally, the non-display region N of the lcd panel is provided with a wiring, and the first alignment layer 161 of the present embodiment may be further provided on the wiring 6 of the non-display region N.
When the liquid crystal display panel of the present embodiment is packaged by the sealant 5, the relationship between the protrusion structures 161 of the first alignment layer 16 and the sealant 5 is shown in fig. 9A. By providing the protrusion structure 161, the sealant 5 can cover the protrusion structure 161 to increase the contact area with the first alignment layer 16, thereby reducing the peeling between the sealant 5 and the first alignment layer 16. Meanwhile, as shown in fig. 9A, the outer edge of the first substrate 11 protrudes out of the sealant 5.
However, in another preferred embodiment of the present invention, the outer edge of the first substrate 11 can be aligned with the sealant 5, as shown in fig. 9B. In addition, in another preferred embodiment, the alignment layer material used is polyimide with low viscosity; therefore, although the protrusion 161 shown in FIG. 9A cannot be formed, the edge of the first alignment layer 16 is formed with a special curved structure, such as a wavy structure, as shown in FIG. 11.
Whether the first alignment layer 16 has the protrusion structures 161 and the protrusions 162 as shown in fig. 6 or the first alignment layer 16 has the protrusions 162 and the wavy-shaped structure edges as shown in fig. 11, a plurality of particles 164 may be generated in the first alignment layer 16, and the particles may be crystal nuclei, crystals, grains, or aggregates formed when the first alignment layer 16 is cured as shown in fig. 10. In particular, the size of the particles 164 disposed in the non-display region N is larger than the size of the particles 164 disposed in the display region D. In addition, in other embodiments, the first alignment layer 16 may not include the particles 164, or only the non-display region N is formed with the particles 164.
Here, it should be particularly noted that fig. 6 to 10 only illustrate that the first alignment layer 16 is disposed on the first substrate 11; however, it is understood by those skilled in the art that other elements (e.g., thin film transistor elements, etc.) between the first substrate 11 and the first alignment layer 16 are omitted.
In addition, the liquid crystal display panel manufactured by the foregoing embodiment of the invention can also be applied to a liquid crystal display device 7, as shown in fig. 12; wherein the liquid crystal display device includes: a backlight module (not shown); and a liquid crystal display panel (not shown) disposed on the backlight module. Here, the display is only used as an example of the liquid crystal display device, and other display devices such as a mobile phone, a notebook computer, a video camera, a music player, a mobile navigation device, and a television can also use the liquid crystal display panel manufactured by the foregoing embodiment of the present invention.
The above embodiments are merely examples, and the claimed invention is not limited to the above embodiments but may be embodied in other specific forms without departing from the spirit or essential attributes thereof.

Claims (5)

1. A liquid crystal display panel, comprising:
a first substrate, on which a pixel electrode, a data line and a scan line are disposed, wherein the first substrate includes a display region and a non-display region;
a second substrate arranged opposite to the first substrate;
a first alignment layer disposed on the first substrate, the pixel electrode, the data line and the scan line, and having at least one curved structure at its edge when viewed from a top view direction; and
a liquid crystal layer arranged between the first substrate and the second substrate,
wherein, at least one protuberance is arranged on the first alignment layer corresponding to the non-display region;
the first alignment layer on the pixel electrode has a first thickness, the first alignment layer on one of the data line and the scan line has a second thickness, and the first thickness is greater than the second thickness.
2. The liquid crystal display panel of claim 1, wherein the curved structure comprises: an arc, a broken line, a wave, or a combination thereof.
3. The liquid crystal display panel of claim 1, wherein the material of the first alignment layer is the same as the material of the protrusions.
4. The liquid crystal display panel of claim 1, further comprising a sealant disposed between the first substrate and the second substrate and partially covering the first alignment layer.
5. The liquid crystal display panel of claim 1, further comprising at least one spacer disposed between the first substrate and the second substrate, wherein the first alignment layer is disposed on the spacer.
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