CN110047932A - 具有电荷补偿层和低阻通道的纵向双扩散金属氧化物半导体场效应晶体管及其制作方法 - Google Patents

具有电荷补偿层和低阻通道的纵向双扩散金属氧化物半导体场效应晶体管及其制作方法 Download PDF

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CN110047932A
CN110047932A CN201910305038.2A CN201910305038A CN110047932A CN 110047932 A CN110047932 A CN 110047932A CN 201910305038 A CN201910305038 A CN 201910305038A CN 110047932 A CN110047932 A CN 110047932A
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段宝兴
王彦东
杨鑫
杨银堂
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Xidian University
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Abstract

本发明提出了一种具有电荷补偿层和低阻通道的纵向双扩散金属氧化物半导体场效应晶体管及其制作方法,该器件设置N+电流通道,纵向贯穿N型外延层的对称中心,上、下两端分别与栅氧化层、N+型衬底相接;并在N型外延层内部、两处P型基区的下方区域分别设置有相同半导体材料的P型电荷补偿层。器件导通时,重掺杂形成的N+电流通道改变了传统器件中的电流传输路径,而且电流分布几乎不受电荷补偿层的影响,这样大幅降低了器件的导通电阻。器件关断时,P型电荷补偿层辅助耗尽N+电流通道,同时产生的新电场峰优化了器件的纵向电场。

Description

具有电荷补偿层和低阻通道的纵向双扩散金属氧化物半导体 场效应晶体管及其制作方法
技术领域
本发明涉及功率半导体器件领域,具体涉及一种纵向双扩散金属氧化物半导体场效应晶体管。
背景技术
功率半导体器件是指主要用于电力设备的电能变换和控制电路方面的大功率电子器件。随着电力电子技术的迅速发展,功率半导体器件已经广泛应用于现代工业控制和国防装备中。纵向双扩散金属氧化物半导体场效应晶体管(VDMOS,Vertical Double-diffusion Metal Oxide Semiconductor)是微电子技术与电力电子领域重要的半导体器件。它通过对栅极电压的控制来调整其工作状态,使得其可以在正向导通、关断、以及耐压之间进行转换,具有开关速度快、损耗小、输入阻抗高、驱动功率小、频率特性好、跨导高线性度高等特性,现已被广泛应用于汽车电子、开关电源和节能灯等各个领域。
但是随着耐压级别的提高,高压VDMOS需要更厚的漂移区来承受击穿电压,而厚的漂移区会导致VDMOS的导通电阻急剧增加。此时导通电阻与器件的击穿电压呈现2.5次方的矛盾关系,这在很大程度上限制了VDMOS功率器件在高压领域的发展与应用。
发明内容
本发明提出一种具有电荷补偿层和低阻通道的纵向双扩散金属氧化物半导体场效应晶体管,旨在进一步优化VDMOS的击穿电压和导通电阻,改善器件性能。
本发明的技术方案如下:
半导体材料的N+型衬底;
在所述N+型衬底上表面形成的N型外延层;
在形成所述N型外延层的同时,形成N+电流通道和P型电荷补偿层;
在N型外延层上部分别形成左、右两处P型基区;在每一处P型基区中形成沟道以及N+型源区和P+沟道衬底接触,其中N+型源区与沟道邻接,P+沟道衬底接触相对于N+型源区位于沟道远端;
栅氧化层,位于所述N型外延层上表面,覆盖两处P型基区之间的部分以及相应的两处沟道;
栅极,位于栅氧化层上表面;
源极,覆盖于P+沟道衬底接触与N+型源区相接区域的上表面;两处源极共接;
漏极,位于所述N+型衬底下表面;
特别的:该器件还包括N+电流通道,纵向贯穿N型外延层的对称中心,上、下两端分别与栅氧化层、N+型衬底相接;在N型外延层内部、两处P型基区的下方区域分别设置有相同半导体材料的P型电荷补偿层;所述N型外延层和P型电荷补偿层的厚度和掺杂浓度由器件的耐压要求决定;所述N+电流通道的宽度和掺杂浓度由器件的耐压和导通电阻要求决定。
在以上方案的基础上,本发明还进一步作了如下优化:
上述N+电流通道的掺杂浓度典型值为1×1015cm-3~1×1017cm-3
上述N型外延层、N+电荷屏蔽层和P型电荷补偿的厚度、间距和掺杂浓度由器件的耐压要求决定;N+电流通道的宽度典型值为N型外延层的1/2~1/4;P型电荷补偿层的厚度典型值为1μm~3μm;P型电荷补偿层与N+电流通道的横向间距典型值为0μm~1μm。
上述P型电荷补偿层的掺杂浓度典型值为1×1016cm-3~1×1017cm-3
上述P型电荷补偿层的横向宽度大于等于P型基区。
上述所述P型基区、N+型源区、P+沟道衬底接触以及沟道,是在N型外延层上部区域采用离子注入以及双扩散技术形成的。
上述栅极为多晶硅栅极,所述的源极和漏极为金属化电极。
N+型衬底和N型外延层为元素半导体材料(硅或锗)或者宽带隙半导体材料(碳化硅或氮化镓)。
一种制作上述具有电荷补偿层和低阻通道的纵向双扩散金属氧化物半导体场效应晶体管的方法,包括以下步骤:
在硅半导体材料的N+型衬底的上表面形成N型外延层、N+电流通道和P型电荷补偿层;
在N+型衬底下表面形成金属化漏极;
在N型外延层上部区域采用离子注入分别形成两处P型基区及其N+型源区和P+沟道衬底接触,并采用双扩散技术形成相应的沟道,
在整个N型外延层上表面淀积栅氧化层和多晶硅,然后刻蚀多晶硅以及栅氧化层(去除位于两处源极上表面的部分),形成多晶硅栅极;
在器件表面淀积钝化层,并在对应于源极的位置刻蚀接触孔;
在接触孔内淀积金属并刻蚀(去除周边其余的钝化层)形成源极,并将两处源极共接。
本发明采用P型电荷补偿层结合N+导电通道,具有以下有益效果:
器件导通时,由重掺杂形成的N+电流通道改变了传统器件中的电流传输路径,而且电流分布几乎不受电荷补偿层的影响,这样大幅降低了器件的导通电阻。器件关断时,利用P型电荷补偿层辅助耗尽N+电流通道,同时产生的新电场峰优化了器件的纵向电场。结合以上优势,与传统纵向双扩双金属氧化物半导体场效应晶体管比较,本发明具有更高的耐压和更低的导通电阻。
附图说明
图1是本发明的结构示意图。
其中,1-源极;2-栅氧化层;3-栅极;4-基区;5-N+型源区;6-P+沟道衬底接触(P+型体区);7-P型基区;8-P型电荷补偿层;9-N型外延层;10-N+型衬底(漏区);11-漏极;12-N+电流通道。
具体实施方式
下面结合附图以N沟道VDMOS为例介绍本发明。
如图1所示,本实施例的结构包括:
硅半导体材料的N+型衬底10;
在N+型衬底10上表面形成N型外延层9;
N+电流通道12和P型电荷补偿层8,N型外延层9与P型电荷补偿层8形成相间的结构;
在N型外延层9上部形成左、右两处P型基区7;在每一处P型基区7中形成沟道以及N+型源区5和P+沟道衬底接触6,其中N+型源区5与沟道邻接,P+沟道衬底接触6相对于N+型源区5位于沟道远端;
栅氧化层2,位于N型外延层9上表面,覆盖两处P型基区7之间的部分以及相应的两处沟道;
栅极3,位于栅氧化层2上表面;
源极1,覆盖P+沟道衬底接触6与N+型源区5相接区域的上表面;两处源极共接;
漏极11,位于所述N+型衬底10下表面。
N+电流通道的掺杂浓度为1×1015cm-3~1×1017cm-3。N+电流通道的宽度为N型外延层的1/2~1/4;P型电荷补偿层的厚度为1μm~3μm;P型电荷补偿层与N+电流通道的横向间距为0μm~1μm。P型电荷补偿层的掺杂浓度为1×1016cm-3~1×1017cm-3
该器件具体可以通过以下步骤进行制备:
在硅半导体材料的N+型衬底10的上表面形成N型外延层9;在形成所述N型外延层9的同时,形成N+电流通道12和P型电荷补偿层8;
在N+型衬底10下表面形成金属化漏极;
在N型外延层9上部区域采用离子注入分别形成两处P型基区7及其N+型源区5和P+沟道衬底接触6,并采用双扩散技术形成相应的沟道;
在整个N型外延层9上表面淀积栅氧化层和多晶硅,然后刻蚀多晶硅以及栅氧化层(去除位于两处源极上表面的部分),形成多晶硅栅极;
在器件表面淀积钝化层,并在对应于源极的位置刻蚀接触孔;
在接触孔内淀积金属并刻蚀(去除周边其余的钝化层)形成源极。
经ISE TCAD仿真表明,该器件较之传统纵向双扩散金属氧化物半导体场效应晶体管,器件性能得到有效改善,不仅新型器件击穿电压提高30%,导通导通也下降了30%以上,与单纯具有电荷补偿块的垂直双扩散金属氧化物半导体场效应管,在15μm漂移区的长度下,击穿电压相同时,导通下降20%。
本发明中VDMOS采用的半导体材料,除了硅、锗等元素半导体材料外,当然也可以为砷化镓、碳化硅、氮化镓、金刚石等化合物半导体材料,其结构与硅VDMOS等同,也应当视为属于本申请权利要求的保护范围。
本发明中的VDMOS当然也可以为P型沟道,其结构与N沟道VDMOS等同,也应当视为属于本申请权利要求的保护范围,在此不再赘述。
以上所述仅是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本发明技术原理的前提下,还可以做出若干改进和替换,这些改进和替换的方案也落入本发明的保护范围。

Claims (10)

1.具有电荷补偿层和低阻通道的纵向双扩散金属氧化物半导体场效应晶体管(VDMOS),包括:
半导体材料的N+型衬底(10),兼作漏区;
在所述N+型衬底(10)上表面形成的N型外延层(9);
在N型外延层(9)上部分别形成左、右两处P型基区(7);在每一处P型基区(7)中形成相应的沟道以及N+型源区(5)和P+沟道衬底接触(6),其中N+型源区(5)与沟道邻接,P+沟道衬底接触(6)相对于N+型源区(5)位于沟道远端;
栅氧化层(2),位于N型外延层(9)上表面的中间区域,覆盖两处沟道;
栅极(3),位于栅氧化层(2)上表面;
源极(1),覆盖于P+沟道衬底接触(6)与N+型源区(5)相接区域的上表面;两处源极共接;
漏极(11),位于N+型衬底(10)下表面;
其特征在于,还包括:
N+电流通道(12),纵向贯穿N型外延层(9)的对称中心,上、下两端分别与栅氧化层(2)、N+型衬底(10)相接;
在N型外延层(9)内部、两处P型基区(7)的下方区域分别设置有相同半导体材料的P型电荷补偿层(8);
所述N型外延层(9)和P型电荷补偿层(8)的厚度和掺杂浓度由器件的耐压要求决定;
所述N+电流通道(12)的宽度和掺杂浓度由器件的耐压和导通电阻要求决定。
2.根据权利要求1所述的具有电荷补偿层和低阻通道的纵向双扩散金属氧化物半导体场效应晶体管,其特征在于:所述N+电流通道(12)的掺杂浓度典型值为1×1015cm-3~1×1017cm-3
3.根据权利要求1所述的具有电荷补偿层和低阻通道的纵向双扩散金属氧化物半导体场效应晶体管,其特征在于:所述N+电流通道(12)的宽度典型值为N型外延层(9)的1/2~1/4。
4.根据权利要求1所述的具有电荷补偿层和低阻通道的纵向双扩散金属氧化物半导体场效应晶体管,其特征在于:所述P型电荷补偿层(8)的厚度典型值为1μm~3μm。
5.根据权利要求1所述的具有电荷补偿层和低阻通道的纵向双扩散金属氧化物半导体场效应晶体管,其特征在于:所述P型电荷补偿层(8)与N+电流通道(12)的横向间距典型值为0μm~1μm。
6.根据权利要求1所述的具有电荷补偿层和低阻通道的纵向双扩散金属氧化物半导体场效应晶体管,其特征在于:所述P型电荷补偿层(8)的掺杂浓度典型值为1×1016cm-3~1×1017cm-3
7.根据权利要求1所述的具有电荷补偿层和低阻通道的纵向双扩散金属氧化物半导体场效应晶体管,其特征在于:所述P型基区(7)、N+型源区(5)、P+沟道衬底接触(6)以及沟道,是在N型外延层(9)上部区域采用离子注入以及双扩散技术形成的。
8.根据权利要求1所述的具有电荷补偿层和低阻通道的纵向双扩散金属氧化物半导体场效应晶体管,其特征在于:所述的栅极(3)为多晶硅栅极,所述的源极(1)和漏极(11)为金属化电极。
9.根据权利要求1所述的具有电荷补偿层和低阻通道的纵向双扩散金属氧化物半导体场效应晶体管,其特征在于:所述N+型衬底(10)和N型外延层(9)为元素半导体材料或者宽带隙半导体材料。
10.一种制作权利要求1所述的具有电荷补偿层和低阻通道的纵向双扩散金属氧化物半导体场效应晶体管的方法,包括以下步骤:
在硅半导体材料的N+型衬底的上表面通过外延和离子注入形成所述N型硅外延层、N+电流通道和P型电荷补偿层;
在N+型衬底下表面形成金属化漏极;
在N型外延层上部区域采用离子注入分别形成两处P型基区及其N+型源区和P+沟道衬底接触,并采用双扩散技术形成相应的沟道;
在整个N型外延层上表面淀积栅氧化层和多晶硅,然后刻蚀多晶硅以及栅氧化层,形成多晶硅栅极;
在器件表面淀积钝化层,并在对应于源极的位置刻蚀接触孔;
在接触孔内淀积金属并刻蚀形成源极,并将两处源极共接。
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