CN109995358A - State keeps and removes circuit and operating circuit - Google Patents

State keeps and removes circuit and operating circuit Download PDF

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Publication number
CN109995358A
CN109995358A CN201910188434.1A CN201910188434A CN109995358A CN 109995358 A CN109995358 A CN 109995358A CN 201910188434 A CN201910188434 A CN 201910188434A CN 109995358 A CN109995358 A CN 109995358A
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China
Prior art keywords
circuit
gate circuit
connect
input terminal
controlled switch
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CN201910188434.1A
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Chinese (zh)
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CN109995358B (en
Inventor
葛伟杰
黄均明
邱兵
刘启静
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Access Communications Equipment (guangzhou) Co Ltd
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Access Communications Equipment (guangzhou) Co Ltd
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Priority to CN201910188434.1A priority Critical patent/CN109995358B/en
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/002Switching arrangements with several input- or output terminals
    • H03K17/005Switching arrangements with several input- or output terminals with several inputs only
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Electronic Switches (AREA)

Abstract

It is kept the present invention relates to a kind of state and removes circuit and operating circuit.State keeps and removes circuit applied to state generation circuit, including AND gate circuit, unidirectional conducting switch and reset circuit.The first input end of AND gate circuit is connect with the output end of state generation circuit, and the first input end of AND gate circuit is used for the status signal that reception state generation circuit generates;The first input end of AND gate circuit and the output end of unidirectional conducting switch connect, and the output end of AND gate circuit and the input terminal of unidirectional conducting switch connect;Second input terminal of AND gate circuit is used to connect to power supply and receive the high level of power supply offer;Second input terminal of AND gate circuit is connect with reset circuit, and for reset circuit for providing the second input terminal of reset signal to AND gate circuit, reset signal is provided to the high level of the second input terminal of AND gate circuit for reducing power supply.The present invention programs and uses processor without design software, and hold mode signal and the mode for removing status signal are simple.

Description

State keeps and removes circuit and operating circuit
Technical field
The present invention relates to electronic circuit technology fields, keep more particularly to a kind of state and remove circuit and work electricity Road.
Background technique
It breaks down in electronic equipment perhaps system operation or input quantity (such as voltage, electric current, temperature, frequency Rate, power etc.) when reaching predetermined value, electronic equipment or system can report alerting signal to control centre, so that control centre Corresponding processing, such as the electronic equipment operation of control rear class etc. are made according to alerting signal.However, being of short duration in alerting signal Pulse signal when, control centre is easy to ignore alerting signal or as interference signal, and does not make after corresponding processing just Remove alerting signal.For example, electronic equipment or system are in the event of a failure, alarm signal is issued to control centre, still Due to failure, electronic equipment or system can not continue to issue alarm signal to control centre, so that control centre is easy to ignore Failure of the alarm signal without handling electronic equipment or system in time.
Currently, the state of alerting signal can be kept, by the way of down trigger to remind microprocessor Processors such as (Microcontroller Unit, MCU) make corresponding processing, and after MCU has been handled, and remove prompting letter Number.However which generally passes through the processors such as MCU and executes software programming realization, software programming design comparison is complicated, it is also desirable to Dependent on processors such as MCU so that keep alerting signal and remove the alerting signal mode it is complex.
Summary of the invention
Based on this, it is necessary to for additional controller and software programming is needed in the prior art, keep alerting signal And the more complex problem of mode of the alerting signal is removed, a kind of state is provided and keeps and removes circuit and operating circuit.
A kind of state keeps and removes circuit, be applied to state generation circuit, including AND gate circuit, unidirectional conducting switch with And reset circuit;
The first input end of the AND gate circuit is connect with the output end of the state generation circuit, the AND gate circuit First input end is used to receive the status signal that the state generation circuit generates;
The first input end of the AND gate circuit is connect with the output end of the unidirectional conducting switch, the AND gate circuit Output end is connect with the input terminal of the unidirectional conducting switch;
Second input terminal of the AND gate circuit is used to connect to power supply to receive the high level that the power supply provides;
Second input terminal of the AND gate circuit is connect with the reset circuit, and the reset circuit resets letter for providing Number to the AND gate circuit the second input terminal, the reset signal is provided to the AND gate circuit for reducing the power supply The high level of second input terminal.
The unidirectional conducting switch includes the first transistor in one of the embodiments,;
The base stage of the first transistor is connect with the output end of the AND gate circuit;
The collector of the first transistor with the power supply for connecting;
The emitter of the first transistor is connect with the first input end of the AND gate circuit.
The unidirectional conducting switch includes diode in one of the embodiments,;
The anode of the diode is connect with the output end of the AND gate circuit;
The cathode of the diode is connect with the first input end of the AND gate circuit.
It in one of the embodiments, include the first current-limiting resistance;
The output end of the state generation circuit by first current-limiting resistance connect the AND gate circuit it is first defeated Enter end.
The reset circuit includes controller in one of the embodiments, the output end of the controller and it is described with Second input terminal of gate circuit connects, and the controller is for providing the second input terminal of reset signal to the AND gate circuit.
The reset circuit further includes controlled switch in one of the embodiments,;
The controlled end of the controlled switch is connect with the output end of the controller;
First controlled switch end of the controlled switch is used for the second input with the power supply and the AND gate circuit End connection;
Second controlled switch end of the controlled switch is for being grounded.
The reset circuit includes manual switch and controlled switch in one of the embodiments,;
The first manual switch terminals of the manual switch with the power supply for connecting;
The manual switch terminals of the second of the manual switch are connect with the controlled end of the controlled switch;
First controlled switch end of the controlled switch is used for the second input with the power supply and the AND gate circuit End connection;
Second controlled switch end of the controlled switch is for being grounded.
The controlled switch includes second transistor in one of the embodiments,;
The base stage of the second transistor is the controlled end of the controlled switch;
First controlled switch end of the extremely described controlled switch of the current collection of the second transistor;
Second controlled switch end of the extremely described controlled switch of transmitting of the second transistor.
The reset circuit further includes reset switch in one of the embodiments, and the reset circuit further includes relay Device, the input terminal of the relay are connect with the output end of the controller, the output end of the relay and described and door electricity Second input terminal on road connects, and the controller is for controlling relay closure when receiving the reset signal.
A kind of operating circuit, the state including state generation circuit and as described in above-mentioned any embodiment keep and remove Circuit.
Above-mentioned state keeps and removes in circuit and operating circuit, when the first input end of AND gate circuit and second When the equal input high level of input terminal, the output end of AND gate circuit exports high level;When the first input end of AND gate circuit or second When input terminal input low level, the output end of AND gate circuit exports low level.Based on this, when state generation circuit generate it is of short duration Status signal, and when reset circuit does not provide second input terminal of the reset signal to AND gate circuit, AND gate circuit is according to state The high level that generation circuit and power supply provide, exports high level identical with status signal;And do not have in state generation circuit When continuing to generate status signal, unidirectional conducting switch is connected due to forward direction input, and the output end of AND gate circuit provides high level To first input end, the high level that AND gate circuit is provided according to power supply and the output end of AND gate circuit at this time, continue to output with The identical high level of status signal, in this way, to keep continuing output status signal;In addition it is also possible to believe without hold mode Number when, reset circuit provide reset signal to the second input terminal, reset signal reduces second that power supply is provided to AND gate circuit The high level of input terminal, so that the output end of AND gate circuit is low level, to remove status signal.Therefore, the present invention without It needs design software to program and using processor, hold mode signal and the mode for removing status signal is simple.
Detailed description of the invention
Fig. 1 is the structural schematic diagram that state keeps with removing circuit in the embodiment of the present invention;
Fig. 2 is the output signal that status signal, reset signal and state keep with removing circuit in the embodiment of the present invention Time diagram;
Fig. 3 is the circuit diagram that state keeps with removing circuit in the embodiment of the present invention;
Fig. 4 is the circuit diagram that state keeps with removing circuit in another embodiment of the present invention;
Fig. 5 is the circuit diagram that state keeps with removing circuit in further embodiment of this invention;
Fig. 6 is the circuit diagram that state keeps with removing circuit in yet another embodiment of the invention.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, by the following examples, it and combines attached Figure, the present invention will be described in further detail.
The embodiment of the present invention provides a kind of state and keeps and remove circuit.
Fig. 1 is the structural schematic diagram that state keeps and removes circuit.As shown in Figure 1, state keeps and removes circuit application Include AND gate circuit U1, unidirectional conducting switch 201 and reset circuit 202 in state generation circuit 100.
The first input end of AND gate circuit U1 is connect with the output end of state generation circuit 100, and the first of AND gate circuit U1 Input terminal is used for the status signal that reception state generation circuit 100 generates.
Generally, as shown in Fig. 2, state generation circuit 100 exports low level when powering on original state, then output by Low level becomes high level, and after persistently exporting high level for a period of time, output becomes low level from high level again, and is always maintained at Low level output.When state generation circuit generates status signal because of the triggering of external or internal factor, such as hair inside circuit Raw failure, or current input quantity (such as voltage, electric current, temperature, frequency, power) reach predetermined value, and state generation circuit produces Raw status signal, the status signal that state generation circuit 100 generates can be used for the operation of state of a control late-class circuit 400.With state Late-class circuit 400 is for warning circuit, state generation circuit 100 exports low level when not generating failure, and is generating event Hinder and generate of short duration alarm signal, alarm signal can be used for triggering warning circuit and issue alarm prompting.It is generated again with state For circuit 100 is temperature sensor, state late-class circuit 400 is heater circuit, when temperature sensor detects current temperature Degree reaches predetermined value, and state generation circuit 100 generates temperature signal up to standard, and temperature signal up to standard can be used for triggering heater circuit It is out of service.
The first input end of AND gate circuit U1 is connect with the output end of unidirectional conducting switch 201, the output of AND gate circuit U1 End is connect with the input terminal of unidirectional conducting switch 201.
Unidirectional conducting switch 201 has the characteristic of one-way conduction in one of the embodiments,.Specifically, one-way conduction The output end of the input terminal connection AND gate circuit U1 of switch 201, the output end connection AND gate circuit U1's of unidirectional conducting switch 201 First input end.The positive input conducting of unidirectional conducting switch 201 in one of the embodiments, reversed input cut-off.When unidirectional When switch 201 is connected because of forward direction input conducting, the output end of AND gate circuit U1 can control the first input end of AND gate circuit U1 Input, for example, the first input end input of AND gate circuit U1 is high electricity when the output end of AND gate circuit U1 exports high level It is flat.When unidirectional conducting switch 201 is because reversely inputting cut-off, the status signal that state generation circuit 100 generates can not be mentioned directly It is supplied to the output end of AND gate circuit U1.
The second input terminal of AND gate circuit U1 is used to connect with power supply 300 to receive the high level of the offer of power supply 300.
Power supply 300 is also used to provide AND gate circuit U1 and providing operating voltage, so that with door in one of the embodiments, Circuit U 1 can work normally.
The second input terminal of AND gate circuit U1 is connect with reset circuit 202, and reset circuit 202 is for providing reset signal extremely The second input terminal of AND gate circuit U1, reset signal are provided to the second input terminal of AND gate circuit U1 for reducing power supply 300 High level.
Specifically, as shown in Fig. 2, generate of short duration status signal when state generation circuit 100, for example, 15 nanoseconds, 20 receiving Second, 25 nanoseconds, 30 nanoseconds, 35 nanoseconds, 40 nanoseconds, 45 nanoseconds, 50 nanoseconds etc., and reset circuit 202 do not provide it is low level Reset signal to AND gate circuit U1 the second input terminal when, AND gate circuit U1 is mentioned according to state generation circuit 100 and power supply 300 The output end of the high level of confession, AND gate circuit U1 exports high level identical with status signal.When state generation circuit 100 does not have When continuing to generate status signal, unidirectional conducting switch 201 is connected due to forward direction input, and the output end of AND gate circuit U1 provides high Level is to first input end, the high level that AND gate circuit U1 is provided according to the output end of power supply 300 and AND gate circuit U1 at this time, The output end of AND gate circuit U1 continues to output high level identical with status signal, in this way, to keep continuing output status signal.
In addition it is also possible to be not necessarily to hold mode signal when, reset circuit 202 provide low level reset signal to door Second input terminal of circuit U 1, reset signal reduce the high level that power supply 300 is provided to the second input terminal of AND gate circuit U1, So that the output end of AND gate circuit U1 is low level, to remove status signal.
Referring to Fig. 3, unidirectional conducting switch 201 includes the first transistor Q1 in one of the embodiments,.First crystal The base stage of pipe Q1 is connect with the output end of AND gate circuit U1, and the collector of the first transistor Q1 with power supply 300 for connecting, and first The emitter of transistor Q1 is connect with the first input end of AND gate circuit U1.
Wherein, Fig. 3 carries out the working principle of unidirectional conducting switch 201 so that the first transistor Q1 is NPN triode as an example It explains.It should be noted that NPN triode is not the restriction to unidirectional conducting switch 201, it can be according to the class of the first transistor Q1 Type is adjusted.
As shown in figure 3, when state generation circuit 100 generates status signal, the first transistor Q1 cut-off, so that with door electricity The high level of the first input end reception state signal of road U1.When the first transistor Q1's that the output end of AND gate circuit U1 exports When the control signal of base stage is high level, the high level of the first transistor Q1 conducting, the output end output of AND gate circuit U1 passes through The emitter of the first transistor Q1 is transmitted to the first input end of AND gate circuit U1, so that the first input end of AND gate circuit U1 is defeated Enter for high level.In this way, the first transistor Q1 can keep the high level of the first input end of AND gate circuit U1 to input.
Further, since the first transistor Q1 reversely inputs cut-off, the status signal that state generation circuit 100 generates can not be straight The output end for being provided to AND gate circuit U1 is connect, in other words, the output end of AND gate circuit U1 is not by the straight of state generation circuit 100 Connect control.In this way, by reset circuit 202 provide reset signal to AND gate circuit U1 the second input terminal, can will with door electricity The output end of road U1 changes into low level by high level, to realize reset function.
Referring to Fig. 4, unidirectional conducting switch 201 includes diode D1 in one of the embodiments,.Diode D1 is just Pole is connect with the output end of AND gate circuit U1, and the cathode of diode D1 is connect with the first input end of AND gate circuit U1.
When state generation circuit 100 generates status signal, diode D1 reversely ends, so that the first of AND gate circuit U1 The high level of input terminal reception state signal.When the output end of AND gate circuit U1 exports high level, diode D1 forward conduction, So that the first input end of AND gate circuit U1 receives the high level of the output end output of AND gate circuit U1.In this way, diode D1 can To keep the high level input of the first input end of AND gate circuit U1.
Further, since diode D1 reversely inputs cut-off, the status signal that state generation circuit 100 generates can not be mentioned directly It is supplied to the output end of AND gate circuit U1, in other words, the output end of AND gate circuit U1 is not by the direct control of state generation circuit 100 System.In this way, by the offer reset signal of reset circuit 202 to the second input terminal of AND gate circuit U1, it can be by AND gate circuit U1 Output end low level is changed by high level, to realize reset function.
Fig. 3 and Fig. 4 are please referred to, state keeps and remove circuit to include the first current-limiting resistance in one of the embodiments, R1.The output end of state generation circuit 100 passes through the first input end of the first current-limiting resistance R1 connection AND gate circuit U1.State produces The status signal that raw circuit 100 generates is input to the first input end of AND gate circuit U1 by the first current-limiting resistance R1, with protection AND gate circuit U1, prevents overcurrent.
Referring to Fig. 5, reset circuit 202 includes controller 2021 in one of the embodiments,.Controller 2021 it is defeated Outlet is connect with the second input terminal of AND gate circuit U1, and controller 2021 is for providing reset signal to the second of AND gate circuit U1 Input terminal.
Controller 2021 directly can input reset signal to the second input terminal of AND gate circuit U1, and reset signal reduces electricity Source 300 is provided to the high level of the second input terminal of AND gate circuit U1, so that the second input terminal of AND gate circuit U1 inputs low electricity Flat, the output end of AND gate circuit U1 exports low level, to remove status signal.
Please continue to refer to Fig. 5, reset circuit 202 further includes controlled switch 2022 in one of the embodiments,.It is controlled to open The controlled end of pass 2022 is connect with the output end of controller 2021;First controlled switch end of controlled switch 2022 is used for and power supply The second input terminal of 300 and AND gate circuit U1 connects;Second controlled switch end of controlled switch 2022 is for being grounded.
Specifically, controller 2021 is by 2022 input high level of controlled switch, thus to the second of AND gate circuit U1 The reset signal of input terminal input low level.When the controlled end of controlled switch 2022 receives the high level of the output of controller 2021 When, the first controlled switch end and the conducting of the second controlled switch end, the output end of reset circuit 202 are pulled low to earth signal, Reset signal is low level at this time, so that the high level that power supply 300 is provided to the second input terminal of AND gate circuit U1 is reduced, so that The output end of AND gate circuit U1 exports low level, to remove status signal.When the controlled end of controlled switch 2022 does not receive To controller 2021 export high level when, the first controlled switch end and the second controlled switch end are not turned on, and are resetted at this time Signal can not reduce the high level that power supply 300 is provided to the second input terminal of AND gate circuit U1 for high level, AND gate circuit U1 Output end export high level, to maintain status signal.
Referring to Fig. 6, reset circuit 202 includes manual switch K1 and controlled switch in one of the embodiments, The first manual switch terminals of 2022, manual switch K1 for connect with power supply 300, the manual switch terminals of the second of manual switch K1 and The controlled end of controlled switch 2022 connects;First controlled switch end of controlled switch 2022 be used for power supply 300 and with door electricity The second input terminal of road U1 connects;Second controlled switch end of controlled switch 2022 is for being grounded.
When manual switch K1 closure, controlled end input high level of the power supply 300 to controlled switch 2022.Work as controlled switch When 2022 controlled end receives the high level of the output of power supply 300, the first controlled switch end and the second controlled switch end are led Logical, the output end of reset circuit 202 is pulled low to earth signal, and reset signal is low level at this time, to reduce the offer of power supply 300 To the high level of the second input terminal of AND gate circuit U1, the output end of AND gate circuit U1 exports low level, to remove state Signal.When manual switch K1 is disconnected, the first controlled switch end and the second controlled switch end are not turned on, at this time reset signal The high level that power supply 300 is provided to the second input terminal of AND gate circuit U1 can not be reduced for high level, AND gate circuit U1's is defeated Outlet exports high level, to maintain status signal.
Please continue to refer to Fig. 5 and Fig. 6, controlled switch 2022 includes second transistor Q2 in one of the embodiments,.The The base stage of two-transistor Q2 is the controlled end of controlled switch 2022;The of the current collection of second transistor Q2 extremely controlled switch 2022 One controlled switch end;Second controlled switch end of the transmitting extremely controlled switch 2022 of second transistor Q2.
Wherein, Fig. 5 and Fig. 6 is so that second transistor Q2 is NPN triode as an example, to the working principle of controlled switch 2022 into Row is explained.It should be noted that NPN triode is not the restriction to controlled switch 2022, it can be according to the class of second transistor Q2 Type is adjusted.
When second transistor Q2 does not receive the high level that controller 2021 or power supply 300 provide, second transistor Q2 Cut-off, reset signal can not reduce the height electricity that power supply 300 is provided to the second input terminal of AND gate circuit U1 for high level at this time Flat, the output end of AND gate circuit U1 exports high level, to maintain status signal.When second transistor Q2 receives controller 2021 or power supply 300 provide high level when, the control signal of the base stage of second transistor Q2 is high level, second transistor Q2 Conducting, the output end of reset circuit 202 are pulled low to earth signal, and reset signal is low level at this time, mention to reduce power supply 300 It is supplied to the high level of the second input terminal of AND gate circuit U1, the output end of AND gate circuit U1 exports low level, to remove shape State signal.
Please continue to refer to Fig. 5 and Fig. 6, state keeps and removes circuit to include pull-up resistor in one of the embodiments, R2.Power supply 300 passes through the collector of pull-up resistor R2 connection second transistor Q2 and the second input terminal of AND gate circuit U1.
Power supply 300 passes through the collector of pull-up resistor R2 connection second transistor Q2, in this way, working as controller 2021 or power supply 300 provide the base stage of high level to second transistor Q2, and when second transistor Q2 is connected, pull-up resistor R2 protects second transistor Q2 prevents overcurrent.Power supply 300 passes through the second input terminal of pull-up resistor R2 connection AND gate circuit U1, in this way, working as second transistor Q2 cut-off, when power supply 300 provides second input terminal of the high level to AND gate circuit U1, pull-up resistor R2 protects AND gate circuit U1, Prevent overcurrent.
Please continue to refer to Fig. 5 and Fig. 6, state keeps and removes circuit to include the second current limliting in one of the embodiments, Resistance R3.The base stage of second transistor Q2 passes through the second current-limiting resistance R3 connection controller 2021 or manual switch K1.In this way, working as When controller 2021 or power supply 300 provide base stage of the high level to second transistor Q2, second transistor Q2 conducting, the second current limliting Resistance R3 protects second transistor Q2, prevents overcurrent.
Controlled switch 2022 includes electronic switch in one of the embodiments,.The controlled end of electronic switch is according to control The reset signal that device 2021 or power supply 300 provide controls and is connected or closes between its first controlled switch end and the second controlled switch end It is disconnected, to control whether controller 2021 or manual switch K1 provide the second input terminal of reset signal to AND gate circuit U1.
Reset circuit 202 further includes relay, the input terminal and controller 2021 of relay in one of the embodiments, Output end connection, the output end of relay 2021 connect with the second input terminal of AND gate circuit U1, and controller 2021 is used to control Relay processed closure when receiving reset signal.
When relay does not receive reset signal, controller 2021 controls relay and disconnects, and power supply 300 provides high level To the second input terminal of AND gate circuit U1, the output end of AND gate circuit U1 exports high level, to maintain status signal.When after When electric appliance receives reset signal, controller 2021 controls relay closure, and reset signal reduces power supply 300 and is provided to and door electricity The high level of the second input terminal of road U1, so that the second input terminal input low level of AND gate circuit U1, AND gate circuit U1's is defeated Outlet exports low level, to remove status signal.
Referring to Fig. 6, the embodiment of the present invention also provides a kind of operating circuit.Operating circuit includes state generation circuit 100 And the state as described in above-mentioned any embodiment keeps and removes circuit.
Operating circuit further includes the state late-class circuit 400 of state generation circuit 100, shape in one of the embodiments, The status signal that state generation circuit 100 generates can be used for the operation of state of a control late-class circuit 400.
Above-mentioned state keeps and removes in circuit and operating circuit, when the first input end of AND gate circuit U1 and the When the equal input high level of two input terminals, the output end of AND gate circuit U1 exports high level;When the first input end of AND gate circuit U1 Or when the second input terminal input low level, the output end of AND gate circuit U1 exports low level.Based on this, when state generation circuit 100 generate of short duration status signal, and reset circuit 202 does not provide the second input terminal of reset signal to AND gate circuit U1 When, the high level that AND gate circuit U1 is provided according to state generation circuit 100 and power supply 300 exports identical with status signal High level;And when state generation circuit 100 does not continue to generate status signal, unidirectional conducting switch 201 is inputted due to forward direction And be connected, the output end of AND gate circuit U1 provides high level to first input end, at this time AND gate circuit U1 according to power supply 300 and The high level that the output end of AND gate circuit U1 provides, continues to output high level identical with status signal, in this way, to keep continuing Output status signal;In addition it is also possible to when being not necessarily to hold mode signal, reset circuit 202 provides reset signal to second defeated Enter end, reset signal reduces the high level that power supply 300 is provided to the second input terminal of AND gate circuit U1, so that AND gate circuit U1 Output end be low level, to remove status signal.Therefore, the present invention programs without design software and using processing Device, hold mode signal and the mode for removing status signal are simple.
Each technical characteristic of embodiment described above can be combined arbitrarily, for simplicity of description, not to above-mentioned reality It applies all possible combination of each technical characteristic in example to be all described, as long as however, the combination of these technical characteristics is not deposited In contradiction, all should be considered as described in this specification.Several implementations of the invention above described embodiment only expresses Mode, description is more specific and detailed, and but it cannot be understood as the limitations to patent of invention range.It should be understood that , for those of ordinary skill in the art, without departing from the inventive concept of the premise, several changes can also be made Shape and improvement, these are all within the scope of protection of the present invention.Therefore, the scope of protection of the patent of the present invention should be wanted with appended right Subject to asking.

Claims (10)

1. a kind of state keeps and removes circuit, it is applied to state generation circuit, which is characterized in that including AND gate circuit, unidirectionally Conducting switch and reset circuit;
The first input end of the AND gate circuit is connect with the output end of the state generation circuit, and the first of the AND gate circuit Input terminal is used to receive the status signal that the state generation circuit generates;
The first input end of the AND gate circuit is connect with the output end of the unidirectional conducting switch, the output of the AND gate circuit End is connect with the input terminal of the unidirectional conducting switch;
Second input terminal of the AND gate circuit is used to connect to power supply to receive the high level that the power supply provides;
Second input terminal of the AND gate circuit is connect with the reset circuit, and the reset circuit is for providing reset signal extremely Second input terminal of the AND gate circuit, the reset signal are provided to the second of the AND gate circuit for reducing the power supply The high level of input terminal.
2. state according to claim 1 keeps and removes circuit, which is characterized in that the unidirectional conducting switch includes the One transistor;
The base stage of the first transistor is connect with the output end of the AND gate circuit;
The collector of the first transistor with the power supply for connecting;
The emitter of the first transistor is connect with the first input end of the AND gate circuit.
3. state according to claim 1 keeps and removes circuit, which is characterized in that the unidirectional conducting switch includes two Pole pipe;
The anode of the diode is connect with the output end of the AND gate circuit;
The cathode of the diode is connect with the first input end of the AND gate circuit.
4. state according to claim 2 or 3 keeps and removes circuit, which is characterized in that including the first current-limiting resistance;
The output end of the state generation circuit connects the first input end of the AND gate circuit by first current-limiting resistance.
5. state according to claim 1 keeps and removes circuit, which is characterized in that the reset circuit includes control Device, the output end of the controller are connect with the second input terminal of the AND gate circuit, and the controller resets letter for providing Number to the AND gate circuit the second input terminal.
6. state according to claim 5 keeps and removes circuit, which is characterized in that the reset circuit further includes controlled Switch;
The controlled end of the controlled switch is connect with the output end of the controller;
First controlled switch end of the controlled switch is used to connect with the power supply and the second input terminal of the AND gate circuit It connects;
Second controlled switch end of the controlled switch is for being grounded.
7. state according to claim 1 keeps and removes circuit, which is characterized in that the reset circuit includes opening manually Pass and controlled switch;
The first manual switch terminals of the manual switch with the power supply for connecting;
The manual switch terminals of the second of the manual switch are connect with the controlled end of the controlled switch;
First controlled switch end of the controlled switch is used to connect with the power supply and the second input terminal of the AND gate circuit It connects;
Second controlled switch end of the controlled switch is for being grounded.
8. state according to claim 6 or 7 keeps and removes circuit, which is characterized in that the controlled switch includes the Two-transistor;
The base stage of the second transistor is the controlled end of the controlled switch;
First controlled switch end of the extremely described controlled switch of the current collection of the second transistor;
Second controlled switch end of the extremely described controlled switch of transmitting of the second transistor.
9. state according to claim 5 keeps and removes circuit, which is characterized in that the reset circuit further includes relay Device, the input terminal of the relay are connect with the output end of the controller, the output end of the relay and described and door electricity Second input terminal on road connects, and the controller is for controlling relay closure when receiving the reset signal.
10. a kind of operating circuit, which is characterized in that including state generation circuit and as described in claim 1 to 9 any one State keep with remove circuit.
CN201910188434.1A 2019-03-13 2019-03-13 State holding and clearing circuit and working circuit Active CN109995358B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910188434.1A CN109995358B (en) 2019-03-13 2019-03-13 State holding and clearing circuit and working circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910188434.1A CN109995358B (en) 2019-03-13 2019-03-13 State holding and clearing circuit and working circuit

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JPH1114653A (en) * 1997-06-26 1999-01-22 Nippon Signal Co Ltd:The Signal-monitoring circuit and rotation stop sensor using it
JP2001196911A (en) * 2000-01-14 2001-07-19 Sadao Nakano Timer switch
CN101807905A (en) * 2010-02-11 2010-08-18 西安能讯微电子有限公司 Drive circuit of deplete semiconductor switching element and drive method thereof
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