CN109935191A - GOA circuit and display panel - Google Patents
GOA circuit and display panel Download PDFInfo
- Publication number
- CN109935191A CN109935191A CN201910283654.2A CN201910283654A CN109935191A CN 109935191 A CN109935191 A CN 109935191A CN 201910283654 A CN201910283654 A CN 201910283654A CN 109935191 A CN109935191 A CN 109935191A
- Authority
- CN
- China
- Prior art keywords
- transistor
- electrically connected
- node
- signal
- grid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
GOA circuit and display panel provided by the embodiments of the present application, by increasing by the tenth transistor in the first drop-down maintenance module, and increase by the 16th transistor in the second drop-down maintenance module, so as to which second node and third node are pulled down to more low potential by the tenth transistor and the 16th transistor, and then improve the stability of GOA circuit.
Description
Technical field
This application involves field of display technology, and in particular to a kind of GOA circuit and display panel.
Background technique
GOA (full name in English: Gate Driver on Array, Chinese name: integrated gate drive circuitry) technology is by grid
Pole driving circuit is integrated in the array substrate of display panel, so as to save grid-driving integrated circuit part, with from material
Product cost is reduced in terms of material cost and manufacture craft two.
Existing GOA circuit after the line scan signals of prime GOA unit, need to maintain row to sweep whithin a period of time in output
Retouch the low level of signal.However, the electrical property of transistor is easy to be destroyed, since transistor works long hours so as to cause GOA
Circuit cisco unity malfunction.
Summary of the invention
The embodiment of the present application is designed to provide a kind of GOA circuit and display panel, is able to solve existing GOA circuit
Since transistor works long hours, the electrical property of transistor is easy to be destroyed, so as to cause the skill of GOA circuit cisco unity malfunction
Art problem.
The embodiment of the present application provides a kind of GOA circuit, comprising: the GOA unit of multi-stage cascade, every level-one GOA unit are wrapped
It includes: node control module, grade transmission module, pull-up module, pull-down module, the first drop-down maintenance module, the second drop-down maintenance module
And bootstrap capacitor；
The node control module access upper level scanning signal and upper level grade communication number, and it is electrically connected at first
Node, for controlling the current potential of the first node according to the upper level scanning signal and the upper level grade communication number；
The grade transmission module accesses the same level clock signal, and is electrically connected at the first node, for described first
The same level grade communication number is exported under the control of Electric potentials of node；
The pull-up module accesses the same level clock signal, and is electrically connected at the first node, for described
The same level scanning signal is exported under the control of Electric potentials of first node；
The pull-down module access next stage scanning signal, the first reference low level signal and the second reference low level letter
Number, and it is electrically connected at the first node and the same level scanning signal, for the control in the next stage scanning signal
The current potential of the first node is pulled down to the current potential of the first reference low level signal under system, and is swept in the next stage
Retouch the current potential that the same level scanning signal is pulled down to the second reference low level signal under the control of signal；
The first drop-down maintenance module and the second drop-down maintenance module access first control signal, the second control
Signal, third reference low level signal and the first reference low level signal processed, and it is electrically connected at the first node,
It is used to according to the first control signal, the second control signal, the third reference low level signal and described
One reference low level signal maintains the current potential of the first node, and the first drop-down maintenance module and second drop-down
Maintenance module works alternatively；
The first end of the bootstrap capacitor is electrically connected at the first node, and the second end of the bootstrap capacitor electrically connects
It is connected to the same level scanning signal.
In GOA circuit described herein, the node control module includes the first transistor；
The grid of the first transistor is electrically connected at the upper level scanning signal, the source electrode of the first transistor
It is electrically connected at the upper level grade communication number, the drain electrode of the first transistor is electrically connected at the first node.
In GOA circuit described herein, the grade transmission module includes second transistor；
The grid of the second transistor is electrically connected at the first node, and the source electrode of the second transistor electrically connects
It is connected to the same level clock signal, the drain electrode of the second transistor is electrically connected at the same level grade communication number.
In GOA circuit described herein, the pull-up module includes third transistor；
The grid of the third transistor is electrically connected at the first node, and the source electrode of the third transistor electrically connects
It is connected to the same level clock signal, the drain electrode of the third transistor is electrically connected at the same level scanning signal.
In GOA circuit described herein, the pull-down module includes the 4th transistor and the 5th transistor；
The grid of 4th transistor and the grid of the 5th transistor are electrically connected at the next stage and sweep
Signal is retouched, the source electrode of the 4th transistor is electrically connected at the first reference low level signal, the 4th transistor
Drain electrode is electrically connected at the first node, and the source electrode of the 5th transistor is electrically connected at the second reference low level letter
Number, the drain electrode of the 5th transistor is electrically connected at the same level scanning signal.
In GOA circuit described herein, the first drop-down maintenance module includes the 6th transistor, the 7th crystal
Pipe, the 8th transistor, the 9th transistor, the tenth transistor and the 11st transistor；
The source electrode of the grid of 6th transistor, source electrode and the 7th transistor is electrically connected at described first
Control signal, the drain electrode electricity of the drain electrode of the 6th transistor, the grid of the 7th transistor and the 9th transistor
Property connection, the drain electrode of the 7th transistor, the drain electrode of the 8th transistor, the drain electrode of the tenth transistor and described
The grid of 11st transistor is electrically connected at second node, the grid of the 8th transistor, the 9th transistor
The drain electrode of grid and the 11st transistor is electrically connected at the first node, the source electrode of the 8th transistor,
The source electrode of 9th transistor and the source electrode of the 11st transistor are electrically connected at first reference low level
Signal, the grid of the tenth transistor are electrically connected at the second control signal, and the source electrode of the tenth transistor is electrical
It is connected to the third reference low level signal.
In GOA circuit described herein, the second drop-down maintenance module includes the tenth two-transistor, the 13rd crystalline substance
Body pipe, the 14th transistor, the 15th transistor, the 16th transistor and the 17th transistor；
The source electrode of the grid of tenth two-transistor, source electrode and the 13rd transistor is electrically connected at described
Second control signal, the drain electrode of the tenth two-transistor, the 13rd transistor grid and the 15th crystal
The drain electrode of pipe is electrically connected, drain electrode, the drain electrode of the 14th transistor, the 16th crystal of the 13rd transistor
The grid of the drain electrode of pipe and the 17th transistor is electrically connected at third node, the grid of the 14th transistor
The drain electrode of pole, the grid of the 15th transistor and the 17th transistor is electrically connected at the first node,
The source electrode of the source electrode of 14th transistor, the source electrode of the 15th transistor and the 16th transistor is electrical
It is connected to the first reference low level signal, the grid of the 17th transistor is electrically connected at the first control letter
Number, the source electrode of the 17th transistor is electrically connected at the third reference low level signal.
In GOA circuit described herein, the current potential of the first reference low level signal is referred to greater than the third
The current potential of low level signal, the current potential of the second reference low level signal are greater than the electricity of the third reference low level signal
Position.
In GOA circuit described herein, the phase of the phase of the first control signal and the second control signal
Position is opposite.
The embodiment of the present application also provides a kind of display panel, including above-described GOA circuit.
GOA circuit and display panel provided by the embodiments of the present application, by increasing the tenth in the first drop-down maintenance module
Transistor, and increase by the 16th transistor in the second drop-down maintenance module, so as to pass through the tenth transistor and the
Second node and third node are pulled down to more low potential by 16 transistors, and then improve the stability of GOA circuit.
Detailed description of the invention
In order to more clearly explain the technical solutions in the embodiments of the present application, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, the drawings in the following description are only some examples of the present application, for
For those skilled in the art, without creative efforts, it can also be obtained according to these attached drawings other attached
Figure.
Fig. 1 is the structural schematic diagram of GOA circuit provided by the embodiments of the present application；
Fig. 2 is the circuit diagram of a GOA unit in GOA circuit provided by the embodiments of the present application；
Fig. 3 is the signal timing diagram of a GOA unit in GOA circuit provided by the embodiments of the present application；And
Fig. 4 is the structural schematic diagram of display panel provided by the embodiments of the present application.
Specific embodiment
Below in conjunction with the attached drawing in the embodiment of the present application, technical solutions in the embodiments of the present application carries out clear, complete
Site preparation description.Obviously, described embodiments are only a part of embodiments of the present application, instead of all the embodiments.It is based on
Embodiment in the application, those skilled in the art's every other implementation obtained without creative efforts
Example, shall fall in the protection scope of this application.
All transistors used in the examples of the application can be thin film transistor (TFT) or field-effect tube or other characteristic phases
Same device, since the source electrode of the transistor used here, drain electrode are symmetrical, so its source electrode, drain electrode can be interchanged.
In the embodiment of the present application, to distinguish the two poles of the earth of transistor in addition to grid, wherein source electrode will be known as in a pole, another pole is known as leaking
Pole.Intermediate ends by the form prescribed switch transistor in attached drawing are grid, signal input part is source electrode, output end is drain electrode.
Furthermore transistor used by the embodiment of the present application is N-type transistor or P-type transistor, wherein N-type transistor is in grid
To be connected when high level, end when grid is low level；P-type transistor is the conducting when grid is low level, is in grid
End when high level.
Referring to Fig. 1, Fig. 1 is the structural schematic diagram of GOA circuit provided by the embodiments of the present application.As shown in Figure 1, the application
The GOA circuit 10 that embodiment provides includes the GOA unit 20 of multi-stage cascade.Every level-one GOA unit 20 is used to one scanning of output
Signal and level-one communication number.Wherein, when the GOA circuit 10 works, first order GOA unit 20 accesses initial signal STV, with
Afterwards, second level GOA unit 20, third level GOA unit 20 ... ..., successively grade passes starting to afterbody GOA unit 20.
Further, referring to Fig. 2, the circuit that Fig. 2 is a GOA unit in GOA circuit provided by the embodiments of the present application shows
It is intended to.As shown in Fig. 2, the GOA unit 20 includes: node control module 101, grade transmission module 102, pull-up module 103, lower drawing-die
Block 104, first pulls down maintenance module 105, second and pulls down maintenance module 106 and bootstrap capacitor Cbt.
Wherein, node control module 101 accesses upper level scanning signal G (n-1) and upper level grade communication ST (n-
1), and it is electrically connected at first node Q (n), for according to upper level scanning signal G (n-1) and upper level grade communication ST
(n-1) current potential of first node Q (n) is controlled.
Wherein, grade transmission module 102 accesses the same level clock signal CK, and is electrically connected at first node Q (n), for the
The same level grade communication ST (n) is exported under the control of Electric potentials of one node Q (n).
Wherein, pull-up module 103 accesses the same level clock signal CK, and is electrically connected at first node Q (n), for the
The same level scanning signal G (n) is exported under the control of Electric potentials of one node Q (n).
Wherein, pull-down module 104 accesses next stage scanning signal G (n+1), the first reference low level signal VSS1 and the
Two reference low level signal VSS2, and it is electrically connected at first node Q (n) and the same level scanning signal G (n), for next
The current potential of first node Q (n) is pulled down to the electricity of the first reference low level signal VSS1 under the control of grade scanning signal G (n+1)
Position, and the same level scanning signal G (n) is pulled down to the second reference low level letter under the control of next stage scanning signal G (n+1)
The current potential of number VSS2.
Wherein, first drop-down maintenance module 105 and second drop-down maintenance module 106 access first control signal LC1,
Second control signal LC2, third reference low level signal VSS3 and the first reference low level signal VSS1, and be electrically connected at
First node Q (n) is used to according to first control signal LC1, second control signal LC2, third reference low level signal VSS3
And first reference low level signal VSS1 maintain the current potential of first node Q (n), and the first drop-down maintenance module 105 and the
Two drop-down maintenance modules 106 work alternatively.
Wherein, the first end of bootstrap capacitor Cbt is electrically connected at first node Q (n), the second end electricity of bootstrap capacitor Cbt
Property is connected to the same level scanning signal G (n).
In some embodiments, node control module 101 includes the first transistor T1；The grid of the first transistor T1 is electrical
It is connected to upper level scanning signal G (n-1), the source electrode of the first transistor T1 is electrically connected at upper level grade communication ST (n-1),
The drain electrode of the first transistor T1 is electrically connected at first node Q (n).
In some embodiments, grade transmission module 102 includes second transistor T2；The grid of second transistor T2 is electrically connected
In first node Q (n), the source electrode of second transistor T2 is electrically connected at the same level clock signal CK, the drain electrode of second transistor T2
It is electrically connected at the same level grade communication ST (n).
In some embodiments, pull-up module 103 includes third transistor T3；The grid of third transistor T3 is electrically connected
In first node Q (n), the source electrode of third transistor T3 is electrically connected at the same level clock signal CK, the drain electrode of third transistor T3
It is electrically connected at the same level scanning signal G (n).
In some embodiments, pull-down module 104 includes the 4th transistor T4 and the 5th transistor T5；4th transistor
The grid of the grid of T4 and the 5th transistor T5 are electrically connected at next stage scanning signal G (n+1), the 4th transistor T4's
Source electrode is electrically connected at the first reference low level signal VSS1, and the drain electrode of the 4th transistor T4 is electrically connected at first node Q
(n), the source electrode of the 5th transistor T5 is electrically connected at the drain electrode electrical property of the second reference low level signal VSS2, the 5th transistor T5
It is connected to the same level scanning signal G (n).
In some embodiments, the first drop-down maintenance module 105 includes the 6th transistor T6, the 7th transistor T7, the 8th
Transistor T8, the 9th transistor T9, the tenth transistor T10 and the 11st transistor T11；The grid of 6th transistor T6, source
The source electrode of pole and the 7th transistor T7 are electrically connected at first control signal LC1, the drain electrode of the 6th transistor T6, the 7th crystalline substance
The drain electrode of the grid of body pipe T7 and the 9th transistor T9 are electrically connected, the drain electrode of the 7th transistor T7, the 8th transistor T8
The grid of drain electrode, the drain electrode of the tenth transistor T10 and the 11st transistor T11 is electrically connected at second node a, and the 8th is brilliant
The drain electrode of the grid, the grid and the 11st transistor T11 of the 9th transistor T9 of body pipe T8 is electrically connected at first node Q
(n), the source electrode of the 8th transistor T8, the source electrode of the 9th transistor T9 and the source electrode of the 11st transistor T11 are electrically connected
In the first reference low level signal VSS1, the grid of the tenth transistor T10 is electrically connected at second control signal LC2, and the tenth is brilliant
The source electrode of body pipe T10 is electrically connected at third reference low level signal VSS3.
In some embodiments, the second drop-down maintenance module 106 includes the tenth two-transistor T12, the 13rd transistor
T13, the 14th transistor T14, the 15th transistor T15, the 16th transistor T16 and the 17th transistor T17；12nd
The source electrode of the grid of transistor T12, source electrode and the 13rd transistor T13 is electrically connected at second control signal LC2, and the tenth
The drain electrode of the drain electrode of two-transistor T12, the grid of the 13rd transistor T13 and the 15th transistor T15 is electrically connected, and the tenth
Drain electrode, the drain electrode of the 14th transistor T14, the drain electrode of the 16th transistor T16 and the 17th transistor of three transistor T13
The grid of T17 is electrically connected at third node b, the grid of the 14th transistor T14, the 15th transistor T15 grid with
And the 17th the drain electrode of transistor T17 be electrically connected at first node Q (n), the source electrode of the 14th transistor T14, the 15th
The source electrode of the source electrode of transistor T15 and the 16th transistor T16 are electrically connected at the first reference low level signal VSS1, the
The grid of 17 transistor T17 is electrically connected at first control signal LC1, and the source electrode of the 17th transistor T17 is electrically connected at
Third reference low level signal VSS3.
Further, GOA circuit provided by the embodiments of the present application, the current potential of the first reference low level signal VSS1 are greater than the
The current potential of the current potential of three reference low level signal VSS3, the second reference low level signal VSS2 is greater than third reference low level signal
The current potential of VSS3.The phase of first control signal LC1 and the opposite in phase of second control signal LC2.
Specifically, Fig. 3 is the signal of a GOA unit in GOA circuit provided by the embodiments of the present application incorporated by reference to Fig. 2, Fig. 3
Timing diagram.When upper level grade communication ST (n-1) is high level, and upper level scanning signal G (n-1) is high level, first is brilliant
Body pipe T1 conducting, upper level grade communication ST (n-1) is charged by the first transistor T1 to bootstrap capacitor Cbt, so that first segment
The current potential of point Q (n) rises to a higher current potential.
Then, upper level scanning signal G (n-1) switchs to low level, and the first transistor T1 is closed, the electricity of first node Q (n)
Position maintains a higher current potential by bootstrap capacitor Cbt.Meanwhile the current potential of the same level clock signal CK switchs to high potential, when the same level
Clock signal CK continues to charge to bootstrap capacitor Cbt by second transistor T2, so that the current potential of first node Q (n) reaches one more
High current potential, the same level scanning signal G (n) and the same level grade communication ST (n) also switch to high potential.
Then, when next stage scanning signal G (n+1) switchs to high level, the 4th transistor T4 and the 5th transistor T5 are beaten
It opens, the first reference low level signal VSS1 drags down the current potential of first node Q (n), and the second reference low level signal VSS2 incite somebody to action this
Grade scanning signal G (n) is dragged down.
Finally, due to which the current potential of first node Q (n) switchs to low potential, so that the 8th transistor T8 and the 9th transistor T9
It closes, meanwhile, the current potential of first control signal LC1 is high potential, so that the 6th transistor T6 and the 7th transistor T7 is opened, the
One control signal LC1 reaches second node a, so that the 11st transistor T11 is opened, the first reference low level signal VSS1 is maintained
The current potential of first node Q (n) to the first reference low level signal VSS1 current potential, and then maintain the same level scanning signal G (n) electricity
Position.
Particularly, the embodiment of the present application increases by the tenth transistor T10 by pulling down first in maintenance module 105, and
Increase by the 16th transistor T16 in the second drop-down maintenance module 106, so as to pass through the tenth transistor T10 and the tenth
Second node a and third node b are pulled down to more low potential by six transistor T16, and then improve the stability of GOA circuit.
For example, when the current potential of first control signal LC1 is high potential, when the current potential of second control signal LC2 is low potential,
At this point, the current potential of first node Q (n) is low potential.In the first drop-down maintenance module 105, since first control signal LC1 is
High potential, so that the 6th transistor T6 and the 7th transistor T7 is opened, the tenth transistor T10 is closed, and first control signal LC1 is passed
To second node a, so that the 11st transistor T11 is opened, the first reference low level signal VSS1 maintains first node Q (n)
Current potential to the first reference low level signal VSS1 current potential, and then maintain the same level scanning signal G (n) current potential.That is, under first
Maintenance module 105 is drawn to work normally.
At the same time, in the second drop-down maintenance module 106, since the current potential of first control signal LC1 is high potential, make
It obtains the 16th transistor T16 to open, third reference low level signal VSS3 reaches third node b.That is, the electricity of third node b
Position is pulled to the lower current potential of current potential than the first reference low level signal VSS1, effectively reduces first node Q (n) electric leakage.Again
One, when not worked due to the second drop-down maintenance module 106, the tenth two-transistor T12 and the 13rd transistor T13 are in and close
Closed state, is easy residual charge, and the opening of the 16th transistor T16 can make charge discharge, can effectively reduce in this way
The current stresses that tenth two-transistor T12 and the 13rd transistor T13 are subject at work improve the second drop-down maintenance
The service life of transistor in module 106, to improve the stability of GOA circuit.
Equally, for example, when the current potential of second control signal LC2 is high potential, the current potential of first control signal LC1 is low electricity
When position, at this point, the current potential of first node Q (n) is low potential.In the second drop-down maintenance module 106, due to second control signal
LC2 is high potential, so that the tenth two-transistor T12 and the 13rd transistor T13 is opened, the 16th transistor T16 is closed, second
Control signal LC2 reaches third node b, so that the 17th transistor T17 is opened, the first reference low level signal VSS1 maintains the
The current potential of one node Q (n) to the first reference low level signal VSS1 current potential, and then maintain the same level scanning signal G (n) electricity
Position.That is, the second drop-down maintenance module 106 works normally.
At the same time, in the first drop-down maintenance module 105, since the current potential of second control signal LC2 is high potential, make
It obtains the tenth transistor T10 to open, third reference low level signal VSS3 reaches second node a.That is, the current potential of second node a
Forgotten about it the lower current potential of current potential than the first reference low level signal VSS1, effectively reduces first node Q (n) electric leakage.Further
A, when not worked due to the first drop-down maintenance module 105, the 6th transistor T6 and the 7th transistor T7 are in close state,
It is easy residual charge, the opening of the tenth transistor T10 can make charge discharge, can effectively reduce the 6th crystal in this way
The current stresses that pipe T6 and the 7th transistor T7 are subject at work improve crystal in the first drop-down maintenance module 105
The service life of pipe, to improve the stability of GOA circuit.
Referring to Fig. 4, Fig. 4 is the structural schematic diagram of display panel provided by the embodiments of the present application.As shown in figure 4, this is aobvious
Show that panel includes display area 100 and the GOA circuit 200 being integrally disposed on the frontside edge of display area；Wherein, GOA electricity
Road 200 is similar with the structure of above-mentioned GOA circuit 10 and principle, and which is not described herein again.
The above is only the embodiment of the present invention, are not intended to limit the scope of the invention, all to be said using the present invention
Equivalent structure or equivalent flow shift made by bright book and accompanying drawing content is applied directly or indirectly in other relevant technology necks
Domain is included within the scope of the present invention.
Claims (10)
1. a kind of GOA circuit characterized by comprising the GOA unit of multi-stage cascade, every level-one GOA unit includes: node
Control module, grade transmission module, pull-up module, pull-down module, the first drop-down maintenance module, the second drop-down maintenance module and bootstrapping
Capacitor；
The node control module access upper level scanning signal and upper level grade communication number, and it is electrically connected at first segment
Point, for controlling the current potential of the first node according to the upper level scanning signal and the upper level grade communication number；
The grade transmission module accesses the same level clock signal, and is electrically connected at the first node, in the first node
Control of Electric potentials under export the same level grade communication number；
The pull-up module accesses the same level clock signal, and is electrically connected at the first node, for described first
The same level scanning signal is exported under the control of Electric potentials of node；
The pull-down module access next stage scanning signal, the first reference low level signal and the second reference low level signal,
And it is electrically connected at the first node and the same level scanning signal, under the control of the next stage scanning signal
The current potential of the first node is pulled down to the current potential of the first reference low level signal, and scans and believes in the next stage
Number control under the same level scanning signal is pulled down to the current potential of the second reference low level signal；
The first drop-down maintenance module and the second drop-down maintenance module access first control signal, the second control letter
Number, third reference low level signal and the first reference low level signal, and be electrically connected at the first node, use
According to the first control signal, the second control signal, the third reference low level signal and first ginseng
The current potential that low level signal maintains the first node is examined, and the first drop-down maintenance module and second drop-down maintain
Module works alternatively；
The first end of the bootstrap capacitor is electrically connected at the first node, and the second end of the bootstrap capacitor is electrically connected at
The same level scanning signal.
2. GOA circuit according to claim 1, which is characterized in that the node control module includes the first transistor；
The grid of the first transistor is electrically connected at the upper level scanning signal, and the source electrode of the first transistor is electrical
It is connected to the upper level grade communication number, the drain electrode of the first transistor is electrically connected at the first node.
3. GOA circuit according to claim 1, which is characterized in that the grade transmission module includes second transistor；
The grid of the second transistor is electrically connected at the first node, and the source electrode of the second transistor is electrically connected at
The same level clock signal, the drain electrode of the second transistor are electrically connected at the same level grade communication number.
4. GOA circuit according to claim 1, which is characterized in that the pull-up module includes third transistor；
The grid of the third transistor is electrically connected at the first node, and the source electrode of the third transistor is electrically connected at
The same level clock signal, the drain electrode of the third transistor are electrically connected at the same level scanning signal.
5. GOA circuit according to claim 1, which is characterized in that the pull-down module includes the 4th transistor and the
Five transistors；
The grid of 4th transistor and the grid of the 5th transistor are electrically connected at the next stage scanning letter
Number, the source electrode of the 4th transistor is electrically connected at the first reference low level signal, the drain electrode of the 4th transistor
It is electrically connected at the first node, the source electrode of the 5th transistor is electrically connected at the second reference low level signal,
The drain electrode of 5th transistor is electrically connected at the same level scanning signal.
6. GOA circuit according to claim 1, which is characterized in that the first drop-down maintenance module includes the 6th crystal
Pipe, the 7th transistor, the 8th transistor, the 9th transistor, the tenth transistor and the 11st transistor；
The source electrode of the grid of 6th transistor, source electrode and the 7th transistor is electrically connected at first control
Signal, the drain electrode of the 6th transistor, the drain electrode of the grid and the 9th transistor of the 7th transistor electrically connect
It connects, the drain electrode of the 7th transistor, the drain electrode of the 8th transistor, the drain electrode and the described tenth of the tenth transistor
The grid of one transistor is electrically connected at second node, the grid of the grid of the 8th transistor, the 9th transistor
And the drain electrode of the 11st transistor is electrically connected at the first node, it is the source electrode of the 8th transistor, described
The source electrode of the source electrode of 9th transistor and the 11st transistor is electrically connected at the first reference low level signal,
The grid of tenth transistor is electrically connected at the second control signal, and the source electrode of the tenth transistor is electrically connected at
The third reference low level signal.
7. GOA circuit according to claim 1, which is characterized in that the second drop-down maintenance module includes the 12nd brilliant
Body pipe, the 13rd transistor, the 14th transistor, the 15th transistor, the 16th transistor and the 17th transistor；
The source electrode of the grid of tenth two-transistor, source electrode and the 13rd transistor is electrically connected at described second
Control signal, the drain electrode of the tenth two-transistor, the grid of the 13rd transistor and the 15th transistor
Drain electrode is electrically connected, the drain electrode of the 13rd transistor, the drain electrode of the 14th transistor, the 16th transistor
The grid of drain electrode and the 17th transistor is electrically connected at third node, the grid of the 14th transistor, institute
The drain electrode for stating the grid and the 17th transistor of the 15th transistor is electrically connected at the first node, and described
The source electrode of the source electrode of 14 transistors, the source electrode of the 15th transistor and the 16th transistor is electrically connected at
The grid of the first reference low level signal, the 17th transistor is electrically connected at the first control signal, described
The source electrode of 17th transistor is electrically connected at the third reference low level signal.
8. GOA circuit according to claim 1-7, which is characterized in that the first reference low level signal
Current potential is greater than the current potential of the third reference low level signal, and the current potential of the second reference low level signal is greater than the third
The current potential of reference low level signal.
9. GOA circuit according to claim 1-7, which is characterized in that the phase of the first control signal and
The opposite in phase of the second control signal.
10. a kind of display panel, which is characterized in that including the described in any item GOA circuits of claim 1-9.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910283654.2A CN109935191A (en) | 2019-04-10 | 2019-04-10 | GOA circuit and display panel |
| PCT/CN2019/087626 WO2020206816A1 (en) | 2019-04-10 | 2019-05-20 | Goa circuit and display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910283654.2A CN109935191A (en) | 2019-04-10 | 2019-04-10 | GOA circuit and display panel |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109935191A true CN109935191A (en) | 2019-06-25 |
Family
ID=66989564
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910283654.2A Pending CN109935191A (en) | 2019-04-10 | 2019-04-10 | GOA circuit and display panel |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN109935191A (en) |
| WO (1) | WO2020206816A1 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110570799A (en) * | 2019-08-13 | 2019-12-13 | 深圳市华星光电半导体显示技术有限公司 | GOA circuit and display panel |
| CN111081196A (en) * | 2019-12-24 | 2020-04-28 | 深圳市华星光电半导体显示技术有限公司 | GOA circuit and display panel |
| CN111312146A (en) * | 2020-03-04 | 2020-06-19 | Tcl华星光电技术有限公司 | GOA circuit and display panel |
| US11151959B2 (en) | 2020-03-04 | 2021-10-19 | Tcl China Star Optoelectronics Technology Co., Ltd. | GOA circuit and display device |
| CN113593460A (en) * | 2021-07-19 | 2021-11-02 | Tcl华星光电技术有限公司 | GOA circuit |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104064160A (en) * | 2014-07-17 | 2014-09-24 | 深圳市华星光电技术有限公司 | Grid drive circuit with self-compensation function |
| CN104505036A (en) * | 2014-12-19 | 2015-04-08 | 深圳市华星光电技术有限公司 | Gate driver circuit |
| CN104517575A (en) * | 2014-12-15 | 2015-04-15 | 深圳市华星光电技术有限公司 | Shifting register and level-transmission gate drive circuit |
| CN106205538A (en) * | 2016-08-31 | 2016-12-07 | 深圳市华星光电技术有限公司 | A kind of GOA driver element and drive circuit |
| CN107146590A (en) * | 2017-07-06 | 2017-09-08 | 深圳市华星光电技术有限公司 | The driving method of GOA circuits |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI407443B (en) * | 2009-03-05 | 2013-09-01 | Au Optronics Corp | Shift register |
| CN103680453B (en) * | 2013-12-20 | 2015-09-16 | 深圳市华星光电技术有限公司 | Array base palte horizontal drive circuit |
| CN104050941B (en) * | 2014-05-27 | 2016-03-30 | 深圳市华星光电技术有限公司 | A kind of gate driver circuit |
| CN106652936B (en) * | 2016-12-09 | 2019-10-22 | 深圳市华星光电技术有限公司 | GOA circuit and display device |
| TWI632539B (en) * | 2017-11-28 | 2018-08-11 | 友達光電股份有限公司 | Scan circuit |
| CN109448624B (en) * | 2018-12-03 | 2020-10-13 | 深圳市华星光电半导体显示技术有限公司 | GOA circuit and display panel |
-
2019
- 2019-04-10 CN CN201910283654.2A patent/CN109935191A/en active Pending
- 2019-05-20 WO PCT/CN2019/087626 patent/WO2020206816A1/en active Application Filing
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104064160A (en) * | 2014-07-17 | 2014-09-24 | 深圳市华星光电技术有限公司 | Grid drive circuit with self-compensation function |
| CN104517575A (en) * | 2014-12-15 | 2015-04-15 | 深圳市华星光电技术有限公司 | Shifting register and level-transmission gate drive circuit |
| CN104505036A (en) * | 2014-12-19 | 2015-04-08 | 深圳市华星光电技术有限公司 | Gate driver circuit |
| CN106205538A (en) * | 2016-08-31 | 2016-12-07 | 深圳市华星光电技术有限公司 | A kind of GOA driver element and drive circuit |
| CN107146590A (en) * | 2017-07-06 | 2017-09-08 | 深圳市华星光电技术有限公司 | The driving method of GOA circuits |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110570799A (en) * | 2019-08-13 | 2019-12-13 | 深圳市华星光电半导体显示技术有限公司 | GOA circuit and display panel |
| WO2021027091A1 (en) * | 2019-08-13 | 2021-02-18 | 深圳市华星光电半导体显示技术有限公司 | Goa circuit and display panel |
| US11355044B2 (en) | 2019-08-13 | 2022-06-07 | Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | GOA circuit and display panel |
| CN110570799B (en) * | 2019-08-13 | 2022-10-04 | 深圳市华星光电半导体显示技术有限公司 | GOA circuit and display panel |
| CN111081196A (en) * | 2019-12-24 | 2020-04-28 | 深圳市华星光电半导体显示技术有限公司 | GOA circuit and display panel |
| WO2021128547A1 (en) * | 2019-12-24 | 2021-07-01 | 深圳市华星光电半导体显示技术有限公司 | Goa circuit and display panel |
| US11380277B2 (en) | 2019-12-24 | 2022-07-05 | Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd | GOA circuit and display panel |
| CN111312146A (en) * | 2020-03-04 | 2020-06-19 | Tcl华星光电技术有限公司 | GOA circuit and display panel |
| CN111312146B (en) * | 2020-03-04 | 2021-07-06 | Tcl华星光电技术有限公司 | GOA circuit and display panel |
| US11151959B2 (en) | 2020-03-04 | 2021-10-19 | Tcl China Star Optoelectronics Technology Co., Ltd. | GOA circuit and display device |
| CN113593460A (en) * | 2021-07-19 | 2021-11-02 | Tcl华星光电技术有限公司 | GOA circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2020206816A1 (en) | 2020-10-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109448624A (en) | GOA circuit and display panel | |
| CN109935191A (en) | GOA circuit and display panel | |
| CN106898290B (en) | Scan drive circuit | |
| CN103700357B (en) | Shift register cell and driving method, shift register and display device | |
| CN105810170B (en) | Shift register cell and its driving method, grid line driving circuit and array substrate | |
| CN104332144B (en) | Liquid crystal display panel and gate drive circuit thereof | |
| CN109712552A (en) | GOA circuit and display panel | |
| CN108281123A (en) | Shift register cell, gate driving circuit, display device and driving method | |
| CN105976755B (en) | A kind of display driver circuit and its control method, display device | |
| CN106782282A (en) | Shift register, gate driving circuit, display panel and driving method | |
| CN109493783A (en) | GOA circuit and display panel | |
| CN105632565B (en) | Shift register and its driving method, gate driving circuit and display device | |
| CN108806611A (en) | Shift register cell, gate driving circuit, display device and driving method | |
| CN109427310A (en) | Shift register cell, driving device, display device and driving method | |
| CN109935188A (en) | Drive element of the grid, method, gate driving mould group, circuit and display device | |
| CN110111715A (en) | GOA circuit and display panel | |
| CN106409207A (en) | Shifting register unit, driving method, gate electrode driving circuit and display device | |
| CN109300428A (en) | GOA circuit and display panel | |
| CN108932933A (en) | Shift register, gate driving circuit, display device | |
| CN104810003A (en) | Shifting register, driving method of shifting register, grid driving circuit and display device | |
| CN109935192A (en) | GOA circuit and display panel | |
| CN109637424A (en) | GOA circuit and display panel | |
| CN109147641A (en) | Power-off ghost shadow eliminates circuit, shift register cell and display device | |
| CN110007628A (en) | GOA circuit and display panel | |
| CN110379349A (en) | Gate driving circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information |
Address after: 9-2 Tangming Avenue, Guangming New District, Shenzhen City, Guangdong Province Applicant after: TCL Huaxing Photoelectric Technology Co.,Ltd. Address before: 9-2 Tangming Avenue, Guangming New District, Shenzhen City, Guangdong Province Applicant before: Shenzhen China Star Optoelectronics Technology Co.,Ltd. |
|
| CB02 | Change of applicant information | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20190625 |
|
| RJ01 | Rejection of invention patent application after publication |