CN109923650B - 具有提高的导热性的耐应变管芯附着和制造方法 - Google Patents

具有提高的导热性的耐应变管芯附着和制造方法 Download PDF

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CN109923650B
CN109923650B CN201780061163.2A CN201780061163A CN109923650B CN 109923650 B CN109923650 B CN 109923650B CN 201780061163 A CN201780061163 A CN 201780061163A CN 109923650 B CN109923650 B CN 109923650B
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die
pattern
surface area
package
die attach
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CN109923650A (zh
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R·F·卡尔利切克
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SOLIDUV Inc
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SOLIDUV Inc
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Abstract

在半导体管芯和用于管芯的封装之间的机械稳定且导热的界面设备以及相关的制造方法，包括：半导体管芯；用于管芯的封装；在封装和/或管芯上的表面积增强图案；以及在管芯和封装之间的管芯附着材料，管芯附着材料通过由管芯附着材料提供的界面将管芯附着到封装；其中：在管芯附着材料与封装和/或管芯之间的有效结合面积在有图案的情况下比在没有图案的情况下大；并且有效结合面积的增加同时增加了用于在封装和/或管芯与管芯附着材料之间的热传输的表面积；并且增加了用于将封装和管芯中的至少一个稳定地附着到管芯附着材料的表面积。

Description

具有提高的导热性的耐应变管芯附着和制造方法
发明背景
半导体管芯(例如发光二极管(LED)和高功率晶体管)具有平坦的安装表面并使用用于封装裸半导体元件(管芯)的各种有机(类似环氧树脂)或无机(焊料)附着方法而附着到平坦封装表面。这个过程通常被称为管芯附着(D/A)过程，且粘合剂或焊料被称为D/A材料。除了将管芯保持在封装内部用于随后的组装操作(如丝焊和包覆成型)以外，管芯表面和封装表面的这个组合和D/A材料还需要满足几个其它要求：
·适应在热循环期间出现的芯片、封装和管芯附着材料的任何膨胀/收缩，其是由于在半导体管芯和封装材料之间的热膨胀系数(CTE)失配而导致的。
·提供用于使热有效地通过封装从半导体管芯传导并到达封装外表面的高导热性。
·为了提高的强度和更好的热管理，标称上没有在半导体管芯和匹配封装表面之间的空隙。
·经得起高速组装过程以确保低制造成本。
通常，封装表面和管芯表面是干净和平坦的。CTE管理和空洞都对较大的管芯变得成问题，且故障可能变得更有问题。可通过在真空环境中执行固化或焊接操作来管理空洞，但这可能很慢并增加封装操作的费用。
因此，对高功率半导体设备制造和可靠的操作的基本挑战涉及在半导体管芯(其中热被产生)和封装之间创建机械稳定且导热的界面，该封装容纳管芯且一般附着到电路板以创建现代电子和光电***。在图1中示出了说明在现有技术中遇到的挑战的一般性结构，其中D/A材料被显示有一般在高体积制造操作期间出现的空隙(气隙)4。具体来说，图1示出半导体管芯1、D/A材料2和封装3(一般在其金属部分处附着到D/A材料2)。热流方向由指向下的箭头示出。空洞被示为在D/A材料2中的间隙4。这些空隙4可影响成品设备的机械稳定性和热性能，危害在操作中的可靠性。存在两个相关问题，其需要被解决以提高图1所示的组件的总性能。第一个问题是提高热性能。第二个问题是提高机械性能。
关于热性能，半导体设备在高温下比在较低温度下更快地降级。在操作期间在半导体管芯1中产生的热一般需要通过封装3传导到环境。冷却过程的效率取决于图1所示的所有材料的导热性以及界面的数量，热能需要通过所述界面来被传输。图1所示的界面的类型包括：
·管芯1到空气界面(空隙4)
·空气到封装3界面(空隙4)
·空气到D/A材料2界面(空隙4)
·管芯1到D/A材料2界面
·D/A材料2界面到封装3
研究表明，即使使用高导热性材料(管芯1、D/A材料2、封装3材料)，从一种类型的材料到另一类型的材料或通过气穴传输热能也是个大问题。一般而言，这个热界面阻力是取决于所涉及的材料和热如何在不同类型的材料之间的原子或分子水平处被传递(例如由不同类型的原子和分子键特征化)的基本特性。一般而言，热传输可以在例如图2所示的简化阻抗图中被特征化，图2示出管芯、D/A材料和封装的复杂组件的典型非限制性示例。在这里所示的芯片是典型蓝色LED的热表示，其中LED的结在所示蓝宝石衬底的顶部上的非常薄的半导体层中。在这里特别感兴趣的是热路径可被描述和建模为阻碍热的传输的一系列热“阻器”的事实。图2表示在结构中的几个界面，且可看到空隙4的存在。注意，特定的热阻抗取决于未按比例示出的层的特定厚度。
目前技术水平涉及最小化界面的数量、最大化所涉及的所有材料的整体导热性、以及最小化空洞的出现。减小热界面阻抗只在迄今为止的最新型封装中通过减小界面的总数量来着手处理。似乎很少关注改变所涉及的界面的基本结构。
关于机械性能，现代电子设备需要在宽范围的温度上操作。因为在半导体封装中使用的大部分材料在增加温度的情况下膨胀不同的量，机械应变可能在典型半导体部分的热循环期间被引入。图3所示的是在热循环可靠性测试之后的在半导体封装中出故障的现有技术焊接点的图像。封装的这个部分的机械稳定性取决于所涉及的所有材料的热膨胀系数、它们的弹性(在应变下拉伸的能力)、界面的物理尺寸和在所使用的热D/A材料2与封装3和半导体管芯1的表面之间的粘附的程度。通常，这通过界面的仔细清洁和抛光以防止空洞4并通过控制D/A材料2的厚度(通常被称为结合线厚度或BLT)以帮助在较大的距离上分布应变来处理。当然，较厚的管芯附着粘合剂厚度(较大的BLT)对机械可靠性更好，但较大的厚度也增加热阻力。理想地，想要为了更好的热性能而保持热界面粘合剂材料的厚度尽可能薄，同时也提供高机械强度和可靠性。
在图4中示出在现有技术中被研究以提高现代半导体封装的热性能和机械稳定性的很多领域的概述。使用各种各样的复杂技术，但关键的界面技术涉及用热界面粘合剂填充在管芯1和封装3界面处的粗糙处以处理微空洞(纳米海绵被示为粗糙填料)。同样，很少关注改变所涉及的界面的基本结构。
发明概述
在本文公开的是使用图案化表面(在管芯、封装安装表面或这两者上)以减少空洞，帮助为大管芯管理与CTE相关的可靠性故障，并提高芯片/封装界面的导热性以确保在操作期间在封装内部的半导体管芯的较佳冷却，均同时提高机械强度和可靠性。
具体来说，所公开的是在半导体管芯和用于管芯的封装之间的机械稳定且导热的界面设备以及相关的制造方法，其包括：半导体管芯；用于管芯的封装；在封装和/或管芯上的表面积增强图案；以及在管芯和封装之间的管芯附着材料，管芯附着材料通过由管芯附着材料提供的界面将管芯附着到封装；其中：在管芯附着材料与封装和/或管芯之间的有效结合面积在有图案的情况下比在没有图案的情况下大；以及有效结合面积的增加同时增加了用于在封装和/或管芯与管芯附着材料之间的热传输的表面积；以及增加用于将封装和管芯中的至少一个稳定地附着到管芯附着材料的表面积。
附图说明
在所附权利要求中阐述了被认为是新颖的本发明的特征。然而，可通过参考结合下面概述的附图而做出的以下描述来最好地理解本发明连同其另外的目的和优点。
图1是示出半导体管芯、D/A材料、以及封装的一部分的典型现有技术半导体封装结构的示意性平面图。热流方向由箭头示出。空洞被示为在D/A材料中的间隙。
图2是由一系列可变热阻抗建模的典型半导体管芯、热粘合剂界面、封装和外部散热器热耗散***的热阻抗堆叠的示意性表示。
图3是示出具有在热循环期间形成的裂缝的出故障的现有技术热界面的图像。在这里，D/A材料是被示为热界面粘合剂的焊料。
图4是在现有技术中用于解决在现代半导体设备封装中的热和机械性能问题的一系列技术的可视化概述。注意，唯一的界面管理方法涉及纳米粒子空隙填充材料以补偿所涉及的表面的微观粗糙度。
图5是示出根据本发明的专业化结构的示意性横截面视图，其中微观柱体结构形成在管芯和封装表面之间的界面处，以增加在D/A材料和封装结合表面之间的结合表面积。图5的右手侧放大了在左边示出的界面的小部分。
图6A、6B、6C和6D是非限制性的各种截面形状的自顶向下示意图，这些截面形状对于用于增加有效结合面积(EBA)的图5的微观柱体结构是可能的。在任何给定情况下选择的形状取决于对手头的管芯附着要求的各种成本、机械和热要求。
图7A、7B和7C是可被优化以最大化导热性和结合强度的各种柱体密度、形状和图案的侧视图。
图8是图7C的可变密度柱体填集的示意性顶视图示例。
图9是示出在管芯表面和封装表面上的图案化表面的非限制性示例的示意性平面图。在这个示意图中，圆锥体的密度和尺寸在这两个表面上在标称上是相同的。
具体实施方式
为了提高机械稳定性和热性能，本发明特别使用封装3和/或管芯1的表面的专业化结构来增加与D/A材料2的接触表面积。在图5中示出本发明的示例性优选实施例的横截面视图。基本概念是同时增加可用界面表面积并创建结合加强结构来同时提高总结构的机械可靠性和热性能。关于本发明设想的管芯类型包括但不限于LED、激光二极管、微处理器、功率晶体管和功率专用集成电路(ASIC)。
图5所示的结构包括图案化封装3的表面或基板，其包括穿过在基板封装3和管芯1之间的距离的部分(通常至少40％)延伸的表面积增强图案5(例如没有限制地，大量微观铜柱)。所示结构设想没有空隙4(虽然那不是本发明的要求)。本发明的优选实施例涉及包括强的高导电性烧结纳米银的D/A材料2的使用，纳米银被选择为使得能够在图案5柱体之间完全填充。除了纳米银以外，焊料也将是本发明的合适D/A材料2。在这里注意，在很多D/A材料中，类似粘合剂的环氧树脂或硅被装载有可能有时大于图案5柱体之间的空间的高导电性粒子(例如银(Ag)或氮化硼(BN))，由此，使用这些类型的粒子填充的材料将使如图5所示的高传导性填充结构变得无法制造。因此，基于D/A材料中的任何纳米粒子来设计柱体间距。在这里，图案化表面5只在组件的封装3侧。但这是非限制性的：图案3可以替代地在管芯1侧或在这两个表面上。这将在下面特别关于图9被进一步讨论。
在整个本公开和权利要求中，对封装3和到封装3的附着的提及指的是封装或壳体的部分，其中主要为了提高管芯1的热性能，将管芯1附着到金属底座。封装的这个部分常常在本领域中被称为管芯焊盘、散热片、管芯附着桨、管芯附着焊盘或引线框(封装的金属部分，塑料材料通常被模塑在该金属部分周围以形成管芯的腔)。在一些情况下，最终封装被称为壳体，该术语主要用于空气腔封装，其中管芯主要由在壳体内部的提供对管芯的物理和光学保护的真空或某种气体混合物围绕。所以，本发明适用但不限于半导体设备封装3或壳体的那个部分，其中为了提高管芯1的热性能的目的，将管芯1附着到封装3。
还注意，本发明也可应用于印刷电路板的附着表面和封装的外表面或在电路板和例如可由图2示出的散热器的附着表面之间，其中提高的热传输也是期望的，因为存在与散热器的差的界面。优选实施例是一个以下这样的实施例，其中为了最好可能的热管理，封装包括在封装的内部(对于管芯附着)和作为封装外表面的部分(对于到电路或散热器的随后附着)的图案化表面。
此时更详细地引入表面积增强的概念是有帮助的，因为这是本发明的关键部分。在缺乏管芯1或封装3的表面的微柱体图案化的情况下，提供管芯1到封装3的粘附且热能够流动穿过的表面积近似等于管芯1本身的面积，或：
Abond＝Adie (1)
现在考虑图5中的结构，其中增加的结合面积由下式给出：
Abond＝Adie+Apattern (2)
其中Apattern是由图案5柱体的侧壁表示或由下式给出的表面积：
Apattern＝2πrhn (3)
其中r是图案5柱体的半径，h是每个柱体的高度，并且n是直接在管芯1之下的柱体的数量。因此，图5所示的示例的有效结合面积(EBA)比是：
Figure BDA0002015100640000061
注意，在图5的简化图示中，半径r在每个柱体的整个高度h上是恒定的。通常，这不是要求的，参见例如具有圆锥形柱体的图7B。所以虽然等式(1)、(2)和(4)通常可适用于任何和所有表面积增强图案5的任何和所有Apattern，但Apattern的等式(3)对于例如图5所示的恒定半径柱体是特定的。本发明的目的是尽可能多地增加EBA比(4)，而不考虑图案形状，以提高结合强度和用于越过在D/A材料2和封装3之间的界面的热传输的表面积，如图5所示。
除了在这里被设想为简单地是圆形的粗制(unshaped)柱体的图案5柱体以外，其它结构也可用于形成表面积增强图案5，如为了说明而非限制而在图6A、6B、6C和6D的自顶向下视图中所示的。当然，更多的形状是可能的，但形状选择的一般规则应是最大化单独柱体的EBA、制造的容易(一般将设想电镀或压缩成形)、以及由所涉及的材料的微分热膨胀系数而引起的应变耗散。
通常，在管芯1和封装3之间的管芯附着材料2是由粘合剂、熔接剂或其它粘性材料和高导热性材料的粒子(Ag粒子、Cu粒子、焊料粒子、BN(氮化硼)等)组成的复合物。为了最大化在管芯附着材料2和图案化衬底5的表面之间的接触，优选地，增加图案化特征5的表面积的所引入的任何特征只包含具有在顶点处的曲率半径的外角，其是足够钝的，以便等于或大于在管芯附着复合D/A材料2中的平均导电粒子的半径。如果外角是尖锐的或以任何其它方式创建对于复合D/A 2的粒子而言太小而不能进入的表面特征，则可能产生空洞和减小的界面接触和较差的热性能。将看到，在图6A、6B、6C和6D中的每个中的顶视图截面满足这个标准：在表面积增强图案5的单独微部件(例如柱体)的表面之上的外角大于或等于在结合表面积增强图案5使用的D/A材料2中的导电粒子的平均半径。
我们现在转到图7A、7B和7C。在这些附图中，没有示出管芯1本身；我们看到的是在几个示例性的非限制性配置中表面积增强图案5柱体穿透到D/A材料2中。例如，虽然再现图5的右手侧部分的图7A示出圆形的粗制柱体，其Apattern使用等式(3)被计算，但对于柱体的图7B所示的圆锥形状，表面积增强图案5柱体可能是有利的，因为这可提供从图案化基板到在管芯1(未示出)之下的连续D/A材料2的较平滑的过渡。然而，这样的圆锥形截面可能更难以通过简单的电镀方法来制造。
图7C所示的另一实施例涉及穿透到管芯1(未示出)之下的D/A材料2中的表面积增强图案5柱体的可变图案的使用。这些柱体被布置，以便冷却管芯1的最热部分，同时提供在管芯1的边缘处的良好粘附。在图7C中从左到右的范围上，管芯1被假设与D/A材料2实质上一样宽；因此，热物理现象将使管芯1的最热部分在图7C的中心处。所以为了优化热管理，将制造在最热区域中的最大柱体密度，这就是为什么在图7C的中心附近示出较高的柱体密度。
通常，可使用各种有限元分析工具来对所选择的各种有利的柱体形状和图案进行建模，有限元分析工具计算在例如这里设想的复杂多部件***中的热场和应变场，其中为了给定应用的特定结合要求，柱体形状、柱体高度、总D/A材料2的厚度、以及定制的图案(例如在柱体之间的间距)可被优化并在各种组合中无限制地被使用。
考虑在图7C中示出、接着在图8的自顶向下视图中在二维平面横截面上示出的柱体结构的非周期性布局是有益的。在这里，在圆形元件代表表面积增强图案5柱体的情况下，柱体填集密度在管芯1的中心附近较高。一般来说，在这里在中心附近，其中管芯1在正常操作期间将是最热的，并且其中由于热失配而引起的应变将是最大的。所以除了在使用期间在制造之后的机械和热优点以外，这个结构在本发明中设想的某些制造方法中也是有利的。
例如，一种情况是，这提供了且优点是使用焊料作为D/A材料2来制造组件。通常来说，焊料包括熔接剂材料，其被设计成促进焊料在被熔化到它预期附着到的材料时的润湿。通常来说，熔接剂需要在结合过程期间漏出，但有时不能漏出，并因此留下空隙4，其中熔接剂无法在制造期间漏出。对于在图7C、也可以是图8中的图案，润湿在管芯/封装结构的中心中将是最强的，其中有来自柱体的更多表面积。作为结果，润湿将从中心(较高的热区域)自然地前进到外边缘(较低的热区域)，从而促进熔接剂的漏出和在侧面外的空隙的任何发展，与使用正常平面未图案化的表面实现的那些相比实现优良管芯附着。
现在让我们讨论材料、应用和制造方法。用于半导体设备的提高的结合的图案化界面的使用可应用于各种各样的电子管芯，包括硅集成电路(例如微处理器)和分立的电子设备(功率晶体管或发光二极管)。此外，本发明也可用于将封装半导体设备附着到其它表面，其中强度和热管理都很重要，特别是在印刷电路板(PCB)或金属包覆PCB(MCPCB)上的表面安装填集设备以及在PCB或MCPCB到散热器的附着中。
其它D/A材料2可以是任何粘合剂(环氧树脂、硅树脂)，包括填充粘合剂(例如Ag填充环氧树脂)，假定导热填料的尺寸实质上小于在表面积增强图案5柱体之间的最小间隔。这还包括焊锡膏或焊剂预成型、纳米金属膏或纳米金属预成型(Ag和Cu纳米金属管芯附着材料现在都是可得到的)、或具有混合复合物(例如环氧树脂中的焊料、硅树脂中的焊料、Ag填充的环氧树脂和硅树脂)的管芯附着。在一些情况下，使用压力结合技术来确保所使用的管芯附着材料完全填充在管芯1、柱体和壳体的底座之间的所有空间可能是期望的。通常来说，这样的压力在1到10MPa的范围内，取决于管芯附着材料和BLT。使管芯附着在高达10MPa的压力下预成型确保了空隙最小化。
用于形成图案化表面的方法在封装3的表面的情况下可包括压印、电镀或刮削(使用刀片来形成表面积增强图案5鳍状物或柱体，类似于犁如何在土壤中的犁沟中成形)。通常来说，优选的柱体成分是铜，其可以为了提高到D/A材料2的粘附的目的而被镀有另一金属(通常是金或镍)。也可使用在用于电子设备制造的领域中使用的其它材料，这取决于应用。对于直接在管芯1上形成的柱体(其将立刻在图9中被详述)，使用穿过用光刻法界定的开口的电镀来用于在管芯1的底部上的金属化是期望的，虽然不是限制性的。
理想地，应按照等式(4)来最大化柱体表面积。但柱体的高度应大致是常规D/A材料2的厚度的数量级，即，～25μm或更小。此外，如果图案化只出现在表面之一(即，管芯1或封装3，但不是两者)上，则D/A材料2(焊料、粘合剂或纳米Ag)的涂敷应足够厚，使得当组件被完成(焊接、烧结、固化)时，如果柱体5在封装3上，则柱体的顶部不与管芯1接触，或相反地如果柱体5在管芯1上，则不与封装3接触。这均在图5和7中示出，其中柱体5被示为比在完成(焊接、烧结、固化)状态中的D/A材料2的整个厚度短。
制造方法的一个优选实施例是使用在膜形式中可得到的纳米Ag材料，其中膜在管芯附着之前被层压到图案化表面。层压是优选的，以迫使可形成的纳米Ag膜进入到柱体之间的空间中并到达柱体之间的底平面。在这种情况下，柱体高度和纳米Ag膜厚度应被选择为使得一旦完成最终烧结操作(以完成D/A过程)，柱体高度就是在管芯1的底部和柱体的底座之间的总间隔(结合线厚度)的至少40％或50％到至多80％或90％，其中它们满足封装3，参见图5。柱体的高度和管芯附着材料2的总体积需要被选择以反映在烧结、焊料回流或其它固化过程期间管芯附着材料2的收缩，以确保管芯1不接触柱体的顶部。或者，如果柱体在壳体和管芯1这两者上，如将接着在图9中查看的，柱体的顶部不应接触彼此，这将导致过多的空隙4的形成。
也可以用表面积增强图案5柱体来图案化管芯1和封装3的表面，如图9所示。在这个示例中，示出互穿特征，因为这可以有迫使D/A材料2进入这两个表面上的柱体之间的间隙空间内的优点。当然，管芯1相对于封装3的小心对准是需要的，以确保柱体的顶部不在组装期间碰撞。这可使用在每个表面上的柱体的特殊图案和适当的对准标记来实现，对准标记可在将管芯1放置到封装3的表面上期间由管芯附着机器读取。当然，上面所述的各种柱体形状/图案放置的组合可与在管芯1和封装3的表面上的柱体图案一起使用而没有限制。还将认识到和理解，当D/A界面的两侧都被图案化时，EBA最大。如图9所示的结构互穿是不必要的。D/A材料2的厚度应仍然垂直地填充在两组柱体的底平面之间的总距离的10％和60％或20％和50％之间(即，100％减去前面提到的40％到90％或50％到80％)。
还应注意，在图9中，包括附着到管芯1的底部的圆锥形柱体的向下表面积增强图案5可以是包括与管芯1的材料不同的材料的柱体。优选地，这些将包括直接从平面金属向上电镀的金属，平面金属是管芯1元件的电触头或底表面的一部分。它可以但可能不是同一材料，因为附着到管芯1的金属一般不同于用于封装的散热片或结合焊盘的金属。这是因为在芯片上的金属需要与管芯1的材料的底表面冶金地兼容(良好的粘附、在没有扩散到管芯内的情况下的结合)。
通常来说，所有管芯1都具有在表面上的管芯附着过程中涉及的特别设计的金属化。这个金属化预期保护管芯1免受管芯附着材料2中的任何反应成分损害，以提高管芯2和管芯附着材料2之间的粘附。在一些情况下，它还提供与管芯1本身的标称欧姆电接触。在管芯1被图案化有表面积增强图案5(例如在它的附着表面处的柱体)以用由图9所示的方式来减小热界面阻抗的情况下，用于形成图案5的金属应与管芯1金属化的平面部分的面向外的金属相同。这个金属通常是Au，但可以是Al、Ni、Cu或用于管芯附着的用作管芯1的外部金属的任何其它金属。以这种方式，提供在管芯1的底部上(除了或代替在封装3的顶部上)的表面积增强图案5以图2所示的那些部件的特性而不产生额外的热(或机械)界面。
这种方法对D/A的机械强度和可靠性是由于以下两者来实现的：增加的表面积(EBA>1)，其提供了用于D/A材料2到封装3和管芯1的粘附的较大面积；以及由于表面积增强图案5(例如但不限于柱体)的存在而在管芯1和封装3之间的D/A材料2中的裂缝传播的难度。
最后，通过甚至图5、7和9的粗略几何检查将看到，使用等式(4)计算的EBA可容易明显大于1。例如，参考原型图7A，如果这个侧视图截面代表在图8的x和y方向上的柱体的均匀密度，则容易推断出，表面积大于双倍，即，比率EBA≥2.0，以及事实上接近于三倍，EBA～3.0。虽然确切的EBA将取决于Apattern的值(其再次将基于特定表面积增强图案5的几何结构而改变，该几何结构包括例如在图7C和8中所示的任何密度变化)，但最低限度地，对于被填加到封装3的表面积增强图案5实现EBApackage≥1.5并且同样对于以图9所示的方式被填加到管芯1的表面积增强图案5实现EBAdie≥1.5是简单的。更一般地，对于管芯1和/或封装3中的每个，EBA≥2.0、EBA≥2.5和甚至EBA≥3.0都是使用适当的几何设计而实现的结果，这取决于管芯1和/或封装3中的一个或两个是否被给予表面积增强图案5。
在本公开的时间由本领域中的普通技术人员拥有的知识(包括但不限于使用本申请公开的现有技术)被理解为本公开的组成部分，且通过引用被隐含地并入本文，即使为了经济的利益，从本公开省略了关于被理解为由普通技术人员拥有的特定知识的陈述。虽然在本公开中参考包括多个元件的组合的本发明，但也理解，本发明被视为包括省略或排除一个或多个这样的元件的组合，即使一个或多个元件的这个省略或排除未在本文明确规定，除非在本文明确地规定元件对申请的组合是必不可少的且不能被省略。进一步理解，相关的现有技术可包括元件——本发明可通过否定的权利要求限制来与所述元件区分开，甚至没有在本文的这样的否定限制的任何明确陈述的情况下。应理解，在本文明确规定的申请人的发明的肯定陈述和被并入本文的现有技术和普通技术人员的现有技术的知识(即使为了经济的原因而没有在这里明确再现)之间，由现有技术支持的任何和所有这样的否定权利要求限制也被考虑为在本公开及其相关权利要求的范围内，甚至缺乏关于任何特定的否定权利要求限制的在本文的任何明确陈述。
最后，虽然只示出和描述了本发明的某些优选特征，本领域中的技术人员将想到很多修改、变化和替换。因此应理解，所附权利要求意欲涵盖如落在本发明的真实精神内的所有这样的修改和变化。

Claims (19)

1.一种在半导体管芯和用于所述管芯的封装管芯附着衬底之间的机械稳定且导热的界面设备，包括：
半导体管芯；
具有用于所述管芯的管芯附着衬底的封装；
在所述封装管芯附着衬底和所述管芯中的至少一个上的表面积增强图案；以及
在所述管芯和所述封装管芯附着衬底之间的管芯附着材料，所述管芯附着材料通过由所述管芯附着材料提供的界面将所述管芯附着到所述封装管芯附着衬底；其中：
在所述封装管芯附着衬底和所述管芯中的所述至少一个与所述管芯附着材料之间的有效结合面积在有所述图案的情况下比在没有所述图案的情况下大，即，所述有效结合面积在有所述图案的情况下比在没有所述图案的情况下具有增加；并且
所述有效结合面积的所述增加同时增加了用于所述封装和所述管芯中的所述至少一个与所述管芯附着材料之间的热传输的表面积；并且增加了用于将所述封装和所述管芯中的所述至少一个稳定地附着到所述管芯附着材料的表面积，
其中，所述表面积增强图案是通过对所述封装管芯附着衬底和所述管芯中的所述至少一个的热界面表面进行图案化而形成的并且从而由所述封装管芯附着衬底和所述管芯中的所述至少一个的所述热界面表面形成，
其中，所述表面积增强图案包括大量微观柱体，所述大量微观柱体的高度比所述管芯附着材料的整个厚度短，
其中，所述管芯附着材料由能够在所述大量微观柱体之间完全填充的烧结的纳米银或焊料构成，并且
其中，具有所述表面积增强图案的所述有效结合面积与没有所述表面积增强图案的所述有效结合面积之比由下式给出：
Figure FDA0003526078000000011
其中Adie是没有所述图案的所述管芯的接触表面积，并且Apattern是所述图案的接触表面积。
2.如权利要求1所述的设备，其中，所述表面积增强图案被配置使得所述EBA≥1.5。
3.如权利要求1所述的设备，所述管芯附着材料包括导电粒子；其中：
所述表面积增强图案的微成分的表面之上的外角被配置成大于或等于所述管芯附着材料中的所述导电粒子的平均半径。
4.如权利要求1所述的设备，所述表面积增强图案包括在设备操作期间变得较热的中心设备区域中的较高密度和在设备操作期间变得不太热的外部设备区域中的较小密度。
5.如权利要求1所述的设备，所述封装管芯附着衬底包括所述表面积增强图案。
6.如权利要求1所述的设备，所述管芯包括所述表面积增强图案。
7.如权利要求1所述的设备，所述封装管芯附着衬底和所述管芯均包括所述表面积增强图案。
8.如权利要求1所述的设备，其中，所述表面积增强图案具有的高度为在所述管芯的底部和所述封装管芯附着衬底的顶部之间的结合线厚度的至少40％。
9.一种用于制造在半导体管芯和用于所述管芯的封装管芯附着衬底之间的机械稳定且导热的界面设备的方法，包括：
提供半导体管芯；
提供用于所述管芯的具有管芯附着衬底的封装；
在所述封装管芯附着衬底和所述管芯中的至少一个上制造表面积增强图案；
通过在所述管芯和所述封装管芯附着衬底之间引入管芯附着材料的界面来将所述管芯附着到所述封装管芯附着衬底；从而：
相比在没有所述图案的情况下，在有所述图案的情况下提供在所述封装管芯附着衬底和所述管芯中的所述至少一个与所述管芯附着材料之间的更大的有效结合面积；以及
同时增加用于在所述封装和所述管芯中的所述至少一个与所述管芯附着材料之间的热传输的表面积；并且增加用于将所述封装和所述管芯中的所述至少一个稳定地附着到所述管芯附着材料的表面积，
其中，所述表面积增强图案是通过对所述封装管芯附着衬底和所述管芯中的所述至少一个的热界面表面进行图案化而形成的并且从而由所述封装管芯附着衬底和所述管芯中的所述至少一个的所述热界面表面形成，
其中，所述表面积增强图案包括大量微观柱体，所述大量微观柱体的高度比所述管芯附着材料的整个厚度短，
其中，所述管芯附着材料由能够在所述大量微观柱体之间完全填充的烧结的纳米银或焊料构成，并且
其中，具有所述表面积增强图案的所述有效结合面积与没有所述表面积增强图案的所述有效结合面积之比由下式给出：
Figure FDA0003526078000000031
其中Adie是没有所述图案的所述管芯的接触表面积，并且Apattern是所述图案的接触表面积。
10.如权利要求9所述的方法，还包括配置所述表面积增强图案，以使得所述EBA≥1.5。
11.如权利要求9所述的方法，还包括制造所述表面积增强图案以包括所述大量微观柱体。
12.如权利要求9所述的方法，还包括：
将所述表面积增强图案的微成分的表面之上的外角制造成大于或等于在所述管芯附着材料内包含的管芯附着材料中的导电粒子的平均半径；以及
使用包括所述导电粒子的所述管芯附着材料来将所述管芯与所述封装管芯附着衬底结合。
13.如权利要求9所述的方法，还包括制造所述表面积增强图案以包括在设备操作期间变得较热的中心设备区域中的较高密度和在设备操作期间变得不太热的外部设备区域中的较小密度。
14.如权利要求13所述的方法，所述管芯附着材料包括焊料，所述焊料包括熔接剂材料以便于润湿；并且
使用包括所述熔接剂材料的所述管芯附着材料来将所述管芯与所述封装管芯附着衬底结合；其中：
润湿自然地从所述中心设备区域前进到所述外部设备区域，从而促进所述熔接剂的漏出和通过所述外部设备区域的空隙的任何发展。
15.如权利要求9所述的方法，还包括制造所述封装管芯附着衬底以包括所述表面积增强图案。
16.如权利要求9所述的方法，还包括制造所述管芯以包括所述表面积增强图案。
17.如权利要求9所述的方法，还包括制造所述封装管芯附着衬底和所述管芯以均包括所述表面积增强图案。
18.如权利要求9所述的方法，还包括制造所述表面积增强图案以包括在所述管芯的底部和所述封装管芯附着衬底的顶部之间的结合线厚度的至少40％的高度。
19.一种在印刷电路板与管芯封装或散热器之间的机械稳定且导热的界面设备，包括：
印刷电路板；
管芯封装或散热器；
在所述印刷电路板和所述管芯封装或散热器中的至少一个上的表面积增强图案；以及
在所述印刷电路板与所述管芯封装或散热器之间的管芯附着材料，所述管芯附着材料通过由所述管芯附着材料提供的界面将所述印刷电路板附着到所述管芯封装或散热器；其中：
在所述印刷电路板和所述管芯封装或散热器中的所述至少一个与所述管芯附着材料之间的有效结合面积在有所述图案的情况下比在没有所述图案的情况下大，即，所述有效结合面积在有所述图案的情况下比在没有所述图案的情况下具有增加；并且
所述有效结合面积的所述增加同时增加了用于在所述印刷电路板和所述管芯封装或散热器中的所述至少一个与所述管芯附着材料之间的热传输的表面积；并且增加了用于将所述印刷电路板和所述管芯封装或散热器中的所述至少一个稳定地附着到所述管芯附着材料的表面积，
其中，所述表面积增强图案是通过对所述电路板和所述管芯封装或所述散热器中的所述至少一个的热界面表面进行图案化而形成的并且从而由所述电路板和所述管芯封装或所述散热器中的所述至少一个的所述热界面表面形成，
其中，所述表面积增强图案包括大量微观柱体，所述大量微观柱体的高度比所述管芯附着材料的整个厚度短，
其中，所述管芯附着材料由能够在所述大量微观柱体之间完全填充的烧结的纳米银或焊料构成，并且
其中，具有所述表面积增强图案的所述有效结合面积与没有所述表面积增强图案的所述有效结合面积之比由下式给出：
Figure FDA0003526078000000061
其中Adie是没有所述图案的所述管芯的接触表面积，并且Apattern是所述图案的接触表面积。
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