CN109904128B - Three-dimensional integrated T/R assembly packaging structure and packaging method based on silicon-based carrier plate - Google Patents
Three-dimensional integrated T/R assembly packaging structure and packaging method based on silicon-based carrier plate Download PDFInfo
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- CN109904128B CN109904128B CN201910192685.7A CN201910192685A CN109904128B CN 109904128 B CN109904128 B CN 109904128B CN 201910192685 A CN201910192685 A CN 201910192685A CN 109904128 B CN109904128 B CN 109904128B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Abstract
The invention discloses a three-dimensional integrated T/R component packaging structure and a packaging method based on a silicon-based carrier plate, wherein the structure comprises the following components: a silicon-based carrier plate as a substrate; a plurality of vertically interconnected RF chips, wherein the bottommost RF chip is mounted on the silicon-based carrier plate; at least one special-shaped gasket, which is arranged between two different vertically interconnected RF chips to realize vertical stacking and packaging of the different RF chips; and leads for interconnecting signals between different RF chips and between the RF chip and the silicon-based carrier. According to the packaging structure and the packaging method provided by the invention, the vertical interconnection of the RF chip is realized through the special-shaped gasket with the cavity structure, so that the air bridge structure of the RF chip can be well protected and the microstrip line structure in the RF chip can be avoided; the special-shaped gasket with the cavity structure, which is made of silicon or silicon dioxide materials, can ensure that important parameters in the RF chip are consistent before and after packaging to the maximum extent; and the special-shaped gasket is provided with the metal film, so that the electrode of the RF chip is conveniently led out.
Description
Technical Field
The invention relates to the technical field of packaging, in particular to a three-dimensional integrated T/R component packaging structure and a packaging method based on a silicon-based carrier plate.
Background
Phased array radars are an important development direction in the field of radars nowadays, and a T/R component serving as a core part of the phased array radars is developing towards miniaturization, low cost, high frequency and high reliability. Due to high frequency and small antenna array element spacing, the active phased array T/R component faces great challenges in the aspects of circuit layout, signal interconnection, high-density packaging and the like. Therefore, on the premise of meeting the electric performance indexes of the microwave circuit, the improvement of the integrated packaging density of the T/R component is always the key point and the difficulty point of the application research in the field of millimeter wave active phased arrays.
The integration level of the T/R assembly can be improved in various modes, wherein continuous improvement of millimeter wave gallium arsenide monolithic microwave integrated circuit (GaAs MMIC) performance and rapid development of low temperature co-fired ceramic (LTCC), thin film multilayer and other substrate manufacturing processes provide possibility for integrated packaging of the phased array assembly.
In the prior art, a developed millimeter wave eight-unit transceiving assembly packaging model is shown in fig. 1, a millimeter wave GaAs MMIC active device is attached in a cavity of an LTCC substrate through a conductive adhesive, and the LTCC substrate is firstly welded with a kovar enclosure at high temperature during assembly; then welding the metal-plated WCu base on the metal-plated WCu base by a yield welding process; and finally, realizing the air-tight packaging of the cover plate and the assembly through the parallel sealing cover. The method has the disadvantages that the size of the packaging body is overlarge, and the requirement of urgent miniaturization of the T/R assembly is not met.
Chinese patent application No. CN201621153659.1 discloses a novel high-integration T/R assembly, which is formed by two 8-channel modules in butt joint combination, as shown in fig. 2, the 8-channel modules include a cavity for accommodating devices and a PCB board in the cavity, wherein the low-frequency PCB board can be used as a shielding cover board of a radio frequency microwave circuit, which improves the integration of peripheral components. Although the method improves the integration level through a stacking mode, the method is limited by the size of the cavity and the PCB, and the miniaturization degree of the whole assembly is limited.
The prior art discloses a 3D assembly method of an integrated T/R assembly chip, which is characterized in that an active device is three-dimensionally packaged in a laminated rectangular cavity through a green ceramic chip laminated structure, the chips are connected through a gold wire bonding vertical interconnection structure between green ceramic chip laminated layers, and the green ceramic chips are laminated and sintered in opposite positions to manufacture a three-dimensional co-fired ceramic LTCC substrate with a built-in passive element, as shown in figure 3. The method has a disadvantage in that, although a three-dimensional stacked structure is used, the size of the entire package is difficult to further reduce, limited to the thickness of the LTCC substrate.
Disclosure of Invention
The invention provides a high-density three-dimensional integrated T/R assembly packaging structure and a packaging method based on a silicon-based carrier plate for a T/R assembly in a phased array radar.
In view of the above, an aspect of the present invention provides a three-dimensional integrated T/R package structure based on a silicon-based carrier, the structure including:
the silicon-based carrier plate is used as a substrate of the packaging structure;
furthermore, a metal film is arranged on the silicon-based carrier plate;
the silicon-based carrier plate is also provided with a wiring layer, a passive element, a through hole and a bonding pad.
A plurality of vertically interconnected RF chips, wherein the RF chip at the bottommost part of the vertically interconnected RF chips is attached to the metal film surface of the silicon-based carrier plate;
further, the structure of the RF chip is: one side is provided with an air bridge structure, and the other side is provided with a metal film.
At least one special-shaped gasket which is provided with a concave structure and is respectively arranged between two different RF chips which are vertically interconnected, so that the vertical stacking and packaging of the different RF chips are realized;
further, the structure of this dysmorphism gasket is: one side is designed as a partial cavity, and the other side is a metal film;
the material of the special-shaped gasket is silicon or silicon dioxide.
And leads for interconnecting signals between different RF chips and between the RF chip and the silicon-based carrier.
Furthermore, the silicon-based carrier, the RF chip and the special-shaped gasket are attached by:
one surface of the RF chip at the bottommost part, which is provided with the metal film, is electrically and mutually connected with the metal film part of the silicon-based carrier plate;
the special-shaped gasket is isolated from the air bridge structure and the microstrip line structure of the RF chip through the cavity part of the special-shaped gasket;
the metal film portion of the shaped pad is conductively interconnected to the side of the RF chip having the metal film.
The invention also provides a three-dimensional integrated T/R component packaging method based on the silicon-based carrier plate, which comprises the following steps:
preparing a silicon-based carrier plate, and designing and preparing a metal film, a wiring layer, a bonding pad and a via hole on the silicon-based carrier plate;
planting balls on the silicon-based carrier plate lead-out bonding pads;
one surface of an RF chip, which is provided with a metal film, is pasted on the metal film of the silicon-based carrier plate through a conductive adhesive;
one surface of the special-shaped gasket, which is provided with the cavity, is attached to the other surface of the RF chip through insulating glue;
attaching one surface of the other RF chip, which is provided with the metal film, to the metal film surface of the special-shaped gasket through a conductive adhesive;
the interconnection between different RF chips, RF chip and silicon substrate carrier board is realized by bonding pad using lead wire.
The three-dimensional integrated T/R component packaging structure and the packaging method based on the silicon-based carrier plate have the structure shown in figure 4, and the vertical stacking structure of the RF chip 2 and the RF chip 4 on the bare chip of the silicon-based carrier plate 1 is realized by using the special-shaped gasket 3. The advantages are as follows:
(1) in order to further reduce the RC delay time at high frequencies, the RF chip of gallium arsenide generally uses a manufacturing process of an air bridge structure because the capacitance can be minimized because the dielectric constant of air is 1. However, the air bridge is a very fragile metal structure, which can cause damage if the chip is directly bonded thereon. The lower surface of the special-shaped gasket 3 is provided with a well-designed groove, so that when the special-shaped gasket 3 is pressed with the RF chip 2 below, the supporting structure of the special-shaped gasket 3 can be ensured to perfectly avoid an air bridge structure in the RF chip 2 and be protected;
(2) another advantage of the profiled shim 3 can be derived from the simulation results shown in the figures, FIG. 5 being the simulation results for the S11 parameter for different shim formats (No _ IP: No shim; silicon: SiO;)2A gasket; silica + Cavity: special-shaped SiO2A gasket; silicon: a Si gasket; silicon + Cavity: shaped Si pads), fig. 6 is simulation results of S21 parameters for different pad forms, and fig. 7 is simulation results of transmission line impedances for different pad forms. As can be seen from the results, the use of the shaped spacer with a cavity structure made of silicon or silicon dioxide can greatly reduce the return loss and insertion loss of the microstrip line, and hardly change the transmission line impedance, compared to the conventional spacer. Therefore, the use of the special-shaped gasket can ensure that important parameters in the RF chip are consistent before and after packaging to the maximum extent;
(3) the III-V chip is not limited to the back of the III-V chip and has a grounding requirement, the existing micro-assembly technology lacks an effective scheme for solving the problem of grounding of the back of the chip, and the upper surface of the special-shaped gasket is provided with a layer of metal film which can be used as a grounding extraction electrode of the RF chip.
Drawings
FIG. 1 is a prior art millimeter wave eight-unit transceiver module package model;
FIG. 2 is a schematic diagram of the overall structure of the high integration T/R assembly of the disclosed embodiments;
FIG. 3 is a schematic diagram of a 3D assembly structure of a T/R multifunctional chip of a millimeter wave active phased array antenna in the 3D assembly method of the integrated T/R component chip of the disclosed embodiment;
fig. 4 is a representation of a three-dimensional integrated T/R package structure based on a silicon-based carrier according to an embodiment of the present invention;
FIG. 5 is a graph of simulation results for the S11 parameter in different shim formats;
FIG. 6 is a graph of simulation results for the S21 parameter in different shim formats;
FIG. 7 is a graph of simulation results for transmission line impedances in different shim formats;
fig. 8 is a schematic diagram of a three-dimensional integrated T/R package structure based on a silicon-based carrier according to an embodiment of the present invention;
fig. 9-14 are schematic flow charts of a method for packaging a three-dimensional integrated T/R device based on a silicon-based carrier according to an embodiment of the present invention.
In the figure:
silicon-based carrier plate 1 RF chip 2, 4 special-shaped gasket 3
Conductive adhesive 5, 8 metal pad 6 insulating adhesive 7 lead 9
Via 10 routing layer 11 solder ball 12 metal film 13
Detailed Description
In order that the objects, technical solutions and advantages of the present invention will become more apparent, the present invention will be further described in detail with reference to the accompanying drawings in conjunction with the following specific embodiments.
An embodiment of the invention provides a three-dimensional integrated T/R component packaging structure based on a silicon-based carrier plate, which can vertically interconnect and stack RF chips. The whole package structure is shown in fig. 8, and includes:
the silicon-based carrier plate is used as a substrate of the packaging structure;
in some embodiments, the silicon-based carrier has a metal film thereon;
the silicon-based carrier plate is also provided with a wiring layer, a passive element, a through hole and a bonding pad.
In this embodiment, referring to fig. 9, a silicon-based carrier 1 including a passive component and a wiring layer 11 has a metal film on its surface, and a pad 6 for connecting a lead and a vertical interconnection structure such as a via 10 are simultaneously disposed on the silicon-based carrier 1, so as to provide a preparation condition for the preparation of the package structure.
A plurality of vertically interconnected RF chips, wherein the RF chip at the bottommost part of the vertically interconnected RF chips is attached to the metal film surface of the silicon-based carrier plate;
in some embodiments, the structure of each RF chip is: one side is provided with an air bridge structure, and the other side is provided with a metal film.
In this embodiment, referring to fig. 8, a package preparation of two RF chips is taken as an example, and includes an RF chip 2 having an air bridge structure and a metal film and an RF chip 4 having an air bridge structure and a metal film, and the two chips are vertically interconnected and stacked by a special-shaped pad.
At least one special-shaped gasket which is provided with a concave structure and is respectively arranged between two different RF chips which are vertically interconnected, so that the vertical stacking and packaging of the different RF chips are realized;
in some embodiments, the shaped gasket is configured as: one side is designed as a partial cavity, the other side is a metal film, and the material of the special-shaped gasket is silicon or silicon dioxide.
In this embodiment, the irregular gasket 3 with gold-treated surface is formed by gold-treating a groove with one surface being a metal film and the other surface being a well-designed groove, that is, the partial cavity design, and the irregular gasket 3 realizes vertical interconnection and stacking of the RF chip 2 and the RF chip 4.
In some embodiments, the specific connection mode of the above structures is as follows:
one surface of the RF chip at the bottommost part, which is provided with the metal film, is electrically and mutually connected with the metal film part of the silicon-based carrier plate;
the special-shaped gasket is isolated from the air bridge structure and the microstrip line structure of the RF chip through the cavity part of the special-shaped gasket;
the metal film portion of the shaped pad is conductively interconnected to the side of the RF chip having the metal film.
Based on the above embodiments, in the present embodiment, please refer to fig. 8 again, wherein one side of the RF chip 2 having the metal film is attached to the metal film of the silicon-based carrier 1 through the conductive adhesive 5; the supporting legs of the special-shaped gasket 3 are attached to one surface, provided with the air bridge, of the RF chip 2 through the insulating glue 7, so that the groove part of the special-shaped gasket 3 can protect the air bridge of the RF chip from being damaged and avoid a microstrip line structure in the RF chip; one side of the RF chip 4 having the metal film is attached to the shaped pad 3 having the metal film on the surface thereof via a conductive adhesive 8.
And leads for interconnecting signals between different RF chips and between the RF chip and the silicon substrate carrier;
in this embodiment, the interconnection between the RF chips and the interconnection between the RF chip and the silicon-based carrier are completed by wire bonding 9 on the metal pad 6.
In addition, it should be noted that the structure of the shaped gasket 3 is not limited to the form in fig. 5, and it may be any structure that one side contains a metal film and the other side has a partial cavity, and the material of the shaped gasket 3 may be silicon or silicon dioxide. The number of RF chips, the number of special-shaped gaskets, the number of bonding pads and the positions of the special-shaped gaskets can be adjusted according to actual conditions.
In view of the above three-dimensional integrated T/R package structure based on a silicon-based carrier, another embodiment of the present invention provides a packaging method based on the embodiment provided by the above package structure, and the specific technical solution is as follows:
(1) as shown in fig. 9, the manufacturing of the silicon-based carrier 1 is completed, and according to the system requirements, a vertical interconnection structure such as a wiring layer 11, a bonding pad 6, a via hole 10 and the like, and a metal thin film are prepared on the silicon-based carrier;
(2) as shown in fig. 10, ball mounting is performed on the silicon-based carrier pad 12;
(3) as shown in fig. 11, one side of the RF chip 2 having the metal film is attached to the silicon-based carrier having the metal film on the surface thereof through the conductive adhesive 5;
(4) as shown in fig. 12, the supporting leg of the side of the shaped gasket 3 having the cavity is attached to the other surface of the RF chip 2 through an insulating adhesive 7, wherein the upper surface of the shaped gasket 3 is a layer of metal film 13, which can be formed by sputtering or evaporation, and is used for interconnecting with the side of the RF chip 4 having the metal film;
(5) as shown in fig. 13, the RF chip 4 is attached to the shaped pad 3 having the metal film 13 on the side having the metal film using the conductive adhesive 8;
(6) as shown in fig. 14, the RF chips and the silicon-based carrier are interconnected by wire bonding 9 on the silicon-based carrier and the RF chip pads 6.
The embodiment provides a packaging method of a three-dimensional integrated T/R component packaging structure based on a silicon-based carrier plate, and it should be noted that the number of RF chips, the number of special-shaped gaskets, and the number and positions of pads of the RF chips and the special-shaped gaskets can be adjusted and prepared according to actual conditions, and only the following steps are required to be ensured in the preparation process: one surface of the RF chip, which is provided with the metal film, is attached to the metal film of the silicon-based carrier plate or the metal film of the special-shaped gasket through a conductive material; one side of the special-shaped gasket with the cavity is attached to the other side (the side with the air bridge structure) of the RF chip through an insulating material.
The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are only exemplary embodiments of the present invention and are not intended to limit the present invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (9)
1. A three-dimensional integrated T/R component packaging structure based on a silicon-based carrier plate is characterized by comprising:
the silicon-based carrier plate is used as a substrate of the packaging structure;
a plurality of vertically interconnected RF chips, wherein the bottommost RF chip of the vertically interconnected RF chips is mounted on the silicon-based carrier plate;
at least one shaped gasket having a concave structure, respectively disposed between two different vertically interconnected RF chips, enabling vertical stacking and packaging of the different RF chips;
the structure of dysmorphism gasket does: one side is designed as a partial cavity, and the other side is a metal film;
and leads for interconnecting signals between different RF chips and between the RF chip and the silicon-based carrier.
2. The three-dimensional integrated T/R component package structure based on a silicon-based carrier board of claim 1, wherein the material of the shaped spacer is silicon or silicon dioxide.
3. The three-dimensional integrated T/R component package structure based on a silicon-based carrier board according to claim 1, wherein the silicon-based carrier board has a metal film thereon, and the metal film is used for interconnecting with the bottommost RF chip.
4. The three-dimensional integrated T/R component packaging structure based on the silicon-based carrier plate as claimed in claim 1 or 3, wherein the silicon-based carrier plate is provided with a wiring layer, and the silicon-based carrier plate is further provided with passive elements, vias and pads.
5. The three-dimensional integrated T/R component package structure based on a silicon-based carrier board of claim 1, wherein the RF chip has a structure of: one side is provided with an air bridge structure, and the other side is provided with a metal film.
6. The three-dimensional integrated T/R component package structure based on a silicon-based carrier plate of claim 1, wherein the interconnection of the metal film of the silicon-based carrier plate and the bottommost RF chip comprises:
and one side of the bottommost RF chip with the metal film is electrically and mutually connected with the metal film part of the silicon-based carrier plate.
7. The three-dimensional integrated T/R component packaging structure based on a silicon-based carrier plate of claim 1, wherein the disposing between the shaped gasket and the RF chip comprises:
the special-shaped gasket is isolated from the air bridge structure and the microstrip line structure of the RF chip through the cavity part of the special-shaped gasket.
8. The three-dimensional integrated T/R component packaging structure based on a silicon-based carrier board according to claim 1 or 7, wherein the arrangement between the shaped gasket and the RF chip further comprises:
and the metal film part of the special-shaped gasket is conductively interconnected with the side of the RF chip with the metal film.
9. A three-dimensional integrated T/R component packaging method based on a silicon-based carrier plate, the three-dimensional integrated T/R component packaging structure based on the silicon-based carrier plate according to any one of claims 1 to 8, comprising:
preparing a silicon-based carrier plate, and designing and preparing a metal film, a wiring layer, a bonding pad and a via hole on the silicon-based carrier plate;
planting balls on the silicon-based carrier plate lead-out bonding pads;
one surface of an RF chip, which is provided with a metal film, is pasted on the metal film of the silicon-based carrier plate through a conductive adhesive;
one surface, provided with a cavity, of the special-shaped gasket is attached to the other surface of the RF chip through insulating glue;
attaching one surface of the other RF chip, which is provided with the metal film, to the metal film surface of the special-shaped gasket through a conductive adhesive;
the interconnection between different RF chips, RF chip and silicon substrate carrier board is realized by bonding pad using lead wire.
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| CN110610927A (en) * | 2019-08-02 | 2019-12-24 | 安徽国晶微电子有限公司 | Multi-chip packaging interconnection structure |
| CN110824462B (en) * | 2019-11-21 | 2021-05-04 | 中国电子科技集团公司第二十六研究所 | Miniaturized high-reliability low-frequency vertical interconnection structure |
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