CN109860026B - Method for preparing polycrystalline silicon film, array substrate and display panel - Google Patents

Method for preparing polycrystalline silicon film, array substrate and display panel Download PDF

Info

Publication number
CN109860026B
CN109860026B CN201910110957.4A CN201910110957A CN109860026B CN 109860026 B CN109860026 B CN 109860026B CN 201910110957 A CN201910110957 A CN 201910110957A CN 109860026 B CN109860026 B CN 109860026B
Authority
CN
China
Prior art keywords
layer
photoresist
polysilicon
substrate
polycrystalline silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201910110957.4A
Other languages
Chinese (zh)
Other versions
CN109860026A (en
Inventor
陈琳
马涛
唐新阳
杨成绍
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Hefei Xinsheng Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN201910110957.4A priority Critical patent/CN109860026B/en
Publication of CN109860026A publication Critical patent/CN109860026A/en
Application granted granted Critical
Publication of CN109860026B publication Critical patent/CN109860026B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Thin Film Transistor (AREA)

Abstract

The invention discloses a method for preparing a polycrystalline silicon film, an array substrate and a display panel. Specifically, the invention provides a method for preparing a polycrystalline silicon film, which comprises the following steps: providing a substrate; forming a polysilicon prefabricated layer on the substrate, wherein the surface of the polysilicon prefabricated layer is provided with a plurality of bulges; forming a photoresist layer on one side of the polycrystalline silicon prefabricated layer far away from the substrate; performing first ashing treatment on the photoresist layer to remove a part of the photoresist layer so as to expose the plurality of protrusions; performing second ashing treatment on the plurality of protrusions to remove the plurality of protrusions; and removing the residual photoresist layer so as to form the polycrystalline silicon thin film. Therefore, the method can simply and conveniently remove the bulge on the surface of the polycrystalline silicon prefabricated layer, so that the surface smoothness of the polycrystalline silicon film is higher, and the service performance of the polycrystalline silicon film is improved.

Description

Method for preparing polycrystalline silicon film, array substrate and display panel
Technical Field
The invention relates to the technical field of polycrystalline silicon, in particular to a method for preparing a polycrystalline silicon film, an array substrate and a display panel.
Background
With the development of display technology, Liquid Crystal Displays (LCDs) and Organic Light Emitting Displays (OLEDs) have been widely used in daily life, such as mobile phone screens, laptop computer screens, desktop computer screens, and flat panel televisions. In the above-described display device, a Thin Film Transistor (TFT) is generally used as a switching element to control a pixel or as a driving element to drive a pixel. Thin film transistors can be generally classified into amorphous silicon (a-Si) and polysilicon (p-Si) according to the properties of silicon thin films, and polysilicon thin film transistors have higher electron mobility, better liquid crystal characteristics, and lower leakage current than amorphous silicon thin film transistors, and thus, polysilicon thin film technology, especially Low Temperature Polysilicon (LTPS) technology, has been a hot spot for developing thin film transistors.
In the current polysilicon preparation process, the crystallization of polysilicon is always the focus of research. The Excimer Laser Crystallization (ELC) technique is widely used for crystallization of amorphous silicon due to its high electron mobility and product yield. For example, in the currently used microlens Array technology (Micro Lens Array, MLA, one of excimer laser crystallization), a plurality of groups of microlenses are stacked to generate laser with high energy density, amorphous silicon (a-Si) irradiated by the laser is melted and recrystallized at a momentarily high temperature, and a channel region of a thin film transistor is crystallized from the amorphous silicon (a-Si) into polysilicon (p-Si). The polycrystalline silicon (p-Si) film prepared by the Micro Lens Array (MLA) technology has the advantages of high resolution, high reaction speed, high brightness, high aperture opening ratio and the like.
However, the existing methods for preparing polysilicon thin films, array substrates and display panels still need to be improved.
Disclosure of Invention
The present invention is based on the discovery and recognition by the inventors of the following facts and problems:
the inventor finds that the low-temperature polycrystalline silicon thin film transistor prepared by the prior art has the problems of back channel interface sensitivity, difficulty in off-state current control and the like. The inventors have found, through intensive studies and extensive experiments, that this is caused by surface irregularities of a back channel formed of a polysilicon film in a thin film transistor and the like. At present, when amorphous silicon (a-Si) is crystallized into polysilicon (p-Si) by Excimer Laser Crystallization (ELC) technology, especially when amorphous silicon (a-Si) is crystallized into polysilicon (p-Si) by microlens array (MLA) technology, the pulse frequency, pulse time, substrate temperature, excimer laser wavelength and frequency all affect the size and uniformity of grains and the flatness of the surface of polysilicon (p-Si), and it is desired to have both proper grain size, better uniformity and flatter polysilicon (p-Si) surface with high requirements on the uniformity and stability of technology and equipment. In the process of forming a crystal interface of polycrystalline silicon (p-Si), molten silicon at a crystal boundary is easily extruded to protrude upwards to form Small Protrusions (Small projections), the formed Small Protrusions can affect the interface performance of a back channel and the off-state current (Ioff) of a formed thin film transistor, and when the thin film transistor is applied to a display device, abnormal electrical signal transmission is easily caused, and further poor display of the display device such as crosstalk (crosstalk) is caused. Therefore, if a new method for preparing a polysilicon film can be provided, the small protrusions on the surface of the polysilicon film can be reduced or even eliminated, so that the surface smoothness of a back channel formed by the polysilicon film is better, the service performance of the prepared polysilicon film can be improved to a great extent, and the problems can be solved to a great extent.
The present invention aims to alleviate or solve at least to some extent at least one of the above mentioned problems.
In one aspect of the invention, a method of preparing a polycrystalline silicon thin film is provided. According to an embodiment of the invention, the method comprises: providing a substrate; forming a polysilicon prefabricated layer on the substrate, wherein the surface of the polysilicon prefabricated layer is provided with a plurality of bulges; forming a photoresist layer on one side of the polycrystalline silicon prefabricated layer far away from the substrate; performing first ashing treatment on the photoresist layer to remove a part of the photoresist layer so as to expose the plurality of protrusions; performing second ashing treatment on the plurality of protrusions to remove the plurality of protrusions; and removing the residual photoresist layer so as to form the polycrystalline silicon thin film. Therefore, the method can simply and conveniently remove the bulge on the surface of the polycrystalline silicon prefabricated layer, so that the surface smoothness of the polycrystalline silicon film is higher, and the service performance of the polycrystalline silicon film is improved.
According to the embodiment of the invention, the polysilicon prefabricated layer is formed on part of the surface of the substrate, photoresist is coated on one side of the polysilicon prefabricated layer, which is far away from the substrate, the photoresist covers the polysilicon prefabricated layer and the substrate which is not covered by the polysilicon prefabricated layer, and the thickness of the coated photoresist is controlled, so that the surface of one side of the photoresist, which is far away from the substrate, is a plane; and exposing and developing the photoresist by adopting a half-tone mask plate, and forming a pit at the position of the photoresist corresponding to the polysilicon prefabricated layer so as to form the photoresist layer. Therefore, the thickness of the photoresist layer formed above the plurality of protrusions can be simply and accurately controlled through the halftone mask, the photoresist on the surfaces of the plurality of protrusions can be conveniently removed through plasma ashing treatment, damage to the structure in the substrate caused by plasma can be avoided, and the service performance of the prepared polycrystalline silicon film is further improved.
According to the embodiment of the invention, the polysilicon prefabricated layer is formed on part of the surface of the substrate, photoresist is coated on one side of the polysilicon prefabricated layer, which is far away from the substrate, the photoresist covers the polysilicon prefabricated layer and the substrate which is not covered by the polysilicon prefabricated layer, exposure and solidification are carried out, so that the photoresist layer is formed, and the thickness of the coated photoresist is controlled, so that the thickness of the photoresist layer is uniform. Thus, the method can easily form the photoresist layer.
According to an embodiment of the present invention, the photoresist has a thickness of not less than 1 μm. Therefore, when the thickness of the photoresist is within the range, the fluidity of the photoresist is better, and the photoresist layer with uniform thickness can be conveniently formed on the polysilicon prefabricated layer and the surface of the substrate.
According to an embodiment of the present invention, a ratio of a thickness of the photoresist layer directly above the plurality of protrusions to a height of the plurality of protrusions is (8-20): 1. therefore, when the thickness of the photoresist layer above the plurality of bulges is in the range, the photoresist above the plurality of bulges can be conveniently removed through ashing treatment, the damage to the structures in the polysilicon prefabricated layer and the substrate can not be caused, and the service performance of the prepared polysilicon film is further improved.
According to an embodiment of the invention, a plurality of said protrusions have a height of
Figure BDA0001968110900000031
Therefore, the process parameters such as the time of the second ashing treatment can be easily determined according to the height of the protrusion, and the process is saved.
According to the embodiment of the invention, the first ashing treatment is carried out by adopting a first ashing gas, the first ashing gas comprises sulfur hexafluoride and oxygen, the flow rate of the sulfur hexafluoride is 200-. Therefore, the photoresist on the surfaces of the plurality of bulges can be simply removed to expose the plurality of bulges.
According to the embodiment of the invention, a second ashing gas is adopted for the second ashing treatment, the second ashing gas comprises sulfur hexafluoride and chlorine, the flow rate of the sulfur hexafluoride is 750-plus 850sccm, the flow rate of the oxygen is 7500-plus 8500sccm, the pressure in the reaction cavity of the second ashing treatment is 35-45mTorr, the power of the plasma source of the second ashing treatment is 28-32KW, and the substrate bias voltage of the second ashing treatment is 13-17 KW. Thus, the plurality of projections can be easily removed.
According to an embodiment of the present invention, the polysilicon preform layer is formed on a portion of the surface of the substrate, and the removing the remaining photoresist layer further comprises: carrying out third ashing treatment on the photoresist layer, and etching to remove the photoresist layer among the plurality of bulges; and stripping off and removing the residual photoresist layer. Therefore, the flatness of the surface of the polycrystalline silicon prefabricated layer can be further improved, and the third ashing treatment can take away the residual chlorine gas in the second ashing treatment and prevent the residual chlorine gas from damaging the polycrystalline silicon prefabricated layer.
According to the embodiment of the invention, a third ashing gas is adopted for the third ashing treatment, the third ashing gas comprises sulfur hexafluoride and oxygen, the flow rate of the sulfur hexafluoride is 550-650sccm, the flow rate of the oxygen is 2500-3500sccm, the pressure in a reaction chamber of the third ashing treatment is 8-12mTorr, the power of a plasma source of the third ashing treatment is 8-12KW, and the substrate bias voltage of the third ashing treatment is 13-17 KW. Therefore, the photoresist on the surface of the polycrystalline silicon prefabricated layer can be simply and conveniently removed, the surface of the polycrystalline silicon prefabricated layer can be flattened, and the service performance of the prepared polycrystalline silicon film is further improved; in addition, the third ashing treatment can take away the residual chlorine gas in the second ashing treatment, and the residual chlorine gas is prevented from damaging the polysilicon prefabricated layer.
In another aspect of the present invention, an array substrate is provided. According to an embodiment of the invention, the array substrate comprises a polycrystalline silicon thin film prepared by using the method of any one of the preceding claims. Therefore, the array substrate has all the characteristics and advantages of the polycrystalline silicon thin film prepared by the method described in any one of the above, and the description thereof is omitted.
In yet another aspect of the present invention, a display panel is provided. According to an embodiment of the present invention, the display panel includes the array substrate described above. Therefore, the display substrate has all the features and advantages of the array substrate described above, and thus, the description thereof is omitted.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
FIG. 1 shows a flow chart of a method for preparing a polysilicon thin film according to an embodiment of the present invention;
FIG. 2 shows a flow chart of a method for preparing a polysilicon thin film according to another embodiment of the present invention;
FIG. 3 is a schematic diagram of an electron microscope structure of a polysilicon prefabricated layer according to an embodiment of the invention;
FIG. 4 is a schematic diagram of an electron microscope structure of a polysilicon prefabricated layer according to another embodiment of the invention;
FIG. 5 shows a flow chart of a method for preparing a polysilicon thin film according to yet another embodiment of the present invention;
FIG. 6 shows a flow chart of a method for preparing a polysilicon thin film according to yet another embodiment of the present invention;
FIG. 7 shows a schematic structural diagram of a substrate and a polysilicon preform layer according to an embodiment of the invention; and
fig. 8 shows a flowchart of a method for preparing a polycrystalline silicon thin film according to still another embodiment of the present invention.
Description of reference numerals:
100: a substrate; 110: a substrate; 120: a gate layer; 130: a gate insulating layer; 200: a polysilicon prefabricated layer; 10: a protrusion; 300: a photoresist layer; 310: photoresist; 320: and (4) pits.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
In one aspect of the invention, a method of preparing a polycrystalline silicon thin film is provided. According to the method, the photoresist layer is arranged on the surface of the crystallized polycrystalline silicon prefabricated layer, and ashing treatment and the like are carried out, so that the bulge on the surface of the polycrystalline silicon prefabricated layer can be simply and conveniently removed, the smoothness of the surface of the polycrystalline silicon film is improved, and the use performance of the polycrystalline silicon film is improved. For example, the surface flatness of the back channel formed of a polysilicon thin film can be improved, and the off-state current (Ioff) of a thin film transistor formed of the polysilicon thin film can be reduced, thereby preventing display defects such as crosstalk (crosstalk) from occurring in a display device using the thin film transistor.
According to an embodiment of the invention, with reference to fig. 1, the method comprises:
s100: providing a substrate
In this step, a substrate is provided. According to an embodiment of the present invention, referring to (a) in fig. 7 and (a) in fig. 8, the type of the substrate 100 is not particularly limited, and a polysilicon layer is formed on the substrate in a subsequent step, as described above, the polysilicon layer is used for forming the control element TFT, therefore, referring to (a) in fig. 2, the substrate 100 may further include a substrate 110, and the substrate 110 may further have other film layers for forming the TFT, such as a Gate layer (Gate)120 and a Gate insulating layer (GI)130, the substrate 110 may include a glass substrate, a resin substrate, a quartz substrate, and the like, the Gate layer 120 is formed on a portion of the surface of the substrate 110, and the Gate insulating layer 130 is formed on a side of the Gate layer 120 away from the substrate 110 and covers the Gate layer 120 and the surface of the substrate 110. Specifically, the gate layer 120 may be formed of a metal material, and the material forming the gate insulating layer 130 may include silicon dioxide, silicon nitride, or the like. Specifically, the gate electrode layer 120 and the gate insulating layer 130 may be sequentially formed on the surface of the substrate 110 by a chemical vapor deposition method.
S200: forming a polysilicon pre-layer
In this step, a polysilicon preform layer is formed on the surface of the substrate described in the previous step. According to an embodiment of the present invention, referring to fig. 7 (b) and fig. 8 (b), a polysilicon preliminary layer 200 may be formed on a portion of the surface of the substrate 100. For simplicity, structures such as a gate electrode layer and a gate insulating layer are not shown in fig. 7 and 8, and those skilled in the art can understand that other film layers for forming a TFT, specific types of the other film layers, and constituent materials may also be provided between the substrate 100 and the polysilicon prefabricated layer 200, and those skilled in the art can select the specific type of the TFT to be formed according to needs. Referring to (b) of fig. 2, a polysilicon layer 200 may be formed on a portion of the surface of the gate insulating layer 130 away from the gate layer 120. According to an embodiment of the present invention, an amorphous silicon (a-Si) layer (not shown) may be formed on a surface of the substrate 100, and then the amorphous silicon layer may be crystallized, for example, the amorphous silicon layer may be subjected to Excimer Laser Crystallization (ELC), such as Micro Lens Array (MLA), and crystallized to form the polysilicon pre-formation layer 200. As described above, during the formation of the crystal interface of the polycrystalline silicon (p-Si), the molten silicon at the grain boundary is easily extruded to protrude upward, forming Small Protrusions (Small Protrusions), referring to the Protrusions 10 in fig. 2 (b). According to an embodiment of the present invention, the thickness of the polysilicon pre-layer 200 formed in this step (refer to the thickness D shown in fig. 2 (b)) may be
Figure BDA0001968110900000051
The height of the protrusion 10 (refer to the height h shown in fig. 2 (b)) on the surface of the polysilicon preform layer 200 may be
Figure BDA0001968110900000052
Specifically, referring to fig. 3 and 4, by electron microscope test, it is determined that the surface of the polysilicon prefabricated layer has protrusions, and the thickness of the polysilicon prefabricated layer is measured as
Figure BDA0001968110900000053
Left and right, the height of the projection is measured as
Figure BDA0001968110900000054
Left and right. As mentioned above, the surface of the polysilicon prefabricated layer formed in this step has protrusions, and if the protrusions on the surface of the polysilicon prefabricated layer are removed without performing corresponding treatment, the use performance of the prepared polysilicon thin film will be affected. It should be noted that, referring to fig. 2(b), the thickness of the polysilicon preliminary layer 200 refers to the average thickness between the lower surface and the upper surface of the polysilicon preliminary layer 200 (refer to the "up" and "down" directions shown in the figure). The height of the protrusions refers to the average distance between the upper ends of the protrusions and the upper surface of the polysilicon preform layer.
S300: forming a photoresist layer
In this step, a photoresist layer is formed on the side of the polysilicon preliminary layer formed in the previous step away from the substrate. Referring to fig. 5 and 7, according to some embodiments of the invention, the method further comprises:
s310: coating photoresist
In this step, a photoresist is coated on the side of the polysilicon prefabricated layer away from the substrate, referring to (c1) in fig. 7, as mentioned above, the polysilicon prefabricated layer 200 is formed on a part of the surface of the substrate 100, and the photoresist 310 covers the polysilicon prefabricated layer 200 and the substrate 100 not covered by the polysilicon prefabricated layer 200. According to an embodiment of the present invention, when coating the photoresist 310, the thickness of the coated photoresist 310 is controlled such that the surface of the photoresist 310 on the side away from the substrate 100 is a flat surface (shown with reference to (c1) in fig. 7) for subsequent processing. Note that, the surface of the photoresist 310 on the side away from the substrate 100 in this step is a plane, and the thicknesses of the photoresist coated on the surface of the polysilicon preliminary layer 200 and the surface of the substrate 100 not covered by the polysilicon preliminary layer 200 are different. According to an embodiment of the invention, the applied photoresist has a thickness of 1-3 μm, such as 2 μm, such as 2.2 μm. It should be noted that the thickness of the photoresist applied here refers to the maximum value of the photoresist thickness.
S320: exposing and developing with a half-tone mask to form a photoresist layer
In this step, the photoresist coated in the previous step is exposed and developed using a Half Tone Mask (Half Tone Mask), and a pit is formed at a position where the photoresist corresponds to the polysilicon preliminary layer, so as to form a photoresist layer. According to an embodiment of the present invention, with reference to (c2) in fig. 7, the orthographic projection of the formed pit 320 on the substrate 100 can be overlapped with the orthographic projection of the polysilicon preliminary layer 200 on the substrate 100. According to an embodiment of the present invention, the halftone mask may include a Full light-transmitting region (Full Tone region) and a Half light-transmitting region (Half Tone region), the Half light-transmitting region may correspond to the photoresist above the photoresist pre-layer, and the Full light-transmitting region may correspond to the photoresist above the substrate. The half-tone mask is used for exposing and developing the photoresist coated in the previous step, and the thickness of the photoresist layer formed above the plurality of bulges can be simply and accurately controlled by adjusting the illumination intensity of the semi-transparent area and the like, so that the photoresist on the surfaces of the plurality of bulges can be removed by plasma ashing treatment in the subsequent step; and the photoresist layer forms a pit at the corresponding position of the polysilicon prefabricated layer 200, so that the damage of plasma to the structure in the substrate can be avoided, and the service performance of the prepared polysilicon film is further improved. Specifically, when the thickness of the coated photoresist is 1 to 3 μm, for example, 2.2 μm, the thickness of the photoresist layer formed over the protrusions may be such that the photoresist layer is exposed to light through a halftone mask
Figure BDA0001968110900000061
Left and right. It should be noted that, since the photoresist has fluidity, the thickness of the photoresist formed over the plurality of protrusions is slightly smaller than the thickness of the photoresist on the surface of the polysilicon layer without the protrusions.
In summary, when the coated photoresist is exposed and cured by using the halftone mask, the thickness of the photoresist layer formed above the plurality of protrusions can be precisely controlled, so that the photoresist on the surfaces of the plurality of protrusions can be better removed by adjusting parameters such as the time of the first ashing process. In addition, in the method, when the photoresist is coated, the thickness of the coated photoresist and the like do not need to be accurately controlled, only the surface of one side of the photoresist, which is far away from the substrate, is a plane, and the thickness of the photoresist above the bulges can be adjusted to a reasonable range through the subsequent exposure treatment of the halftone mask.
According to other embodiments of the present invention, referring to fig. 8 (c), when forming the photoresist layer on the side of the polysilicon prefabricated layer away from the substrate, the photoresist layer may be coated on the side of the polysilicon prefabricated layer away from the substrate and then directly exposed and cured to form the photoresist layer 300. Specifically, the photoresist covers the polysilicon prefabricated layer and the substrate not covered by the polysilicon prefabricated layer, and during the process of coating the photoresist, the thickness of the coated photoresist can be controlled so that the thickness of the photoresist layer is uniform, for example, the same amount of photoresist can be coated at each position of the surface of the polysilicon prefabricated layer 200 away from the substrate 100, and the coated photoresist can be cured to form the photoresist layer with uniform thickness. Thus, the method can easily form the photoresist layer. According to an embodiment of the present invention, the thickness of the coated photoresist may be not less than 1 μm. Therefore, when the thickness of the photoresist is within the range, the fluidity of the photoresist is better, and the photoresist layer with uniform thickness can be conveniently formed on the polysilicon prefabricated layer and the surface of the substrate. It should be noted that the above-mentioned "photoresist layer with uniform thickness" means that the same amount of photoresist is applied at each position during the process of applying the photoresist. In practical operation, since the photoresist has fluidity, the thickness of the photoresist layer formed directly above the protrusion 10 is small, for example, when a 1 μm thick photoresist is coated on the substrate 100 and the polysilicon pre-layer 200, the thickness of the photoresist layer 300 directly above the protrusion 10 in the finally formed photoresist layer 300 is as thick as
Figure BDA0001968110900000071
To the left and right, accordingly, the thickness of the photoresist layer 300 over the polysilicon preliminary layer 200 without the protrusions may be
Figure BDA0001968110900000072
Left and right. Therefore, in the subsequent ashing process, the photoresist layer 300 above the polysilicon prefabricated layer 200 without protrusions has a larger thickness, so that the upper surface of the polysilicon prefabricated layer 200 can be protected from being etched, and the flatness of the upper surface of the polysilicon prefabricated layer 200 can be improved.
According to an embodiment of the present invention, a ratio of a thickness of the photoresist layer directly above the plurality of protrusions to a height of the plurality of protrusions may be (8-20): 1, in particular, may be 9: 1, can be 10: 1, can be 12: 1, can be 15: 1, can be 18: 1, when the thickness of the photoresist layer above the plurality of bulges is in the range, the photoresist above the plurality of bulges can be conveniently removed through ashing treatment, the structure in the polysilicon prefabricated layer and the substrate can not be damaged, and the service performance of the prepared polysilicon film is further improved.
S400: performing a first ashing process to expose the plurality of protrusions
In this step, the photoresist layer formed in the previous step is subjected to a first ashing process to remove a portion of the photoresist layer so as to expose the plurality of protrusions. According to an embodiment of the present invention, the first ashing process may be performed by using a first ashing gas, wherein the first ashing gas may include sulfur hexafluoride and oxygen, and the flow rate of the sulfur hexafluoride may be 200 sccm and 300sccm, for example, 250 sccm; the flow rate of oxygen can be 9000-; the pressure in the reaction chamber of the first ashing process may be 35 to 45mTorr, for example, may be 40 mTorr; the plasma source power for the first ashing process may be 28-32KW, for example, may be 30 KW; the substrate bias voltage for the first ashing process may be 13 to 17KW, for example, may be 15 KW. Therefore, the photoresist on the surfaces of the plurality of bulges can be simply removed to expose the plurality of bulges. According to the embodiment of the invention, the thickness of the photoresist layer formed above the protrusions in the previous step can be tested or calculated, so that the time of the first ashing treatment and the like can be estimated, and the photoresist on the surfaces of the protrusions can be simply removed to expose the protrusions. When the thickness of the photoresist on the plurality of convex surfaces is large, the time for performing the first ashing process may be long. The structure of the processed photoresist layer 300 according to an embodiment of the present invention is illustrated with reference to (d) in fig. 7 and (d) in fig. 8.
S500: performing a second ashing treatment to remove the plurality of protrusions
In this step, the plurality of projections exposed in the previous step are subjected to a second ashing process to remove the plurality of projections. According to an embodiment of the present invention, a second ashing process may be performed by using a second ashing gas, where the second ashing gas may include sulfur hexafluoride and chlorine, and the flow rate of the sulfur hexafluoride may be 750-; the flow rate of oxygen can be 7500-8500sccm, for example 8000 sccm; the pressure in the reaction chamber of the second ashing treatment may be 35-45mTorr, for example 40 mTorr; the plasma source power for the first ashing process may be 28-32KW, for example, may be 30 KW; the substrate bias voltage for the first ashing process may be 13 to 17KW, for example, may be 15 KW. Thus, the plurality of projections can be easily removed. According to an embodiment of the present invention, the height of the bump formed in the previous step can be tested, for example, the height of the bump is
Figure BDA0001968110900000081
Therefore, the process parameters such as the time of the second ashing treatment can be easily determined according to the height of the protrusion, and the process is saved. The structure of the processed photoresist layer 300 according to the embodiment of the present invention is illustrated with reference to (e) in fig. 7 and (e) in fig. 8.
S600: removing the residual photoresist layer to form a polysilicon film
In this step, the remaining photoresist layer processed in the previous step is removed to form a multi-pass film. Specifically, the remaining photoresist layer may be stripped off using a developer. According to an embodiment of the present invention, referring to fig. 6, the method may further include:
s610: performing a third ashing process to remove the photoresist layer between the protrusions
In this step, the photoresist layer after the second ashing process in the previous step is subjected to a third ashing process, and the photoresist layer between the plurality of protrusions is etched away. According to an embodiment of the present invention, a third ashing process may be performed using a third ashing gas, where the third ashing gas may include sulfur hexafluoride and oxygen, and the flow rate of the sulfur hexafluoride may be 550 sccm, such as 600 sccm; the flow rate of the oxygen can be 2500-; the pressure in the reaction chamber of the third ashing process may be 8 to 12mTorr, for example, 10 mTorr; the plasma source power for the first ashing process may be 8-12KW, for example, 10 KW; the substrate bias voltage for the first ashing process may be 13 to 17KW, for example, may be 15 KW. Therefore, the photoresist on the surface of the polycrystalline silicon prefabricated layer can be simply and conveniently removed, the surface of the polycrystalline silicon prefabricated layer can be flattened, for example, the protrusion which is not completely removed on the surface of the polycrystalline silicon prefabricated layer can be removed again, and the service performance of the prepared polycrystalline silicon film is further improved; in addition, the third ashing treatment can take away the residual chlorine gas in the second ashing treatment, and the residual chlorine gas is prevented from damaging the polysilicon prefabricated layer.
According to the embodiment of the invention, the thickness of the photoresist layer above the front polysilicon prefabricated layer can be tested or calculated, so that the time of the third ashing treatment and the like can be estimated, and the photoresist on the surface of the polysilicon prefabricated layer can be simply and conveniently removed. The structure of the processed photoresist layer 300 according to an embodiment of the present invention is illustrated with reference to (f) of fig. 7 and (f) of fig. 8.
S620: removing the residual photoresist layer to form a polysilicon film
In this step, the remaining photoresist layer after the third ashing process is removed to form a polysilicon thin film. Specifically, the remaining photoresist layer may be stripped off using a developer. The structure of the formed polysilicon thin film according to the embodiment of the present invention is illustrated with reference to (g) in fig. 7 and (g) in fig. 8.
In conclusion, the method does not need to greatly improve the MLA technology, and can remove the bulge on the surface of the polysilicon prefabricated layer by adding simple and convenient subsequent processing procedures, so that the surface smoothness of the polysilicon film is higher, the performance of the polysilicon film is not influenced, and the service performance of an electronic element (such as a TFT) utilizing the polysilicon film is improved.
In another aspect of the present invention, an array substrate is provided. According to an embodiment of the invention, the array substrate comprises a polycrystalline silicon thin film prepared by using the method of any one of the preceding claims. Therefore, the array substrate has all the characteristics and advantages of the polycrystalline silicon thin film prepared by the method described in any one of the above, and the description thereof is omitted. In general, the array substrate has good use performance and small off-state current.
In yet another aspect of the present invention, a display panel is provided. According to an embodiment of the present invention, the display panel includes the array substrate described above. Therefore, the display substrate has all the features and advantages of the array substrate described above, and thus, the description thereof is omitted. In general, the display panel has good display performance, and poor display such as crosstalk (crosstalk) is not easy to occur.
In the description of the present invention, the terms "upper", "lower", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of describing the present invention but do not require that the present invention must be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
In the description herein, references to the description of "one embodiment," "another embodiment," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.

Claims (10)

1. A method of preparing a polysilicon film, comprising:
providing a substrate;
forming a polysilicon prefabricated layer on the substrate, wherein the surface of the polysilicon prefabricated layer is provided with a plurality of bulges;
forming a photoresist layer on one side of the polycrystalline silicon prefabricated layer, which is far away from the substrate, wherein the forming of the photoresist layer comprises the steps of exposing and developing photoresist by adopting a half-tone mask, and forming a pit at the position, corresponding to the polycrystalline silicon prefabricated layer, of the photoresist so as to form the photoresist layer;
performing first ashing treatment on the photoresist layer to remove part of the photoresist layer so as to expose the plurality of protrusions, and performing the first ashing treatment by using first ashing gas, wherein the first ashing gas comprises sulfur hexafluoride and oxygen, the flow of the sulfur hexafluoride is 200-;
performing second ashing treatment on the plurality of protrusions to remove the plurality of protrusions, and performing the second ashing treatment by using second ashing gas, wherein the second ashing gas comprises sulfur hexafluoride and chlorine, the flow rate of the sulfur hexafluoride is 750-850sccm, the flow rate of the chlorine is 7500-8500sccm, the pressure in a reaction cavity of the second ashing treatment is 35-45mTorr, the power of a plasma source of the second ashing treatment is 28-32KW, and the bias voltage of the substrate of the second ashing treatment is 13-17 KW;
and removing the residual photoresist layer so as to form the polycrystalline silicon thin film.
2. The method as claimed in claim 1, wherein the polysilicon preliminary layer is formed on a part of the surface of the substrate, a photoresist is coated on a side of the polysilicon preliminary layer away from the substrate, the photoresist covers the polysilicon preliminary layer and the substrate not covered by the polysilicon preliminary layer, and the thickness of the coated photoresist is controlled so that the surface of the photoresist on the side away from the substrate is a plane.
3. The method as claimed in claim 1, wherein the polysilicon preliminary layer is formed on a portion of the surface of the substrate, a photoresist is coated on a side of the polysilicon preliminary layer away from the substrate, the photoresist covers the polysilicon preliminary layer and the substrate not covered by the polysilicon preliminary layer, and exposure curing is performed to form the photoresist layer, and the thickness of the coated photoresist is controlled to make the thickness of the photoresist layer uniform throughout.
4. The method of claim 3, wherein the photoresist is not less than 1 μm thick.
5. The method of claim 2 or 3, wherein a ratio of a thickness of the photoresist layer directly over the plurality of protrusions to a height of the plurality of protrusions is (8-20): 1.
6. the method of claim 5 wherein the plurality of protrusions have a height of 400 a.
7. The method of claim 1, wherein the polysilicon preform layer is formed on a portion of the surface of the substrate, and the removing the remaining photoresist layer further comprises:
carrying out third ashing treatment on the photoresist layer, and etching to remove the photoresist layer among the plurality of bulges;
and stripping off and removing the residual photoresist layer.
8. The method as claimed in claim 7, wherein a third ashing gas is used for the third ashing process, the third ashing gas comprises sulfur hexafluoride and oxygen, the flow rate of the sulfur hexafluoride is 550-.
9. An array substrate comprising a polycrystalline silicon thin film prepared by the method of any one of claims 1 to 8.
10. A display panel comprising the array substrate according to claim 9.
CN201910110957.4A 2019-02-12 2019-02-12 Method for preparing polycrystalline silicon film, array substrate and display panel Expired - Fee Related CN109860026B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910110957.4A CN109860026B (en) 2019-02-12 2019-02-12 Method for preparing polycrystalline silicon film, array substrate and display panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910110957.4A CN109860026B (en) 2019-02-12 2019-02-12 Method for preparing polycrystalline silicon film, array substrate and display panel

Publications (2)

Publication Number Publication Date
CN109860026A CN109860026A (en) 2019-06-07
CN109860026B true CN109860026B (en) 2021-10-01

Family

ID=66897711

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910110957.4A Expired - Fee Related CN109860026B (en) 2019-02-12 2019-02-12 Method for preparing polycrystalline silicon film, array substrate and display panel

Country Status (1)

Country Link
CN (1) CN109860026B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110854068B (en) * 2019-10-28 2022-06-07 Tcl华星光电技术有限公司 Preparation method of TFT array substrate and TFT array substrate

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103887244B (en) * 2014-03-07 2017-05-31 京东方科技集团股份有限公司 Array base palte and preparation method thereof, display device
CN106783582B (en) * 2016-12-22 2020-01-03 武汉华星光电技术有限公司 Polycrystalline silicon thin film processing method, thin film transistor, array substrate and display panel

Also Published As

Publication number Publication date
CN109860026A (en) 2019-06-07

Similar Documents

Publication Publication Date Title
TWI594055B (en) Liquid crystal display device have a transverse electric field type active matrix substrate and method of producing the active matrix substrate
US7790483B2 (en) Thin film transistor and manufacturing method thereof, and display device and manufacturing method thereof
US8278662B2 (en) Thin film transistor, manufacturing method thereof, display device, and manufacturing method thereof
KR101263726B1 (en) Array substrate including thin film transistor of polycrystalline silicon and method of fabricating the same
US7541229B2 (en) Thin film transistor and method for fabricating same
CN109300840B (en) Display substrate, manufacturing method thereof and display device
US10269984B2 (en) Thin film transistor, array substrate, and display apparatus, and fabrication methods thereof
US8207026B2 (en) Manufacturing method of thin film transistor and manufacturing method of display device
US10241371B2 (en) Thin film transistor, method for manufacturing the same, array substrate and display device
US7678619B2 (en) Method of manufacturing a thin film transistor matrix substrate
US20070254399A1 (en) Low temperature direct deposited polycrystalline silicon thin film transistor structure and method for manufacturing the same
US20160322404A1 (en) Methods for producing tft array substrate and display apparatus
CN109860026B (en) Method for preparing polycrystalline silicon film, array substrate and display panel
CN101414564A (en) Method for manufacturing low-temperature polycrystalline silicon film transistor
WO2017067336A1 (en) Array substrate, manufacturing method therefor, display panel, and display apparatus
JP2008042218A (en) Manufacturing method of thin film transistor panel
US11302761B2 (en) Display substrate assembly and method of manufacturing the same, and display apparatus
US8063403B2 (en) Thin film transistor and semiconductor device
US10825930B2 (en) Thin film transistor and manufacture method thereof
KR101588448B1 (en) Array substrate including thin film transistor of polycrystalline silicon and method of fabricating the same
WO2020042258A1 (en) Display panel and manufacturing method therefor
KR100791830B1 (en) Fabrication method of polycrystalline nano-pattern using nano-imprint method
KR100707016B1 (en) Method of manufacturing tft-lcd
KR20050068241A (en) Method for manufacturing lcd
KR100426015B1 (en) Fabrication method for TFT

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20211001