CN109755118B - FRGPP chip glass-front multiple diffusion process - Google Patents

FRGPP chip glass-front multiple diffusion process Download PDF

Info

Publication number
CN109755118B
CN109755118B CN201711059107.3A CN201711059107A CN109755118B CN 109755118 B CN109755118 B CN 109755118B CN 201711059107 A CN201711059107 A CN 201711059107A CN 109755118 B CN109755118 B CN 109755118B
Authority
CN
China
Prior art keywords
diffusion
silicon wafer
cleaning
source
boron
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201711059107.3A
Other languages
Chinese (zh)
Other versions
CN109755118A (en
Inventor
梁效峰
徐长坡
陈澄
杨玉聪
李亚哲
黄志焕
王晓捧
王宏宇
王鹏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tianjin Huanxin Technology & Development Co ltd
Original Assignee
Tianjin Huanxin Technology & Development Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tianjin Huanxin Technology & Development Co ltd filed Critical Tianjin Huanxin Technology & Development Co ltd
Priority to CN201711059107.3A priority Critical patent/CN109755118B/en
Publication of CN109755118A publication Critical patent/CN109755118A/en
Application granted granted Critical
Publication of CN109755118B publication Critical patent/CN109755118B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention discloses a FRGPP chip glass-blunting front multiple diffusion process, which comprises the following steps: s1, performing primary diffusion texturing on phosphorus and boron, wherein one surface of a silicon wafer after diffusion pretreatment is diffused with a phosphorus diffusion source, and the other surface of the silicon wafer is diffused with a boron diffusion source or a boron aluminum diffusion source, and performing silicon wafer texturing; s2, platinum diffusion, namely a silicon wafer diffusion platinum diffusion source after primary phosphorus and boron diffusion texturing. The invention has the advantages that the screen printing process is adopted to print the phosphorus diffusion source, the boron diffusion source or the boron aluminum diffusion source on the two sides of the silicon wafer respectively, so that the coating flow of the silicon wafer liquid source is simplified, and the processing period is shortened; after the liquid source is coated, a one-time negative pressure diffusion process is adopted, so that the situation of source returning at the edge of the silicon wafer is reduced, the diffusion process steps are simplified, and the diffusion efficiency is improved; the PN junction manufactured is uniform, so that the processing cost of the silicon wafer is reduced.

Description

FRGPP chip glass-front multiple diffusion process
Technical Field
The invention belongs to the field of manufacturing processes of silicon wafers, and particularly relates to a FRGPP chip glass-front multiple diffusion process.
Background
The fast recovery glass passivation diode (FRGPP) is used as a semiconductor diode with good switching characteristics and short reverse recovery time, has wide application field, and is mainly applied to electronic circuits such as a switching power supply, a PWM (pulse-width modulation) pulse width modulator, a frequency converter and the like, and has wide market prospect and large development space.
Under the traditional process, the platinum diffusion time is longer, and the reverse recovery time (trr) performance of the silicon wafer after the platinum diffusion is uneven, so that the finished product leakage current IR is larger; meanwhile, the silicon wafer is manufactured mostly by using a diffusion process to form PN junction, and the diffusion process commonly used in the industry at present generally adopts paper source one-time full diffusion or adopts phosphorus and boron two-time diffusion, and the volatile phosphorus source diffuses to the boron surface to cause source return due to the increase of the gap between the silicon wafers after sintering of the paper source; the two-time diffusion mode is complicated in process manufacture, after one surface is subjected to phosphorus diffusion, the other surface is required to be subjected to sand blasting or chemical thinning to remove the reverse source quantity, and then boron diffusion is carried out, so that the cost is high, the diffusion efficiency is low, and fragments are easily caused.
Disclosure of Invention
In order to solve the technical problems, the invention provides a multiple diffusion process before glass dulling of an FRGPP chip.
The invention provides a FRGPP chip glass-blunting front multiple diffusion process, which comprises the following steps:
s1, performing primary diffusion texturing on phosphorus and boron, wherein one surface of a silicon wafer after diffusion pretreatment is diffused with a phosphorus diffusion source, and the other surface of the silicon wafer is diffused with a boron diffusion source or a boron aluminum diffusion source, and performing silicon wafer texturing;
s2, platinum diffusion, namely a silicon wafer diffusion platinum diffusion source after primary phosphorus and boron diffusion texturing.
Wherein, the step S2 of platinum diffusion comprises the steps of:
s2-1 platinum diffusion pretreatment, sanding and cleaning the silicon wafer after primary diffusion texturing of phosphorus and boron;
s2-2 platinum diffusion, wherein single-sided platinum diffusion is carried out on the silicon wafer after platinum diffusion pretreatment;
s2-3, checking after platinum diffusion, and carrying out trr test on the silicon wafer after platinum diffusion;
preferably, the platinum diffusion pretreatment comprises single-sided sanding of the boron-expanded surface.
Preferably, the step S2-2 platinum diffusion includes the steps of:
s2-2-1 platinum coated diffusion source: coating a platinum diffusion source on the sand surface by adopting a source coating process and drying;
s2-2-2 normal pressure diffusion: the silicon wafer is placed in a diffusion furnace, and the diffusion furnace maintains normal pressure.
Preferably, the test standard for the S2-3 step post-platinum diffusion test is 0.035. Mu.s.ltoreq.trr.ltoreq.0.50. Mu.s.
Wherein, S1 step phosphorus boron one-time diffusion wool making includes the steps:
s1-1, performing diffusion pretreatment, and thinning a silicon wafer;
s1-2, performing primary diffusion of phosphorus and boron, namely diffusing a phosphorus diffusion source on one surface of a silicon wafer subjected to diffusion pretreatment, diffusing a boron diffusion source or a boron aluminum diffusion source on the other surface, and putting the silicon wafer into a furnace for diffusion;
s1-3 texturing, so that the roughness of the surface of the silicon wafer is increased, and a coating foundation is provided for coating of protective glue in the subsequent glass dulling process of the silicon wafer.
Preferably, the step S1-2 of primary diffusion of phosphorus and boron specifically comprises the steps of:
s1-2-1, printing a phosphorus-boron diffusion source, printing the phosphorus diffusion source on one surface of the silicon wafer after diffusion pretreatment by adopting a screen printing technology, and printing a boron diffusion source or a boron-aluminum diffusion source on the other surface of the silicon wafer, wherein the silicon wafer is required to be dried every time the silicon wafer is printed;
s1-2-2, spraying Al2O3 powder or silicon powder on two sides of the silicon wafer;
s1-2-3, performing low-pressure diffusion, namely placing the silicon wafer in a diffusion furnace, and pumping the air pressure in the diffusion furnace to negative pressure;
preferably, the low-pressure diffusion is constant-temperature diffusion, and the diffusion temperature is 1250-1300 ℃;
preferably, the step S1-3 is wet or laser texturing.
Preferably, the wet-process texturing specifically comprises the steps of:
A1. performing diffusion post-treatment, and removing phosphorus borosilicate glass on the surface of the diffused silicon wafer;
A2. placing the treated silicon wafer in a first-stage cleaning solution at 50-70 ℃ for 3-10min, and cleaning with pure water for 10-20min;
A3. placing the silicon wafer in a second-stage cleaning solution at 70-90 ℃ for 20-30min, and cleaning with pure water for 10-20min;
A4. placing the silicon wafer in a third-stage cleaning solution at 70-90 ℃ for 3-10min, and cleaning with pure water for 10-20min;
A5. spin-drying the cleaned silicon wafer, and performing surface roughness test;
preferably, the first-stage cleaning solution is a solution formed by mixing hydrogen peroxide, pure water and 30% potassium hydroxide solution according to the volume ratio of 6-10:110-120:1-8;
preferably, the second-stage cleaning solution is a solution formed by mixing 10-30% of potassium hydroxide solution, a texturing additive and pure water according to the volume ratio of 0.35-0.42:0.04-0.09:5-10;
preferably, the third-stage cleaning solution is a solution formed by mixing hydrofluoric acid, hydrochloric acid and pure water according to the volume ratio of 10-15:30-40:60-80.
Preferably, the laser texturing specifically comprises the following steps:
B1. removing the layer formed on the surface of the silicon wafer after diffusion: placing the diffused silicon wafer in glass corrosive liquid for 3-10min, and cleaning and spin-drying the silicon wafer;
B2. laser texturing: scanning the cleaned silicon wafer on the surface of the silicon wafer by using laser, and manufacturing the smooth surface of the silicon wafer into a rough surface;
B3. cleaning after wool making: after the silicon wafer is textured, soaking and cleaning by using an HF solution, and carrying out overflow cleaning and spin-drying after the HF solution is cleaned;
preferably, the glass etching solution is a solution formed by mixing ammonium hydrofluoric acid, oxalic acid, ammonium sulfate, glycerin, barium sulfate and hot pure water according to the volume ratio of 6-10:8-15:20-30:4-15:10-22:110-120.
Preferably, the S1-1 step diffusion pretreatment specifically comprises the following steps:
C1. placing the silicon wafer in a corrosive liquid at 0-15 ℃ to corrode for 9-50s, so that the silicon wafer is thinned on both sides; cleaning with pure water for 10-20min, and cleaning corrosive liquid;
C2. placing the silicon wafer in 40-80deg.C alkali solution for 5-20min;
C3. two-stage overflow cleaning; cleaning by primary ultrasonic overflow; two-stage overflow cleaning; the cleaning time of each stage is 5-20min;
C4. placing the silicon wafer in 60-100deg.C acid liquor for three-stage acid treatment, wherein the treatment time of each stage is 5-20min;
C5. four-stage overflow cleaning, wherein each stage cleaning time is 5-20min;
preferably, the corrosive liquid is a solution formed by mixing nitric acid, hydrofluoric acid, glacial acetic acid and pure water according to the volume ratio of 10-20:5-10:1-10:1-10;
preferably, the lye is potassium hydroxide solution;
preferably, the acid solution is a nitric acid solution.
The invention has the advantages and positive effects that: due to the adoption of the technical scheme, compared with the traditional process, the method has the advantages that the platinum source is coated on one side of the silicon wafer, the diffusion time is shortened from 4-6 hours to 1-2 hours, the production period is shortened, the performance uniformity of trr (reverse recovery time) after platinum diffusion of the silicon wafer is improved, and the leakage current IR of a finished product is smaller; the phosphorus diffusion source, the boron diffusion source or the boron aluminum diffusion source are respectively printed on the two sides of the silicon wafer by adopting a screen printing process, so that the coating process of the silicon wafer liquid source is simplified, and the processing period is shortened; after the liquid source is coated, a one-time negative pressure diffusion process is adopted, so that the situation of source returning at the edge of the silicon wafer is reduced, the diffusion process steps are simplified, and the diffusion efficiency is improved; the process method is adopted to carry out primary diffusion of the liquid source of the silicon wafer, so that the manufactured PN junction is uniform, the processing cost of the silicon wafer is reduced, wet texturing or laser texturing is adopted, the roughness of the surface of the silicon wafer is increased, the coating of the protective layer of the subsequent glass passivation process of the silicon wafer is facilitated, and the adhesive force of the protective layer in the glass passivation process is increased when the protective layer is coated.
Detailed Description
In order to make the technical problems, technical schemes and beneficial effects to be solved more clearly apparent, the following detailed description is made on the embodiments of the present invention.
At present, the manufacturing of silicon wafers in industry mostly uses diffusion technology to form PN junctions, and the diffusion technology commonly used in industry at present generally adopts paper source once full diffusion or adopts phosphorus and boron twice diffusion, and the diffusion modes have unavoidable defects: 1) The clearance between the silicon wafers is increased after the paper source is sintered, so that the volatile phosphorus source is diffused to the boron surface to cause source returning; 2) The twice diffusion mode is complicated in process manufacture and low in diffusivity. The scheme relates to a FRGPP chip glass-blunting front multiple diffusion process method, which comprises primary phosphorus-boron diffusion texturing and platinum diffusion, in particular to diffusion pretreatment; coating phosphorus and boron sources; diffusion; performing diffusion post-treatment; making wool; platinum diffusion pretreatment; a platinum-coated source; platinum diffusion; platinum diffusion was followed by examination.
The method specifically comprises the following steps:
1. one-time diffusion texturing of phosphorus and boron
1. Diffusion pretreatment
1) Annealing and cleaning a silicon wafer: annealing and cleaning the cut silicon wafer to remove surface dirt, and reducing mechanical damage to the silicon wafer during cutting;
2) Double-sided thinning of the silicon wafer: double-sided corrosion is carried out on the silicon wafer by using corrosive liquid, and a surface damage layer is removed, and the method specifically comprises the following steps:
a. measuring the temperature of the corrosive liquid by using a thermometer, wherein the temperature is generally 0-15 ℃, the corrosion time of the silicon wafer is generally 9-50s according to the temperature of the corrosive liquid, the corrosion time is determined according to the temperature of the corrosive liquid, the silicon wafer is placed in the corrosive liquid for corrosion thinning, and the thickness of the thinned double sides of the silicon wafer is determined according to the temperature of the corrosive liquid, wherein the thickness is generally 10-20 mu m;
b. after the etching is finished, the silicon wafer is put into a pure water cleaning tank for cleaning, and the etching liquid in the etching and thinning process is cleaned, wherein the cleaning time is 10-20min;
c. measuring the silicon wafer deduction amount: after the silicon wafer is cleaned, an instrument is used for measuring whether the deduction amount of the silicon wafer meets the standard, wherein the measuring instrument used in the method is a spiral micrometer and can also be other instruments for measuring the thickness, namely, the thickness of the double-sided thinning of the silicon wafer is measured, and the thickness is generally 10-20 mu m;
d. and (3) carrying out overflow cleaning on the silicon wafer after measurement, wherein the purpose of overflow cleaning is to remove impurities on the surface of the thinned silicon wafer.
The etching solution is nitric acid, hydrofluoric acid, glacial acetic acid and pure water which are mixed according to a certain proportion, the etching solution can well corrode and thin the silicon wafer, the mixing proportion is that the silicon wafer is mixed according to a volume proportion, and the silicon wafer is mixed according to a volume proportion of 10-20:5-10:1-10:1-10.
3) Sequentially processing thinned silicon wafers: sequentially carrying out alkali treatment, overflow cleaning, acid cleaning, overflow cleaning and spin-drying on the thinned silicon wafer, so as to remove mechanical damage on the surface of the silicon wafer, remove impurities such as metal ions, organic solvents and the like on the surface of the silicon wafer, namely,
a. placing the thinned silicon wafer in alkali liquor for treatment, wherein the alkali liquor is potassium hydroxide solution, the temperature of the potassium hydroxide solution is 40-80 ℃, and the alkali treatment time is 5-20min, and the alkali treatment is primary alkali treatment, namely, primary alkali treatment is carried out;
b. placing the silicon wafer into pure water for overflow cleaning after the alkali treatment is finished, removing alkali liquor on the surface of the silicon wafer, wherein the cleaning comprises three steps, namely, adopting overflow cleaning firstly, adopting two-stage overflow cleaning, adopting ultrasonic overflow cleaning after the two-stage overflow cleaning, adopting one-time ultrasonic overflow cleaning after the ultrasonic overflow cleaning, adopting two-stage overflow cleaning, wherein the time of each step of cleaning is 5-20min, the two-stage overflow cleaning refers to the two-time water cleaning of the silicon wafer, other solution impurities on the surface of the silicon wafer are fully removed, and the one-stage ultrasonic overflow cleaning refers to the one-time ultrasonic overflow cleaning;
c. placing the cleaned silicon wafer in acid liquor for acid treatment, wherein the acid liquor used for the acid treatment is nitric acid solution, the temperature of the nitric acid is 60-100 ℃, the acid treatment time is 5-20min, the acid treatment is three-stage acid treatment, namely, three acid treatments are carried out, and the time of each acid treatment is the same;
d. after the acid treatment is finished, placing the silicon wafer into pure water for overflow cleaning, and removing acid liquor on the surface of the silicon wafer, wherein the overflow cleaning time is 5-20min, and the overflow cleaning is four-level overflow cleaning, namely, four-level overflow cleaning is carried out, and the time of each overflow cleaning is the same;
e. and spin-drying the cleaned silicon wafer, so that impurities such as water and the like do not exist on the surface of the silicon wafer.
2. Primary diffusion of phosphorus and boron
4) Printing a diffusion source: the method comprises the steps of carrying out diffusion phosphorus and boron source coating on a silicon wafer by adopting a screen printing technology, coating a diffusion source on the surface of the silicon wafer by adopting a screen printing technology, wherein the screen printing is based on the principle of realizing continuous release by utilizing screen tension, and the printing comprises three elements: ink (slurry), doctor blade, screen; the ink (slurry) consists of functional components, bonding components and an organic carrier, and has the following characteristics: viscosity, a property that prevents the flow of fluid substances, is a measure of the ability of fluid molecules to interact to resist their relative movement between molecules; yield value, the force applied to the ink must be greater than a certain value to flow; thixotropic property, the ink becomes thinner along with stirring action when being stirred by external force, and the ink returns to the original consistency again when the stirring action is stopped; fluidity, the ink will flow like a liquid under its own weight, determined by the viscosity, yield value and thixotropic properties of the ink.
In addition, the doctor blade is used for pressing the slurry into the holes of the silk screen at a certain speed and angle, and the doctor blade keeps a certain pressure on the silk screen during printing to ensure that the slurry is pressed into the holes of the silk screen, and is generally polyurethane rubber or fluorinated rubber.
The doctor blade affects the printing effect as follows: the lower the hardness of the scraper bar is, the larger the thickness of the printed pattern is, and the scraper material must ensure that the cutting edge has good linearity; the screen is easy to deform due to the fact that the pressure of the scraping plate is too high, the printed patterns are inconsistent, abrasion of the scraping plate and the screen is also increased, and residual slurry exists on the printed screen due to the fact that the pressure of the scraping plate is too low; the scraper speed and the printing speed are set according to the printing pattern and the viscosity of the printing paste, and the paste enters the meshes for a shorter time when the speed is higher, so that the filling property is poorer; the angle of the scraper is set in relation to the slurry, the higher the viscosity value of the slurry is, the worse the fluidity is, the larger the downward pressure of the scraper on the slurry is required, and the angle of the scraper is small; the angle adjustment range of the general scraper is 45-75 degrees.
Screen has an important role in screen printing: the silk screen is a support for the emulsion required for patterning; meanwhile, the silk screen can be used for controlling the discharge amount of the printing ink when the printing ink passes through the screen; ideal release is realized by utilizing the tension of the screen; the screen thickness determines the print thickness. This requires that the wire mesh wire has a certain strength: the most ideal screen printing plate has the characteristics of high strength and difficult deformation, different screen printing plate types with different printing effect requirements are different, in the embodiment, a diffusion source is printed on the surface of a silicon wafer, a precise screen with middle strength and middle and low extensibility is adopted, the tensile strength of the material used by the screen is 30-40% higher than that of a standard tension material, and the screen printing plate has high dimensional accuracy stability and brushing resistance.
Printing a phosphorus diffusion source on one surface of the processed silicon wafer by adopting a screen printing process, and printing a boron diffusion source or a boron aluminum diffusion source on the other surface of the processed silicon wafer, wherein the method specifically comprises the following steps of:
a. printing a phosphorus diffusion source on one side of a silicon wafer: spraying a phosphorus diffusion source on a screen plate, wherein the screen plate is formed by weaving engineering plastics, a silicon wafer is placed below the screen plate, pressure is applied from the upper part of the screen plate by using a scraper at a certain angle, the phosphorus diffusion source is printed on the surface of the silicon wafer, the angle of the scraper is 40-90 degrees, the printing pressure is 30-120N, the plate interval is 1-3mm, the printing speed is 50-300mm/S, the height of the scraper is 1-3mm, and the hardness of the scraper is 40-80HRC;
b. placing the silicon wafer printed with the phosphorus diffusion source in an oven, and drying the phosphorus diffusion source, wherein the drying time is determined according to the printing quantity of the phosphorus diffusion source, and the baking time is generally 5-25min, and the temperature is 90-180 ℃;
c. b, printing a boron diffusion source or a boron aluminum diffusion source on the other surface of the silicon wafer according to the process steps of the step a and the step b, and baking, wherein the baking time and the baking temperature are set according to the coating source quantity, the baking time is generally 5-15min, and the baking temperature is 90-180 ℃;
d. and spraying Al2O3 powder or silicon powder on two sides of the silicon wafer after baking.
5) Lamination loading boat: the silicon wafers are stacked in pairs to form a boat, namely, the boron source surface or the boron aluminum source surface of the silicon wafers is opposite to the boron source surface or the boron aluminum source surface, the phosphorus source surface is opposite to the phosphorus source surface, the silicon wafers are stacked and then placed into a silicon carbide boat, and baffle plates are placed at the front and rear positions of the silicon carbide boat to compact the silicon wafers, so that the space in a diffusion furnace can be fully utilized after low-pressure diffusion is carried out, the working efficiency is high, and multiple batches of silicon wafers can be diffused at one time;
6) Low pressure dispersion: carrying out low-pressure diffusion on the silicon wafers loaded in the carbonization boat in a diffusion furnace to manufacture uniform PN junctions; the specific steps of low-pressure diffusion in the step are as follows:
a. placing a carbonization boat filled with silicon chips into a diffusion furnace, placing the diffusion furnace in a constant temperature area of the diffusion furnace, closing a furnace door, and then pumping the air pressure in the diffusion furnace to negative pressure by using a vacuum pump, wherein the negative pressure is generally 10-101Kpa;
b. raising the temperature of the diffusion furnace from 550-650 ℃ to 1250-1300 ℃ for constant-temperature diffusion for 10-30h;
c. after the diffusion is finished, the temperature of the diffusion furnace is reduced to 550-650 ℃, and the carbonization boat containing the silicon wafers is pulled out of the diffusion furnace.
3. Texturing
The step of texturing comprises
7) Diffusion post-treatment
8) Texturing the surface of a silicon wafer:
if wet-process texturing is adopted, the specific steps include the following steps:
71 Diffusion post-treatment: and placing the diffused silicon wafer in acid for diffusion post-treatment, flushing after the silicon wafer is separated, cleaning the surface by using mixed acid, and removing phosphorus and borosilicate glass on the surface of the diffused silicon wafer. The acid used for diffusion post-treatment is hydrofluoric acid solution, and the mixed acid used for cleaning the surface of the silicon wafer is nitric acid, hydrofluoric acid, glacial acetic acid and pure water which are mixed according to a certain proportion, wherein the certain proportion is that the mixture is mixed according to the volume proportion of 1000-3000:300-800:100-400:1000-3000.
81 Surface texturing of the silicon wafer): the surface of the silicon wafer can be textured by wet method, or by laser method.
When the wet-method texturing process is adopted, high-temperature steam and hydrofluoric acid are adopted to remove phosphorus and borosilicate glass on the surface of the silicon wafer after diffusion treatment before texturing, and then the wet-method texturing process is adopted, and the method specifically comprises the following steps:
a. stacking the silicon wafer after diffusion treatment on a silicon carbide boat, wherein the silicon carbide boat is provided with a clamping groove after oxidation treatment, and placing the silicon carbide boat loaded with the silicon wafer on a quartz tube orifice;
b. slowly pushing the silicon carbide boat into a constant temperature area by using a furnace hook, and covering a quartz furnace cap;
c. starting a starting program of the oxidation furnace and starting a timer;
d. the buzzer sounds, the timer is closed, the water vapor generator is started, heating is started, the timer switch is pressed down again, then the buzzer sounds, the timer is closed, the nitrogen switch is closed, the temperature of the oxidation furnace is raised to 1080-1120 ℃, the constant temperature is kept for 10-30 minutes, the water vapor generator is closed, the nitrogen switch is opened, the oxidation procedure is finished, the quartz cap is taken down by taking the glove, the silicon carbide boat is slowly pulled to the quartz tube orifice by the furnace hook, and the silicon carbide boat is cooled at the quartz tube orifice;
e. after the silicon carbide boat is taken out, the silicon carbide boat is placed on a stainless steel table and is fully cooled to room temperature, and the purification workbench is started in the process, so that the air in the purification workbench is filtered and purified by adopting a high-efficiency function, and other impurities are prevented from being mixed when the silicon wafer is cooled;
f. taking out the cooled silicon wafer from the silicon carbide boat, placing the cooled silicon wafer in a container, wherein the container is a flower basket for containing the silicon wafer, the marking surface of the silicon wafer faces towards the U-shaped surface of the flower basket at the moment, soaking the flower basket in a tank filled with 49% hydrofluoric acid solution for 5-15 minutes, taking out the flower basket, placing the flower basket in the water tank for flushing and spin-drying, and removing a damaged layer on the oxidized surface of the silicon wafer;
g. preparing corrosion cleaning liquid: preparing a first-stage cleaning solution, a second-stage cleaning solution and a third-stage cleaning solution for texturing, wherein the method specifically comprises the following steps of:
g1. weighing a proper amount of potassium hydroxide, and preparing a potassium hydroxide solution with the mass fraction of 10-30%;
g2. preparing a first-stage cleaning solution: mixing hydrogen peroxide, pure water and prepared potassium hydroxide solution with the mass fraction of 10-30% according to the volume ratio of 6-10:110-120:1-8 to prepare a first-stage cleaning solution;
g3. and (3) preparing a second-stage cleaning solution: mixing the prepared potassium hydroxide solution with the mass fraction of 10-30%, the wool making additive and pure water according to the volume ratio of 0.35-0.42:0.04-0.09:5-10 to prepare a second-stage cleaning solution;
g4. and (3) preparing a third-stage cleaning solution: mixing hydrofluoric acid, hydrochloric acid and pure water according to the volume ratio of 10-15:30-40:60-80 to prepare the third-stage cleaning liquid.
h. Pouring the prepared corrosive cleaning liquid into a corresponding cleaning tank, and setting the temperature of the cleaning tank, namely,
h1. pouring the prepared first-stage cleaning liquid into a first-stage cleaning tank, starting a heating device, and setting the temperature to be 50-70 ℃;
h2. pouring the prepared second-stage cleaning liquid into a second-stage cleaning tank, starting a heating device, and setting the temperature to 70-90 ℃;
h3. and pouring the prepared third-stage cleaning solution into the third-stage cleaning tank.
i. Placing the silicon wafer with the glass removed in a flower basket, wherein the marking surface of the silicon wafer faces towards the U-shaped surface of the flower basket;
j. when the temperature of each stage of cleaning tank reaches a set value, placing a basket filled with silicon chips into a first stage of cleaning tank, taking out the basket filled with silicon chips after 3-10min, placing the basket into a water tank, flushing for 10-20min, and removing the first stage of cleaning liquid on the surface of the silicon chips;
k. placing the basket filled with the silicon chips after flushing into a second-stage cleaning tank, taking out the basket after 20-30min, placing the basket into a water tank for flushing for 10-20min, and removing second-stage cleaning liquid on the surfaces of the silicon chips;
putting the flushed flower basket into a third-stage cleaning tank, taking out the flower basket filled with the silicon wafer after 3-10min, flushing in the water tank for 10-20min, and removing third-stage cleaning liquid on the surface of the silicon wafer;
and m, spin-drying the cleaned silicon wafer, and testing the surface roughness.
From test data, the wet texturing effect is obvious, the surface roughness of the silicon wafer before texturing is 0.596, and the surface roughness of the silicon wafer after texturing is 0.832.
If laser texturing is adopted, the specific steps include the following steps:
72 Diffusion post-treatment: forming a layer of forming layer on the surface of the diffused silicon wafer, wherein the forming layer is phosphorus and borosilicate glass, removing phosphorus and borosilicate glass on the surface of the diffused silicon wafer by adopting glass etching liquid, etching the phosphorus and borosilicate glass formed after the diffusion of a liquid diffusion source of the silicon wafer by using the glass etching liquid, and preparing for the next step of laser texturing, and specifically comprising the following steps:
a. immersing the diffused silicon wafer in glass etching solution for 0.5-4h, removing phosphorus and borosilicate glass on the surface of the diffused silicon wafer, wherein the glass etching solution is prepared by mixing ammonium hydrofluoric acid, oxalic acid, ammonium sulfate, glycerol, barium sulfate and hot pure water according to a certain proportion, and the mixing proportion is 20-30% by weight: 10-20%: 10-20%:0-10%:20-30%: mixing at a ratio of 10-20%.
b. Carrying out ultrasonic cleaning on the silicon wafer immersed with the glass etching solution to remove the glass etching solution on the surface of the silicon wafer, and simultaneously removing phosphorus and borosilicate glass which are incompletely reacted with the glass etching solution through ultrasonic waves, wherein the ultrasonic cleaning is carried out on the silicon wafer immersed with the etching solution for 5-30min;
c. the silicon wafer after ultrasonic cleaning is washed by water, and glass corrosive liquid possibly remained on the surface of the silicon wafer is further washed, wherein the silicon wafer is subjected to overflow cleaning for one time, namely, the silicon wafer after ultrasonic cleaning is placed in a water tank to be subjected to flushing once, and the silicon wafer is taken out after flushing, wherein the time for the overflow cleaning for one time is generally 5-30min;
d. the silicon wafer after overflow cleaning in the previous step is subjected to nitric acid cleaning, so that residual impurities on the surface of the silicon wafer are further removed, namely the silicon wafer is put into nitric acid for cleaning, and the time of nitric acid cleaning is generally 5-30min;
e. the method comprises the steps of (1) carrying out water cleaning on a silicon wafer subjected to nitric acid cleaning, diluting and cleaning the nitric acid on the surface of the silicon wafer in the previous step, and carrying out four-time overflow cleaning on the silicon wafer subjected to nitric acid cleaning, namely, sequentially placing the silicon wafer subjected to nitric acid cleaning into four water tanks for flushing, wherein the four-time overflow cleaning time is generally 5-30min;
f. and spin-drying the overflowed and washed silicon wafer by using a spin dryer.
82 Surface texturing of the silicon wafer): the laser texturing is to respectively perform laser texturing on two sides of a silicon wafer, and the cleaned silicon wafer uses laser to perform full-wafer scanning on the surface of the silicon wafer, and the specific steps are as follows: placing the cleaned silicon wafer on a working platform of a laser, scanning the surface of the silicon wafer by using the laser, wherein when the laser scans, the laser beam of the laser linearly scans from left to right, and the laser beam sequentially scans the surface of the silicon wafer linearly from top to bottom, and the whole surface of the silicon wafer is scanned for one time, namely, when the laser beam of the laser scans the surface of the silicon wafer, the diameter of a light spot formed by the laser beam is controlled to be 10-80 mu m, firstly, the linear scanning is performed in the transverse direction of the surface of the silicon wafer, and after one transverse scanning is completed, the laser beam moves downwards, and the transverse linear scanning is continuously performed next to the transverse direction which is completed after the one transverse scanning, namely, the laser beam sequentially scans transversely for a plurality of times in the longitudinal direction, and a scanning track is formed on the surface of the silicon wafer; after one surface of the silicon wafer is scanned, turning the silicon wafer, and scanning and texturing the other surface of the silicon wafer, namely, laser scanning is performed on both surfaces of the silicon wafer, so as to perform double-sided texturing on the silicon wafer.
The principle of laser texturing is as follows: the laser beam irradiates on the silicon wafer, and the surface of the silicon wafer generates a molten state under the high temperature effect of the light spot of the laser beam, and after waiting to scan, the silicon wafer is cooled to form molten polysilicon crystals on the surface of the silicon wafer.
When the silicon wafer is scanned by laser, laser beams of the laser are converged on the laser surface, the phenomenon of melting occurs on the surface of the silicon wafer due to the high temperature effect of the laser, after the laser beams of the laser are scanned, the molten state of the surface of the silicon wafer is cooled to form molten polysilicon, so that the silicon wafer is scanned to form uneven molten polysilicon on the surface of the silicon wafer, the roughness of the surface of the silicon wafer is increased, a coating foundation is provided for coating of protective glue in the subsequent glass dulling process of the silicon wafer, and the adhesive force of the protective glue is increased during coating and is not easy to fall off.
The silicon wafer is scanned by laser, the surface of the silicon wafer forms a molten state under the action of high temperature, so that the removal amount of the silicon wafer reaches 4-5 mu m, and the monocrystalline silicon on the surface of the whole silicon wafer is made into uneven molten polycrystalline silicon by laser. Meanwhile, the laser scanning can remove phosphorus and borosilicate glass on the surface of the silicon wafer, which are not removed by the glass etching liquid.
When the laser is scanned, the used laser is an infrared laser or other lasers, the laser can be selected according to production requirements, the laser frequency of the laser is 0.1MHz-1MHz, the power is 10-50W, the scanning speed of the laser is 3-40m/s, and the smooth silicon wafer surface is made into a rough surface, so that the surface roughness of the silicon wafer is improved from 0.3m to 0.5-1.5 mu m; and when the silicon chip is scanned by laser, the silicon chip is placed on a working platform of a laser, the silicon chip is fixed and placed well, the silicon chip is placed in the air at normal temperature and normal pressure, and the surface of the silicon chip is scanned by the laser, that is, the silicon chip is not limited by the environment by the laser scanning, so that the silicon chip texturing process is simplified, the equipment investment is reduced, the silicon chip texturing process is simple, the operation is convenient, and the texturing process is simple.
Cleaning after wool making: the method comprises the steps of soaking and cleaning by adopting an acid solution, carrying out two-stage overflow cleaning and spin-drying after the acid solution cleaning, wherein the acid solution is hydrofluoric acid solution, and the cleaning purpose is to clean impurities generated on the surface of the silicon wafer after laser scanning.
After the laser texturing process, a layer of rugged polysilicon is respectively attached to the two surfaces of the silicon wafer to form a monocrystalline silicon wafer with polysilicon attached to the surfaces.
After the steps are carried out, phosphorus and borosilicate glass on the surface of the silicon wafer after diffusion treatment are removed by glass corrosive liquid configured according to a certain proportion, the surface of the silicon wafer is subjected to texturing by a laser texturing method, and after the texturing is finished, the surface of the silicon wafer is subjected to a roughness test, and as a result, the surface roughness of the silicon wafer before the texturing is 0.3m, the surface roughness of the silicon wafer after the texturing is 0.5-1.5 mu m, the texturing effect is obvious, and the surface roughness of the silicon wafer is uniformly prepared for coating of protective glue in the subsequent silicon wafer glass dulling process.
The PN junction result of the primary negative pressure diffusion process is as follows: the boron junction is 40-60 mu m, the aluminum junction is 90-120 mu m, the phosphorus junction is 40-60 mu m, and the discharge resistance result of the prepared sample is as follows: 800-1500V.
The test results prove that the silicon wafer manufactured by adopting the one-time negative pressure diffusion process has uniform PN junction and good consistency, and negative pressure operation is carried out in the temperature rising section of the volatilization of the phosphorus source, so that the volatilized phosphorus source can be discharged as soon as possible, the effect of reducing the return of the phosphorus source is achieved, and the return quantity of the edge of the silicon wafer is small.
2. Platinum diffusion
Compared with the traditional process, the invention adopts the method of coating the platinum source on one side of the silicon wafer, shortens the diffusion time from original 4-6 hours to 1-2 hours, shortens the production period, improves the trr uniformity of the silicon wafer after platinum diffusion, has smaller finished product leakage current IR, and specifically comprises the following steps of
4. Platinum diffusion pretreatment:
9) Performing sanding on the boron-expanded surface, wherein the sanding removal amount is 4-5 um, corroding the sanded silicon wafer by adopting hydrofluoric acid to remove an oxide layer formed on the surface of the silicon wafer, and performing two-stage flushing and cleaning for 10-20min for 5-10 min;
10 Sheet spin-drying: putting the cleaned silicon wafer into a spin dryer for spin-drying, wherein the spin dryer rotates at the speed of: 500-700 rpm, spin-drying time: 7-10 min;
5. platinum diffusion
11 Platinum-coated source: and sucking a proper amount of prepared chloroplatinic acid (chloroplatinic acid: superior absolute ethyl alcohol=1 g: 500 mL) by using a special polyethylene dropper, dripping a proper amount of platinum source (5 mL of droplets (8-10) are sucked each time) on a boron-expanded surface of each silicon wafer, and slightly swinging and tilting by using a handheld silicon wafer plate to uniformly coat the whole silicon wafer with the chloroplatinic acid solution. Placing the silicon wafer coated with the platinum source and the filter paper into an infrared lamp baking oven for baking;
12 Boat loading: the platinum source coating surfaces of the two silicon wafers are mutually combined together by polytetrafluoroethylene tweezers, and are vertically stacked in a sliding silicon boat in pairs;
13 Platinum diffusion: carrying out platinum diffusion on the silicon wafer loaded on the silicon boat in a platinum diffusion furnace, wherein the temperature of the platinum diffusion furnace is 840-920 ℃, and the constant temperature time is 1-2h;
6. post-platinum diffusion test
14 Post-platinum diffusion test): one silicon wafer is extracted from each boat after platinum diffusion, a dicing saw is used for dicing into small chips with the thickness of 1.0mm and the thickness of 1.0mm, trr test is carried out, and trr test standard value of the silicon wafer after FRGPP platinum diffusion is as follows: 0.035 μs is less than or equal to trr is less than or equal to 0.50 μs.
The invention has the advantages and positive effects that: due to the adoption of the technical scheme, compared with the traditional process, the method has the advantages that the platinum source is coated on one side of the silicon wafer, the diffusion time is shortened from 4-6 hours to 1-2 hours, the production period is shortened, and the trr uniformity of the silicon wafer after platinum diffusion is improved, so that the leakage current IR of a finished product is smaller; the phosphorus diffusion source, the boron diffusion source or the boron aluminum diffusion source are respectively printed on the two sides of the silicon wafer by adopting a screen printing process, so that the coating process of the silicon wafer liquid source is simplified, and the processing period is shortened; after the liquid source is coated, a one-time negative pressure diffusion process is adopted, so that the situation of source returning at the edge of the silicon wafer is reduced, the diffusion process steps are simplified, and the diffusion efficiency is improved; the process method is adopted to carry out primary diffusion of the liquid source of the silicon wafer, so that the manufactured PN junction is uniform, the processing cost of the silicon wafer is reduced, wet texturing or laser texturing is adopted, the roughness of the surface of the silicon wafer is increased, the coating of the protective layer of the subsequent glass passivation process of the silicon wafer is facilitated, and the adhesive force of the protective layer in the glass passivation process is increased when the protective layer is coated.
The foregoing describes one embodiment of the present invention in detail, but the description is only a preferred embodiment of the present invention and should not be construed as limiting the scope of the invention. All equivalent changes and modifications within the scope of the present invention are intended to be covered by the present invention.

Claims (15)

1. The FRGPP chip glass pre-passivation multiple diffusion process is characterized by comprising the following steps of:
s1, performing primary diffusion texturing on phosphorus and boron, namely diffusing a phosphorus diffusion source on one surface of a silicon wafer after diffusion pretreatment, diffusing a boron diffusion source or a boron aluminum diffusion source on the other surface of the silicon wafer, and performing silicon wafer texturing, wherein the primary diffusion texturing comprises the following steps:
s1-1, performing diffusion pretreatment, and thinning a silicon wafer;
s1-2, performing primary diffusion of phosphorus and boron, namely diffusing a phosphorus diffusion source on one surface of a silicon wafer subjected to diffusion pretreatment, diffusing a boron diffusion source or a boron aluminum diffusion source on the other surface, and putting the silicon wafer into a furnace for diffusion;
s1-3, texturing is carried out, so that the roughness of the surface of the silicon wafer is increased, a coating foundation is provided for coating of protective glue in a subsequent glass dulling process of the silicon wafer, the texturing is wet texturing or laser texturing, and the laser texturing specifically comprises the following steps:
B1. removing the layer formed on the surface of the silicon wafer after diffusion: placing the diffused silicon wafer in glass corrosive liquid for 3-10min, and cleaning and spin-drying the silicon wafer;
B2. laser texturing: scanning the cleaned silicon wafer on the surface of the silicon wafer by using laser, and manufacturing the smooth surface of the silicon wafer into a rough surface;
B3. cleaning after wool making: after the silicon wafer is textured, soaking and cleaning by using an HF solution, and carrying out overflow cleaning and spin-drying after the HF solution is cleaned;
s2, platinum diffusion, namely a silicon wafer diffusion platinum diffusion source after primary phosphorus and boron diffusion texturing;
the step S2 of platinum diffusion comprises the steps of:
s2-1 platinum diffusion pretreatment, sanding and cleaning the silicon wafer after primary diffusion texturing of phosphorus and boron;
s2-2 platinum diffusion, wherein single-sided platinum diffusion is carried out on the silicon wafer after platinum diffusion pretreatment;
s2-3, carrying out test after platinum diffusion, and carrying out trr test on the silicon wafer after platinum diffusion.
2. The FRGPP chip pre-glass multiple diffusion process of claim 1, characterized by: the glass etching solution is a solution formed by mixing ammonium hydrofluoric acid, oxalic acid, ammonium sulfate, glycerin, barium sulfate and hot pure water according to the volume ratio of 6-10:8-15:20-30:4-15:10-22:110-120.
3. The FRGPP chip pre-glass multiple diffusion process of claim 1, characterized by: the platinum diffusion pretreatment comprises single-sided sanding of the boron-expanded surface.
4. The FRGPP chip pre-glass multiple diffusion process of claim 1, characterized by: the S2-2 step platinum diffusion comprises the steps of:
s2-2-1 platinum coated diffusion source: coating a platinum diffusion source on the sand surface by adopting a source coating process and drying;
s2-2-2 normal pressure diffusion: the silicon wafer is placed in a diffusion furnace, and the diffusion furnace maintains normal pressure.
5. The FRGPP chip pre-glass multiple diffusion process of claim 1, characterized by: the test standard of the S2-3 step platinum after diffusion is that trr is more than or equal to 0.035 mu S and less than or equal to 0.50 mu S.
6. The FRGPP chip pre-glass multiple diffusion process of claim 1, characterized by: the S1-2 step of primary diffusion of phosphorus and boron specifically comprises the following steps:
s1-2-1, printing a phosphorus-boron diffusion source, printing the phosphorus diffusion source on one surface of the silicon wafer after diffusion pretreatment by adopting a screen printing technology, and printing a boron diffusion source or a boron-aluminum diffusion source on the other surface of the silicon wafer, wherein the silicon wafer is required to be dried every time the silicon wafer is printed;
s1-2-2, spraying Al2O3 powder or silicon powder on two sides of the silicon wafer;
s1-2-3, placing the silicon wafer in a diffusion furnace, and pumping the air pressure in the diffusion furnace to negative pressure.
7. The FRGPP chip pre-glass multiple diffusion process of claim 6, characterized by: the low-pressure diffusion is constant-temperature diffusion, and the diffusion temperature is 1250-1300 ℃.
8. The FRGPP chip pre-glass multiple diffusion process of claim 1, characterized by: the wet-process texturing specifically comprises the following steps:
A1. performing diffusion post-treatment, and removing phosphorus borosilicate glass on the surface of the diffused silicon wafer;
A2. placing the treated silicon wafer in a first-stage cleaning solution at 50-70 ℃ for 3-10min, and cleaning with pure water for 10-20min;
A3. placing the silicon wafer in a second-stage cleaning solution at 70-90 ℃ for 20-30min, and cleaning with pure water for 10-20min;
A4. placing the silicon wafer in a third-stage cleaning solution at 70-90 ℃ for 3-10min, and cleaning with pure water for 10-20min;
A5. and spin-drying the cleaned silicon wafer, and performing surface roughness test.
9. The FRGPP chip pre-glass multiple diffusion process of claim 8, characterized by: the first-stage cleaning solution is formed by mixing hydrogen peroxide, pure water and 30% potassium hydroxide solution according to the volume ratio of 6-10:110-120:1-8.
10. The FRGPP chip pre-glass multiple diffusion process of claim 8, characterized by: the second-stage cleaning solution is a solution formed by mixing 10-30% of potassium hydroxide solution, a texturing additive and pure water according to the volume ratio of 0.35-0.42:0.04-0.09:5-10.
11. The FRGPP chip pre-glass multiple diffusion process of claim 8, characterized by: the third-stage cleaning solution is formed by mixing hydrofluoric acid, hydrochloric acid and pure water according to the volume ratio of 10-15:30-40:60-80.
12. The FRGPP chip pre-glass multiple diffusion process of claim 1, characterized by:
the S1-1 step diffusion pretreatment specifically comprises the following steps:
C1. placing the silicon wafer in a corrosive liquid at 0-15 ℃ to corrode for 9-50s, so that the silicon wafer is thinned on both sides; cleaning with pure water for 10-20min, and cleaning corrosive liquid;
C2. placing the silicon wafer in 40-80deg.C alkali solution for 5-20min;
C3. two-stage overflow cleaning; cleaning by primary ultrasonic overflow; two-stage overflow cleaning; the cleaning time of each stage is 5-20min;
C4. placing the silicon wafer in 60-100deg.C acid liquor for three-stage acid treatment, wherein the treatment time of each stage is 5-20min; C5. four-stage overflow cleaning, wherein each stage cleaning time is 5-20min.
13. The FRGPP chip pre-glass multiple diffusion process of claim 12, characterized by: the corrosive liquid is a solution formed by mixing nitric acid, hydrofluoric acid, glacial acetic acid and pure water according to the volume ratio of 10-20:5-10:1-10:1-10.
14. The FRGPP chip pre-glass multiple diffusion process of claim 12, characterized by: the alkali liquor is potassium hydroxide solution.
15. The FRGPP chip pre-glass multiple diffusion process of claim 12, characterized by: the acid liquid is nitric acid solution.
CN201711059107.3A 2017-11-01 2017-11-01 FRGPP chip glass-front multiple diffusion process Active CN109755118B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201711059107.3A CN109755118B (en) 2017-11-01 2017-11-01 FRGPP chip glass-front multiple diffusion process

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201711059107.3A CN109755118B (en) 2017-11-01 2017-11-01 FRGPP chip glass-front multiple diffusion process

Publications (2)

Publication Number Publication Date
CN109755118A CN109755118A (en) 2019-05-14
CN109755118B true CN109755118B (en) 2023-05-23

Family

ID=66398893

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201711059107.3A Active CN109755118B (en) 2017-11-01 2017-11-01 FRGPP chip glass-front multiple diffusion process

Country Status (1)

Country Link
CN (1) CN109755118B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111933754A (en) * 2020-08-14 2020-11-13 孙鹏 N-type polycrystalline silicon solar cell and manufacturing method thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102087976A (en) * 2010-12-10 2011-06-08 天津中环半导体股份有限公司 Fast recovery diode (FRD) chip and production process thereof
JP2015109364A (en) * 2013-12-05 2015-06-11 信越化学工業株式会社 Solar cell manufacturing method

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7915154B2 (en) * 2008-09-03 2011-03-29 Piwczyk Bernhard P Laser diffusion fabrication of solar cells
CN102117840B (en) * 2010-12-15 2012-04-25 杭州杭鑫电子工业有限公司 Multi-dispersed-metal fast recovery diode and preparation method thereof
CN104201102B (en) * 2014-08-28 2017-12-12 苏州启澜功率电子有限公司 A kind of fast recovery diode FRD chips and its manufacture craft
CN104362219B (en) * 2014-11-06 2017-01-11 天威新能源控股有限公司 Crystalline solar cell production process
CN104538501A (en) * 2015-01-15 2015-04-22 中利腾晖光伏科技有限公司 N-type double-sided battery and manufacturing method thereof
CN104766790B (en) * 2015-03-11 2017-12-19 苏州启澜功率电子有限公司 A kind of phosphorus, boron liquid source perfect diffusion technique
CN106373862A (en) * 2015-07-24 2017-02-01 钧石(中国)能源有限公司 Processing method applicable to wet cleaning of heterojunction cell
CN105047764A (en) * 2015-09-01 2015-11-11 浙江晶科能源有限公司 Silicon chip texturing method
CN105304753A (en) * 2015-09-25 2016-02-03 中国电子科技集团公司第四十八研究所 N-type cell boron diffusion technology
CN105977155B (en) * 2016-07-01 2020-03-20 扬州虹扬科技发展有限公司 Manufacturing process of fast recovery chip

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102087976A (en) * 2010-12-10 2011-06-08 天津中环半导体股份有限公司 Fast recovery diode (FRD) chip and production process thereof
JP2015109364A (en) * 2013-12-05 2015-06-11 信越化学工業株式会社 Solar cell manufacturing method

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
铂扩散工艺对硅快恢复二极管特性的影响;曾祥斌;孙树梅;袁德成;蒋陆金;;华中科技大学学报(自然科学版)(第09期);全文 *

Also Published As

Publication number Publication date
CN109755118A (en) 2019-05-14

Similar Documents

Publication Publication Date Title
Kim et al. Texturing of large area multi-crystalline silicon wafers through different chemical approaches for solar cell fabrication
US8148191B2 (en) Combined etching and doping media
CN100561683C (en) A kind of chemical passivation method of measuring crystalline silicon body minority carrier life time
CN107245760A (en) The processing method of silicon chip of solar cell
CN100571900C (en) A kind of cleaning method of anode oxidize spare parts surface
CN102154711A (en) Monocrystal silicon cleaning liquid and precleaning process
CN105514222B (en) Solar cell acid etching reworking method and chain equipment used by same
CN1947869A (en) Method for cleaning silicon material
CN105895714A (en) Smooth modification liquid, smooth modification method, heterojunction solar cell silicon wafer and heterojunction solar cell
CN106348616B (en) A kind of preparation method of SiO2/TiO2 antireflective coating
CN103441187A (en) Method for cleaning solar cell silicon wafer after polishing
CN110510886A (en) Chemical granulation processing method for quartz surface
CN109755118B (en) FRGPP chip glass-front multiple diffusion process
CN112687764A (en) Texture surface making method of single crystal battery and single crystal battery prepared by texture surface making method
TW200407463A (en) Etching pastes for titanium oxide surfaces
CN109309142B (en) Liquid source diffusion process before silicon wafer glass passivation
CN103646868A (en) Method for preparing porous silicon by adopting hydrothermal-vapor etching
CN106653948A (en) Solar cell and cell back polishing process thereof
CN110331427B (en) Porous silicon-silver nano dendrite structure and preparation method thereof
CN105826410B (en) A kind of polysilicon etching method for eliminating Buddha's warrior attendant wire cutting trace
CN105742407B (en) A kind of method that black silicon is prepared in doping film layer
CN106711248A (en) Method for reducing surface reflectivity of ingot-cast polycrystalline silicon wafer
CN109755112B (en) Secondary diffusion process before glass passivation of unidirectional TVS chip
WO2019042084A1 (en) Method for selective texture preparation on surface of crystalline silicon wafer
CN109755114B (en) Two-way TVS chip glass blunt front double-sided diffusion process

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant