CN109596965B - Method for judging optimal working voltage of Avalanche Photodiode (APD) of 10G EPON - Google Patents
Method for judging optimal working voltage of Avalanche Photodiode (APD) of 10G EPON Download PDFInfo
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Abstract
The invention discloses a method for judging the optimal working voltage of an Avalanche Photodiode (APD) of a 10G EPON, which comprises the following steps of: s1: obtaining the reverse attack of APD according to the test data of BOSA or RSSI under no light conditionVoltage across Vbr(ii) a S2: setting an initial working bias voltage, selecting fixed input optical power, testing the current bit error rate or bit error number according to a preset duration, then increasing the working bias voltage step by a set step value for repeated testing, and testing at least 3 points until the bit error rate or the bit error number is increased; s3: using the working bias as x, the error rate as y, and solving a quadratic equation of one element y as ax2+ bx + c to obtain three coefficients of a, b and c; s4: according to the obtained three coefficients a, b and c, calculating an extreme valueObtaining a corresponding APD DAC; s5: and carrying out sensitivity test by using the APD DAC value, if the APD DAC value passes the pass, subtracting the corresponding temperature value in the APD DAC LUK table of the current temperature from the APD DAC LUK table, translating and updating the temperature value into the APDDAC LUK, and if the APD DAC value fails to pass the pass, updating the APD DAC LUK.
Description
Technical Field
The invention relates to the field of photodiodes, in particular to a method for judging the optimal working voltage of an Avalanche Photodiode (APD) of a 10G EPON.
Background
The APD is characterized in that the performance of the APD is improved on the basis of a PIN photodiode, and compared with the PIN photodiode, a layer of P-type material is added behind the layer I. When the voltage is lower, most of the voltage falls in the PN + region, when the voltage is increased, the width of the depletion region is increased, and the voltage on the straight PN + junction is stopped when the voltage is 5% -10% lower than the avalanche breakdown voltage. The I layer is a light absorption region, photons generate photocurrent in the I layer, the PN + region is an avalanche region, the photocurrent collides and ionizes under the action of a high electric field after entering, secondary hole-electron pairs are generated, secondary holes can collide and ionize again, and tens or hundreds of new hole-electron pairs can be generated, namely the multiplication effect is achieved.
The APD structure results in a higher sensitivity than a PIN photodiode, but the circuit is also more complex, requiring additional high voltage drive. Generally, an APD has an optimal working voltage, a multiplication factor M smaller than the working voltage is smaller, and the sensitivity is lower; larger than this operating voltage, the multiplication factor becomes larger and the noise also becomes larger, the signal-to-noise ratio becomes lower, and the sensitivity also becomes lower. Generally, the operating voltage is set empirically, for example, less than 3V or 0.9 times the reverse breakdown voltage, but in special cases, an optimal sensitivity point needs to be found, but the empirical value has a certain deviation from the optimal value and cannot be used as the optimal operating voltage.
Disclosure of Invention
In order to solve the above problem, the present invention provides a method for determining an optimal operating voltage of an avalanche photodiode APD of a 10G EPON, comprising the steps of: s1: obtaining the reverse breakdown voltage V of the APD according to the test data of BOSA or RSSI under no light conditionbr(ii) a S2: setting an initial working bias voltage, selecting fixed input optical power, testing the current bit error rate or bit error number according to a preset duration, then increasing the working bias voltage step by a set step value for repeated testing, and testing at least 3 points until the bit error rate or the bit error number is increased; s3: using the working bias as x, the error rate as y, and solving a quadratic equation of one element y as ax2+ bx + c to obtain three coefficients of a, b and c; s4: according to the obtained three coefficients a, b and c, calculating an extreme valueObtaining a corresponding APD DAC; s5: and carrying out sensitivity test by using the APD DAC value, if the APD DAC value passes the pass, subtracting the corresponding temperature value in the APD DAC LUK table of the current temperature from the APD DAC LUK table, translating and updating the temperature value into the APDDAC LUK, and if the APD DAC value fails to pass the pass, updating the APD DAC LUK. When the drive chip is used for testing, the APD DAC is used for quantizing the working bias voltage applied to the APD, the value of the working bias voltage is in direct proportion to the voltage value, and the variation of the working bias voltage x can be controlled by setting different DAC values.
Further, the initial operating bias voltage is Vbr-4V, said duration being 5s and said step value being 0.5V. Obtaining reverse breakdown voltage V of APD according to RSSI under no light conditionbrThe method comprises the following steps: (1) an initial bias voltage is used as the operating voltage of the APD, and all APDs, V, are guaranteed to be charged0<VbrRX input light is set to 0, the current RSSI is tested, and I is judgedDWhether 10 muA is reached or not, if the RSSI of the current circuit is 1: 1 current mirror, only need to judge whether the current flowing into the RSSI pin of the driving chip exceeds 10 muA, the working voltage at this moment is Vbr(ii) a (2) Alternatively, for a specific driver chip, the specification defines 1LSB as 0.03125 μ a/bit is determined whether the RSSI ADC (F0/F1h) is greater than 0140h, if the RSSI ADC is less than 0140h, the working voltage is increased by a fixed step value until the RSSI ADC reaches 0140h, and the working voltage is Vbr. Obtaining the reverse breakdown voltage V of APD according to the test data of BOSAbrThe method comprises the following steps: (1) APD V of BOSA by AIVbrMeasuring specific values and importing the measured values into a database; (2) direct calling of V in database during debuggingbr。
Further, the method for selecting the fixed input optical power is as follows: according to the variation trend of the error code number or the error code rate of the APD under different input optical powers, the input optical power which can be out of line in a short test time and has a large error code rate or error code number is selected as the fixed input optical power.
Further, the step S2 includes the following sub-steps: s21: setting VmixAnd VmaxAs upper and lower limits of the variation range, satisfy Vmix<Vop<Vmax<Vbr(ii) a S22: testing the bit error rate or bit error number when the working voltage value is V _ mix under the condition of fixed input optical power; s23: and (4) increasing the bias voltage value according to a fixed value, and repeatedly testing the error rate or the error number until the error rate or the error number is increased for at least 3 times. In addition, if the error rate of the test point of the step S2 is less than 3 points and is increased, the initial working bias voltage is reduced by 1V, and then the step 2 is repeated.
The invention has the beneficial effects that: the invention provides a method for judging the optimal working voltage of an Avalanche Photodiode (APD) of a 10G EPON (Ethernet passive optical network), which can directly and effectively obtain the optimal working voltage of the APD in the 10G EPON and ensure that an optical device has optimal sensitivity.
Drawings
FIG. 1 is a flow chart of a method of determining an optimal operating voltage for an avalanche photodiode, APD, for a 10G EPON;
FIG. 2 is a relationship with a bias voltage Vr when an input optical power is set to be excessive;
FIG. 3 is a graph showing the number of bit errors measured for 1 second at different bit error rates for 10 GEPON;
FIG. 4 is a graph showing the variation trend of the bit error rate of an optical device under different input optical powers;
FIG. 5 shows BER for different bias voltages Vr;
fig. 6 is the ber to raw value setting.
Detailed Description
In order to make the technical solutions of the present invention better understood by those skilled in the art, the present invention will be further described in detail with reference to the accompanying drawings and specific embodiments.
A method for judging the optimal working voltage of an Avalanche Photodiode (APD) of a 10G EPON comprises the following steps: s1: obtaining the reverse breakdown voltage V of the APD according to the test data of BOSA or RSSI under no light conditionbr(ii) a S2: setting an initial working bias voltage, selecting fixed input optical power, testing the current bit error rate or bit error number according to a preset duration, then increasing the working bias voltage step by a set step value for repeated testing, and testing at least 3 points until the bit error rate or the bit error number is increased; s3: using the working bias as x, the error rate as y, and solving a quadratic equation of one element y as ax2+ bx + c to obtain three coefficients of a, b and c; s4: according to the obtained three coefficients a, b and c, calculating an extreme valueObtaining a corresponding APD DAC; s5: and carrying out sensitivity test by using the APD DAC value, if the APD DAC value passes the pass, subtracting the corresponding temperature value in the APD DAC LUK table of the current temperature from the APD DAC LUK table, translating and updating the temperature value into the APDDAC LUK, and if the APD DAC value fails to pass the pass, updating the APD DAC LUK. When the drive chip is used for testing, the APD DAC is used for quantizing the working bias voltage applied to the APD, the value of the working bias voltage is in direct proportion to the voltage value, and the variation of the working bias voltage x can be controlled by setting different DAC values.
In general, the actual measurement is to test the APD dark current under no light input condition, and when the ID is more than or equal to 10uA, the bias voltage is approximately regarded as Vbr. Using an initial bias voltage as the operating voltage for the APDs, V is guaranteed for all APDsop<Vbr. The RX input is set to 0 and the current RSSI is tested to determine if 10 μ a is reached. The RSSI in this embodiment is 1: 1 current mirror, only needing to judge the currentWhether the current entering the RSSI pin of the driving chip exceeds 10 muA or not is only required. Since the driving chip used in this embodiment defines that 1LSB is 0.03125 μ a/bit, it is only necessary to determine whether RSSI ADC (F0/F1h) is greater than 0140 h. In addition, there is a method of first applying APDV of BOSA to AIVbrThe specific value is measured and is led into a database, and V in the database is directly called during debuggingbr. V obtained by this methodbrMay deviate from the true value because the testing environment temperature of the BOSA is not consistent with that of the optical cat, but because the BOSA and the optical cat are tested at normal temperature, the error is small, and V is obtainedbrHigh accuracy is not required just to obtain an upper range.
The input optical power needs to be selected to be a proper value, and the correct value cannot be found when the input optical power is too large or too small, as shown in fig. 2, the bit error rate between points a and B is 0, and the optimum sensitivity cannot be found correctly. If the input optical power is set to be too small, the error rate under each bias voltage Vr is large, and the error rate cannot be distinguished.
The 10GEPON receiving rate is 10Gbps, the number of errors tested for 1 second under each error rate is shown in FIG. 3, and the minimum error rate is set to 1 x 10-8~1*10-7And if the test time is about, 500-5000 error codes exist in the running 5S, and the wire can be drawn in a short test time and has a larger error code rate or error code number. According to the change trend of the error code number or the error code rate of the optical device under different input optical powers, the input optical power which can be out of line in a short test time and has a large error code rate or error code number is selected as the fixed input optical power. For example, as shown in fig. 4, the variation trend of the bit error rate or the bit error rate of a certain optical device under different input optical powers shows that the bit error rate can reach 1 × 10 by selecting-31 dBm as the fixed input optical power for testing-8~1*10-7Left and right.
Under the condition of fixed input optical power, the relation between the BER and the bias voltage Vr is tested, and the method comprises the following steps: setting VmixAnd VmaxAs upper and lower limits of the variation range, satisfy Vmix<Vop<Vmax<Vbr(ii) a Under the condition of fixed input optical power, the test working voltage value is VmixBit error rate or number of errors in time; increasing the bias voltage value according to a fixed value such as 0.5V, and repeatedly testing the error rate or the error number until the error rate or the error number is increased for at least 3 times; when the test times are less than 3, the error rate or the error number is increased, and V is setmixS32 is repeated after decreasing by 1V. Data of the bit error rate BER and the bias voltage Vr shown in fig. 5 are obtained.
Further, an optimum operating voltage V is calculated based on the obtained dataopThe BER of the bit error rate corresponding to different bias voltages Vr is expressed by an approximate unary quadratic function, as shown in fig. 6. Establishing a unitary quadratic function model y ═ ax2+ bx + c, using the working voltage value of the obtained data as an X coordinate, and using the error rate or the error code number as a Y coordinate; calculating the values of a, b and c according to the obtained data; the minimum point of y is the extreme point, where the derivative is 0, i.e. 2ax + b is 0, thenFinding the x value of the extreme point coordinate as the optimal working voltage Vop. The specific calculation process can be optimized according to actual conditions, and if the coefficient is too small, precision loss can be caused, and then the amplification and the reduction can be carried out in the intermediate calculation process.
The above disclosure is only for the purpose of illustrating the preferred embodiments of the present invention, and it is therefore to be understood that the invention is not limited by the scope of the appended claims.
Claims (8)
1. A method for judging the optimal working voltage of an Avalanche Photodiode (APD) of a 10G EPON is characterized by comprising the following steps of:
s1: obtaining the reverse breakdown voltage V of the APD according to the test data of BOSA or RSSI under no light conditionbr;
S2: setting an initial working bias voltage, selecting fixed input optical power, testing the current bit error rate or bit error number according to a preset duration, then increasing the working bias voltage by a set step value to repeat the test, testing at least 3 points until the bit error rate or the bit error number is increased, and the specific steps are as follows:
s21: setting VmixAnd VmaxAs upper and lower limits of the variation range, satisfy Vmix<Vop<Vmax<Vbr;
S22: under the condition of fixed input optical power, the test working voltage value is VmixBit error rate or number of errors in time;
s23: increasing the bias voltage value according to a fixed value, and repeatedly testing the error rate or the error code number until the error rate or the error code number is increased for at least 3 times;
s3: using the working bias as x, the error rate as y, and solving a quadratic equation of one element y as ax2+ bx + c to obtain three coefficients of a, b and c;
s4: according to the obtained three coefficients a, b and c, calculating an extreme valueObtaining a corresponding APD DAC;
s5: and carrying out sensitivity test by using the APD DAC value, if the APD DAC value passes the pass, subtracting the corresponding temperature value in the APD DAC LUK table of the current temperature from the APD DAC LUK table, translating and updating the temperature value into the APD DAC LUK, and if the APD DAC value fails to pass the pass, updating the temperature value into the APD DAC LUK.
2. The method of claim 1, wherein the initial operating bias voltage is V, the method comprises determining an optimal operating voltage for an Avalanche Photodiode (APD) of a 10G EPONbr-4V。
3. The method of claim 1, wherein the duration is 5 s.
4. The method of claim 1, wherein the step value is 0.5V.
5. The method of claim 1, wherein the method comprises determining an optimal operating voltage for an Avalanche Photodiode (APD) of a 10G EPONThen, the reverse breakdown voltage V of the APD is obtained according to the RSSI under the condition of no lightbrThe method comprises the following steps:
(1) using an initial bias voltage V0As the working voltage of APD, it is necessary to ensure all APDs, V0<VbrRX input light is set to 0, the current RSSI is tested, and I is judgedDIf the current RSSI of the current circuit is 10 muA or not, only the current flowing into the RSSI pin of the driving chip is judged whether to exceed 10 muA or not by adopting a 1: 1 current mirror, and the working voltage at the moment is Vbr;
(2) Or, for a specific driving chip, if 1LSB is defined as 0.03125 μ a/bit in the specification, only the RSSI ADC needs to be determined: F0/F1h is larger than 0140h, if RSSI ADC is smaller than 0140h, working voltage is increased by fixed step value until RSSI ADC reaches 0140h, the working voltage is Vbr。
6. The method of claim 1, wherein the reverse breakdown voltage V of the APD is obtained from BOSA test databrThe method comprises the following steps:
(1) APD V of BOSA by AIVbrMeasuring specific values and importing the measured values into a database;
(2) direct calling of V in database during debuggingbr。
7. The method of claim 1, wherein the method of selecting a fixed input optical power comprises: according to the variation trend of the error code number or the error code rate of the APD under different input optical powers, the input optical power is selected as the fixed input optical power when a larger error code rate or error code number can appear in a shorter test time.
8. The method of claim 1 wherein if the test point of step S2 is less than 3 points and the error rate increases, the initial operating bias voltage is reduced by 1V and then step S2 is repeated.
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CN110488174B (en) * | 2019-08-26 | 2021-05-04 | 上海禾赛科技股份有限公司 | Breakdown voltage testing of photodiodes |
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CN111398669B (en) * | 2020-04-13 | 2022-06-10 | 武汉光谷信息光电子创新中心有限公司 | Working voltage testing method, device, equipment and storage medium |
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