CN109547384B - Construction method for optimizing 16-QAM sequence based on m sequence - Google Patents

Construction method for optimizing 16-QAM sequence based on m sequence Download PDF

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CN109547384B
CN109547384B CN201811336068.1A CN201811336068A CN109547384B CN 109547384 B CN109547384 B CN 109547384B CN 201811336068 A CN201811336068 A CN 201811336068A CN 109547384 B CN109547384 B CN 109547384B
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sequence
qam
bit
shift register
output
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CN109547384A (en
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曾凡鑫
曾悦
何希平
张力生
宣贵新
张振宇
钱林杰
彭燕妮
晏力
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Chongqing Technology and Business University
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/3405—Modifications of the signal space to increase the efficiency of transmission, e.g. reduction of the bit error rate, bandwidth, or average power
    • H04L27/3444—Modifications of the signal space to increase the efficiency of transmission, e.g. reduction of the bit error rate, bandwidth, or average power by applying a certain rotation to regular constellations
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J13/00—Code division multiplex systems
    • H04J13/0007—Code type
    • H04J13/004—Orthogonal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J13/00—Code division multiplex systems
    • H04J13/10—Code generation
    • H04J13/12—Generation of orthogonal codes

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

The invention discloses a method for optimizing a 16-QAM sequence based on an m sequenceConstruction method, the cycle N of the obtained sequence being 2 (2)n-1), n being the order of the m-sequence. The 16-QAM sequence generated by the method has better autocorrelation sidelobe, the out-phase autocorrelation shifted to be odd is 0, and the out-phase autocorrelation shifted to be even is-2. The invention can provide a synchronization sequence for synchronization of a communication system.

Description

Construction method for optimizing 16-QAM sequence based on m sequence
Technical Field
The invention belongs to a communication sequence design and generation technology, and particularly relates to a generation method capable of realizing a 16-QAM sequence with optimized autocorrelation.
Background
Due to the diversified development of the fifth generation mobile communication service, a high requirement is put on the transmission rate of the communication system. Quadrature Amplitude Modulation (QAM) signals have very high transmission bit rates (m.and and p.v. kumar, Low-correlation sequences over the QAM constellation. ieee trans. on inf. theory, vol.54, No.2, pp.791-810, feb.2008.) and are just one of the optimized signal constellations that meet the requirements of fifth generation mobile communication systems. The QAM constellation may be classified into 16-QAM, 64-QAM, 256-QAM, etc., according to its order. As the constellation order increases, the transmission bit rate also increases rapidly, but the difficulty of implementation also increases rapidly. From an implementation point of view, 16-QAM is the easiest to implement among all QAM constellations. Thus, The 16-QAM sequence has been extensively studied and developed ([1] C.V.Chong, R.Venkataramani, and V.Tarokh, "A new constraint of 16-QAM Golay complementary Sequences." IEEE transactions. Inf.Theory, vol.49, No.11, pp.2953-2959, Nov.2003; [2] F.X.Zeng, "A complementary constraint QAM progression 16-Golay complementary Sequences." IEEE Commun.LeLee, vol.18, No.11, pp.5-1878, 2014; [3] M.Anand P.V.Kumar, "Low Correlation over The 16-constellation," protocol procedure of Jave.26, Nature sequence of The third of The fourth of The third of The fourth of The third of The fourth of.
Synchronization is one of the key techniques of communication systems, and often a sequence with good autocorrelation characteristics is used as a synchronization signal, and correlation detection techniques are usually employed to achieve synchronization. Since the autocorrelation sidelobe of the synchronization sequence has severe interference to the correlation detection, which reduces the success probability of synchronization, the synchronization sequence is served by a sequence with a very small sidelobe. The small side lobe values are 0, 1 and 2. Due to theoretical limitations of sequence design, not all of these small side lobe values necessarily have corresponding sequences. Therefore, designing sequences with optimized small side lobes is a very challenging task. The smallest possible side lobe values are known for Binary and quaternary sequences (H.D. Huke, H.D. Schotten, and H.Hadiejad-Maharam, "Binary and square sequences with optimal autocorrelation properties: A surfy." IEEE trans. Inf. Theory, vol.49, no 2, pp.3271-3282, Dec.2003.), but the smallest possible side lobe values are unknown for 16-QAM sequences.
The 16-QAM constellation is the following set of symbols:
Ω16-QAM＝{±1±j，±3±j，±1±3j，±3±3j}
wherein j is2＝-1。
Currently, the sequences on the 16-QAM constellation are: perfect 16-QAM arrays are related to Sequences (f.x.zeng, x.p.zeng, z.y.zhang, and g.x.xuan, "Perfect 16-QAM Sequences and arrays," IEEE trans. standards, vol.e95-a, No.10.oct.2012, pp.1740-1748.), zero-Correlation zone 16-QAM Sequences (fanxing, Xiaoping Zeng, Zhenyu Zhang, and Guixin x.16-QAM Sequences with Correlation zone from The knock down binding sets, standards, e.e. 94-a, 11, No. pp.2466-71, 16-QAM Sequences and Gray mapping, IEEE m.2011.e trans. seq. QAM, No. 16-c.14-m.14, c.14-c.14, c.14-c.t.c.14-c.m.c.t. n.c.t. c.14-c.t. n.c. 14, c.t. c.16-c.t. c.c. 16-c.t. c. 16-c.t. c. 11, c. No. 16, c. 16-c. 3, m. 16, c.2, m. 3, m. c.2, m. c. 3, m. 4, c. 4, c. 4, c. 4, n.p. 2, n, c. 4, m. 2, c.2, n.p. 2, n, c. 2. However, no low autocorrelation 16-QAM sequences (16-QAM sequences with low autocorrelation) exist.
Disclosure of Invention
The invention aims to provide a construction method of a 16-QAM sequence based on an m sequence, which has simple structure, easy realization and maximum absolute value of self-correlation side lobe of 2.
The invention discloses a construction method of an optimized 16-QAM sequence based on an m sequence, which comprises the following steps:
A) determining the period N-2 (2) of the required sequence according to the index required by the usern-1), n being the order of the m-sequence, and a preselected integer
Figure GSB0000192814050000023
B) According to the known generation circuit of an m-sequence of order n, the generation period is 2nAn m-sequence of-1, denoted
Figure GSB0000192814050000024
And are stored in two lengths of 2nShift register D of-11And D2；
C) Will shift register D1Right shift cyclic shift
Figure GSB0000192814050000025
The corresponding sequence of the bit is recorded as
Figure GSB0000192814050000027
Will D2Middle sequence right shift cyclic shift
Figure GSB0000192814050000026
(mod 2n-1) bits, recording the corresponding sequence in the shift register
Figure GSB0000192814050000028
D) Will shift register D1The middle sequence is output in series, and the pair i +1 (i is more than or equal to 0 and less than or equal to 2)n-2) symbols a of the secondary outputiIs converted into
Figure GSB0000192814050000021
A shift register D2The middle sequence is output in series, and the pair i +1 (i is more than or equal to 0 and less than or equal to 2)n-2) symbols b of the secondary outputiIs converted into
Figure GSB0000192814050000022
；
E) Will come from D1Transformed value of
Figure GSB0000192814050000039
Ride on
Figure GSB0000192814050000031
Namely, it is
Figure GSB0000192814050000032
Will come from D2Transformed value of
Figure GSB00001928140500000310
Ride on
Figure GSB0000192814050000033
Namely, it is
Figure GSB0000192814050000034
Thus, pair D1And D2Each bit of the output signal is output to obtain 1 16-QAM symbol;
F) synthesis of a cyclic N-2 (2)n16- -QAM sequence of-1)
Figure GSB00001928140500000311
For i +1 (i is more than or equal to 0 and less than or equal to 2)n-2) sub-outputs
Figure GSB0000192814050000035
The bit 2i, i.e.,
Figure GSB0000192814050000036
is placed at the 2i +1 th bit, i.e.,
Figure GSB0000192814050000037
the present invention will be described in detail with reference to the accompanying drawings.
Drawings
FIG. 1 is a schematic diagram of the present invention based on m-sequence optimized 16-QAM sequence;
FIG. 2 is a functional block diagram of an implementation of the shift register bank unit of FIG. 1 according to the present invention;
FIG. 3 is a functional block diagram of an implementation of the "symbol converter bank" unit of FIG. 1 according to the present invention;
Detailed Description
Fig. 1 shows a schematic block diagram of the present invention for generating optimized 16-QAM sequences based on m-sequences, and the present invention is composed of five units, i.e., "controller", "m-sequence generator", "shift register set", "symbol converter set", and "interleaver".
The function of the "controller" unit 1 is to determine the period N of the required sequence to be 2 (2) according to the user-requested indexn-1), n being the order of the m sequence and preselected for generating the desired sequence
Figure GSB0000192814050000038
In addition, the unit 1 controls the other four units to work and stop in sequence.
The function of the "m-sequencer" unit 2 is to generate a period of 2nN-order m-sequences of-1
Figure GSB00001928140500000312
There are many known methods and circuits for implementing the functions of cell 2 (p.z.fan and m.darnell, Sequence design for communications applications, John Wiley&Sons inc., 1996), one of which may be optionally used to achieve the functionality of the unit.
The principle circuit of the 'shift register group' unit 3 is shown in FIG. 2, and comprises 2 units with length of 2nShift register D of-11And D2Composition D of1And D2The generation period of each storage unit 2 is 2n1, in sequence m. Under the control of unit 1, units 2 and 3 operate simultaneously, and the other units stop. In fig. 2, switches 1 and 2 are closed, switches 3 and 4 are open, and unit 2 immediately sends D in serial order every time it generates an m-sequence symbol of one bit1And D2And (4) storing. When all the m-sequence code elements are stored, the unit 1 controls the unit 2 to stop working, and controls the unit 3 to continue working. In fig. 2, switches 1 and 2 are open and switches 3 and 4 are closed, achieving D1Right shift cyclic shift
Figure GSB0000192814050000041
Bit, D2Right shift cyclic shift
Figure GSB0000192814050000042
Bit, after completion of shift, D1The sequence of (1) is
Figure GSB00001928140500000410
D2The sequence of (1) is
Figure GSB0000192814050000043
The principle circuit of the "symbol converter group" unit 4 is shown in fig. 3 and is composed of two symbol converters and two multipliers. Unit 1 controls unit 2 to stop working and controls unit 3, unit 4 and unit 5 to work simultaneously. In fig. 2, switch 1, switch 2, switch 3 and switch 4 are open, in fig. 3, switches 1 and 2 are closed and cell 3 is sequentially switched from D1Middle output sequence
Figure GSB00001928140500000411
One bit per output ai(0≤i≤2n-2), units 4 to aiImplementing symbol conversion and performing corresponding multiplication to obtain
Figure GSB0000192814050000044
At the same time, unit 3 is sequentially driven from D2Middle output sequence
Figure GSB00001928140500000412
One bit per output bi(0≤i≤2n-2), units 4 to biImplementing symbol conversion and performing corresponding multiplication to obtain
Figure GSB0000192814050000045
The function of the interleaver unit 5 is to synthesize a period N-2 (2)n16-QAM sequence of-1)
Figure GSB00001928140500000413
Under the control of unit 1, the sequence will come from unit 4
Figure GSB0000192814050000046
(0≤i≤2n-2) placed in even numbered positions, i.e.,
Figure GSB0000192814050000047
(0≤i≤2n-2) placed in odd digits, i.e.,
Figure GSB0000192814050000048
thereby achieving a staggered arrangement of the outputs of the cells 4.
For ease of understanding, an example is described below.
Example 1A 4 th order m-sequence with a period of 15 was chosen
(0，0，0，1，0，0，1，1，0，1，0，1，1，1，1)
According to the method of the invention, a 16-QAM sequence with a period of 30 is generated;
Figure GSB0000192814050000049
the autocorrelation function of the obtained 16-QAM sequence is:
(30，0，-2，0，-2，0，-2，0，-2，0，-2，0，-2，0，-2，0，-2，0，-2，0，-2，0，-2，0，-2，0，-2，0，-2，0)。
although the present invention has been described in detail hereinabove, the present invention is not limited thereto, and various modifications can be made by those skilled in the art in light of the principle of the present invention. Thus, modifications made in accordance with the principles of the present invention should be understood to fall within the scope of the present invention.

Claims (2)

1. A construction method for optimizing a 16-QAM sequence based on an m sequence comprises the following steps:
A) determining the period N-2 (2) of the required sequence according to the index required by the usern-1), n being the order of the m-sequence, and a preselected integer
Figure FSB0000192814040000011
B) According to the known generation circuit of an m-sequence of order n, the generation period is 2nAn m-sequence of-1, denoted
Figure FSB0000192814040000012
And are stored in two lengths of 2nShift register D of-11And D2；
C) Will shift register D1Right shift cyclic shift
Figure FSB0000192814040000013
The corresponding sequence of the bit is recorded as
Figure FSB0000192814040000014
Will D2Middle sequence right shift cyclic shift
Figure FSB0000192814040000015
Bit, register corresponding sequence in shift register
Figure FSB0000192814040000016
D) Will shift register D1Serial output of the middle sequence, i +1(0 ≦i≤2n-2) symbols a of the secondary outputiIs converted into
Figure FSB0000192814040000017
Will shift register D2The middle sequence is output in series, and the pair i +1 (i is more than or equal to 0 and less than or equal to 2)n-2) symbols b of the secondary outputiIs converted into
Figure FSB0000192814040000018
E) Will come from D1Transformed value of
Figure FSB0000192814040000019
Ride on
Figure FSB00001928140400000110
Namely, it is
Figure FSB00001928140400000111
Will come from D2Transformed value of
Figure FSB00001928140400000112
Ride on
Figure FSB00001928140400000113
Namely, it is
Figure FSB00001928140400000114
Thus, pair D1And D2Each bit of the output signal is output to obtain 1 16-QAM symbol;
F) synthesis of a cyclic N-2 (2)n16-QAM sequence of-1)
Figure FSB00001928140400000115
For i +1 (i is more than or equal to 0 and less than or equal to 2)n-2) sub-outputs
Figure FSB00001928140400000116
The bit 2i, i.e.,
Figure FSB00001928140400000117
is placed at the 2i +1 th bit, i.e.,
Figure FSB00001928140400000118
2. a method according to claim 1, wherein the resulting 16-QAM sequence has autocorrelation sidelobes shifted odd by 0 out-of-phase autocorrelation and shifted even by-2 out-of-phase autocorrelation.
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