CN109509822B - Light-emitting diode with light scattering structure and ODR (optical distribution R) and preparation method thereof - Google Patents
Light-emitting diode with light scattering structure and ODR (optical distribution R) and preparation method thereof Download PDFInfo
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
- H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
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Abstract
The application relates to a light emitting diode with a light scattering structure and an ODR and a preparation method thereof. The diode allows large angles of incident light to escape the LED by total internal reflection rather than metal reflection by inserting a thicker layer of low refractive index material into the total reflector and semiconductor, and by further scattering by the scattering structure. The application can reduce the absorption of the metal reflector and increase the reflectivity, thereby improving the LEE of the LED.
Description
Technical Field
The technical scheme of the application relates to a semiconductor device, in particular to a light-emitting diode with a light scattering structure and an ODR and a preparation method thereof.
Background
The LED (Light Emitting Diode ) technology of nitride semiconductors has attracted great attention in the fields of sterilization, biomedicine, communication, illumination, etc. However, to meet the demands of commercialization, it is necessary to further improve the External Quantum Efficiency (EQE). The External Quantum Efficiency (EQE) is the product of the Internal Quantum Efficiency (IQE) and the Light Extraction Efficiency (LEE), and thus, the focus of research is on how to improve the Internal Quantum Efficiency (IQE) and the Light Extraction Efficiency (LEE). Currently, IQEs are relatively high, so the main goal is to increase the Light Extraction Efficiency (LEE) of Light Emitting Diodes (LEDs). The refractive index difference between a semiconductor material such as GaN or GaAs and air is very large, so that total internal reflection causes a small escape cone of light in the LED, and thus light extraction efficiency is low. In order to improve the light-emitting efficiency of the light-emitting diode, a light scattering structure and a total reflection mirror (ODR) structure have become two common technical means. The light scattering structures include photonic crystal structures, light-emitting surface roughening, patterned substrate and sidewall roughening, etc., which are used to increase the scattering effect of light, thereby increasing the escape cone of light and improving the light extraction efficiency. The total reflection mirror is generally composed of a Distributed Bragg Reflector (DBR) structure and a metal reflector, for example, the total reflection mirror (ODR) structure composed of an Ag reflector and a DBR is adopted in China patent No. 201510080456.8 to improve the reflectivity, and the high-low refractive index materials of the distributed Bragg reflection film system are alternately grown according to the thickness of one quarter wavelength, so that the reflectivity is improved to a certain extent. In another example, chinese patent document CN103178179 combines a Patterned Sapphire Substrate (PSS) and a total reflection mirror (ODR), and the high-low refractive index material of the bragg reflection film system is also formed by alternately growing according to the thickness of a quarter wavelength, so as to form an LED chip with a composite substrate having different refractive indexes, thereby improving the light emitting efficiency.
While the above solution effectively improves the light extraction efficiency, the DBR in the ODR structure set forth above only has high reflectivity over a range of angles, and for light at large angles, the reflection is mainly by metal mirrors, which typically have absorption, especially in the uv range, where it is difficult to find a metal mirror with high reflectivity, so that when light is reflected by the ODR below, a portion of the incident light at a large angle will be absorbed by the metal. By inserting a thicker layer of low refractive index material into the DBR and semiconductor, we can make the incident light at a large angle escape the LED by total internal reflection rather than metal reflection, and further scattering by the scattering structure. However, an evanescent field generated during total internal reflection excites metal surface plasmons (SPPs), and the absorption of SPPs by resonance also increases the metal absorption of ODR, so that the low refractive index material layer needs to have a sufficient thickness, so that evanescent wave energy during total reflection is attenuated to be small enough when reaching the metal surface, thereby reducing the absorption of the metal mirror and increasing the reflectivity. This structure only has an effect on the LED having a scattering structure, but for the conventional LED having no scattering structure, since the reflected light of a large angle cannot escape from the LED, increasing its reflectivity has no effect on light extraction.
Disclosure of Invention
The application aims to overcome the defects in the prior art and provide a light emitting diode with a light scattering structure and an ODR and a preparation method thereof. The diode allows large angles of incident light to escape the LED by total internal reflection rather than metal reflection by inserting a thicker layer of low refractive index material into the total reflector and semiconductor, and by further scattering by the scattering structure. The application can reduce the absorption of the metal reflector and increase the reflectivity, thereby improving the LEE of the LED.
In order to achieve the above object, the present application adopts the following technical scheme:
a light emitting diode having a light scattering structure and an ODR, said light emitting diode having one of three structures:
the first method comprises the following steps in sequence from bottom to top: the light-emitting diode comprises a metal reflecting layer, a DBR layer, a low refractive index dielectric layer, a substrate, a patterned substrate layer (PSS), an N-type semiconductor transmission layer, a light-emitting layer, a P-type semiconductor transmission layer, a current expansion layer and a P-type electrode; the DBR layer comprises a low refractive index layer and a high refractive index layer which are alternately grown; and the N-type semiconductor transmission layer has 10-20% of exposed part, the thickness of the exposed part is 0.5-1.5 μm, and the N-type electrode is arranged on the exposed part; the area of the N-type electrode is 10-80% of the exposed part of the N-type semiconductor transmission layer;
the second method sequentially comprises the following steps from bottom to top: the light emitting diode comprises a substrate, a patterned substrate layer, an N-type semiconductor transmission layer, a light emitting layer, a P-type semiconductor transmission layer, a current expansion layer, a low refractive index dielectric layer, a DBR layer and a metal reflection layer, wherein the DBR layer comprises a low refractive index layer and a high refractive index layer which are alternately grown; the N-type semiconductor transmission layer has 10-20% of exposed part, the thickness of the exposed part is 0.5-1.5 μm, the N-type electrode is arranged on the exposed part, and the area of the N-type electrode is 10-80% of the area of the exposed part in the N-type semiconductor transmission layer; round holes are formed in the low refractive index layer dielectric layer and the DBR layer, the aperture of the round holes is 20-100 nm, and the interval between the round holes is 10-60 nm;
third, from top to bottom, include: patterning the surface of the N-type semiconductor material layer, the N-type semiconductor transmission layer, the light-emitting layer, the P-type semiconductor transmission layer, the current expansion layer, the low refractive index dielectric layer, the DBR layer and the metal reflection layer; the surface of the patterned N-type semiconductor material layer is also provided with N-type electrodes, and the area of the N-type electrodes is 5-30% of the surface area of the patterned N-type semiconductor material layer; the DBR layer comprises a low refractive index layer and a high refractive index layer which are alternately grown; round holes are formed in the low refractive index layer dielectric layer and the DBR layer, the aperture of the round holes is 20-100 nm, and the interval between the round holes is 10-60 nm; the metal reflecting layer also covers the bottom and the side wall of the round hole.
The substrate component is alumina;
the patterned substrate (PSS) is made of aluminum oxide; the pattern is formed by a protruding pattern of a triangular array, and the period of the triangular array is the same as the protruding diameter, namely the bottoms of adjacent protrusions are contacted with each other; the height of the protrusions is 0.5-1 μm; the protrusions are hemispherical protrusions, conical protrusions, cylindrical protrusions or ridge-shaped protrusions;
the N-type semiconductor transmission layer is made of GaN, and the thickness of the N-type semiconductor transmission layer is 1-3 mu m;
the structure of the light-emitting layer is In with 4-5 periods 0.07 Ga 0.93 An N/GaN layer, wherein the thickness of the quantum barrier GaN is 7-8 nm, and the quantum well In 0.07 Ga 0.93 The thickness of N is 3-4 nm;
the P-type semiconductor transmission layer is made of GaN, and the thickness of the P-type semiconductor transmission layer is 50-100 nm;
the material of the current expansion layer is ITO, and the thickness is 10-20 nm;
the material of the low refractive index dielectric layer is SiO 2 The thickness is between one quarter of the wavelength of incident light and two wavelengths of incident light;
the DBR consists of high and low refractive index materials, and the material of the high refractive index layer is TiO 2 The material of the low refractive index layer is SiO 2 The thickness of the two materials is lambda/4 n, the two materials alternately grow, and the growth period is 0-50 pairs;
the metal reflecting layer is made of Al, and the thickness of the metal reflecting layer is 50-150 nm;
the P-type electrode is Cr/Au; the thickness is 10-200 nm;
the material of the N-type electrode is Cr/Au, the thickness is 10-200 nm, and the area is 10-80% of the exposed part of the N-type semiconductor transmission layer;
in the third diode, the material on the surface of the patterned N-type semiconductor material layer is GaN, the patterning is formed by a protruding pattern of a triangular array, and the period of the triangular array is the same as the protruding diameter, namely the bottoms of adjacent protrusions are contacted with each other; the height of the protrusions is 0.5-1 μm; the protrusions are hemispherical protrusions, conical protrusions, cylindrical protrusions or ridge-shaped protrusions;
the material of the N-type electrode in the third diode is Cr/Au, the thickness is 10-200 nm, and the area is 5-30% of the N-type semiconductor transmission layer.
The first preparation method of the light-emitting diode with the light scattering structure and the ODR comprises the following steps:
a first step of growing a mask for dry etching on a sapphire substrate by MOCVD (metal organic chemical vapor deposition) or MBE (molecular beam epitaxy) technology, and obtaining a patterned substrate by using a photolithography process and an ICP (plasma etching) technology;
sequentially growing N-type semiconductor materials on a substrate, wherein the thickness is 1-3 mu m, the growth temperature is 950 ℃, and the air pressure is 60mbar; the light-emitting layer 103 has 4 to 5 periods of In 0.07 Ga 0.93 An N/GaN layer, wherein the thickness of the quantum barrier GaN is 7-8 nm, and the quantum well In 0.07 Ga 0.93 The thickness of N is 3-4 nm; the thickness of the P-type semiconductor material is 50-100 nm, the growth temperature is 970 ℃, and the air pressure is 90mbar;
thirdly, depositing a current expansion layer on the P-type semiconductor material obtained in the second step through electron beam evaporation or magnetron sputtering, wherein the thickness of the current expansion layer is 10-20 nm; manufacturing steps through photoetching and dry etching processes, wherein the etching depth is 0.5-2 mu m, and 10-20% of the N-type semiconductor material is exposed;
preparing a low refractive index dielectric layer on the back of the sapphire substrate by adopting a PECVD (plasma enhanced chemical vapor deposition) technology, and evaporating a DBR structure on the low refractive index dielectric layer by using an electron beam, wherein the high refractive index material layer and the low refractive index material layer of the DBR structure are alternately grown according to the thickness of one quarter wavelength;
fifthly, evaporating or sputtering a metal reflecting layer on the DBR structure obtained in the fourth step, wherein the thickness is 50-150 nm;
sixthly, evaporating and photoetching to manufacture a P-type electrode, wherein the thickness of the P-type electrode is 10-200 nm;
seventh, evaporating and photoetching the exposed N-type semiconductor transmission layer to manufacture an N-type electrode, wherein the thickness is 10-200 nm, and the area is 10-80% of the exposed part of the N-type semiconductor transmission layer;
thereby obtaining a light emitting diode having a light scattering structure and an ODR.
The second preparation method of the light-emitting diode with the light scattering structure and the ODR comprises the following steps:
a first step of growing a mask for dry etching on a sapphire substrate by MOCVD (metal organic chemical vapor deposition) or MBE (molecular beam epitaxy) technology, and obtaining a patterned substrate by using a photolithography process and an ICP (plasma etching) technology;
sequentially growing N-type semiconductor materials on a substrate, wherein the thickness is 1-3 mu m, the growth temperature is 950 ℃, and the air pressure is 60mbar; the light-emitting layer 103 has 4 to 5 periods of In 0.07 Ga 0.93 An N/GaN layer, wherein the thickness of the quantum barrier GaN is 7-8 nm, and the quantum well In 0.07 Ga 0.93 The thickness of N is 3-4 nm; the thickness of the P-type semiconductor material is 50-100 nm, the growth temperature is 970 ℃, and the air pressure is 90mbar;
thirdly, depositing a current expansion layer on the P-type semiconductor material obtained in the second step through electron beam evaporation, magnetron sputtering or the like, wherein the thickness of the current expansion layer is 10-20 nm; manufacturing steps through photoetching and dry etching processes, wherein the etching depth is 0.5-2 mu m, and 10-20% of the N-type semiconductor material is exposed;
fourthly, preparing a low-refractive-index medium layer on the current expansion obtained in the third step by adopting a PECVD (plasma enhanced chemical vapor deposition) technology, and then evaporating a DBR structure on the low-refractive-index medium layer by using an electron beam, wherein high-low refractive-index material layers of the DBR structure layer are alternately grown according to the thickness of one quarter wavelength;
fifthly, manufacturing round holes on the DBR obtained in the fourth step through photoetching, wherein the aperture of the round holes is 20-100 nm, the interval between the round holes is 10-60 nm, exposing the current expansion layer 105, and evaporating a metal reflecting layer on the exposed current expansion layer, the side wall of the round holes and the DBR, wherein the thickness is 50-150 nm;
sixthly, evaporating and photoetching the exposed N-type semiconductor transmission layer to manufacture an N-type electrode, wherein the thickness is 10-200 nm, and the area is 10-80% of the exposed part of the N-type semiconductor transmission layer;
thereby obtaining a light emitting diode having a light scattering structure and an ODR.
The third preparation method of the light-emitting diode with the light scattering structure and the ODR comprises the following steps:
firstly, sequentially growing an N-type semiconductor material on a sapphire substrate by MOCVD (metal organic chemical vapor deposition) or MBE (molecular beam epitaxy) technology, wherein the thickness is 1-3 mu m, the growth temperature is 950 ℃, and the air pressure is 60mbar; the luminescent layer is In with 4-5 periods 0.07 Ga 0.93 An N/GaN layer, wherein the thickness of the quantum barrier GaN is 7-8 nm, and the quantum well In 0.07 Ga 0.93 The thickness of N is 3-4 nm; the thickness of the P-type semiconductor material is 50-100 nm, the growth temperature is 970 ℃, and the air pressure is 90mbar;
a second step of depositing a current expansion layer on the P-type semiconductor material obtained in the first step through electron beam evaporation, magnetron sputtering or the like, wherein the thickness of the current expansion layer is 10-20 nm;
preparing a low-refractive-index dielectric layer on the current expansion layer obtained in the second step by adopting a PECVD (plasma enhanced chemical vapor deposition) technology, and evaporating a DBR structure on the low-refractive-index dielectric layer by using an electron beam, wherein the high-refractive-index material layer and the low-refractive-index material layer of the DBR structure are alternately grown according to the thickness of one quarter wavelength;
fourthly, manufacturing round holes on the DBR obtained in the third step through photoetching, wherein the aperture of the round holes is 20-100 nm, the round holes are distributed in a square manner, the interval is 10-60 nm, the current expansion layer 105 is exposed, and a metal reflecting layer is evaporated on the exposed current expansion layer, the side wall of the round holes and the DBR, and the thickness is 50-150 nm;
fifthly, stripping the sapphire substrate, and carrying out photoetching and wet etching on the N-type semiconductor material to obtain the surface of the patterned N-type semiconductor material layer;
sixthly, evaporating and photoetching the surface of the N-type semiconductor material layer obtained in the fifth step to manufacture an N-type electrode, wherein the area of the N-type electrode is 5-30% of the surface area of the patterned N-type semiconductor material layer;
thereby obtaining a light emitting diode having a light scattering structure and an ODR.
The application has the substantial characteristics that:
the DBR in the prior art ODR structure has high reflectivity only in a certain angle range, and for light with large angles, the DBR mainly reflects through a metal mirror, and the metal mirror generally absorbs, so when light is reflected by the ODR below, a part of incident light with large angles will be absorbed by metal. In the application, a layer of thicker low-refractive index material is inserted into a total reflection mirror and a semiconductor mainly aiming at an LED with a scattering structure, so that incident light with a large angle escapes out of the LED after being further scattered by the scattering structure through total internal reflection instead of metal reflection. The evanescent field generated during total internal reflection excites metal surface plasmons (SPPs), the resonance absorption of the SPPs increases the metal absorption of the ODR, so that the low refractive index material layer needs to have a sufficient thickness, so that the evanescent wave energy during total reflection is attenuated to be small enough when reaching the metal surface, thereby reducing the absorption of the metal reflector, and increasing the reflectivity, so as to improve the LEE of the LED.
The beneficial effects of the application are as follows:
compared with the prior art, the application has the following outstanding substantial characteristics and remarkable progress:
the light emitting diode is characterized in that the light extraction efficiency of the LED with the light scattering structure is further improved, and the low refractive index material is inserted into the DBR and the semiconductor, so that the incident light with a large angle can escape out of the LED after being further scattered by the scattering structure through total internal reflection instead of metal reflection. However, the evanescent wave energy generated during total reflection excites metal surface plasmons (SPPs), and the absorption of SPPs by resonance also increases the metal absorption of ODR, so that the low refractive index material layer needs to have a sufficient thickness, so that the evanescent wave energy during total reflection is attenuated to be small enough when reaching the metal surface, thereby reducing the absorption of the metal reflector and increasing the reflectivity. FIGS. 5, 6 and 7 are dividedLEEs for front-mounted, flip-chip, vertical-structured LEDs employing light scattering structures (patterned substrate PSS) and total reflection mirrors (ODR) are distinguished by low refractive index layers (SiO 2 Layer) thickness. From the graph, it can be seen that the light extraction efficiency follows SiO 2 The increase in layer thickness increases before stabilizing. The wavelength of light in the simulation was 400nm, and it can be seen from the graph that when SiO 2 When the thickness of the layer reaches a wavelength, the light extraction efficiency reaches a plateau (50%).
Drawings
The application will be further described with reference to the drawings and examples.
Fig. 1 is a schematic diagram of an epitaxial structure of a front-mounted light emitting diode LED chip having only an ODR structure, i.e., without a light scattering structure.
Fig. 2 is a schematic diagram of a front-loading LED chip with a patterned substrate and a low refractive index dielectric layer with a thickness of one wavelength according to embodiment 1 of the present application.
Fig. 3 is a schematic diagram of a flip-chip light emitting diode LED chip with a patterned substrate and a low refractive index dielectric layer having a thickness of one wavelength according to the inventive approach.
FIG. 4 is a schematic diagram of a vertical flip-chip LED chip with a patterned N-type semiconductor material layer and a low refractive index dielectric layer with a thickness of one wavelength according to the method of the present application in example 3.
FIG. 5 shows LEE of the light emitting diode of the forward structure obtained in example 1 with low refractive index layer (SiO 2 Layer) thickness;
FIG. 6 shows LEE of the flip-chip structure light emitting diode obtained in example 2 with low refractive index layer (SiO 2 Layer) thickness;
FIG. 7 shows LEE of the vertical structure light emitting diode obtained in example 3 with low refractive index layer (SiO 2 Layer) thickness;
the light emitting diode comprises a substrate, a semiconductor material layer, a light emitting layer, a semiconductor material layer, a current spreading layer, a high refractive index layer, a low refractive index layer, a metal reflecting layer, a metal electrode, a patterned substrate layer, a dielectric layer, a patterned N-type semiconductor material layer and a patterned N-type semiconductor material layer.
Detailed Description
The application is further described below with reference to examples and drawings, which are not intended to limit the scope of the claims.
The embodiment shown in fig. 1 shows that the prior art front-mounted LED chip structure with ODR structure sequentially includes: the substrate 101, the N-type semiconductor transmission layer 102, the light emitting layer 103, the P-type semiconductor transmission layer 104, the current spreading layer 105, the P-type electrode 110 and the N-type electrode 109 are arranged on the back surface of the substrate, and the DBR layer and the metal reflection layer 108 are formed by the high refractive index layer 106 and the low refractive index layer 107. The ODR in this configuration is highly reflective over a range of angles, and for light at large angles, the light is reflected primarily by the metal mirror, which is generally absorptive, so that when light is reflected by the ODR below, a portion of the incident light at large angles will be absorbed by the metal.
Fig. 2-4 are provided to illustrate that the method of the present application is applicable to LEDs of all configurations having a light scattering structure, the LEDs having three configurations: an LED of a front-mounted structure (e.g., fig. 2), an LED of a flip-chip structure (e.g., fig. 3), and an LED of a vertical structure (e.g., fig. 4). Due to the different structure of the LEDs, the position of the total reflection mirror (ODR) and consequently the position of the low refractive index dielectric layer is different. The light scattering structure is not limited to the patterned substrate, and has various structures such as a photonic crystal structure, a patterned substrate structure, a surface random roughening structure or a side wall roughening structure. Two scattering structures commonly used in the industry are patterned substrate structures and surface random roughening structures. The drawings and embodiments of the present application are combined to form a light scattering structure of the present application: a patterned substrate structure.
Example 1
The structure of the front-mounted Light Emitting Diode (LED) chip with the patterned substrate and the low refractive index dielectric layer with a thickness of one wavelength in this embodiment is shown in fig. 2, and the LED chip structure sequentially includes, from bottom to top: a metal reflective layer 108, a DBR layer, a low refractive index dielectric layer 112, a substrate 101, a patterned substrate layer (PSS) 111, an N-type semiconductor transfer layer 102, a light emitting layer 103, a P-type semiconductor transfer layer 104, a current spreading layer 105, a P-type electrode 110; the DBR layer includes low refractive index layers 107 and high refractive index layers 106 alternately grown, and the growth period may be zero; the N-type semiconductor transfer layer 102 has an exposed portion having a thickness of 1 μm and an area of 10 to 20% of the area thereof, and the N-type electrode 109 is provided on the exposed portion, and the area of the N-type electrode 109 is 10 to 80% of the area of the exposed portion of the N-type semiconductor transfer layer 102.
The middle substrate 101 is made of sapphire, and the sapphire substrate is made of alumina;
the patterned substrate (PSS) 111 is formed by patterning the surface of the sapphire substrate by photolithography and etching techniques. Patterned into a pattern of triangular array of protrusions, the period of the triangular array (i.e., the distance between the centers of two adjacent protrusions) being the same as the diameter of the protrusions, i.e., the bottoms of adjacent protrusions contacting each other, the protrusions comprising hemispherical protrusions, conical protrusions, cylindrical protrusions, or ridged protrusions. The embodiment uses conical protrusions, the bottom of each cone is contacted with the adjacent cone, the height of the cone is the same as the bottom diameter of the cone, and the cone is fixed at 0.5 mu m;
the material of the N-type semiconductor transmission layer 102 is GaN, and the thickness is 3 μm;
the light-emitting layer 103 has a structure of 5 periods of In 0.07 Ga 0.93 An N/GaN layer, wherein the thickness of the quantum barrier GaN is 8nm, and a quantum well In 0.07 Ga 0.93 N has a thickness of 4nm;
the material of the P-type semiconductor transmission layer 104 is GaN, and the thickness is 50nm;
the material of the current spreading layer 105 is ITO, and the thickness is 10nm;
the material of the low refractive index dielectric layer 112 is SiO 2 The thickness is one wavelength of emitted light;
the material of the high refractive index layer 106 is TiO 2 The material of the low refractive index layer 107 is SiO 2 The thickness is lambda/4 n, the two materials alternately grow, and the growth period is 20 pairs;
the material of the metal reflecting layer 108 is Al, and the thickness is 100nm;
the material of the P-type electrode 110 is Cr/Au, and the thickness is 100nm;
the material of the N-type electrode 109 is Cr/Au, the thickness is 100nm, and the area is 60% of the exposed part of the N-type semiconductor transmission layer;
the preparation method of the positive-loading light-emitting diode (LED) chip structure with the patterned substrate and the low-refractive-index dielectric layer with the thickness of one wavelength comprises the following steps:
firstly, growing a mask for dry etching on a sapphire substrate by MOCVD (metal organic chemical vapor deposition) or MBE (molecular beam epitaxy) technology, and obtaining a conical protruding sapphire patterned substrate layer 111 by using standard photoetching technology and ICP (plasma etching) technology, wherein the bottom of each cone is contacted with an adjacent cone, and the height of the cone and the bottom diameter of the cone are fixed at 0.5 mu m;
secondly, growing N-type semiconductor material 102 on the substrate in sequence, wherein the thickness is 3 mu m, the growth temperature is 950 ℃, and the air pressure is 60mbar; the light-emitting layer 103 was 5 periods of In 0.07 Ga 0.93 An N/GaN layer, wherein the thickness of the quantum barrier GaN is 8nm, and a quantum well In 0.07 Ga 0.93 N has a thickness of 4nm; the thickness of the P-type semiconductor material 104 is 50nm, the growth temperature is 970 ℃, and the air pressure is 90mbar;
third, depositing a current spreading layer 105 on the P-type semiconductor material 104 obtained in the second step through electron beam evaporation, magnetron sputtering or the like, wherein the thickness of the current spreading layer is 50nm; steps are manufactured through photoetching and dry etching processes, the etching depth is 2 mu m, and 20% of the N-type semiconductor material 102 is exposed;
fourthly, preparing a low refractive index dielectric layer 112 with the thickness of one wavelength on the back surface of the sapphire substrate by adopting a PECVD (plasma enhanced chemical vapor deposition) technology, and evaporating a DBR structure on the low refractive index dielectric layer by using an electron beam, wherein the DBR layer is formed by alternately growing high and low refractive index material layers according to the thickness of one quarter wavelength;
fifth, evaporating or sputtering Al metal reflecting layer 108 on the DBR structure obtained in the fourth step, wherein the thickness is 100nm;
sixth, P-type electrode 110 and N-type electrode 109 are fabricated by vapor deposition and photolithography.
Thus, a front-loading Light Emitting Diode (LED) chip structure with a patterned substrate and a low refractive index dielectric layer with a thickness of one wavelength is obtained.
The LEE of the diode of the positive-mount structure obtained according to the structure of this example follows the low refractive index layer (SiO 2 Layer) thickness is shown in FIG. 5, it can be seen from the graph that when SiO 2 When the layer reaches a thickness of one wavelength, the light extraction efficiency reaches a plateau value (49%), so that SiO 2 The layer thickness is selected to be one wavelength. Therefore, evanescent wave energy in total reflection can be attenuated to be small enough when reaching the metal surface, so that the absorption of the metal reflector is reduced, the reflectivity is increased, and the light extraction efficiency is improved.
Example 2
The structure of the flip-chip light emitting diode LED chip with the patterned substrate and the low refractive index dielectric layer with a thickness of one wavelength in this embodiment is shown in fig. 3, and includes, in order from bottom to top: the light emitting diode comprises a substrate 101, a patterned substrate layer 111, an N-type semiconductor transmission layer 102, a light emitting layer 103, a P-type semiconductor transmission layer 104, a current expansion layer 105, a low refractive index dielectric layer 112, a DBR layer and a metal reflection layer 108, wherein the DBR layer comprises a low refractive index layer 107 and a high refractive index layer 106 which are alternately grown, and the growth period can be zero; the N-type semiconductor transmission layer 102 has an exposed part with 10-20% of the area of the N-type semiconductor transmission layer 102, the thickness is 1 mu m, the N-type electrode 109 is arranged on the N-type semiconductor transmission layer, and the area of the N-type electrode 109 is 10-80% of the area of the exposed part in the N-type semiconductor transmission layer 102; and round holes are arranged on the low refractive index layer dielectric layer 112 and the DBR layer, the aperture of the round holes is 20-100 nm, the round holes are distributed in square arrays, and the interval is 10-60 nm. The intervals are the same from front to back, left to right.
The patterned substrate layer (PSS) 111 described above is patterned on the surface of the sapphire substrate by photolithography and etching techniques. Patterned into a pattern of triangular array of protrusions, the period of the triangular array (i.e., the distance between the centers of two adjacent protrusions) being the same as the diameter of the protrusions, i.e., the bottoms of adjacent protrusions contacting each other, the protrusions comprising hemispherical protrusions, conical protrusions, cylindrical protrusions, or ridged protrusions. The embodiment uses conical protrusions, the bottom of each cone is contacted with the adjacent cone, the height of the cone is the same as the bottom diameter of the cone, and the cone is fixed at 0.5 mu m;
the material of the N-type semiconductor transmission layer 102 is GaN, and the thickness is 3 μm;
the light-emitting layer 103 has a structure of 5 periods of In 0.07 Ga 0.93 An N/GaN layer, wherein the thickness of the quantum barrier GaN is 8nm, and a quantum well In 0.07 Ga 0.93 N has a thickness of 4nm;
the material of the P-type semiconductor transmission layer 104 is GaN, and the thickness is 50nm;
the material of the current spreading layer 105 is ITO, and the thickness is 10nm;
the material of the low refractive index dielectric layer 112 is SiO 2 The thickness is one wavelength of emitted light;
the material of the high refractive index layer 106 is TiO 2 The material of the low refractive index layer 107 is SiO 2 The thickness is lambda/4 n, the two materials alternately grow, and the growth period is 20 pairs;
the material of the metal reflecting layer 108 is Al, and in the flip-chip structure, the thickness is 100nm;
the material of the N-type electrode 109 is Cr/Au, the thickness is 100nm, and the area is 60% of the exposed part of the N-type semiconductor transmission layer;
the preparation method of the flip-chip light-emitting diode (LED) chip structure with the patterned substrate and the low-refractive-index dielectric layer with the thickness of one wavelength comprises the following steps:
firstly, growing a mask for dry etching on a sapphire substrate by MOCVD (metal organic chemical vapor deposition) or MBE (molecular beam epitaxy) technology, and obtaining a conical protruding sapphire patterned substrate layer 111 by using standard photoetching technology and ICP (plasma etching) technology, wherein the bottom of each cone is contacted with an adjacent cone, and the height of the cone and the bottom diameter of the cone are fixed at 0.5 mu m;
secondly, growing N-type semiconductor material 102 on the substrate in sequence, wherein the thickness is 3 mu m, the growth temperature is 950 ℃, and the air pressure is 60mbar; the light-emitting layer 103 was 5 periods of In 0.07 Ga 0.93 N/GaN layer in which GaN is quantum-barrierThickness of 8nm, quantum well In 0.07 Ga 0.93 N has a thickness of 4nm; the thickness of the P-type semiconductor material 104 is 50nm, the growth temperature is 970 ℃, and the air pressure is 90mbar;
third, depositing a current spreading layer 105 on the P-type semiconductor material 104 obtained in the second step through electron beam evaporation, magnetron sputtering or the like, wherein the thickness of the current spreading layer is 50nm; steps are manufactured through photoetching and dry etching processes, the etching depth is 2 mu m, and 20% of the N-type semiconductor material 102 is exposed;
fourth, preparing a low refractive index dielectric layer 112 with a thickness of one wavelength on the current expansion 105 obtained in the third step by adopting PECVD (plasma enhanced chemical vapor deposition) technology, and evaporating a DBR structure on the low refractive index dielectric layer by using an electron beam, wherein the DBR layer is formed by alternately growing high and low refractive index material layers according to the thickness of one quarter wavelength;
fifthly, manufacturing round holes on the DBR obtained in the fourth step through photoetching, wherein the aperture of the round holes is 50nm, the interval between the round holes is 50nm, exposing the current expansion layer 105, and evaporating a metal reflecting layer 108 on the exposed current expansion layer 105, the side wall of the round holes and the DBR, and the thickness is 100nm;
in the sixth step, an N-type electrode 109 is produced by vapor deposition and photolithography, the thickness is 100nm, and the area is 60% of the exposed portion of the N-type semiconductor transfer layer.
Thus, a flip-chip Light Emitting Diode (LED) chip structure with a patterned substrate and a low refractive index dielectric layer with a thickness of one wavelength is obtained.
LEEs of the flip-chip diode obtained according to the structure of this example were modified with a low refractive index layer (SiO 2 Layer) thickness is shown in FIG. 6, the wavelength of light in the simulation is 400nm, and it can be seen from the graph that when SiO 2 When the layer reaches a wavelength thickness, the light extraction efficiency reaches a plateau value (48%), so that SiO 2 The layer thickness is selected to be one wavelength. Therefore, evanescent wave energy in total reflection can be attenuated to be small enough when reaching the metal surface, so that the absorption of the metal reflector is reduced, the reflectivity is increased, and the light extraction efficiency is improved.
Example 3
The vertical flip-chip Light Emitting Diode (LED) chip structure with a patterned N-type semiconductor material layer and a low refractive index dielectric layer with a thickness of one wavelength in this embodiment is shown in fig. 4, and includes, from top to bottom: patterning the N-type semiconductor material layer surface 113, the N-type semiconductor transfer layer 102, the light emitting layer 103, the P-type semiconductor transfer layer 104, the current spreading layer 105, the low refractive index dielectric layer 112, the DBR layer and the metal reflective layer 108; the surface 113 of the patterned N-type semiconductor material layer is also distributed with N-type electrodes 109, and the area of the N-type electrodes 109 is 20% of the area of the surface 113 of the patterned N-type semiconductor material layer; the DBR layer includes low refractive index layers 107 and high refractive index layers 106 alternately grown, and the growth period may be zero; round holes are formed in the low refractive index layer dielectric layer 112 and the DBR layer, the aperture of the round holes is 20-100 nm, the round holes are distributed in a square manner, and the interval is 10-60 nm. The metal reflective layer 108 is finally evaporated to the bottom and side walls of the circular hole after punching, so that the circular hole is naturally formed.
The material of the N-type semiconductor transmission layer 102 is GaN, the thickness is 3 μm, and then the patterned N-type semiconductor material layer surface 113 is obtained by photolithography and wet etching, and patterned into a pattern composed of triangular array of protrusions, wherein the period of the triangular array (i.e. the distance between the centers of two adjacent protrusions) is the same as the diameter of the protrusions, i.e. the bottoms of the adjacent protrusions are in contact with each other, and the protrusions include hemispherical protrusions, conical protrusions, cylindrical protrusions or ridge protrusions. The embodiment uses conical protrusions, the bottom of each cone is contacted with the adjacent cone, the height of the cone is the same as the bottom diameter of the cone, and the cone is fixed at 0.5 mu m;
the light-emitting layer 103 has a structure of 5 periods of In 0.07 Ga 0.93 An N/GaN layer, wherein the thickness of the quantum barrier GaN is 8nm, and a quantum well In 0.07 Ga 0.93 N has a thickness of 4nm;
the material of the P-type semiconductor transmission layer 104 is GaN, and the thickness is 50nm;
the material of the current spreading layer 105 is ITO, and the thickness is 10nm;
the material of the low refractive index dielectric layer 112 is SiO 2 The thickness is one wavelength of emitted light;
high-foldingThe material of the emissivity layer 106 is TiO 2 The material of the low refractive index layer 107 is SiO 2 The thickness is lambda/4 n, the two materials alternately grow, and the growth period is 20 pairs;
the material of the metal reflecting layer 108 is Al, and the thickness of the metal reflecting layer is 100nm as an electrode in a vertical flip-chip structure;
the material of the N-type electrode 109 was Cr/Au, the thickness was 100nm, and the area was 20% of the N-type semiconductor transfer layer.
The vertical flip-chip light-emitting diode (LED) chip structure with the patterned N-type semiconductor material layer surface and the low-refractive-index dielectric layer with the thickness of one wavelength comprises the following preparation method:
firstly, sequentially growing an N-type semiconductor material 102 on a sapphire substrate by MOCVD (metal organic chemical vapor deposition) or MBE (molecular beam epitaxy) technology, wherein the thickness is 3 mu m, the growth temperature is 950 ℃, and the air pressure is 60mbar; the light-emitting layer 103 was 5 periods of In 0.07 Ga 0.93 An N/GaN layer, wherein the thickness of the quantum barrier GaN is 8nm, and a quantum well In 0.07 Ga 0.93 N has a thickness of 4nm; the thickness of the P-type semiconductor material 104 is 50nm, the growth temperature is 970 ℃, and the air pressure is 90mbar;
a second step of depositing a current spreading layer 105 on the P-type semiconductor material 104 obtained in the first step by electron beam evaporation or magnetron sputtering, etc., to a thickness of 50nm;
thirdly, preparing a low refractive index medium layer 112 on the current expansion layer obtained in the second step by adopting a PECVD (plasma enhanced chemical vapor deposition) technology, wherein the thickness is one wavelength, evaporating a DBR structure on the low refractive index medium layer by using an electron beam, and alternately growing high and low refractive index material layers of the DBR structure according to the thickness of one quarter wavelength;
fourthly, manufacturing round holes on the DBR obtained in the third step through photoetching, wherein the aperture of the round holes is 50nm, the round holes are distributed in a square manner and are 50nm apart, exposing the current expansion layer 105, and evaporating a metal reflecting layer 108 on the exposed current expansion layer 105, the side wall of the round holes and the DBR, wherein the thickness is 100nm;
step five, peeling off the sapphire substrate, and carrying out photoetching and wet etching on the N-type semiconductor material 102 to obtain a patterned N-type semiconductor material layer surface 113, wherein the bottom of each cone is contacted with an adjacent cone, the height of the cone is the same as the bottom diameter of the cone, and the cone is fixed at 0.5 mu m;
and a sixth step of vapor-depositing and photolithography the patterned N-type semiconductor material layer surface 113 obtained in the fifth step to produce an N-type electrode 109 having a thickness of 100nm and an area of 20% of the N-type semiconductor transfer layer.
Thus, a vertical flip-chip Light Emitting Diode (LED) chip structure with a patterned N-type semiconductor material layer surface and a low refractive index dielectric layer with a thickness of one wavelength is obtained.
The LEEs of the vertical structure diode obtained according to the structure of this example are dependent on the refractive index layer (SiO 2 Layer) thickness is shown in FIG. 7, the wavelength of light in the simulation is 400nm, and it can be seen from the graph that when SiO 2 When the layer reaches a wavelength thickness, the light extraction efficiency reaches a plateau value (51%), so that SiO 2 The layer thickness is selected to be one wavelength. Therefore, evanescent wave energy in total reflection can be attenuated to be small enough when reaching the metal surface, so that the absorption of the metal reflector is reduced, the reflectivity is increased, and the light extraction efficiency is improved.
The embodiment can achieve that the patterned light-emitting surface structure changes the propagation route of light emitted by the active region, reduces the probability of total reflection, enhances light scattering and enables more light to escape into the air; by inserting a thicker layer of low refractive index material into the DBR and the semiconductor, more light escapes from the LED through total reflection instead of metal reflection, so that the absorption of a metal reflector is reduced, the reflectivity is increased, the light extraction efficiency of the LED is improved, and the method has the advantages of strong operability, simple process, low cost and easy realization.
The raw materials involved in the application can be obtained by known methods, and the operation process in the preparation method can be mastered by a person skilled in the art.
The application is applicable to the prior art where it is not described.
Claims (2)
1. A light emitting diode having a light scattering structure and an ODR, wherein the light emitting diode is a light emitting diode having the structure:
the method sequentially comprises the following steps of: the light-emitting diode comprises a metal reflecting layer, a DBR layer, a low refractive index dielectric layer, a substrate, a patterned substrate layer (PSS), an N-type semiconductor transmission layer, a light-emitting layer, a P-type semiconductor transmission layer, a current expansion layer and a P-type electrode; the DBR layer comprises a low refractive index layer and a high refractive index layer which are alternately grown; and the N-type semiconductor transmission layer has an exposed part with the area of 10-20% and the thickness of 0.5-1.5 μm, and an N-type electrode is arranged on the exposed part; the area of the N-type electrode is 10-80% of the exposed part of the N-type semiconductor transmission layer;
the substrate component is alumina;
the patterned substrate (PSS) is made of aluminum oxide; the pattern is formed by a protruding pattern of a triangular array, and the period of the triangular array is the same as the protruding diameter, namely the bottoms of adjacent protrusions are contacted with each other; the height of the protrusions is 0.5-1 μm; the protrusions are hemispherical protrusions, conical protrusions, cylindrical protrusions or ridge-shaped protrusions;
the N-type semiconductor transmission layer is made of GaN, and the thickness of the N-type semiconductor transmission layer is 1-3 mu m;
the structure of the light-emitting layer is In with 4-5 periods 0.07 Ga 0.93 An N/GaN layer, wherein the thickness of the quantum barrier GaN is 7-8 nm, and the quantum well In 0.07 Ga 0.93 The thickness of N is 3-4 nm;
the P-type semiconductor transmission layer is made of GaN, and the thickness of the P-type semiconductor transmission layer is 50-100 nm;
the material of the current expansion layer is ITO, and the thickness is 10-20 nm;
the material of the low refractive index dielectric layer is SiO 2 The thickness is between one quarter of the wavelength of incident light and two wavelengths of incident light;
the DBR layer is composed of high and low refractive index materials, and the material of the high refractive index layer is TiO 2 The material of the low refractive index layer is SiO 2 The thickness of the two materials is lambda/4 n, and the two materials alternately grow and grow aroundThe period is 0-50 pairs;
the metal reflecting layer is made of Al, and the thickness of the metal reflecting layer is 50-150 nm;
the P-type electrode is made of Cr/Au; the thickness is 10-200 nm;
the material of the N-type electrode is Cr/Au, and the thickness is 10-200 nm.
2. The method of manufacturing a light emitting diode having a light scattering structure and an ODR according to claim 1, comprising the steps of:
first, growing a mask for dry etching on a sapphire substrate by MOCVD (metal organic chemical vapor deposition) or MBE (molecular beam epitaxy) technology, and obtaining protrusions by a photolithography process and ICP (plasma etching) technology, wherein the protrusions form a pattern to obtain a patterned substrate;
sequentially growing N-type semiconductor materials on a substrate, wherein the thickness is 1-3 mu m, the growth temperature is 950 ℃, and the air pressure is 60mbar; the luminescent layer is In with 4-5 periods 0.07 Ga 0.93 An N/GaN layer, wherein the thickness of the quantum barrier GaN is 7-8 nm, and the quantum well In 0.07 Ga 0.93 The thickness of N is 3-4 nm; the thickness of the P-type semiconductor material is 50-100 nm, the growth temperature is 970 ℃, and the air pressure is 90mbar;
thirdly, depositing a current expansion layer on the P-type semiconductor material obtained in the second step through electron beam evaporation or magnetron sputtering, wherein the thickness of the current expansion layer is 10-20 nm; manufacturing steps through photoetching and dry etching processes, wherein the etching depth is 0.5-2 mu m, and 10-20% of the N-type semiconductor material is exposed;
preparing a low refractive index dielectric layer on the back of the sapphire substrate by adopting a PECVD (plasma enhanced chemical vapor deposition) technology, and evaporating a DBR structure on the low refractive index dielectric layer by using an electron beam, wherein the high refractive index material layer and the low refractive index material layer of the DBR structure are alternately grown according to the thickness of one quarter wavelength;
fifthly, evaporating or sputtering an Al metal reflecting layer on the DBR structure obtained in the fourth step, wherein the thickness is 50-150 nm;
sixthly, evaporating and photoetching to manufacture a P-type electrode, wherein the thickness of the P-type electrode is 10-200 nm;
seventh, evaporating and photoetching the exposed N-type semiconductor transmission layer to manufacture an N-type electrode, wherein the thickness is 10-200 nm, and the area is 10-80% of the exposed part of the N-type semiconductor transmission layer;
thereby obtaining a light emitting diode having a light scattering structure and an ODR.
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