CN109509822A - A kind of light emitting diode and preparation method thereof with light scattering structure and ODR - Google Patents
A kind of light emitting diode and preparation method thereof with light scattering structure and ODR Download PDFInfo
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- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
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- H—ELECTRICITY
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- H—ELECTRICITY
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Abstract
The present invention is a kind of light emitting diode and preparation method thereof with light scattering structure and ODR.The diode in total reflection mirror and semiconductor by being inserted into one layer of thicker low-index material, to escape out LED after the further scattering for making the incident light of wide-angle by total internal reflection Nonmetallic reflective, and passing through diffusing structure.The present invention can reduce the absorption of metallic mirror, and reflectivity increases, to improve the LEE of LED.
Description
Technical field
Technical solution of the present invention is related to semiconductor devices, specifically a kind of hair with light scattering structure and ODR
Optical diode and preparation method thereof.
Background technique
LED (Light Emitting Diode, light emitting diode) technology of nitride-based semiconductor is in sterilizing, biology
The powerful application potential in the fields such as medicine, communication and illumination causes the extensive concern of people.But to meet wanting for commercialization
It asks, it is also necessary to further increase its external quantum efficiency (EQE).External quantum efficiency (EQE) is internal quantum efficiency (IQE) and light extraction
The product of efficiency (LEE), therefore, the emphasis of research are how to improve internal quantum efficiency (IQE) and light extraction efficiency (LEE).Mesh
Before, IQE is relatively high, therefore main target is to improve the light extraction efficiency (LEE) of light emitting diode (LED).Semiconductor material
The refringence of such as GaN or GaAs and air are very big, thus total internal reflection result in light in LED escape cone it is small, from
And light extraction efficiency is low.In order to improve the light extraction efficiency of light emitting diode, light scattering structure and total reflection mirror (ODR) structure are
Become common two kinds of technological means.Light scattering structure includes photon crystal structure, light-emitting surface roughening, patterned substrate and side
Wall roughening etc., these structures are used to increase the scattering process of light, to increase the escape cone of light and improve light extraction efficiency.And
Usual total reflection mirror is made of distribution Bragg reflector (DBR) structure and metallic mirror, such as Chinese invention patent
CN201510080456.8 uses total reflection mirror (ODR) structure that Ag reflecting mirror and DBR are formed to improve reflectivity, is distributed
The high low-index material of Bragg reflection membrane system is formed according to quarter-wave thickness alternating growth, to a certain degree
On increase reflectivity.For another example Chinese invention patent file CN103178179 by graphical sapphire substrate (PSS) and is totally reflected
Mirror (ODR) combines, and the high low-index material of Bragg reflection membrane system is also to hand over according to quarter-wave thickness
It is formed for growth, the LED chip with the compound substrate of different refractivity is formed, to improve luminous efficiency.
Although above-mentioned solution effectively improves light extraction efficiency, but the DBR in the ODR structure being set forth above is only
It is to have high reflectance in certain angle range, the light big for angle is mainly reflected by metallic mirror, and metal
Reflecting mirror is usually present absorption, especially in ultraviolet band, is difficult to find the metallic mirror of high reflectance, so light is by under
When the ODR reflection in face, the incident light of wide-angle is by some by Metal absorption.We in DBR and semiconductor by being inserted into
One layer of thicker low-index material, so as to make the incident light of wide-angle by total internal reflection Nonmetallic reflective, and passes through
LED is escaped out after the further scattering of diffusing structure.But the evanscent field generated when total internal reflection can excite metal surface etc. from
Daughter excimer (SPPs), SPPs RESONANCE ABSORPTION also will increase the Metal absorption of ODR, therefore low refractive index material layer needs enough
Thickness, thus make total reflection when evanescent wave energy reach metal surface when can decay to it is sufficiently small, so that it is anti-to reduce metal
The absorption of mirror is penetrated, reflectivity increases.This structure only has effect to the LED for having diffusing structure, and for traditional no scattering
The LED of structure, since the reflected light of wide-angle can not all escape LED, so increasing its reflectivity to light extraction to no effect.
Summary of the invention
It is a kind of with light scattering structure and ODR it is an object of the present invention to provide for deficiency present in current techniques
Light emitting diode and preparation method thereof.The diode in total reflection mirror and semiconductor by being inserted into one layer of thicker low-refraction
Material to make the incident light of wide-angle by total internal reflection Nonmetallic reflective, and passes through the further scattering of diffusing structure
After escape out LED.The present invention can reduce the absorption of metallic mirror, and reflectivity increases, to improve the LEE of LED.
To achieve the goals above, it is as follows to solve technical solution used by the technical problem by the present invention:
A kind of light emitting diode with light scattering structure and ODR, the light emitting diode are to have following three kinds of structures
One of light emitting diode:
The first, successively includes: metallic reflector, DBR layer, low refractive index dielectric layer, substrate, graphical lining from the bottom to top
Bottom (PSS), N-type semiconductor transport layer, luminescent layer, P-type semiconductor transport layer, current extending, P-type electrode；Described
DBR layer includes the low-index layer and high refractive index layer of alternating growth；Also, there are 10~20% for N-type semiconductor transport layer
Exposed portion, exposed portion with a thickness of 0.5~1.5 μm, have N-type electrode above；The area of the N-type electrode is N-type
The 10~80% of exposed portion in semiconductor transport layer；
Second, successively include: substrate, patterned substrate layer, N-type semiconductor transport layer, luminescent layer, P- from the bottom to top
Type semiconductor transport layer, current extending, low refractive index dielectric layer, DBR layer, metallic reflector, the DBR layer include alternating
The low-index layer and high refractive index layer of growth；There are 10~20% exposed portion, exposed portions for N-type semiconductor transport layer
With a thickness of 0.5~1.5 μm, have N-type electrode above, the area of the N-type electrode is to expose in N-type semiconductor transport layer
Reveal the 10~80% of area；Also, it is equipped with circular hole in the low-index layer dielectric layer and DBR layer, circular hole aperture is
20~100nm is divided into 10~60nm between circular hole；
The third, from top to bottom successively include: graphical N-type semiconductor material layer surface, N-type semiconductor transport layer,
Luminescent layer, P-type semiconductor transport layer, current extending, low refractive index dielectric layer, DBR layer and metallic reflector；The figure
N-type electrode is also distributed in shape N-type semiconductor material layer surface, and the area of N-type electrode is graphical N-type semiconductor material
The 5~30% of layer surface area；The DBR layer includes the low-index layer and high refractive index layer of alternating growth；Described low
Index layer dielectric layer and DBR layer are equipped with circular hole, and circular hole aperture is 20~100nm, are divided into 10~60nm between circular hole；Metal is anti-
It penetrates layer while being also covered in circular hole bottom and side wall.
The sixbstrate components are aluminium oxide；
The material of the patterned substrate (PSS) is aluminium oxide；The protrusion figure being patterned by triarray
Case composition, the period of triarray is identical as protrusion diameter, i.e., adjacent protrusion bottom contacts with each other；The height of protrusion is 0.5
~1 μm；The protrusion is hemispherical protrusion, conical papilla, cylindrical protrusion or ridge projections；
The material of the N-type semiconductor transport layer is GaN, with a thickness of 1~3 μm；
The structure of the luminescent layer is the In in 4~5 periods0.07Ga0.93N/GaN layers, wherein quantum builds the thickness of GaN
For 7~8nm, Quantum Well In0.07Ga0.93N with a thickness of 3~4nm；
The material of the P-type semiconductor transport layer is GaN, with a thickness of 50~100nm；
The material of the current extending is ITO, with a thickness of 10~20nm；
The material of the low refractive index dielectric layer is SiO2, thickness is between a quarter lambda1-wavelength and two incidences
Between optical wavelength；
The DBR is made of high and low refractive index material, and the material of high refractive index layer is TiO2, the material of low-index layer
Material is SiO2, the two thickness is λ/4n, and two kinds of material alternating growths, growth cycle is 0~50 pair；
The material of the metallic reflector is Al, with a thickness of 50~150nm；
The P-type electrode is Cr/Au；10~200nm of thickness；
The material of the N-type electrode is Cr/Au, and 10~200nm of thickness, area is that N-type semiconductor transport layer exposes to the open air
Partial 10~80%；
In the third described diode, the material of graphical N-type semiconductor material layer surface is GaN, the figure
It turns to and is made of the projection pattern of triarray, the period of triarray is identical as protrusion diameter, i.e., adjacent protrusion bottom phase
Mutually contact；The height of protrusion is 0.5~1 μm；The protrusion is hemispherical protrusion, conical papilla, cylindrical protrusion or ridge
Shape protrusion；
The material of N-type electrode described in the third described diode is Cr/Au, with a thickness of 10~200nm, area
It is the 5~30% of N-type semiconductor transport layer.
The preparation method of light emitting diode of the first described with light scattering structure and ODR, comprising the following steps:
The first step is existed by MOCVD (metallo-organic compound chemical gaseous phase deposition) or MBE (molecular beam epitaxy) technology
Grown on Sapphire Substrates dry etching exposure mask is graphically served as a contrast with photoetching process and ICP (plasma etching) technology
Bottom；
Second step successively grows N-type semiconductor material on substrate, and with a thickness of 1~3 μm, growth temperature is 950 DEG C, gas
Pressure is 60mbar；Luminescent layer 103 is the In in 4~5 periods0.07Ga0.93N/GaN layers, wherein quantum build GaN with a thickness of 7~
8nm, Quantum Well In0.07Ga0.93N with a thickness of 3~4nm；P-type semiconductor material, with a thickness of 50~100nm, growth temperature is
970 DEG C, air pressure 90mbar；
Third step passes through electron beam evaporation or magnetron sputtering deposition current on the P-type semiconductor material that second step obtains
Extension layer, with a thickness of 10~20nm；Step is made by photoetching and dry etch process, etching depth is 0.5~2 μm, is exposed to the open air
10~20% N-type semiconductor material out；
4th step is prepared at the Sapphire Substrate back side using PECVD (plasma enhanced chemical vapor deposition method) technology
One layer of low refractive index dielectric layer, then electron beam evaporation plating dbr structure is used on low refractive index dielectric layer, dbr structure layer height reflects
Rate material layer is formed according to quarter-wave thickness alternating growth；
5th step, vapor deposition or splash-proofing sputtering metal reflecting layer on the dbr structure that the 4th step obtains, with a thickness of 50~150nm；
6th step, is deposited and optical graving makes P-type electrode, with a thickness of 10~200nm；
7th step, the vapor deposition and optical graving makes N-type electrode on the N-type semiconductor transport layer exposed to the open air, thickness 10~
200nm, area are the 10~80% of N-type semiconductor transport layer exposed portion；
Thus the light emitting diode with light scattering structure and ODR is obtained.
Described second has the preparation method of light scattering structure and the light emitting diode of ODR, comprising the following steps:
The first step is existed by MOCVD (metallo-organic compound chemical gaseous phase deposition) or MBE (molecular beam epitaxy) technology
Grown on Sapphire Substrates dry etching exposure mask is graphically served as a contrast with photoetching process and ICP (plasma etching) technology
Bottom；
Second step successively grows N-type semiconductor material on substrate, and with a thickness of 1~3 μm, growth temperature is 950 DEG C, gas
Pressure is 60mbar；Luminescent layer 103 is the In in 4~5 periods0.07Ga0.93N/GaN layers, wherein quantum build GaN with a thickness of 7~
8nm, Quantum Well In0.07Ga0.93N with a thickness of 3~4nm；P-type semiconductor material, with a thickness of 50~100nm, growth temperature is
970 DEG C, air pressure 90mbar；
Third step passes through the deposition electricity such as electron beam evaporation or magnetron sputtering on the P-type semiconductor material that second step obtains
Extension layer is flowed, with a thickness of 10~20nm；Step is made by photoetching and dry etch process, etching depth is 0.5~2 μm, is exposed
Expose 10~20% N-type semiconductor material；
4th step uses PECVD (plasma enhanced chemical vapor deposition method) in the current expansion that third step obtains
Technology prepares low refractive index dielectric layer, then electron beam evaporation plating dbr structure is used on low refractive index dielectric layer, dbr structure layer height
Refractive index material is formed according to quarter-wave thickness alternating growth；
5th step, by photoetching making circular hole on the DBR that the 4th step obtains, circular hole aperture is 20~100nm, between circular hole
Be divided into 10~60nm, expose current extending 105, and expose current extending, evaporation metal on circular hole side wall and DBR
Reflecting layer, with a thickness of 50~150nm；
6th step is deposited on the N-type semiconductor transport layer exposed to the open air and optical graving makes N-type electrode, with a thickness of 10
~200nm, area are the 10~80% of N-type semiconductor transport layer exposed portion；
Thus the light emitting diode with light scattering structure and ODR is obtained.
The preparation method of the third light emitting diode with light scattering structure and ODR, comprising the following steps:
The first step is existed by MOCVD (metallo-organic compound chemical gaseous phase deposition) or MBE (molecular beam epitaxy) technology
N-type semiconductor material is successively grown in Sapphire Substrate, with a thickness of 1~3 μm, growth temperature is 950 DEG C, air pressure 60mbar；
Luminescent layer is the In in 4~5 periods0.07Ga0.93N/GaN layers, wherein quantum build GaN with a thickness of 7~8nm, Quantum Well
In0.07Ga0.93N with a thickness of 3~4nm；P-type semiconductor material, with a thickness of 50~100nm, growth temperature is 970 DEG C, air pressure
For 90mbar；
Second step passes through the deposition electricity such as electron beam evaporation or magnetron sputtering on the P-type semiconductor material that the first step obtains
Extension layer is flowed, with a thickness of 10~20nm；
Third step uses PECVD (plasma enhanced chemical vapor deposition on the current extending that second step obtains
Method) technology prepares low refractive index dielectric layer, then electron beam evaporation plating dbr structure is used on low refractive index dielectric layer, and dbr structure layer is high
Low refractive index material layer is formed according to quarter-wave thickness alternating growth；
4th step, by photoetching making circular hole on the DBR that third step obtains, circular hole aperture is 20~100nm, and circular hole is in
Four directions distribution, is divided into 10~60nm, exposes current extending 105, and expose current extending, circular hole side wall and
The upper evaporation metal reflecting layer DBR, with a thickness of 50~150nm；
5th step removes Sapphire Substrate, by photoetching and wet etching on N-type semiconductor material, obtains graphical
N-type semiconductor material layer surface；
6th step, vapor deposition and optical graving make N-type electricity in the N-type semiconductor material layer surface that the 5th step obtains
Pole, area are the 5~30% of graphical N-type semiconductor material layer surface area；
Thus the light emitting diode with light scattering structure and ODR is obtained.
Substantive distinguishing features of the invention are as follows:
The DBR in ODR structure in current techniques is only to have high reflectance in certain angle range, big for angle
Light is mainly reflected by metallic mirror, and metallic mirror is usually present absorption, so light is by following ODR
When reflection, the incident light of wide-angle is by some by Metal absorption.In the present invention, we are mainly for there is diffusing structure
LED is inserted into one layer of thicker low-index material in total reflection mirror and semiconductor, so that it is complete to pass through the incident light of wide-angle
Internal reflection and Nonmetallic reflective, and by diffusing structure it is further scatter after escape out LED.What is generated when total internal reflection suddenly dies
Field can excite metal surface plasma body excimer (SPPs), and SPPs RESONANCE ABSORPTION will increase the Metal absorption of ODR, therefore low refraction
Rate material layer needs enough thickness, to make evanescent wave energy when total reflection that can decay to enough when reaching metal surface
Small, to reduce the absorption of metallic mirror, reflectivity increases, to improve the LEE of LED.
The beneficial effects of the present invention are:
Compared with prior art, substantive distinguishing features outstanding of the invention and marked improvement are as follows:
Light emitting diode of the invention is it is characterized in that further improve the light extraction effect of the LED with light scattering structure
Rate, by being inserted into one layer of low-index material in DBR and semiconductor, so as to make the incident light of wide-angle pass through total internal reflection
And Nonmetallic reflective, after by diffusing structure it is further scattering after escape out LED.But the evanscent field meeting generated when being totally reflected
It excites metal surface plasma body excimer (SPPs), SPPs RESONANCE ABSORPTION also will increase the Metal absorption of ODR, therefore low-refraction
Material layer needs enough thickness, to make evanescent wave energy when total reflection that can decay to enough when reaching metal surface
Small, to reduce the absorption of metallic mirror, reflectivity increases.Fig. 5, Fig. 6, Fig. 7 are respectively to use light scattering structure (graphical
Substrate PSS) and the formal dress of total reflection mirror (ODR), upside-down mounting, vertical structure LED LEE with low-index layer (SiO2Layer) thickness
Variation relation figure.Light extraction efficiency is with SiO as we can see from the figure2The increase of thickness degree first increases to tend towards stability afterwards.It is imitative
The very middle a length of 400nm of light wave works as SiO by can see in figure2When the thickness of layer reaches a wavelength, light extraction efficiency reaches flat
Steady value (50%).
Detailed description of the invention
Present invention will be further explained below with reference to the attached drawings and examples.
Fig. 1 is the epitaxial structure schematic diagram of the only formal dress Light-emitting diode LED chip with ODR structure, i.e., does not have light
Diffusing structure.
Fig. 2 is in method of the present invention, and embodiment 1 has patterned substrate and the low refractive index dielectric with a thickness of a wavelength
The formal dress Light-emitting diode LED chip schematic diagram of layer.
Fig. 3 is in method of the present invention, and embodiment 2 has patterned substrate and the low refractive index dielectric with a thickness of a wavelength
The inverted light-emitting diode (LED) LED chip schematic diagram of layer.
Fig. 4 is in method of the present invention, and embodiment 3 has graphical N-type semiconductor material layer surface and with a thickness of a wave
The vertical inverted light-emitting diode (LED) LED chip schematic diagram of long low refractive index dielectric layer.
Fig. 5 is the LEE of the light emitting diode of positive assembling structure obtained in embodiment 1 with low-index layer (SiO2Layer) thickness
Variation relation figure；
Fig. 6 is the LEE of the light emitting diode of inverted structure obtained in embodiment 2 with low-index layer (SiO2Layer) thickness
Variation relation figure；
Fig. 7 is the LEE of the light emitting diode of vertical structure obtained in embodiment 3 with low-index layer (SiO2Layer) thickness
Variation relation figure；
Wherein, 101. substrate, 102.N- type semiconductor material layer, 103. luminescent layers, 104.P- type semiconductor material layer,
105. current extending, 106. high refractive index layers, 107. low-index layers, 108. metallic reflectors, 109.N- type electrode,
110.P- type electrode, 111. patterned substrate layers, 112. low refractive index dielectric layers, 113. graphical N-type semiconductor material layer tables
Face.
Specific embodiment
Below with reference to examples and drawings, the invention will be further described, but does not want in this, as to the application right
Ask the restriction of protection scope.
Embodiment illustrated in fig. 1 shows the forward LED chip structure in the prior art with ODR structure, successively includes:
Substrate 101, N-type semiconductor transport layer 102, luminescent layer 103, P-type semiconductor transport layer 104, current extending 105, P-type
Electrode 110 and N-type electrode 109, substrate back are anti-by DBR layer, the metal that high refractive index layer 106 and low-index layer 107 form
Penetrate layer 108.ODR in this structure is only to have high reflectance in certain angle range, and the light big for angle mainly passes through gold
Belong to reflecting mirror to be reflected, and metallic mirror is usually present absorption, so when light is reflected by following ODR, wide-angle
Incident light is by some by Metal absorption.
Fig. 2-4 is to be suitable for the structured LED of institute with light scattering structure in order to illustrate the method for the present invention, and LED has three
Kind structure: the LED (such as Fig. 4) of the positive LED (such as Fig. 2) of assembling structure, the LED (such as Fig. 3) of inverted structure and vertical structure.Due to
The structure of LED is different, and the position of total reflection mirror (ODR) is just different, and the position of low refractive index dielectric layer is also just different therewith.And light
Diffusing structure is not limited only to patterned substrate, and light scattering structure has photon crystal structure, graph substrate structure, surface to be roughened at random
The various structures such as structure or side wall roughening structure.The common two kinds of diffusing structures of industrial circle are that graph substrate structure and surface are random
It is roughened structure.Figure and embodiment combine in method of the present invention, are to have used one of light scattering structure: graph substrate knot
Structure.
Embodiment 1
The formal dress luminous two of the low refractive index dielectric layer with patterned substrate and with a thickness of a wavelength of the present embodiment
Pole pipe LED chip structure as shown in Fig. 2, successively include: metallic reflector 108, DBR layer, low refractive index dielectric layer from the bottom to top
112, substrate 101, patterned substrate layer (PSS) 111, N-type semiconductor transport layer 102, luminescent layer 103, P-type semiconductor pass
Layer 104, current extending 105, P-type electrode 110；The DBR layer includes the low-index layer 107 and high folding of alternating growth
Rate layer 106 is penetrated, growth cycle can be zero；Also, there is itself area 10~20% to expose to the open air for N-type semiconductor transport layer 102
There is N-type electrode 109 in part with a thickness of 1 μm above, and the area of the N-type electrode 109 is N-type semiconductor transport layer 102
The 10~80% of middle exposed portion.
Substrate 101 uses sapphire among the above, and the ingredient of Sapphire Substrate is aluminium oxide；
Its surface is presented by lithography and etching technology in Sapphire Substrate in the patterned substrate (PSS) 111
Graphically.It is patterned into the pattern being made of the protrusion of triarray, period of triarray (i.e. two neighboring protrusion center
Distance) it is identical as protrusion diameter, i.e., adjacent protrusion bottom contacts with each other, and the protrusion includes hemispherical protrusion, coniform
Protrusion, cylindrical protrusion or ridge projections.The present embodiment uses conical papilla, each tapered bottom and adjacent cone
Contact, the height of cone and the bottom diameter of cone are identical, are fixed on 0.5 μm；
The material of N-type semiconductor transport layer 102 is GaN, with a thickness of 3 μm；
The structure of luminescent layer 103 is the In in 5 periods0.07Ga0.93N/GaN layers, wherein quantum build GaN with a thickness of 8nm,
Quantum Well In0.07Ga0.93N with a thickness of 4nm；
The material of P-type semiconductor transport layer 104 is GaN, with a thickness of 50nm；
The material of current extending 105 is ITO, with a thickness of 10nm；
The material of low refractive index dielectric layer 112 is SiO2, with a thickness of a wavelength of transmitted light；
The material of high refractive index layer 106 is TiO2, the material of low-index layer 107 is SiO2, thickness is λ/4n, and two kinds
Material alternating growth, growth cycle are 20 pairs；
The material of metallic reflector 108 is Al, with a thickness of 100nm；
The material of P-type electrode 110 is Cr/Au, with a thickness of 100nm；
The material of N-type electrode 109 is Cr/Au, and with a thickness of 100nm, area is N-type semiconductor transport layer exposed portion
60%；
The above-mentioned formal dress Light-emitting diode LED with patterned substrate and the low refractive index dielectric layer with a thickness of a wavelength
Chip structure, preparation method are as follows:
The first step is existed by MOCVD (metallo-organic compound chemical gaseous phase deposition) or MBE (molecular beam epitaxy) technology
Grown on Sapphire Substrates dry etching exposure mask is justified with the photoetching process of standard and ICP (plasma etching) technology
Conoid protuberance patterned sapphire substrate layer 111, each tapered bottom and adjacent tapered joint touch, and the height of cone and the bottom of cone are straight
Diameter is all fixed on 0.5 μm；
Second step successively grows N-type semiconductor material 102 on substrate, and with a thickness of 3 μm, growth temperature is 950 DEG C, gas
Pressure is 60mbar；Luminescent layer 103 is the In in 5 periods0.07Ga0.93N/GaN layers, wherein quantum build GaN with a thickness of 8nm, quantum
Trap In0.07Ga0.93N with a thickness of 4nm；P-type semiconductor material 104, with a thickness of 50nm, growth temperature is 970 DEG C, and air pressure is
90mbar；
Third step, it is heavy by electron beam evaporation or magnetron sputtering etc. on the P-type semiconductor material 104 that second step obtains
Product current extending 105, with a thickness of 50nm；Step is made by photoetching and dry etch process, etching depth is 2 μm, is exposed to the open air
20% N-type semiconductor material 102 out；
4th step is prepared at the Sapphire Substrate back side using PECVD (plasma enhanced chemical vapor deposition method) technology
One layer of low refractive index dielectric layer 112 uses electron beam evaporation plating dbr structure with a thickness of a wavelength on low refractive index dielectric layer,
DBR layer is formed by high low refractive index material layer according to quarter-wave thickness alternating growth；
5th step is deposited on the dbr structure that the 4th step obtains or sputters Al metallic reflector 108, with a thickness of 100nm；
6th step, is deposited and optical graving makes P-type electrode 110 and N-type electrode 109.
Thus a kind of with patterned substrate and with a thickness of the low refractive index dielectric layer of a wavelength of the present embodiment is obtained
Formal dress Light-emitting diode LED chip structure.
The LEE of the formal dress structure diodes obtained according to the present embodiment structure is with low-index layer (SiO2Layer) thickness change
Change relational graph as shown in figure 5, emulation in a length of 400nm of light wave purple light, can be seen from the chart, work as SiO2Layer reaches a wave
When long thickness, light extraction efficiency reaches stationary value (49%), therefore SiO2Thickness degree is selected as a wavelength.Thus make to be totally reflected
When evanescent wave energy can decay to when reaching metal surface sufficiently small, to reduce the absorption of metallic mirror, reflectivity increases
Add, to improve light extraction efficiency.
Embodiment 2
The flipped light emitting two with patterned substrate and the low refractive index dielectric layer with a thickness of a wavelength of the present embodiment
Pole pipe LED chip structure as shown in figure 3, successively include: substrate 101, patterned substrate layer 111, N-type semiconductor from the bottom to top
Transport layer 102, luminescent layer 103, P-type semiconductor transport layer 104, current extending 105, low refractive index dielectric layer 112, DBR
Layer, metallic reflector 108, the DBR layer includes the low-index layer 107 and high refractive index layer 106 of alternating growth, growth week
Phase can be zero；There are the exposed portions of itself area 10~20% to have N- above with a thickness of 1 μm for N-type semiconductor transport layer 102
Type electrode 109, the area of the N-type electrode 109 be exposed portion area in N-type semiconductor transport layer 102 10~
80%；Also, it is equipped with circular hole in the low-index layer dielectric layer 112 and DBR layer, circular hole aperture is 20~100nm, circular hole
In square array distribution, it is divided into 10~60nm.It is all around spaced identical.
The patterned substrate layer (PSS) 111 makes it by lithography and etching technology in Sapphire Substrate among the above
Surface presents graphical.It is patterned into the pattern being made of the protrusion of triarray, the period of triarray is (i.e. two neighboring prominent
The distance at the center of rising) it is identical as protrusion diameter, i.e., adjacent protrusion bottom contacts with each other, and the protrusion includes hemispherical prominent
It rises, conical papilla, cylindrical protrusion or ridge projections.The present embodiment uses conical papilla, each tapered bottom
It is touched with adjacent tapered joint, the height of cone and the bottom diameter of cone are identical, are fixed on 0.5 μm；
The material of N-type semiconductor transport layer 102 is GaN, with a thickness of 3 μm；
The structure of luminescent layer 103 is the In in 5 periods0.07Ga0.93N/GaN layers, wherein quantum build GaN with a thickness of 8nm,
Quantum Well In0.07Ga0.93N with a thickness of 4nm；
The material of P-type semiconductor transport layer 104 is GaN, with a thickness of 50nm；
The material of current extending 105 is ITO, with a thickness of 10nm；
The material of low refractive index dielectric layer 112 is SiO2, with a thickness of a wavelength of transmitted light；
The material of high refractive index layer 106 is TiO2, the material of low-index layer 107 is SiO2, thickness is λ/4n, and two kinds
Material alternating growth, growth cycle are 20 pairs；
The material of metallic reflector 108 is Al, is used as electrode, in inverted structure with a thickness of 100nm；
The material of N-type electrode 109 is Cr/Au, and with a thickness of 100nm, area is N-type semiconductor transport layer exposed portion
60%；
The above-mentioned inverted light-emitting diode (LED) LED with patterned substrate and the low refractive index dielectric layer with a thickness of a wavelength
Chip structure, preparation method are as follows:
The first step is existed by MOCVD (metallo-organic compound chemical gaseous phase deposition) or MBE (molecular beam epitaxy) technology
Grown on Sapphire Substrates dry etching exposure mask is justified with the photoetching process of standard and ICP (plasma etching) technology
Conoid protuberance patterned sapphire substrate layer 111, each tapered bottom and adjacent tapered joint touch, and the height of cone and the bottom of cone are straight
Diameter is all fixed on 0.5 μm；
Second step successively grows N-type semiconductor material 102 on substrate, and with a thickness of 3 μm, growth temperature is 950 DEG C, gas
Pressure is 60mbar；Luminescent layer 103 is the In in 5 periods0.07Ga0.93N/GaN layers, wherein quantum build GaN with a thickness of 8nm, quantum
Trap In0.07Ga0.93N with a thickness of 4nm；P-type semiconductor material 104, with a thickness of 50nm, growth temperature is 970 DEG C, and air pressure is
90mbar；
Third step, it is heavy by electron beam evaporation or magnetron sputtering etc. on the P-type semiconductor material 104 that second step obtains
Product current extending 105, with a thickness of 50nm；Step is made by photoetching and dry etch process, etching depth is 2 μm, is exposed to the open air
20% N-type semiconductor material 102 out；
4th step uses PECVD (plasma enhanced chemical vapor deposition in the current expansion that third step obtains, 105
Method) technology prepares low refractive index dielectric layer 112, with a thickness of a wavelength, electron beam evaporation plating DBR is used on low refractive index dielectric layer
Structure, DBR layer are formed by high low refractive index material layer according to quarter-wave thickness alternating growth；
5th step, by photoetching making circular hole on the DBR that the 4th step obtains, circular hole aperture is 50nm, is divided between circular hole
50nm, exposes current extending 105, and expose current extending 105, evaporation metal reflection on circular hole side wall and DBR
Layer 108, with a thickness of 100nm；
6th step, is deposited and optical graving makes N-type electrode 109, and with a thickness of 100nm, area is N-type semiconductor pass
The 60% of layer exposed portion.
Thus a kind of with patterned substrate and with a thickness of the low refractive index dielectric layer of a wavelength of the present embodiment is obtained
Inverted light-emitting diode (LED) LED chip structure.
The LEE of the inverted structure diode obtained according to the present embodiment structure is with low-index layer (SiO2Layer) thickness change
Change relational graph as shown in fig. 6, emulation in a length of 400nm of light wave, can be seen from the chart, work as SiO2Layer reaches a wavelength thickness
When, light extraction efficiency reaches stationary value (48%), therefore SiO2Thickness degree is selected as a wavelength.When thus making to be totally reflected suddenly
The wave energy that dies can decay to sufficiently small when reaching metal surface, to reduce the absorption of metallic mirror, reflectivity increases, thus
Improve light extraction efficiency.
Embodiment 3
The present embodiment is situated between with graphical N-type semiconductor material layer surface and with a thickness of the low-refraction of a wavelength
The vertical inverted light-emitting diode (LED) LED chip structure of matter layer is as shown in figure 4, from top to bottom successively include: that graphical N-type is partly led
Body material surface 113, N-type semiconductor transport layer 102, luminescent layer 103, P-type semiconductor transport layer 104, current extending
105, low refractive index dielectric layer 112, DBR layer and metallic reflector 108；The graphical N-type semiconductor material layer surface
113 are also distributed with N-type electrode 109, and the area of N-type electrode 109 is graphical 113 area of N-type semiconductor material layer surface
20%；The DBR layer includes the low-index layer 107 and high refractive index layer 106 of alternating growth, and growth cycle can be zero；?
The low-index layer dielectric layer 112 and DBR layer are equipped with circular hole, and circular hole aperture is 20~100nm, and circular hole is distributed in four directions,
Between be divided into 10~60nm.Metallic reflector 108 is that last vapor deposition is to circular hole bottom and side wall later for punching, so self-assembling formation
Circular hole.
The material of N-type semiconductor transport layer 102 is GaN among the above, with a thickness of 3 μm, is then carved by photoetching and wet process
Erosion, obtains graphical N-type semiconductor material layer surface 113, is patterned into the pattern being made of the protrusion of triarray, triangle
The period (distance at i.e. two neighboring protrusion center) of array is identical as protrusion diameter, i.e., adjacent protrusion bottom contacts with each other,
The protrusion includes hemispherical protrusion, conical papilla, cylindrical protrusion or ridge projections.The present embodiment uses circular cone
Shape protrusion, each tapered bottom and adjacent tapered joint touch, and the height of cone and the bottom diameter of cone are identical, are fixed on 0.5 μm；
The structure of luminescent layer 103 is the In in 5 periods0.07Ga0.93N/GaN layers, wherein quantum build GaN with a thickness of 8nm,
Quantum Well In0.07Ga0.93N with a thickness of 4nm；
The material of P-type semiconductor transport layer 104 is GaN, with a thickness of 50nm；
The material of current extending 105 is ITO, with a thickness of 10nm；
The material of low refractive index dielectric layer 112 is SiO2, with a thickness of a wavelength of transmitted light；
The material of high refractive index layer 106 is TiO2, the material of low-index layer 107 is SiO2, thickness is λ/4n, and two kinds
Material alternating growth, growth cycle are 20 pairs；
The material of metallic reflector 108 is Al, is used as electrode, in vertical inverted structure with a thickness of 100nm；
The material of N-type electrode 109 is Cr/Au, and with a thickness of 100nm, area is the 20% of N-type semiconductor transport layer.
It is above-mentioned with graphical N-type semiconductor material layer surface and with a thickness of the low refractive index dielectric layer of wavelength
Vertical inverted light-emitting diode (LED) LED chip structure, preparation method are as follows:
The first step is existed by MOCVD (metallo-organic compound chemical gaseous phase deposition) or MBE (molecular beam epitaxy) technology
N-type semiconductor material 102 is successively grown in Sapphire Substrate, with a thickness of 3 μm, growth temperature is 950 DEG C, air pressure 60mbar；
Luminescent layer 103 is the In in 5 periods0.07Ga0.93N/GaN layers, wherein quantum build GaN with a thickness of 8nm, Quantum Well
In0.07Ga0.93N with a thickness of 4nm；P-type semiconductor material 104, with a thickness of 50nm, growth temperature is 970 DEG C, and air pressure is
90mbar；
Second step is heavy by electron beam evaporation or magnetron sputtering etc. on the P-type semiconductor material 104 that the first step obtains
Product current extending 105, with a thickness of 50nm；
Third step uses PECVD (plasma enhanced chemical vapor deposition on the current extending that second step obtains
Method) technology prepares low refractive index dielectric layer 112, with a thickness of a wavelength, electron beam evaporation plating DBR is used on low refractive index dielectric layer
Structure, the high low refractive index material layer of dbr structure layer are formed according to quarter-wave thickness alternating growth；
4th step, by photoetching making circular hole on the DBR that third step obtains, circular hole aperture is 50nm, and circular hole is in four directions
Distribution, is divided into 50nm, exposes current extending 105, and steam on exposing current extending 105, circular hole side wall and DBR
Metallized reflective layer 108, with a thickness of 100nm；
5th step removes Sapphire Substrate, by photoetching and wet etching on N-type semiconductor material 102, obtains figure
Shape N-type semiconductor material layer surface 113, each tapered bottom and adjacent tapered joint touch, the height of cone and the bottom diameter of cone
It is identical, it is fixed on 0.5 μm；
6th step, vapor deposition and photoetching making in the graphical N-type semiconductor material layer surface 113 that the 5th step obtains
N-type electrode 109 out, with a thickness of 100nm, area is the 20% of N-type semiconductor transport layer.
Thus the one kind for obtaining the present embodiment has graphical N-type semiconductor material layer surface and with a thickness of a wavelength
Low refractive index dielectric layer vertical inverted light-emitting diode (LED) LED chip structure.
The LEE of the vertical structure diode obtained according to the present embodiment structure is with low-index layer (SiO2Layer) thickness change
Change relational graph as shown in fig. 7, emulation in a length of 400nm of light wave, can be seen from the chart, work as SiO2Layer reaches a wavelength thickness
When, light extraction efficiency reaches stationary value (51%), therefore SiO2Thickness degree is selected as a wavelength.When thus making to be totally reflected suddenly
The wave energy that dies can decay to sufficiently small when reaching metal surface, to reduce the absorption of metallic mirror, reflectivity increases, thus
Improve light extraction efficiency.
Above-described embodiment can reach, and graphical structure of emergent light surface changes the round of the light of active area sending, subtract
The small probability being totally reflected enhances light scattering, so that more light escape into air；By in DBR and semiconductor
One layer of thicker low-index material of middle insertion makes more light escape out LED by being totally reflected Nonmetallic reflective, to subtract
The absorption of few metallic mirror, so that reflectivity increases, to improve the light extraction efficiency of LED, and the method for the present invention can operate
Strong, the simple process and low cost of property, it is easy to accomplish.
Raw material according to the present invention can be obtained by known approach, and the operating procedure in preparation method is this skill
What the technical staff in art field will appreciate that.
The present invention does not address place and is suitable for the prior art.
Claims (7)
1. a kind of light emitting diode with light scattering structure and ODR, it is characterized in that the light emitting diode is to have following three
The light emitting diode of one of kind structure:
The first, successively includes: metallic reflector, DBR layer, low refractive index dielectric layer, substrate, patterned substrate layer from the bottom to top
(PSS), N-type semiconductor transport layer, luminescent layer, P-type semiconductor transport layer, current extending, P-type electrode；The DBR
Layer includes the low-index layer and high refractive index layer of alternating growth；Also, there is itself areas 10 for N-type semiconductor transport layer
~20% exposed portion has N-type electrode with a thickness of 0.5~1.5 μm above；The area of the N-type electrode is N-type half
The 10~80% of exposed portion in conductor propagation layer；
Second, successively include: substrate, patterned substrate layer, N-type semiconductor transport layer, luminescent layer, P-type half from the bottom to top
Conductor propagation layer, current extending, low refractive index dielectric layer, DBR layer, metallic reflector, the DBR layer include alternating growth
Low-index layer and high refractive index layer；There is the exposed portions of itself area 10~20% for N-type semiconductor transport layer, thick
Degree is 0.5~1.5 μm, there is N-type electrode above, and the area of the N-type electrode is to expose portion to the open air in N-type semiconductor transport layer
The 10~80% of facet product；Also, circular hole is equipped in the low-index layer dielectric layer and DBR layer, circular hole aperture is 20~
100nm is divided into 10~60nm between circular hole；
The third, from top to bottom successively includes: graphical N-type semiconductor material layer surface, N-type semiconductor transport layer, shines
Layer, P-type semiconductor transport layer, current extending, low refractive index dielectric layer, DBR layer and metallic reflector；Described is graphical
N-type electrode is also distributed in N-type semiconductor material layer surface, and the area of N-type electrode is graphical N-type semiconductor material layer table
The 5~30% of face area；The DBR layer includes the low-index layer and high refractive index layer of alternating growth；In the low refraction
Rate layer dielectric layer and DBR layer are equipped with circular hole, and circular hole aperture is 20~100nm, are divided into 10~60nm between circular hole；Metallic reflector
It is also covered in circular hole bottom and side wall simultaneously.
2. as described in claim 1 with the light emitting diode of light scattering structure and ODR, it is characterized in that:
The sixbstrate components are aluminium oxide；
The material of the patterned substrate (PSS) is aluminium oxide；The projection pattern group being patterned by triarray
At the period of triarray is identical as protrusion diameter, i.e., adjacent protrusion bottom contacts with each other；The height of protrusion is 0.5 μm~1
μm；The protrusion is hemispherical protrusion, conical papilla, cylindrical protrusion or ridge projections；
The material of the N-type semiconductor transport layer is GaN, with a thickness of 1~3 μm；
The structure of the luminescent layer is the In in 4~5 periods0.07Ga0.93N/GaN layers, wherein quantum build GaN with a thickness of 7~
8nm, Quantum Well In0.07Ga0.93N with a thickness of 3~4nm；
The material of the P-type semiconductor transport layer is GaN, with a thickness of 50~100nm；
The material of the current extending is ITO, with a thickness of 10~20nm；
The material of the low refractive index dielectric layer is SiO2, thickness is between a quarter lambda1-wavelength and two incident light waves
Between length；
The DBR layer is made of high and low refractive index material, and the material of high refractive index layer is TiO2, the material of low-index layer is
SiO2, the two thickness is λ/4n, and two kinds of material alternating growths, growth cycle is 0~50 pair；
The material of the metallic reflector is Al, with a thickness of 50~150nm；
The material of the P-type electrode is Cr/Au；With a thickness of 10~200nm；
The material of the N-type electrode is Cr/Au, and with a thickness of 10~200nm, area is that N-type semiconductor transport layer exposes portion to the open air
10~80% divided.
3. as described in claim 1 with the light emitting diode of light scattering structure and ODR, it is characterized in that described the third two
In pole pipe, the material of graphical N-type semiconductor material layer surface is GaN, the protrusion figure being patterned by triarray
Case composition, the period of triarray is identical as protrusion diameter, i.e., adjacent protrusion bottom contacts with each other；The height of protrusion is 0.5
~1 μm；The protrusion is hemispherical protrusion, conical papilla, cylindrical protrusion or ridge projections.
4. as described in claim 1 with the light emitting diode of light scattering structure and ODR, it is characterized in that described the third two
The material of N-type electrode described in pole pipe is Cr/Au, with a thickness of 10~200nm, area be N-type semiconductor transport layer 5~
30%.
5. the preparation method of the light emitting diode as described in claim 1 with light scattering structure and ODR, it is characterized in that first
Kind of structure the following steps are included:
The first step, by MOCVD (metallo-organic compound chemical gaseous phase deposition) or MBE (molecular beam epitaxy) technology blue precious
Dry etching exposure mask is grown on stone lining bottom, obtains protrusion with photoetching process and ICP (plasma etching) technology, described is prominent
It rises and forms pattern, obtain patterned substrate；
Second step successively grows N-type semiconductor material on substrate, and with a thickness of 1~3 μm, growth temperature is 950 DEG C, and air pressure is
60mbar；Luminescent layer 103 is the In in 4~5 periods0.07Ga0.93N/GaN layers, wherein quantum build GaN with a thickness of 7~8nm, amount
Sub- trap In0.07Ga0.93N with a thickness of 3~4nm；P-type semiconductor material, with a thickness of 50~100nm, growth temperature is 970 DEG C,
Air pressure is 90mbar；
Third step is extended on the P-type semiconductor material that second step obtains by electron beam evaporation or magnetron sputtering deposition current
Layer, with a thickness of 10~20nm；Step is made by photoetching and dry etch process, etching depth is 0.5~2 μm, exposes 10
~20% N-type semiconductor material；
4th step prepares one layer using PECVD (plasma enhanced chemical vapor deposition method) technology at the Sapphire Substrate back side
Low refractive index dielectric layer, then electron beam evaporation plating dbr structure, the high low-refraction material of dbr structure layer are used on low refractive index dielectric layer
The bed of material is formed according to quarter-wave thickness alternating growth；
5th step is deposited on the dbr structure that the 4th step obtains or sputters Al metallic reflector, with a thickness of 50~150nm；
6th step, is deposited and optical graving makes P-type electrode, with a thickness of 10~200nm；
7th step, the vapor deposition and optical graving makes N-type electrode on the N-type semiconductor transport layer exposed to the open air, thickness 10~
200nm, area are the 10~80% of N-type semiconductor transport layer exposed portion；
Thus the light emitting diode with light scattering structure and ODR is obtained.
6. the preparation method of the light emitting diode as described in claim 1 with light scattering structure and ODR, it is characterized in that second
Kind of structure the following steps are included:
The first step, by MOCVD (metallo-organic compound chemical gaseous phase deposition) or MBE (molecular beam epitaxy) technology blue precious
Dry etching exposure mask is grown on stone lining bottom, obtains protrusion with photoetching process and ICP (plasma etching) technology, described is prominent
It rises and forms pattern, obtain patterned substrate；
Second step successively grows N-type semiconductor material on substrate, and with a thickness of 1~3 μm, growth temperature is 950 DEG C, and air pressure is
60mbar；Luminescent layer 103 is the In in 4~5 periods0.07Ga0.93N/GaN layers, wherein quantum build GaN with a thickness of 7~8nm, amount
Sub- trap In0.07Ga0.93N with a thickness of 3~4nm；P-type semiconductor material, with a thickness of 50~100nm, growth temperature is 970 DEG C,
Air pressure is 90mbar；
Third step is expanded on the P-type semiconductor material that second step obtains by deposition currents such as electron beam evaporation or magnetron sputterings
Layer is opened up, with a thickness of 10~20nm；Step is made by photoetching and dry etch process, etching depth is 0.5~2 μm, is exposed
10~20% N-type semiconductor material；
4th step uses PECVD (plasma enhanced chemical vapor deposition method) technology in the current expansion that third step obtains
Low refractive index dielectric layer is prepared, then uses electron beam evaporation plating dbr structure on low refractive index dielectric layer, dbr structure layer height reflects
Rate material layer is formed according to quarter-wave thickness alternating growth；
5th step, by photoetching making circular hole on the DBR that the 4th step obtains, circular hole aperture is 20~100nm, is divided between circular hole
10~60nm, exposes current extending 105, and expose current extending, evaporation metal reflection on circular hole side wall and DBR
Layer 108, with a thickness of 50~150nm；
6th step, the vapor deposition and optical graving makes N-type electrode on the N-type semiconductor transport layer exposed to the open air, with a thickness of 10~
200nm, area are the 10~80% of N-type semiconductor transport layer exposed portion；
Thus the light emitting diode with light scattering structure and ODR is obtained.
7. the preparation method of the light emitting diode as described in claim 1 with light scattering structure and ODR, it is characterized in that third
Kind of structure the following steps are included:
The first step, by MOCVD (metallo-organic compound chemical gaseous phase deposition) or MBE (molecular beam epitaxy) technology blue precious
N-type semiconductor material is successively grown on stone lining bottom, with a thickness of 1~3 μm, growth temperature is 950 DEG C, air pressure 60mbar；It shines
Layer is the In in 4~5 periods0.07Ga0.93N/GaN layers, wherein quantum build GaN with a thickness of 7~8nm, Quantum Well
In0.07Ga0.93N with a thickness of 3~4nm；P-type semiconductor material, with a thickness of 50~100nm, growth temperature is 970 DEG C, air pressure
For 90mbar；
Second step is expanded on the P-type semiconductor material that the first step obtains by deposition currents such as electron beam evaporation or magnetron sputterings
Layer is opened up, with a thickness of 10~20nm；
Third step uses PECVD (plasma enhanced chemical vapor deposition method) skill on the current extending that second step obtains
Art prepares low refractive index dielectric layer, then electron beam evaporation plating dbr structure is used on low refractive index dielectric layer, and dbr structure layer height is rolled over
Rate material layer is penetrated to be formed according to quarter-wave thickness alternating growth；
4th step, by photoetching making circular hole on the DBR that third step obtains, circular hole aperture is 20~100nm, and circular hole is in four directions
Distribution, is divided into 10~60nm, exposes current extending 105, and on exposing current extending, circular hole side wall and DBR
Evaporation metal reflecting layer, with a thickness of 50~150nm；
5th step removes Sapphire Substrate, by photoetching and wet etching on N-type semiconductor material, is formed patterned prominent
It rises, obtains N-type semiconductor material layer surface；
6th step is deposited in the N-type semiconductor material layer surface that the 5th step obtains and optical graving makes N-type electrode, face
Product is the 5~30% of graphical N-type semiconductor material layer surface area；
Thus the light emitting diode with light scattering structure and ODR is obtained.
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| CN111433921B (en) * | 2019-12-16 | 2023-08-15 | 厦门三安光电有限公司 | Light-emitting diode |
| CN113826223A (en) * | 2021-06-25 | 2021-12-21 | 厦门三安光电有限公司 | Semiconductor light emitting element, semiconductor light emitting device, and display device |
| CN113826223B (en) * | 2021-06-25 | 2023-10-20 | 厦门三安光电有限公司 | Semiconductor light emitting element, semiconductor light emitting device, and display device |
| CN114203875A (en) * | 2021-12-09 | 2022-03-18 | 广东中图半导体科技股份有限公司 | Graphical composite substrate, preparation method and LED epitaxial wafer |
| CN114203875B (en) * | 2021-12-09 | 2024-03-12 | 广东中图半导体科技股份有限公司 | Patterned composite substrate, preparation method and LED epitaxial wafer |
| CN114122218A (en) * | 2022-01-24 | 2022-03-01 | 南昌硅基半导体科技有限公司 | GaN-based LED chip with omnibearing reflective electrode and preparation method thereof |
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