CN109427912A - Thin film transistor (TFT) and field-effect diode - Google Patents
Thin film transistor (TFT) and field-effect diode Download PDFInfo
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- CN109427912A CN109427912A CN201810029520.3A CN201810029520A CN109427912A CN 109427912 A CN109427912 A CN 109427912A CN 201810029520 A CN201810029520 A CN 201810029520A CN 109427912 A CN109427912 A CN 109427912A
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- 230000005669 field effect Effects 0.000 title claims abstract description 67
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- 238000009827 uniform distribution Methods 0.000 abstract description 2
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- 229910052982 molybdenum disulfide Inorganic materials 0.000 description 2
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- HXFVOUUOTHJFPX-UHFFFAOYSA-N alumane;zinc Chemical compound [AlH3].[Zn] HXFVOUUOTHJFPX-UHFFFAOYSA-N 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
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- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(IV) oxide Inorganic materials O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 description 1
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- 229910052759 nickel Inorganic materials 0.000 description 1
- KYKLWYKWCAYAJY-UHFFFAOYSA-N oxotin;zinc Chemical compound [Zn].[Sn]=O KYKLWYKWCAYAJY-UHFFFAOYSA-N 0.000 description 1
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 1
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 description 1
- 229920000301 poly(3-hexylthiophene-2,5-diyl) polymer Polymers 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
- H01L29/42376—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the length or the sectional shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Thin Film Transistor (AREA)
Abstract
The present invention provides a kind of thin film transistor (TFT) and field-effect diode, the thin film transistor (TFT) includes insulating layer；Positioned at the channel layer of the closed circle annular of the opposite sides of the insulating layer and the gate electrode of closed circle annular；And the closed circle annular being in contact with the channel layer source electrode and closed circle annular drain electrode；The field-effect diode includes insulating layer；Positioned at the channel layer of the closed circle annular of the opposite sides of the insulating layer and the gate electrode of closed circle annular；And the closed circle annular being in contact with the channel layer source electrode and closed circle annular drain electrode；The drain electrode is electrically connected with the gate electrode.The electrode shape of thin film transistor (TFT) and field-effect diode of the invention eliminates the spike of electric field strength, to improve voltage tolerance in closed circle annular, electric field more uniform distribution in all directions.
Description
Technical field
The present invention relates to field of electronic devices, and in particular to a kind of thin film transistor (TFT) and field-effect diode.
Background technique
High voltage thin film transistor and high-voltage diode are two kinds of core components in high-pressure energy management system, they
Development is constantly subjected to the extensive concern of academia and industrial circle.In high voltage thin film crystal and high-voltage diode pipe, the ruler of electrode
Very little and shape affects the size and distribution of electric field strength in device, to affect the voltage power supply range of device.
The electrode shape of current high voltage thin film transistor and high-voltage diode be it is rectangular, result of study shows this side
There are electric field spikes at the edge of shape electrode, will be greatly reduced the pressure-resistant performance of device.
Summary of the invention
For above-mentioned technical problem of the existing technology, the embodiment of the present invention provides a kind of thin film transistor (TFT), comprising:
Insulating layer；
Positioned at the channel layer of the closed circle annular of the opposite sides of the insulating layer and the gate electrode of closed circle annular；And
The source electrode for the closed circle annular being in contact with the channel layer and the drain electrode of closed circle annular.
Preferably, the thin film transistor (TFT) further includes the substrate for being used to support the gate electrode, and the insulating layer is located at institute
It states on gate electrode, the channel layer is located on the insulating layer, and the source electrode and drain electrode is located on the channel layer.
Preferably, the source electrode is located on the inside edge of the channel layer, and the drain electrode is located at the channel layer
Outer ledge on, and the source electrode is located at the inside of the drain electrode；
Wherein, the thin film transistor (TFT) further include:
The gate electrode connection electrode being electrically connected with the gate electrode；
The source electrode connection electrode being electrically connected with the source electrode；
The drain electrode connection electrode being electrically connected with the drain electrode；
The first collets between a part and source electrode connection electrode of the drain electrode；And
The second collets between a part and gate electrode connection electrode of the drain electrode.
Preferably, the source electrode is located on the outer ledge of the channel layer, and the drain electrode is located at the channel layer
Inside edge on, the drain electrode is located at the inside of the source electrode；
Wherein, the thin film transistor (TFT) further include:
The gate electrode connection electrode being electrically connected with the gate electrode；
The source electrode connection electrode being electrically connected with the source electrode；
The drain electrode connection electrode being electrically connected with the drain electrode；
And the collets between the drain electrode connection electrode and the source electrode, a part of gate electrode.
Preferably, the thin film transistor (TFT) further includes the substrate for being used to support the drain electrode, source electrode and channel layer, institute
It states insulating layer to be located on the channel layer, the gate electrode is on the insulating layer between the drain electrode and source electrode.
Preferably, the inside edge of the channel layer is located in the source electrode, and outer ledge is located at the drain electrode
On, the source electrode is located at the inside of the drain electrode；
Wherein, the thin film transistor (TFT) further include:
The drain electrode connection electrode being electrically connected with the drain electrode；
The source electrode connection electrode being electrically connected with the source electrode；
The gate electrode connection electrode being electrically connected with the gate electrode；
The first collets between a part and the source electrode connection electrode of the drain electrode；And
The second collets between a part and the gate electrode connection electrode of the drain electrode.
Preferably, the inside edge of the channel layer is located on the drain electrode, and outer ledge is located at the source electrode
On, the drain electrode is located at the inside of the source electrode；
Wherein, the thin film transistor (TFT) further include:
The drain electrode connection electrode being electrically connected with the drain electrode；
The source electrode connection electrode being electrically connected with the source electrode；
The gate electrode connection electrode being electrically connected with the gate electrode；And
Collets between the drain electrode connection electrode and the source electrode, a part of gate electrode.
The embodiment provides a kind of field-effect diodes, comprising:
Insulating layer；
Positioned at the channel layer of the closed circle annular of the opposite sides of the insulating layer and the gate electrode of closed circle annular；And
The source electrode for the closed circle annular being in contact with the channel layer and the drain electrode of closed circle annular；The drain electrode
It is electrically connected with the gate electrode.
Preferably, the field-effect diode further includes the substrate for being used to support the gate electrode and insulating layer, described exhausted
Edge layer is located in a part of the gate electrode, and the channel layer is located on the insulating layer, the source electrode and drain electrode position
In on the channel layer.
Preferably, the insulating layer is located on the outer ledge of the gate electrode, and the source electrode is located at the channel layer
Outer ledge on, the outer ledge of the drain electrode is located on the inside edge of the channel layer, and inside edge is located at institute
It states on the inside edge of gate electrode；
Wherein, the field-effect diode further include:
The drain electrode connection electrode being electrically connected with the drain electrode；
The source electrode connection electrode being electrically connected with the source electrode；And
Collets between the drain electrode connection electrode and the source electrode.
Preferably, the insulating layer is located on the inside edge of the gate electrode, and the source electrode is located at the channel layer
Inside edge on, the inside edge of the drain electrode is located on the outer ledge of the channel layer, and outer ledge is located at institute
It states on the outer ledge of gate electrode；
Wherein, the field-effect diode further include:
The drain electrode connection electrode being electrically connected with the drain electrode；
The source electrode connection electrode being electrically connected with the source electrode；And
Collets between the source electrode connection electrode and the drain electrode, gate electrode.
Preferably, the field-effect diode further includes the substrate for being used to support the source electrode and channel layer, the ditch
A part of channel layer is located in the source electrode, and a part of the insulating layer is located in a part of the drain electrode, described
A part of gate electrode is located on the insulating layer, and another part is electrically connected with the drain electrode.
Preferably, the outer ledge of the channel layer is located in the source electrode, and the drain electrode is located at the channel layer
Inside edge on, a part of the insulating layer is located on the outer ledge of the drain electrode, the outer side edges of the gate electrode
Edge is located on the insulating layer, and inside edge is located on the inside edge of the drain electrode；
Wherein, the field-effect diode further include:
The source electrode connection electrode being electrically connected with the source electrode；
The drain electrode connection electrode being electrically connected with the drain electrode；And
Collets between the drain electrode connection electrode and source electrode.
Preferably, the inside edge of the channel layer is located in the source electrode, and the drain electrode is located at the channel layer
Outer ledge on, a part of the insulating layer is located on the inside edge of the drain electrode, the inner side edge of the gate electrode
Edge is located on the insulating layer, and outer ledge is located on the outer ledge of the drain electrode；
Wherein, the field-effect diode further include:
The source electrode connection electrode being electrically connected with source electrode；
The drain electrode connection electrode being electrically connected with drain electrode；And
Collets between source electrode connection electrode and drain electrode, gate electrode.
The electrode shape of thin film transistor (TFT) and field-effect diode of the invention is in closed circle annular, and electric field is along each side
To more uniform distribution, the spike of electric field strength is eliminated, to improve voltage tolerance.Completely cut off using collets different
It is overlapping between electrode, efficiently avoid the short circuit between Different electrodes.
Detailed description of the invention
The embodiment of the present invention is described further referring to the drawings, in which:
Fig. 1 is the preparation flow schematic diagram of the thin film transistor (TFT) of one embodiment according to the present invention.
Fig. 2 is the top view of the thin film transistor (TFT) of first embodiment according to the present invention.
Fig. 3 is the thin film transistor (TFT) cross-sectional view with the direction y in the x-direction of first embodiment according to the present invention.
Fig. 4 is the preparation flow schematic diagram of the thin film transistor (TFT) of second embodiment according to the present invention.
Fig. 5 is the top view of the thin film transistor (TFT) of second embodiment according to the present invention.
Fig. 6 is the thin film transistor (TFT) cross-sectional view with the direction y in the x-direction of second embodiment according to the present invention.
Fig. 7 is the preparation flow schematic diagram of the thin film transistor (TFT) of third embodiment according to the present invention.
Fig. 8 is the top view of the thin film transistor (TFT) of third embodiment according to the present invention.
Fig. 9 is the thin film transistor (TFT) cross-sectional view with the direction y in the x-direction of third embodiment according to the present invention.
Figure 10 is the preparation flow schematic diagram of the thin film transistor (TFT) of the 4th embodiment according to the present invention.
Figure 11 is the top view of the thin film transistor (TFT) of fourth embodiment according to the present invention.
Figure 12 is the thin film transistor (TFT) cross-sectional view with the direction y in the x-direction of fourth embodiment according to the present invention.
Figure 13 is the preparation flow schematic diagram of the field-effect diode of the 5th embodiment according to the present invention.
Figure 14 is the top view of the field-effect diode of fifth embodiment according to the present invention.
Figure 15 is the cross-sectional view of the field-effect diode of fifth embodiment according to the present invention in the y-direction.
Figure 16 is the preparation flow schematic diagram of the field-effect diode of the 6th embodiment according to the present invention.
Figure 17 is the top view of the field-effect diode of sixth embodiment according to the present invention.
Figure 18 is the cross-sectional view of the field-effect diode of sixth embodiment according to the present invention in the y-direction.
Figure 19 is the preparation flow schematic diagram of the field-effect diode of the 7th embodiment according to the present invention.
Figure 20 is the top view of the field-effect diode of seventh embodiment according to the present invention.
Figure 21 is the cross-sectional view of the field-effect diode of seventh embodiment according to the present invention in the y-direction.
Figure 22 is the preparation flow schematic diagram of the field-effect diode of the 8th embodiment according to the present invention.
Figure 23 is the top view of the field-effect diode of the 8th embodiment according to the present invention.
Figure 24 is the cross-sectional view of the field-effect diode of the 8th embodiment according to the present invention in the y-direction.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, pass through below in conjunction with attached drawing specific real
Applying example, invention is further described in detail.
First embodiment
Fig. 1 is the preparation flow schematic diagram of the thin film transistor (TFT) of one embodiment according to the present invention.It successively include as follows
Step:
Step 1 is prepared on 125 microns of thick polyethylene terephthalate (PET) substrates using magnetron sputtering
Indium tin oxygen (ITO) gate electrode 101 and gate electrode connection electrode 102 of 100 nanometer thickness, wherein ITO gate electrode 101 is in closed circle
Annular.
Step 2 prepares the aluminium oxide (Al of 100 nanometer thickness using technique for atomic layer deposition (ALD)2O3) insulating layer 103.So
It is etched afterwards by photoetching and hot phosphoric acid, processing is patterned to insulating layer 103, exposes the contact plate of gate electrode 101.
Step 3 prepares zinc oxide (ZnO) channel layer 104 of 50 nanometer thickness using magnetron sputtering technique.Then pass through light
Quarter and salt acid etch are patterned processing to channel layer 104 to obtain the channel layer 104 of closed circle annular.
Step 4, gallium zinc oxygen (GZO) source electrode 105 and source electrode that 100 nanometer thickness are sputtered on ZnO channel layer 104 connect
Receiving electrode 106.Wherein source electrode 105 is in closed circle annular.
Step 5, using etc. the technology of in vitro assistant chemical vapor deposition (PECVD) prepare the silica of 300 nanometer thickness
(SiO2), and it is patterned, collets 107 and collets 108 are obtained, wherein collets 107 are located at source electrode connection
On electrode 106, collets 108 are located in gate electrode connection electrode 102.
Step 6 sputters the GZO drain electrode 109 and drain electrode connection electrode 110 of 100 nanometer thickness.Wherein drain electrode 109 is in
Closed circle annular, a part of drain electrode 109 are located on collets 107 and collets 108, and it is in close ring that rest part, which is located at,
On the channel layer 104 of shape.
Fig. 2 is the top view of the thin film transistor (TFT) of first embodiment according to the present invention.In thin film transistor (TFT) 100, source
Electrode 105 and drain electrode 109 need to sputter in two times.With Al between source electrode connection electrode 106 and gate electrode 1012O3Insulating layer
103 separate, with SiO between source electrode connection electrode 106 and drain electrode 1092Collets 107 separate, gate electrode connection electrode 102
With SiO between drain electrode 1092Collets 108 separate.The region spaced apart of gate electrode 101 and drain electrode 109 is wrong row
(offset) region, length (spacing i.e. in radial directions) are 5 microns.
Fig. 3 is the thin film transistor (TFT) cross-sectional view with the direction y in the x-direction of first embodiment according to the present invention.Such as Fig. 3 institute
Show, thin film transistor (TFT) 100 successively includes: substrate from bottom to up；The gate electrode 101 of closed circle annular；Insulating layer 103；Closed circle
The channel layer 104 of annular；The source electrode 105 of closed circle annular and the drain electrode 109 of closed circle annular, wherein source electrode 105
In on the inside edge of channel layer 104, drain electrode 109 is located on the outer ledge of channel layer 104, and source electrode 105 is located at leakage
The inside of electrode 109.Thin film transistor (TFT) 100 further includes the gate electrode connection electrode 102 being electrically connected with gate electrode 101, with source electricity
The source electrode connection electrode 106 that pole 105 is electrically connected, the drain electrode connection electrode 110 being electrically connected with drain electrode 109 are located at electric leakage
Collets 107 between a part and source electrode connection electrode 106 of pole 109, and a part and grid positioned at drain electrode 109
Collets 108 between electrode connection electrode 102.
In the above-described embodiments, the source electrode 105 of circular ring shape is located at the inside of the drain electrode 109 of circular ring shape, when in source electricity
When applying electric field between pole 105 and drain electrode 109, electric field line is symmetrical centered on ring heart.Since there is no electric field spike,
Substantially increase its pressure-resistant performance.
Second embodiment
Fig. 4 is the preparation flow schematic diagram of the thin film transistor (TFT) of second embodiment according to the present invention.It successively include as follows
Step:
Step 1 is received on 50 microns of thick polyethylene naphthalate (PEN) substrates using magnetron sputtering preparation 50
Thick chromium (Cr) gate electrode 201 of rice and gate electrode connection electrode 202, wherein gate electrode 201 is in closed circle annular.
Step 2, using the hafnium oxide (HfO of 200 nanometer thickness of ALD deposition2) insulating layer 203.Then pass through photoetching and quarter
Erosion is patterned processing to insulating layer 203, exposes the contact plate of gate electrode 201.
Step 3 prepares indium gallium zinc oxygen (IGZO) channel layer 204 of 30 nanometer thickness using the technology of magnetron sputtering.Then it passes through
Photoetching and salt acid etch are crossed, being patterned processing to channel layer 204 makes it in closed circle annular.
Step 4, molybdenum (Mo) source electrode 205 that 100 nanometer thickness are sputtered on IGZO channel layer 204 connect electricity with source electrode
Pole 206.Wherein source electrode 205 is in closed circle annular.
Step 5 prepares the silicon nitride (Si of 300 nanometer thickness using the technology of PECVD3N4), and it is patterned, it obtains
To collets 207, wherein collets 207 are located in source electrode 205 and a part of gate electrode 201.
Step 6 sputters the Mo drain electrode 208 and drain electrode connection electrode 209 of 100 nanometer thickness.Wherein drain electrode 208 is in
Closed circle annular, drain electrode connection electrode 209 are located on collets 207.
Fig. 5 is the top view of the thin film transistor (TFT) of second embodiment according to the present invention.In thin film transistor (TFT) 200, source
Electrode 205 and drain electrode 208 need to sputter in two times.With Al between gate electrode connection electrode 202 and source electrode 2052O3Insulating layer
203 separate, with Si between drain electrode connection electrode 209 and source electrode 205, gate electrode 2013N4Collets 207 separate.Gate electrode
201 and the region spaced apart of drain electrode 208 be wrong row region (offset), length (spacing i.e. in radial directions) is
2 microns.
Fig. 6 is the thin film transistor (TFT) cross-sectional view with the direction y in the x-direction of second embodiment according to the present invention.Such as Fig. 6 institute
Show, thin film transistor (TFT) 200 successively includes: substrate from bottom to up；The gate electrode 201 of closed circle annular；Insulating layer 203；Closed circle
The channel layer 204 of annular；The source electrode 205 of closed circle annular and the drain electrode 208 of closed circle annular, wherein source electrode 205
In on the outer ledge of channel layer 204, drain electrode 208 is located on the inside edge of channel layer 204, and drain electrode 208 is located at source electricity
The inside of pole 205.Thin film transistor (TFT) 200 further includes the gate electrode connection electrode 202 being electrically connected with gate electrode 201, with source electrode
The source electrode connection electrode 206 of 205 electrical connections, the drain electrode connection electrode 209 being electrically connected with drain electrode 208, and it is located at leakage
Collets 207 between electrode connection electrode 209 and source electrode 205, a part of gate electrode 201.
In the above-described embodiments, the drain electrode 208 of circular ring shape is located at the inside of the source electrode 205 of circular ring shape, when in source electricity
When applying electric field between pole 205 and drain electrode 208, electric field line is symmetrical centered on ring heart.Since there is no electric field spike,
Substantially increase its pressure-resistant performance.
3rd embodiment
Fig. 7 is the preparation flow schematic diagram of the thin film transistor (TFT) of third embodiment according to the present invention.It successively include as follows
Step:
Step 1 prepares the aluminium zinc of 100 nanometer thickness on 50 microns of thick polyimides (PI) substrates using magnetron sputtering
Oxygen (AZO) drain electrode 301 and drain electrode connection electrode 302, wherein drain electrode 301 is in closed circle annular.
Step 2 prepares the aluminium nitride (AlN) of 300 nanometer thickness using the technology of electron beam evaporation on drain electrode 301, and
It is patterned, collets 303 and collets 304 are obtained, wherein collets 303 and collets 304 are located at drain electrode 301
On.
Step 3 sputters fluorine tin oxygen (FTO) source electrode 305 and source electrode connection electrode 306 of 100 nanometer thickness, wherein source
Electrode 305 in closed circle annular, be located at drain electrode 301 inside, between source electrode connection electrode 306 and drain electrode 301 with
Collets 303 separate.
Step 4 is prepared magnesiam-zinc-oxygen (MZO) channel layer 307 of 100 nanometer thickness using the technology of magnetron sputtering, then passed through
Photoetching and salt acid etch, being patterned processing to channel layer 307 makes it in closed circle annular.
Step 5, using the zirconium oxide (ZrO of 50 nanometer thickness of ALD deposition2) insulating layer 308, then pass through lithography and etching,
Processing is patterned to insulating layer 308, exposes the contact plate of drain electrode 301 and source electrode 305.
Step 6 sputters aluminium (Al) gate electrode 309 and gate electrode connection electrode of 100 nanometer thickness on insulating layer 308
310, wherein gate electrode 309 is in closed circle annular.
Fig. 8 is the top view of the thin film transistor (TFT) of third embodiment according to the present invention.In thin film transistor (TFT) 300, source
Electrode 305 and drain electrode 301 need to sputter in two times.With ZrO between gate electrode 309 and source electrode connection electrode 3062Insulating layer
308 separate, respectively with AlN collets 303 between drain electrode 301 and source electrode connection electrode 306, gate electrode connection electrode 310
It is separated with AlN collets 304.The region spaced apart of gate electrode 309 and drain electrode 301 is wrong row region (offset), length
Spending (spacing i.e. in radial directions) is 0.5 micron.
Fig. 9 is the thin film transistor (TFT) cross-sectional view with the direction y in the x-direction of third embodiment according to the present invention.Such as Fig. 9 institute
Show, thin film transistor (TFT) 300 successively includes: substrate from bottom to up；The drain electrode 301 of closed circle annular and the source electricity of closed circle annular
Pole 305, source electrode 305 are located at the inside of drain electrode 301；The channel layer 307 of closed circle annular, the inside edge of channel layer 307
In source electrode 305, outer ledge is located on drain electrode 301；Insulating layer 308；The gate electrode 309 of closed circle annular,
On insulating layer 308 between the inside of drain electrode 301 and the outside of source electrode 305.Thin film transistor (TFT) 300 further includes and leaks
The drain electrode connection electrode 302 that electrode 301 is electrically connected, the source electrode connection electrode 306 being electrically connected with source electrode 305, with grid electricity
The gate electrode connection electrode 310 that pole 309 is electrically connected, between a part and source electrode connection electrode 306 of drain electrode 301
Collets 304 between collets 303, and a part positioned at drain electrode 301 and gate electrode connection electrode 310.
In the above-described embodiments, the source electrode 305 of circular ring shape is located at the inside of the drain electrode 301 of circular ring shape, when in source electricity
When applying electric field between pole 305 and drain electrode 301, electric field line is symmetrical centered on ring heart.Since there is no electric field spike,
Substantially increase its pressure-resistant performance.
Fourth embodiment
Figure 10 is the preparation flow schematic diagram of the thin film transistor (TFT) of the 4th embodiment according to the present invention.It successively include as follows
Step:
Step 1 prepares gold (Au) leakage of 100 nanometer thickness on 500 microns thick of quartz glass substrate using magnetron sputtering
Electrode 401 and drain electrode connection electrode 402, wherein drain electrode 401 is in closed circle annular.
Step 2 prepares 3 microns of thick polymethyl methacrylates (PMMA) using the technology of spin coating, and carries out figure to it
Shape obtains collets 403, and wherein collets 403 are located in drain electrode connection electrode 402.
Step 3 sputters the Au source electrode 404 and source electrode connection electrode 405 of 100 nanometer thickness, and wherein source electrode 404 is in
Closed circle annular, and it is located at the outside of drain electrode 401, with collets 403 between source electrode 404 and drain electrode connection electrode 402
It separates.
Step 4 prepares the pentacene channel layer 406 of 50 nanometer thickness using the technology of physical vapour deposition (PVD) (PVD), then
The channel layer 406 in closed circle annular is formed by the graphical treatment to channel layer 406, channel layer 406 covers source electrode 404
With drain electrode 401.
Step 5 is prepared 1 micron thick of PMMA insulating layer 407 using the technology of spin coating, then carries out figure to insulating layer 407
Shapeization processing, exposes the contact plate of drain electrode 401 and source electrode 404.
Step 6 sputters the Au gate electrode 408 and gate electrode connection electrode 409 of 100 nanometer thickness, and wherein gate electrode 408 is in
Closed circle annular.
Figure 11 is the top view of the thin film transistor (TFT) of fourth embodiment according to the present invention.As shown in figure 11, in film crystalline substance
In body pipe 400, source electrode 404 and drain electrode 401 need to sputter in two times, between gate electrode connection electrode 409 and source electrode 404
It is separated with PMMA insulating layer 407, with PMMA collets 403 between drain electrode connection electrode 402 and source electrode 404, gate electrode 408
It separates.The region spaced apart of gate electrode 408 and drain electrode 401 is wrong row region (offset), and length is (i.e. in radial direction
On spacing) be 10 microns.
Figure 12 is the thin film transistor (TFT) cross-sectional view with the direction y in the x-direction of fourth embodiment according to the present invention.Such as Figure 12
Shown, thin film transistor (TFT) 400 successively includes: substrate from bottom to up；The drain electrode 401 of closed circle annular and the source of closed circle annular
Electrode 404, drain electrode 401 are located at the inside of source electrode 404；The channel layer 406 of closed circle annular, the inner side edge of channel layer 406
Edge is located on drain electrode 401, and outer ledge is located in source electrode 404；Insulating layer 407；The gate electrode 408 of closed circle annular,
On insulating layer 407 between its outside for being located at drain electrode 401 and the inside of source electrode 404.Thin film transistor (TFT) 400 further include with
The source electrode connection electrode 405 that source electrode 404 is electrically connected, the gate electrode connection electrode 409 being electrically connected with gate electrode 408, and
Collets 403 between drain electrode connection electrode 402 and source electrode 404, a part of gate electrode 408.
In the above-described embodiments, the drain electrode 401 of circular ring shape is located at the inside of the source electrode 404 of circular ring shape, when in source electricity
When applying electric field between pole 404 and drain electrode 401, electric field line is symmetrical centered on ring heart.Since there is no electric field spike,
Substantially increase its pressure-resistant performance.
5th embodiment
Figure 13 is the preparation flow schematic diagram of the field-effect diode of the 5th embodiment according to the present invention.It successively include such as
Lower step:
Step 1 prepares the ITO gate electrode 501 of 100 nanometer thickness on 125 microns of thick PET substrates using magnetron sputtering.
Step 2, using the Al of 100 nanometer thickness of ALD deposition2O3Insulating layer 502.Then it is etched by photoetching and hot phosphoric acid,
Processing is patterned to insulating layer 502, exposes the inside edge of gate electrode 501.
Step 3 is prepared the ZnO channel layer 503 of 50 nanometer thickness on insulating layer 502 using magnetron sputtering technique, then passed through
Photoetching and salt acid etch are crossed, processing is patterned to obtain the channel layer 503 of closed circle annular to channel layer 503.
Step 4 sputters the GZO drain electrode 504 and drain electrode connection electrode of 100 nanometer thickness on ZnO channel layer 503
505, wherein drain electrode 504 is in closed circle annular.
Step 5 prepares the SiO of 300 nanometer thickness using the technology of PECVD2, and it is patterned, obtain collets
506, wherein collets 506 are located in drain electrode connection electrode 505.
Step 6 sputters the GZO source electrode 507 and source electrode connection electrode 508 of 100 nanometer thickness, and wherein source electrode 507 is in
Closed circle annular.
Figure 14 is the top view of the field-effect diode of fifth embodiment according to the present invention.Scene effect diode 500
In, drain electrode 504 and source electrode 507 need to sputter in two times.With SiO between drain electrode connection electrode 505 and source electrode 5072
Collets 506 separate.The region spaced apart of gate electrode 501 and source electrode 507 is wrong row region (offset), and length is (i.e.
Spacing in radial directions) it is 5 microns.
Figure 15 is the cross-sectional view of the field-effect diode of fifth embodiment according to the present invention in the y-direction.As shown in figure 15,
Field-effect diode 500 successively includes: substrate from bottom to up；The gate electrode 501 of closed circle annular and positioned at the outer of gate electrode 501
Insulating layer 502 in side edge；The channel layer 503 of closed circle annular on insulating layer 502；The source electrode of closed circle annular
507 and closed circle annular drain electrode 504, source electrode 507 is located on the outer ledge of channel layer 503, the outside of drain electrode 504
Edge is located on the inside edge of channel layer 503, and inside edge is located on the inside edge of gate electrode 501.Drain electrode 504 with
Gate electrode 501 has been electrically connected to form the anode of field-effect diode 500, and source electrode 507 constitutes the negative of field-effect diode 500
Pole.Field-effect diode 500 further includes the drain electrode connection electrode 505 being electrically connected with drain electrode 504, is electrically connected with source electrode 507
The source electrode connection electrode 508 connect, and the collets 506 between drain electrode connection electrode 505 and source electrode 507.
In the above-described embodiments, the drain electrode 504 of circular ring shape is located at the inside of the source electrode 507 of circular ring shape, when in source electricity
When applying electric field between pole 507 and drain electrode 504, electric field line is symmetrical centered on ring heart.Since there is no electric field spike,
Substantially increase its pressure-resistant performance.
Sixth embodiment
Figure 16 is the preparation flow schematic diagram of the field-effect diode of the 6th embodiment according to the present invention.It successively include such as
Lower step:
Step 1 prepares the Cr gate electrode 601 of 50 nanometer thickness on 50 microns thick of PEN substrate using magnetron sputtering.
Step 2, using the HfO of 200 nanometer thickness of ALD deposition2Then insulating layer 602 passes through lithography and etching, to insulation
Layer 602 is patterned processing to obtain circular insulating layer 602, exposes the outer ledge of gate electrode 601.
Step 3 prepares the IGZO channel layer 603 of 30 nanometer thickness, so on insulating layer 602 using the technology of magnetron sputtering
Afterwards by photoetching and salt acid etch, processing is patterned to obtain the channel layer 603 of closed circle annular to channel layer 603.
Step 4 sputters the Mo drain electrode 604 and drain electrode connection electrode of 100 nanometer thickness on IGZO channel layer 603
605, wherein drain electrode 604 is in closed circle annular.
Step 5 prepares the Si of 300 nanometer thickness using the technology of PECVD3N4, and it is patterned, obtain collets
606, wherein collets 606 are located on drain electrode 604.
Step 6 sputters the Mo source electrode 607 and source electrode connection electrode 608 of 100 nanometer thickness, and wherein source electrode 607 is in
Closed circle annular, source electrode connection electrode 608 are located on collets 606.
Figure 17 is the top view of the field-effect diode of sixth embodiment according to the present invention.Scene effect diode 600
In, source electrode 607 and drain electrode 604 need to sputter in two times.Source electrode connection electrode 608 and gate electrode 601, drain electrode 604
Between with Si3N4Collets 606 separate.The region spaced apart of gate electrode 601 and source electrode 607 is wrong row region (offset),
Its length (spacing i.e. in radial directions) is 2 microns.
Figure 18 is the cross-sectional view of the field-effect diode of sixth embodiment according to the present invention in the y-direction.As shown in figure 18,
Field-effect diode 600 successively includes: substrate from bottom to up；The gate electrode 601 of closed circle annular and in gate electrode 601
Insulating layer 602 in side edge；The channel layer 603 of closed circle annular on insulating layer 602；The source electrode of closed circle annular
607 and closed circle annular drain electrode 604, source electrode 607 is located on the inside edge of channel layer 603, the inside of drain electrode 604
Edge is located on the outer ledge of channel layer 603, and outer ledge is located on the outer ledge of gate electrode 601, thus drain electrode
604 have been electrically connected to form the anode of field-effect diode 600 with gate electrode 601, and source electrode 607 constitutes field-effect diode
600 cathode.Field-effect diode 600 further includes the drain electrode connection electrode 605 being electrically connected with drain electrode 604, with source electrode
The source electrode connection electrodes 608 of 607 electrical connections, and be located at gate electrode 601, drain electrode 604 and source electrode connection electrode 608 it
Between collets 606.
In the above-described embodiments, the source electrode 607 of circular ring shape is located at the inside of the drain electrode 604 of circular ring shape, when in source electricity
When applying electric field between pole 607 and drain electrode 604, electric field line is symmetrical centered on ring heart.Since there is no electric field spike,
Substantially increase its pressure-resistant performance.
7th embodiment
Figure 19 is the preparation flow schematic diagram of the field-effect diode of the 7th embodiment according to the present invention.It successively include such as
Lower step:
Step 1, used on 50 microns thick of PI substrate magnetron sputtering prepare 100 nanometer thickness AZO source electrode 701 with
And source electrode connection electrode 702.
Step 2, the AlN of 300 nanometer thickness is prepared using the technology of electron beam evaporation, and is patterned it to obtain
Collets 703, wherein collets 703 are located in source electrode 701.
Step 3 prepares the MZO channel layer 704 of 100 nanometer thickness using the technology of magnetron sputtering, then passes through photoetching and salt
Acid etch is patterned processing to channel layer 704 to obtain the channel layer 704 of closed circle annular.
Step 4 sputters the FTO drain electrode 705 and drain electrode connection electrode 706 of 100 nanometer thickness, and wherein drain electrode 705 is in
Closed circle annular, drain electrode 705 is located on channel layer 704, with collets between drain electrode connection electrode 706 and source electrode 701
703 separate.
Step 5, using the ZrO of 50 nanometer thickness of ALD deposition2Then insulating layer 707 passes through lithography and etching, to insulating layer
707 are patterned processing to expose the contact plate of drain electrode 705 and source electrode 701.
Step 6 sputters the Al gate electrode 708 of 100 nanometer thickness, and wherein gate electrode 708 is in closed circle annular.
Figure 20 is the top view of the field-effect diode of seventh embodiment according to the present invention.Scene effect diode 700
In, source electrode 701 and drain electrode 705 need to sputter in two times.It is exhausted with AlN between drain electrode connection electrode 706 and source electrode 701
Edge block 703 separates.The region spaced apart of gate electrode 708 and source electrode 701 is wrong row region (offset), and length (exists
Spacing in the radial direction) it is 0.5 micron.
Figure 21 is the cross-sectional view of the field-effect diode of seventh embodiment according to the present invention in the y-direction.As shown in figure 21,
Field-effect diode 700 successively includes: substrate from bottom to up；The source electrode 701 of closed circle annular and the channel of closed circle annular
Layer 704, the outer ledge of channel layer 704 is located in source electrode 701；The drain electrode of closed circle annular on channel layer 704
705 and insulating layer 707, a part of insulating layer 707 be located on the outer ledge of drain electrode 705；And the grid of closed circle annular
The outer ledge of electrode 708, gate electrode 708 is located on insulating layer 707, and inside edge is located at the inside edge of drain electrode 705
On, thus gate electrode 708 and drain electrode 705 have been electrically connected to form the anode of field-effect diode 700, and source electrode 701 constitutes
The cathode of field-effect diode 700.Field-effect diode 700 further includes the source electrode connection electrode being electrically connected with source electrode 701
702, the drain electrode connection electrode 706 being electrically connected with drain electrode 705, and it is located at drain electrode connection electrode 706 and source electrode 701
Between collets 703.
In the above-described embodiments, the drain electrode 705 of circular ring shape is located at the inside of the source electrode 701 of circular ring shape, when in source electricity
When applying electric field between pole 701 and drain electrode 705, electric field line is symmetrical centered on ring heart.Since there is no electric field spike,
Substantially increase its pressure-resistant performance.
8th embodiment
Figure 22 is the preparation flow schematic diagram of the field-effect diode of the 8th embodiment according to the present invention.It successively include such as
Lower step:
Step 1 prepares the Au source electrode of 100 nanometer thickness on 500 microns thick of quartz glass substrate using magnetron sputtering
801 and source electrode connection electrode 802.
Step 2 prepares 3 microns of thick PMMA using the technology of spin coating, and is patterned to it, obtains collets
803, wherein collets 803 are located in source electrode connection electrode 802.
Step 3 prepares the pentacene channel layer 804 of 50 nanometer thickness using the technology of PVD, then carries out to channel layer 804
Graphical treatment is to obtain the channel layer 804 of closed circle annular.
Step 4 sputters the Au drain electrode 805 and drain electrode connection electrode 806 of 100 nanometer thickness, and wherein drain electrode 805 is in
Closed circle annular, drain electrode 805 are located on channel layer 804, are separated between source electrode connection electrode 802 with collets 803.
Step 5 prepares 1 micron thick of PMMA insulating layer 807 using the technology of spin coating, then by insulating layer 807 into
Row graphical treatment exposes the contact plate of drain electrode 805 and source electrode 801.
Step 6 sputters the Au gate electrode 808 of 100 nanometer thickness, and wherein gate electrode 808 is in closed circle annular.
Figure 23 is the top view of the field-effect diode of the 8th embodiment according to the present invention.Scene effect diode 800
In, source electrode 801 and drain electrode 805 need to sputter in two times.Source electrode connection electrode 802 and drain electrode 805, gate electrode 808
Between separated with PMMA collets 803.The region spaced apart of gate electrode 808 and source electrode 801 is wrong row region (offset),
Its length (spacing i.e. in radial directions) is 10 microns.
Figure 24 is the cross-sectional view of the field-effect diode of the 8th embodiment according to the present invention in the y-direction.As shown in figure 24,
Field-effect diode 800 successively includes: substrate from bottom to up；The source electrode 801 of closed circle annular and the channel of closed circle annular
Layer 804, the inside edge of channel layer 804 is located in source electrode 801；The drain electrode of closed circle annular on channel layer 804
805 and insulating layer 807, a part of insulating layer 807 be located on the inside edge of drain electrode 805；And the grid of closed circle annular
The inside edge of electrode 808, gate electrode 808 is located on insulating layer 807, and outer ledge is located at the outer ledge of drain electrode 805
On, thus gate electrode 808 and drain electrode 805 have been electrically connected to form the anode of field-effect diode 800, and source electrode 801 constitutes
The cathode of field-effect diode 800.Field-effect diode 800 further includes the source electrode connection electrode being electrically connected with source electrode 801
802, the drain electrode connection electrode 806 being electrically connected with drain electrode 805, and it is located at source electrode connection electrode 802 and drain electrode
805, the collets 803 between gate electrode 808.
In the above-described embodiments, the source electrode 801 of circular ring shape is located at the inside of the drain electrode 805 of circular ring shape, when in source electricity
When applying electric field between pole 801 and drain electrode 805, electric field line is symmetrical centered on ring heart.Since there is no electric field spike,
Substantially increase its pressure-resistant performance.
In an embodiment of the present invention, substrate material is not limited to PEN, PET, PI, quartz glass, can also be sapphire,
GaAs (GaAs), PMMA, dimethyl silicone polymer (PDMS), polyvinyl chloride (PVC), polystyrene (PS) or polycarbonate
(PC) etc..Electrode material is not limited to ITO, AZO, Cr, Au, Al, can also be carbon nanotube, graphene, silver, copper or nickel etc..
Insulating layer material is not limited to Al2O3、SiO2、PMMA、HfO2、ZrO2、Si3N4And AlN, it can also be tantalum oxide (Ta2O5) or
Polyvinylpyrrolidone etc..The material of channel layer is not limited to ZnO, IGZO, MZO and pentacene, can also be amorphous silicon hydride (a-
Si:H), silicon nitride (GaN), GaAs (GaAs), carbon nanotube (CNT), molybdenum disulfide (MoS2), indium zinc oxygen (IZO), zinc-tin
Oxygen (ZTO) or 3- hexyl thiophene (P3HT) etc..Film growth techniques in the present invention include but is not limited to atomic layer deposition, magnetic control
Sputtering, electron beam steam product, pulsed laser deposition, metal-organic chemical vapor deposition equipment, spin coating, drop coating, spraying, printing or printing
Technique etc..
Although the invention patent has been described by means of preferred embodiments, the invention patent is not limited to this
In described embodiment, further include made various changes and change in the case where not departing from the invention patent range
Change.
Claims (14)
1. a kind of thin film transistor (TFT) characterized by comprising
Insulating layer；
Positioned at the channel layer of the closed circle annular of the opposite sides of the insulating layer and the gate electrode of closed circle annular；And
The source electrode for the closed circle annular being in contact with the channel layer and the drain electrode of closed circle annular.
2. thin film transistor (TFT) according to claim 1, which is characterized in that the thin film transistor (TFT) further includes being used to support institute
The substrate of gate electrode is stated, the insulating layer is located on the gate electrode, and the channel layer is located on the insulating layer, the source electricity
Pole and drain electrode are located on the channel layer.
3. thin film transistor (TFT) according to claim 2, which is characterized in that the source electrode is located at the inside of the channel layer
On edge, the drain electrode is located on the outer ledge of the channel layer, and the source electrode is located at the inside of the drain electrode；
Wherein, the thin film transistor (TFT) further include:
The gate electrode connection electrode being electrically connected with the gate electrode；
The source electrode connection electrode being electrically connected with the source electrode；
The drain electrode connection electrode being electrically connected with the drain electrode；
The first collets between a part and source electrode connection electrode of the drain electrode；And
The second collets between a part and gate electrode connection electrode of the drain electrode.
4. thin film transistor (TFT) according to claim 2, which is characterized in that the source electrode is located at the outside of the channel layer
On edge, the drain electrode is located on the inside edge of the channel layer, and the drain electrode is located at the inside of the source electrode；
Wherein, the thin film transistor (TFT) further include:
The gate electrode connection electrode being electrically connected with the gate electrode；
The source electrode connection electrode being electrically connected with the source electrode；
The drain electrode connection electrode being electrically connected with the drain electrode；
And the collets between the drain electrode connection electrode and the source electrode, a part of gate electrode.
5. thin film transistor (TFT) according to claim 1, which is characterized in that the thin film transistor (TFT) further includes being used to support institute
The substrate of drain electrode, source electrode and channel layer is stated, the insulating layer is located on the channel layer, and the gate electrode is located at the leakage
On insulating layer between electrode and source electrode.
6. thin film transistor (TFT) according to claim 5, which is characterized in that the inside edge of the channel layer is located at the source
On electrode, outer ledge is located on the drain electrode, and the source electrode is located at the inside of the drain electrode；
Wherein, the thin film transistor (TFT) further include:
The drain electrode connection electrode being electrically connected with the drain electrode；
The source electrode connection electrode being electrically connected with the source electrode；
The gate electrode connection electrode being electrically connected with the gate electrode；
The first collets between a part and the source electrode connection electrode of the drain electrode；And
The second collets between a part and the gate electrode connection electrode of the drain electrode.
7. thin film transistor (TFT) according to claim 5, which is characterized in that the inside edge of the channel layer is located at the leakage
On electrode, outer ledge is located in the source electrode, and the drain electrode is located at the inside of the source electrode；
Wherein, the thin film transistor (TFT) further include:
The drain electrode connection electrode being electrically connected with the drain electrode；
The source electrode connection electrode being electrically connected with the source electrode；
The gate electrode connection electrode being electrically connected with the gate electrode；And
Collets between the drain electrode connection electrode and the source electrode, a part of gate electrode.
8. a kind of field-effect diode characterized by comprising
Insulating layer；
Positioned at the channel layer of the closed circle annular of the opposite sides of the insulating layer and the gate electrode of closed circle annular；And
The source electrode for the closed circle annular being in contact with the channel layer and the drain electrode of closed circle annular；The drain electrode and institute
State gate electrode electrical connection.
9. field-effect diode according to claim 8, which is characterized in that the field-effect diode further includes for branch
The substrate of the gate electrode and insulating layer is supportted, the insulating layer is located in a part of the gate electrode, and the channel layer is located at
On the insulating layer, the source electrode and drain electrode is located on the channel layer.
10. field-effect diode according to claim 9, which is characterized in that the insulating layer is located at the gate electrode
On outer ledge, the source electrode is located on the outer ledge of the channel layer, and the outer ledge of the drain electrode is located at described
On the inside edge of channel layer, inside edge is located on the inside edge of the gate electrode；
Wherein, the field-effect diode further include:
The drain electrode connection electrode being electrically connected with the drain electrode；
The source electrode connection electrode being electrically connected with the source electrode；And
Collets between the drain electrode connection electrode and the source electrode.
11. field-effect diode according to claim 9, which is characterized in that the insulating layer is located at the gate electrode
On inside edge, the source electrode is located on the inside edge of the channel layer, and the inside edge of the drain electrode is located at described
On the outer ledge of channel layer, outer ledge is located on the outer ledge of the gate electrode；
Wherein, the field-effect diode further include:
The drain electrode connection electrode being electrically connected with the drain electrode；
The source electrode connection electrode being electrically connected with the source electrode；And
Collets between the source electrode connection electrode and the drain electrode, gate electrode.
12. field-effect diode according to claim 8, which is characterized in that the field-effect diode further includes being used for
The substrate of the source electrode and channel layer is supported, a part of the channel layer is located in the source electrode, the insulating layer
A part is located in a part of the drain electrode, and a part of the gate electrode is located on the insulating layer, and another part
It is electrically connected with the drain electrode.
13. field-effect diode according to claim 12, which is characterized in that the outer ledge of the channel layer is located at institute
It states in source electrode, the drain electrode is located on the inside edge of the channel layer, and a part of the insulating layer is located at the leakage
On the outer ledge of electrode, the outer ledge of the gate electrode is located on the insulating layer, and inside edge is located at the electric leakage
On the inside edge of pole；
Wherein, the field-effect diode further include:
The source electrode connection electrode being electrically connected with the source electrode；
The drain electrode connection electrode being electrically connected with the drain electrode；And
Collets between the drain electrode connection electrode and source electrode.
14. field-effect diode according to claim 12, which is characterized in that the inside edge of the channel layer is located at institute
It states in source electrode, the drain electrode is located on the outer ledge of the channel layer, and a part of the insulating layer is located at the leakage
On the inside edge of electrode, the inside edge of the gate electrode is located on the insulating layer, and outer ledge is located at the electric leakage
On the outer ledge of pole；
Wherein, the field-effect diode further include:
The source electrode connection electrode being electrically connected with source electrode；
The drain electrode connection electrode being electrically connected with drain electrode；And
Collets between source electrode connection electrode and drain electrode, gate electrode.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109935637A (en) * | 2019-03-19 | 2019-06-25 | 中国科学院物理研究所 | A kind of high voltage thin film transistor |
| CN110061063A (en) * | 2019-04-24 | 2019-07-26 | 中国科学院微电子研究所 | Field effect transistor tube preparation method and field effect transistor |
| CN110190133A (en) * | 2019-05-29 | 2019-08-30 | 上海大学 | Solar battery inverter of MgZnO film transistor of circular configuration and preparation method thereof |
| CN111952189A (en) * | 2020-08-21 | 2020-11-17 | 中国科学院上海微***与信息技术研究所 | Annular grid field effect transistor based on cavity surrounding structure and preparation method |
| CN115101608A (en) * | 2022-06-16 | 2022-09-23 | 中国科学院半导体研究所 | Graphene infrared detector |
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| CN207925480U (en) * | 2017-08-21 | 2018-09-28 | 中国科学院物理研究所 | Thin film transistor (TFT) and field-effect diode |
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| CN110190133A (en) * | 2019-05-29 | 2019-08-30 | 上海大学 | Solar battery inverter of MgZnO film transistor of circular configuration and preparation method thereof |
| CN111952189A (en) * | 2020-08-21 | 2020-11-17 | 中国科学院上海微***与信息技术研究所 | Annular grid field effect transistor based on cavity surrounding structure and preparation method |
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| CN207925480U (en) | 2018-09-28 |
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