CN109244086A - 一种阵列基板及其制作方法、显示面板、显示装置 - Google Patents
一种阵列基板及其制作方法、显示面板、显示装置 Download PDFInfo
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- 239000000758 substrate Substances 0.000 title claims abstract description 127
- 238000002360 preparation method Methods 0.000 title abstract description 7
- 238000009413 insulation Methods 0.000 claims abstract description 57
- 239000004020 conductor Substances 0.000 claims abstract description 45
- 239000010949 copper Substances 0.000 claims abstract description 15
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 10
- 229910052802 copper Inorganic materials 0.000 claims abstract description 10
- 239000010409 thin film Substances 0.000 claims description 20
- 239000010408 film Substances 0.000 claims description 14
- 238000004519 manufacturing process Methods 0.000 claims description 13
- 238000002161 passivation Methods 0.000 claims description 10
- 239000000463 material Substances 0.000 claims description 9
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 3
- 239000001257 hydrogen Substances 0.000 claims description 3
- 229910052739 hydrogen Inorganic materials 0.000 claims description 3
- -1 hydrogen ions Chemical class 0.000 claims description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 3
- 229920005591 polysilicon Polymers 0.000 claims description 3
- 239000004332 silver Substances 0.000 claims description 2
- 229910001923 silver oxide Inorganic materials 0.000 claims description 2
- GRCJTSHIYCFXFK-UHFFFAOYSA-N [O--].[O--].[O--].[O--].[Ag+].[In+3].[Sn+4] Chemical compound [O--].[O--].[O--].[O--].[Ag+].[In+3].[Sn+4] GRCJTSHIYCFXFK-UHFFFAOYSA-N 0.000 claims 1
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 238000005516 engineering process Methods 0.000 abstract description 13
- 238000010009 beating Methods 0.000 abstract description 3
- 238000000034 method Methods 0.000 description 11
- 239000011521 glass Substances 0.000 description 7
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- 229910001092 metal group alloy Inorganic materials 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
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- 238000004080 punching Methods 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- QCEUXSAXTBNJGO-UHFFFAOYSA-N [Ag].[Sn] Chemical compound [Ag].[Sn] QCEUXSAXTBNJGO-UHFFFAOYSA-N 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
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- GPRLSGONYQIRFK-UHFFFAOYSA-N hydron Chemical compound [H+] GPRLSGONYQIRFK-UHFFFAOYSA-N 0.000 description 1
- 229910003437 indium oxide Inorganic materials 0.000 description 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
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- 239000011733 molybdenum Substances 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
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- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- OFIYHXOOOISSDN-UHFFFAOYSA-N tellanylidenegallium Chemical compound [Te]=[Ga] OFIYHXOOOISSDN-UHFFFAOYSA-N 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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Abstract
本发明公开了一种阵列基板及其制作方法、显示面板、显示装置,包括衬底基板,位于衬底基板一侧的引出线和无机绝缘层;衬底基板上具有贯穿衬底基板且填充有第一导电材料的多个连接孔;无机绝缘层上具有第一通孔和第二通孔,第一通孔贯穿至第一导电材料,第二通孔贯穿至引出线;第二导电层位于第一通孔、第二通孔和无机绝缘层远离衬底基板的一侧,使得第一导电材料与引出线通过第二导电层电连接。由于可在制作引出线和无机绝缘层的高温工艺结束后,通过打第一通孔和第二通孔的方式实现引出线与第一导电材料的电连接,因此,有效保证了信号线与集成电路芯片的走线之间的连接,解决了铜等第一导电材料膨胀导致的断线不良。
Description
技术领域
本发明涉及显示技术领域,尤其涉及一种阵列基板及其制作方法、显示面板、显示装置。
背景技术
玻璃通孔(Through Glass Via,简称TGV)技术是制造三维集成电路的关键技术。一般地,TGV技术是使用激光在几百微米厚的玻璃上打通宽度为数十微米至几百个微米的通孔,然后在通孔中填充铜(Cu)来连接电子元器件。
发明内容
本发明实施例提供一种阵列基板及其制作方法、显示面板及显示装置,用以解决Cu膨胀导致的断线不良的问题。
因此,本发明实施例提供的一种阵列基板,包括衬底基板,位于所述衬底基板一侧的引出线和无机绝缘层;所述衬底基板上具有贯穿所述衬底基板且填充有第一导电材料的多个连接孔;
所述无机绝缘层上具有第一通孔和第二通孔,所述第一通孔贯穿所述无机绝缘层至所述第一导电材料,所述第二通孔贯穿所述无机绝缘层至所述引出线;
在所述第一通孔、所述第二通孔和所述无机绝缘层远离所述衬底基板的一侧设置有第二导电层,以使所述第一导电材料和所述引出线通过所述第二导电层电连接。
在一种可能的实现方式中,在本发明实施例提供的上述阵列基板中,所述衬底基板上设置有薄膜晶体管,所述薄膜晶体管的信号线与所述引出线电连接。
在一种可能的实现方式中,在本发明实施例提供的上述阵列基板中,所述信号线包括栅线和数据线,所述引出线与所述栅线或所述数据线同层设置。
在一种可能的实现方式中,在本发明实施例提供的上述阵列基板中,所述引出线位于边框区域,所述信号线位于显示区域。
在一种可能的实现方式中,在本发明实施例提供的上述阵列基板中,所述薄膜晶体管包括栅绝缘层和钝化层,所述无机绝缘层包括所述栅绝缘层和所述钝化层。
在一种可能的实现方式中,在本发明实施例提供的上述阵列基板中,还包括位于所述薄膜晶体管远离所述衬底基板一侧的平坦层,所述第一通孔和所述第二通孔还贯穿所述平坦层。
在一种可能的实现方式中,在本发明实施例提供的上述阵列基板中,还包括:位于所述平坦层远离所述衬底基板一侧的微型发光二极管;
所述微型发光二极管的正负极与所述薄膜晶体管的源漏极通过第三导电部件连接。
在一种可能的实现方式中,在本发明实施例提供的上述阵列基板中,所述第三导电部件与所述第二导电层同层设置。
在一种可能的实现方式中,在本发明实施例提供的上述阵列基板中,所述薄膜晶体管为氧化物薄膜晶体管、非晶硅薄膜晶体管或低温多晶硅薄膜晶体管。
在一种可能的实现方式中,在本发明实施例提供的上述阵列基板中,所述第一导电材料为铜。
在一种可能的实现方式中,在本发明实施例提供的上述阵列基板中,所述第二导电层的材料为银/氧化铟锡/银。
在一种可能的实现方式中,在本发明实施例提供的上述阵列基板中,还包括:位于所述衬底基板另一侧的第一绝缘层、第二绝缘层和集成电路芯片;
所述第一绝缘层和所述第二绝缘层上具有贯穿二者的第三通孔,所述第三通孔对应所述连接孔;
所述集成电路芯片的走线通过所述第三通孔与所述第一导电材料电连接。
相应地,本发明实施例还提供了一种上述阵列基板的制作方法,包括:
在衬底基板上形成贯穿所述衬底基板的多个连接孔;
在各所述连接孔内填充第一导电材料;
在具有各所述连接孔的所述衬底基板上形成引出线和无机绝缘层;
在所述连接孔对应区域的所述无机绝缘层中形成贯穿至所述第一导电材料的第一通孔,同时在所述引出线对应区域的所述无机绝缘层中形成贯穿至所述引出线的第二通孔;
在所述第一通孔、所述第二通孔和所述无机绝缘层远离所述衬底基板的一侧形成第二导电层。
在一种可能的实现方式中,在本发明实施例提供的上述制作方法中,在所述第一通孔、所述第二通孔和所述无机绝缘层远离所述衬底基板的一侧形成第二导电层之前,还包括:
对第一导电材料进行氢离子还原。
基于同一发明构思,本发明实施例还提供了一种显示面板,包括上述阵列基板。
基于同一发明构思,本发明实施例还提供了一种显示装置,包括上述显示面板。
本发明有益效果如下:
本发明实施例提供的一种阵列基板及其制作方法、显示面板、显示装置,包括衬底基板,位于衬底基板一侧的引出线和无机绝缘层;衬底基板上具有贯穿衬底基板且填充有第一导电材料的多个连接孔;无机绝缘层上具有第一通孔和第二通孔,第一通孔贯穿无机绝缘层至第一导电材料,第二通孔贯穿无机绝缘层至引出线;在第一通孔、第二通孔和无机绝缘层远离衬底基板的一侧设置有第二导电层,以使第一导电材料和引出线通过第二导电层电连接。由于可在制作引出线和无机绝缘层的高温工艺结束后,通过打第一通孔和第二通孔的方式实现引出线与第一导电材料的电连接,因此,有效保证了信号线与集成电路芯片的走线之间的连接,解决了铜等第一导电材料膨胀导致的断线不良。
附图说明
图1为本发明实施例提供的阵列基板的结构示意图之一;
图2为本发明实施例提供的阵列基板的结构示意图之二;
图3为本发明实施例提供的阵列基板的制作方法流程图。
具体实施方式
下面结合附图,对本发明实施例提供的阵列基板及其制作方法、显示面板、显示装置的具体实施方式进行详细的说明。需要说明的是本说明书所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例;并且在不冲突的情况下,本申请中的实施例及实施例中的特征可以相互组合;此外,基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例,都属于本发明保护的范围。
附图中各膜层的形状和大小不反映其在阵列基板中的真实比例,目的只是示意说明本发明内容。
在将TGV技术应用于制作阵列基板时,可通过通孔中的Cu连接位于玻璃基板正面且由引出线引出的信号线和位于玻璃基板背面的集成电路芯片的走线,以实现窄边框或无边框的效果。然而,在阵列基板制作过程中的高温工艺会导致通孔中的Cu发生膨胀(swelling)而引起膜层破裂,造成信号线与集成电路芯片的走线之间的断线不良。
于是,为解决Cu膨胀导致的信号线与集成电路芯片的走线之间的断线不良这一技术问题,本发明实施例提供了一种阵列基板,如图1所示,包括衬底基板101,位于衬底基板101一侧的引出线102和无机绝缘层103;衬底基板101上具有贯穿衬底基板101且填充有第一导电材料的多个连接孔A;在实际应用时,第一导电材料可以为铜、钼、钛、钽、钨、铬、铝等金属或金属合金,在此不做限定;
无机绝缘层103上具有第一通孔B和第二通孔C,第一通孔B贯穿无机绝缘层103至第一导电材料,第二通孔C贯穿无机绝缘层103至引出线102;
在第一通孔B、第二通孔C和无机绝缘层103远离衬底基板101的一侧设置有第二导电层104,以使第一导电材料和引出线102通过第二导电层104电连接;具体地,第二导电层104的材料为Ag/ITO/Ag,当然也可以为其他导电材料,在此不做限定。
在本发明实施例提供的上述阵列基板中,由于可在制作引出线102和无机绝缘层103的高温工艺结束后,通过打第一通孔B和第二通孔C的方式,使得引出线102通过第二导电层104与第一导电材料(例如铜)电连接,因此,有效保证了衬底基板101正面由引出线102引出的信号线,与衬底基板101背面与第一导电材料电连接的集成电路芯片的走线之间的连接,解决了铜等第一导电材料膨胀导致的断线不良。
在本发明实施例提供的上述阵列基板中,如图1所示,衬底基板101上还设置有薄膜晶体管105,薄膜晶体管105的信号线与引出线102电连接。具体地,薄膜晶体管105可以为氧化物薄膜晶体管、非晶硅薄膜晶体管或低温多晶硅薄膜晶体管,在此不做限定。并且,薄膜晶体管105可以为顶栅型薄膜晶体管,也可以为底栅型薄膜晶体管,在此也不做限定。
具体地,在本发明实施例提供的上述阵列基板中,信号线可以包括栅线和数据线,引出线102可以与栅线同层设置,或者,还可以与数据线同层设置。并且,一般地,如图2所示,信号线位于显示区域AA,引出线102位于显示区域AA周围的边框区域。栅线与栅极107同层设置,数据线与源漏极109同层设置。图1具体示出了引出线102与栅线(即栅极107)同层设置,此时可通过打孔的方式实现引出线102与其异层设置的数据线之间的连接,以通过引出线102将数据线引出至第二通孔C处;而与栅线同层设置用于引出栅线的引出线102,则可以相当于栅线自显示区域边界延伸至边框区域的第二通孔C的部分,以此实现引出线102将栅线引出至第二通孔C处。同理,在引出线102与数据线(即源漏极109)同层设置时,可通过打孔的方式实现引出线102与其异层设置的栅线之间的连接,以通过引出线102将栅线引出至第二通孔C处;而与数据线同层设置用于引出数据线的引出线102,则可以相当于数据线自显示区域边界延伸至边框区域的第二通孔C的部分,以此实现引出线102将数据线引出至第二通孔C处。
在本发明实施例提供的上述阵列基板中,如图1所示,一般地,薄膜晶体管105可以包括栅绝缘层1031、钝化层1032和有源层108,则无机绝缘层103具体可以包括栅绝缘层1031和钝化层1032。
在具体实施时,在本发明实施例提供的上述阵列基板中,如图1所示,还可以包括位于薄膜晶体管105远离衬底基板101一侧的平坦层106,第一通孔B和第二通孔C还贯穿平坦层106。
在本发明实施例提供的上述阵列基板中,如图1所示,还可以包括:位于平坦层106远离衬底基板101一侧的微型发光二极管ULED;每个微型发光二极管ULED能够像有机电致发光二极管OLED一样单独驱动发光,不同的是,由于微型发光二极管ULED采用无机材料制作,因此微型发光二极管ULED克服了有机电致发光二极管OLED屏幕烧屏以及寿命短的缺点,同时微型发光二极管ULED具有响应速度快,高对比度,高色彩饱和度,能够实现超高解析度,结构简单,能够实现轻薄弯曲等优点。
为实现每个微型发光二极管ULED被单独驱动发光,可设置微型发光二极管ULED的正负极与薄膜晶体管105的源漏极109通过第三导电部件连接。具体地,为简化制作工艺,第三导电部件与第二导电层104同层设置,即第三导电部件的材质与第二导电层104的材质相同,可采用一次构图工艺同时形成第三导电部件与第二导电层104。
在本发明实施例提供的上述阵列基板中,如图1所示,还可以包括:位于衬底基板101另一侧的第一绝缘层110、第二绝缘层111和集成电路芯片(图中未示出);
第一绝缘层110和第二绝缘层111上具有贯穿二者的第三通孔D,第三通孔D对应连接孔A;具体地,第三通孔D对应连接孔A是指第三通孔D在衬底基板101上的正投影与连接孔A在衬底基板101上的正投影至少部分重叠。
集成电路芯片的走线112通过第三通孔D与连接孔A内的第一导电材料电连接。具体地,第三通孔D内填充有与集成电路芯片的走线112材质相同的导电材料。
相应地,针对本发明实施例提供的上述阵列基板,本发明实施例还提供了一种制作方法,如图3所示,包括:
S301、在衬底基板上形成贯穿衬底基板的多个连接孔;
S302、在各连接孔内填充第一导电材料;
S303、在具有各连接孔的衬底基板上形成引出线和无机绝缘层;
S304、在连接孔对应区域的无机绝缘层中形成贯穿至第一导电材料的第一通孔,同时在引出线对应区域的无机绝缘层中形成贯穿至引出线的第二通孔;
S305、在第一通孔、第二通孔和无机绝缘层远离衬底基板的一侧形成第二导电层。
在本发明实施例提供的上述制作方法中,在后续形成无机绝缘层中的第一通孔和第二通孔后,导致第一导电材料裸露,以致第一导电材料会被氧化,因此在执行步骤S305在第一通孔、第二通孔和无机绝缘层远离衬底基板的一侧形成第二导电层之前,还可以执行以下步骤:
对第一导电材料进行氢离子还原。
下面以一个具体的实施例对本发明提供的制作方法进行详细介绍。在该具体实施例中制作的阵列基板的结构如图1所示。
第一步,在衬底基板101例如玻璃基板上采用玻璃通孔(TGV)技术形成贯穿衬底基板101的多个连接孔A;
第二步,在多个连接孔A内注入第一导电材料例如铜;
第三步,在衬底基板101的一侧(即正面)依次构图形成栅极107(包括栅线和引出线102)、栅绝缘层1031、有源层108、源漏极109(包括数据线)、钝化层1032和平坦层106的图形;其中,栅绝缘层1031和钝化层1032共同构成无机绝缘层103;用于引出栅线的引出线102位于栅线的延伸方向上,用于引出数据线的引出线102通过贯穿栅绝缘层1031的过孔与数据线连接;
第四步,在连接孔A所在区域对应形成贯穿膨胀后的第一导电材料之上膜层的第一通孔B,并在引出线102未连接栅线或数据线的另一端所在区域对应形成贯穿栅绝缘层1031、钝化层1032和平坦层106的第二通孔C,同时在源漏极109所在区域对应形成贯穿钝化层1032和平坦层106的过孔;
第五步,采用氢离子(H Plasma)对第一通孔B处裸露的第一导电材料进行还原;
第六步,在第一通孔B、第二通孔C和无机绝缘层103远离衬底基板101的一侧(具体为平坦层106)上形成Ag/ITO/Ag材料层(即第二导电层104),实现第一导电材料和引出线102的电连接;同时在源漏极109所在区域对应的过孔内沉积Ag/ITO/Ag(即第三导电部件);
第七步,通过Ag/ITO/Ag(即第三导电部件)将微型发光二极管ULED的正负极分别绑定(bonding)在源漏极109上;
第八步,在衬底基板101的另一侧(即背面)沉积第一绝缘层110和第二绝缘层111;
第九步,在连接孔A所在区域对应的第一绝缘层110和第二绝缘层111上,采用硅通孔(TSV)技术形成贯穿第一绝缘层110和第二绝缘层111的第三通孔D;且第三通孔D在衬底基板101上的正投影与连接孔A在衬底基板101上的正投影至少部分重叠;
第十步,在第二绝缘层111远离第一绝缘层110一侧的表面上构图形成集成电路芯片的走线112,并将集成电路芯片与其走线进行绑定。可以理解的是,在构图形成集成电路芯片的走线的过程中,第三通孔C内会被填充为与集成电路芯片的走线112材质相同的导电材料。
至此,制作出了图1所示的阵列基板。
需要说明的是,在本发明实施例提供的上述制作方法中,形成各膜层结构涉及到的构图工艺,不仅可以包括沉积、光刻胶涂覆、掩模板掩模、曝光、显影、刻蚀、光刻胶剥离等部分或全部的工艺过程,还可以包括其他工艺过程,例如,在显影之后和刻蚀之前还可以包括后烘工艺。具体以实际制作过程中形成所需构图的图形为准,在此不做限定。
其中,沉积工艺可以为化学气相沉积法、等离子体增强化学气相沉积法或物理气相沉积法,在此不做限定;掩膜工艺中所用的掩膜板可以为半色调掩膜板(Half ToneMask)、单缝衍射掩模板(Single Slit Mask)或灰色调掩模板(GrayTone Mask),在此不做限定;刻蚀可以为干法刻蚀或者湿法刻蚀,在此不做限定。
由上述描述可以看出,在本发明实施例提供的阵列基板中,在制作完衬底基板101正面的各膜层后,后续正面不再有高温工艺,再通过无机绝缘层103中形成第一通孔B和第二通孔C,并在第一通孔B、第二通孔C和无机绝缘层103上形成第二导电层104的方式实现栅线和数据线与集成电路芯片的走线112之间的电连接,即可以解决铜等第一导电材料膨胀造成的断线不良。并且,因集成电路芯片的走线112位于衬底基板101的背面,从而减少了正面布线数量,实现了窄边框或无边框的技术效果。
基于同一发明构思,本发明实施例提供了一种包括上述阵列基板的显示面板,由于该显示面板解决问题的原理与上述阵列基板解决问题的原理相似,因此,本发明实施例提供的该显示面板的实施可以参见本发明实施例提供的上述阵列基板的实施,重复之处不再赘述。
基于同一发明构思,本发明实施例还提供了一种显示装置,包括上述显示面板,该显示装置可以为:手机、平板电脑、电视机、显示器、笔记本电脑、数码相机、导航仪、智能手表、健身腕带、个人数字助理、自助存/取款机等任何具有显示功能的产品或部件。对于显示装置的其它必不可少的组成部分均为本领域的普通技术人员应该理解具有的,在此不做赘述,也不应作为对本发明的限制。该显示装置的实施可以参见上述显示面板的实施例,重复之处不再赘述。
需要说明的是,在本文中,诸如第一和第二之类的关系术语仅仅用来将一个实体或操作与另一个实体或操作区分开来,而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。
显然,本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。
Claims (16)
1.一种阵列基板,包括衬底基板,位于所述衬底基板一侧的引出线和无机绝缘层;所述衬底基板上具有贯穿所述衬底基板且填充有第一导电材料的多个连接孔;其特征在于:
所述无机绝缘层上具有第一通孔和第二通孔,所述第一通孔贯穿所述无机绝缘层至所述第一导电材料,所述第二通孔贯穿所述无机绝缘层至所述引出线;
在所述第一通孔、所述第二通孔和所述无机绝缘层远离所述衬底基板的一侧设置有第二导电层,以使所述第一导电材料和所述引出线通过所述第二导电层电连接。
2.如权利要求1所述的阵列基板,其特征在于,所述衬底基板上设置有薄膜晶体管,所述薄膜晶体管的信号线与所述引出线电连接。
3.如权利要求2所述的阵列基板,其特征在于,所述信号线包括栅线和数据线,所述引出线与所述栅线或所述数据线同层设置。
4.如权利要求2所述的阵列基板,其特征在于,所述引出线位于边框区域,所述信号线位于显示区域。
5.如权利要求2所述的阵列基板,其特征在于,所述薄膜晶体管包括栅绝缘层和钝化层,所述无机绝缘层包括所述栅绝缘层和所述钝化层。
6.如权利要求2所述的阵列基板,其特征在于,还包括位于所述薄膜晶体管远离所述衬底基板一侧的平坦层,所述第一通孔和所述第二通孔还贯穿所述平坦层。
7.如权利要求6所述的阵列基板,其特征在于,还包括:位于所述平坦层远离所述衬底基板一侧的微型发光二极管;
所述微型发光二极管的正负极与所述薄膜晶体管的源漏极通过第三导电部件连接。
8.如权利要求7所述的阵列基板,其特征在于,所述第三导电部件与所述第二导电层同层设置。
9.如权利要求2所述的阵列基板,其特征在于,所述薄膜晶体管为氧化物薄膜晶体管、非晶硅薄膜晶体管或低温多晶硅薄膜晶体管。
10.如权利要求1-9任一项所述的阵列基板,其特征在于,所述第一导电材料为铜。
11.如权利要求1-9任一项所述的阵列基板,其特征在于,所述第二导电层的材料为银/氧化铟锡/银。
12.如权利要求1-9任一项所述的阵列基板,其特征在于,还包括:位于所述衬底基板另一侧的第一绝缘层、第二绝缘层和集成电路芯片;
所述第一绝缘层和所述第二绝缘层上具有贯穿二者的第三通孔,所述第三通孔对应所述连接孔;
所述集成电路芯片的走线通过所述第三通孔与所述第一导电材料电连接。
13.一种如权利要求1-12任一项所述的阵列基板的制作方法,其特征在于,包括:
在衬底基板上形成贯穿所述衬底基板的多个连接孔;
在各所述连接孔内填充第一导电材料;
在具有各所述连接孔的所述衬底基板上形成引出线和无机绝缘层;
在所述连接孔对应区域的所述无机绝缘层中形成贯穿至所述第一导电材料的第一通孔,同时在所述引出线对应区域的所述无机绝缘层中形成贯穿至所述引出线的第二通孔;
在所述第一通孔、所述第二通孔和所述无机绝缘层远离所述衬底基板的一侧形成第二导电层。
14.如权利要求13所述的制作方法,其特征在于,在所述第一通孔、所述第二通孔和所述无机绝缘层远离所述衬底基板的一侧形成第二导电层之前,还包括:
对第一导电材料进行氢离子还原。
15.一种显示面板,其特征在于,包括如权利要求1-12任一项所述的阵列基板。
16.一种显示装置,其特征在于,包括如权利要求15所述的显示面板。
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