CN109194347A - It is a kind of for minimizing the intermediate-frequency circuit of ODU receiving channel - Google Patents
It is a kind of for minimizing the intermediate-frequency circuit of ODU receiving channel Download PDFInfo
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- CN109194347A CN109194347A CN201811190610.7A CN201811190610A CN109194347A CN 109194347 A CN109194347 A CN 109194347A CN 201811190610 A CN201811190610 A CN 201811190610A CN 109194347 A CN109194347 A CN 109194347A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
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- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
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- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
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Abstract
The invention discloses a kind of for minimizing the intermediate-frequency circuit of ODU receiving channel, including signal input end of intermediate frequency, the first order intermediate-frequency filter being electrically connected with signal input end of intermediate frequency, and first order intermediate frequency amplifier, second level intermediate-frequency filter, second level intermediate frequency amplifier, the third level intermediate-frequency filter being sequentially connected in series, constitute the intermediate-frequency channel circuit of two-stage amplification and three-level filtering.Also, also further grade is associated with gainequalizer and temperature compensation attenuator after third level intermediate-frequency filter.This circuit can very well filter out clutter, the harmonic components in intermediate-freuqncy signal, and provide enough channel gains, it ensure that the characteristic that intermediate-freuqncy signal is not influenced in the flatness of entire frequency band and gain by high/low temperature, the component of selection is mainly integrated monomer component, also with advantage in terms of reducing volume, reducing cost, keep signal stabilization.
Description
Technical field
The invention belongs to fields of communication technology, more particularly to a kind of for minimizing the intermediate-frequency circuit of ODU receiving channel.
Background technique
In satellite communication equipment, ODU (Out-door Unit) refers to outdoor unit, mainly includes frequency transformation and function
Rate amplification, specific to be divided into transmission channel and receiving channel again, transmission channel typically refers to BUC (Block Up-
Converter), i.e., up-conversion power amplifier, receiving channel are primarily referred to as LNB (Low Noise Block down-
Converter), i.e. low noise amplification, frequency converter.
In satellite communication equipment, the intermediate-frequency circuit of receiving channel refers to after radiofrequency signal is mixed with local oscillation signal,
The channel circuit that obtained intermediate-freuqncy signal is handled.Usually contained in intermediate-freuqncy signal after mixing a large amount of harmonic waves, clutter at
Point, it is therefore desirable to be filtered with signal enhanced processing, while also to have good signal-to noise ratio characteristic, and in bandwidth of operation
With good flatness.
In the prior art, with satellite communication equipment miniaturization trend, it is desirable to the medium frequency electric of receiving channel therein
Using component, few, built-up circuit has the advantages such as occupy little space, is low in energy consumption, stability is high on road.
Summary of the invention
The invention mainly solves the technical problem of providing a kind of for minimizing the intermediate-frequency circuit of ODU receiving channel, solves
Certainly, enhanced processing gain incomplete to the processing covering of the clutter of intermediate-freuqncy signal is inadequate and electric in a limited space in the prior art
It passes by the problem complicated, volume is big, power consumption is high.
In order to solve the above technical problems, the technical solution adopted by the present invention is that providing a kind of logical for minimizing ODU reception
The intermediate-frequency circuit in road, including signal input end of intermediate frequency, the signal input end of intermediate frequency are connected first for filtering out the intermediate frequency letter
The intermediate-frequency filter of clutter except number, then by the intermediate-frequency filter output end be electrically connected intermediate frequency amplifier, it is described in
Audio amplifier exports after carrying out power amplification to the intermediate-freuqncy signal.
In another embodiment of the present invention for the intermediate-frequency circuit for minimizing ODU receiving channel, the intermediate-frequency filter
Including first order intermediate-frequency filter, the first order intermediate-frequency filter includes chip LFCN-6000, and in the chip
The first matched attenuator is also serially connected between LFCN-6000 and the signal input end of intermediate frequency.
In another embodiment of the present invention for the intermediate-frequency circuit for minimizing ODU receiving channel, the intermediate frequency amplifier
It further include first order intermediate frequency amplifier, first intermediate frequency amplifier includes chip UPC3226TB, the chip UPC3226TB
Input terminal be electrically connected with the output end of the chip LFCN-6000.
In another embodiment of the present invention for the intermediate-frequency circuit for minimizing ODU receiving channel, the intermediate-frequency filter
Including second level intermediate-frequency filter, the second level intermediate-frequency filter includes chip LFCN-8400, and in the chip
The second matched attenuator is also serially connected between the input terminal of LFCN-8400 and the output end of the chip UPC3226TB.
In another embodiment of the present invention for the intermediate-frequency circuit for minimizing ODU receiving channel, the intermediate-frequency filter
Including second level intermediate frequency amplifier, the second level intermediate frequency amplifier includes chip ECG001F-G, and in the chip
The input terminal of ECG001F-G is electrically connected with the output end of the chip LFCN-8400.
In another embodiment of the present invention for the intermediate-frequency circuit for minimizing ODU receiving channel, the intermediate-frequency filter
Including third level intermediate-frequency filter, the third level intermediate-frequency filter includes chip LFCN-2250, and the chip LFCN-
2250 input terminal is electrically connected with the output end of the chip ECG001F-G.
In another embodiment of the present invention for the intermediate-frequency circuit for minimizing ODU receiving channel, in the chip LFCN-
2250 output end is also electrically connected with gainequalizer.
In another embodiment of the present invention for the intermediate-frequency circuit for minimizing ODU receiving channel, in the chip LFCN-
Third matched attenuator is also serially connected between 2250 and the gainequalizer.
In another embodiment of the present invention for the intermediate-frequency circuit for minimizing ODU receiving channel, in the gain balance
The further grade of the output end of device is associated with temperature compensation attenuator.
In another embodiment of the present invention for the intermediate-frequency circuit for minimizing ODU receiving channel, the intermediate-frequency circuit is set
It is placed in cavity, the cavity includes power supply cavity, the first cavity, the second cavity and third cavity, the power supply cavity and
The connection of two cavitys, first cavity, the second cavity and the S-type structure of third cavity are combined as a whole.
The beneficial effects of the present invention are: the invention discloses a kind of for minimizing the intermediate-frequency circuit of ODU receiving channel, in
In frequency signal input part, the first order intermediate-frequency filter being electrically connected with RF signal input end, and the first order that is sequentially connected in series
Audio amplifier, second level intermediate-frequency filter, second level intermediate frequency amplifier, third level intermediate-frequency filter constitute two-stage amplification and three
The intermediate-frequency channel circuit of grade filtering.Also, also further grade is associated with gainequalizer and temperature after third level intermediate-frequency filter
Mend attenuator.This circuit can very well filter out clutter, the harmonic components in intermediate-freuqncy signal, and provide enough logical
Road gain ensure that the characteristic that intermediate-freuqncy signal is not influenced in the flatness of entire frequency band and gain by high/low temperature, the member of selection
Device is mainly integrated monomer component, is also had in terms of reducing volume, reducing cost, keep signal stabilization excellent
Gesture.
Detailed description of the invention
Fig. 1 is the present invention for minimizing the one embodiment composition block diagram of intermediate-frequency circuit of ODU receiving channel；
Fig. 2 is the first order intermediate frequency filter in another embodiment of intermediate-frequency circuit of the present invention for minimizing ODU receiving channel
Wave device circuit diagram；
Fig. 3 is that the first order intermediate frequency in another embodiment of intermediate-frequency circuit of the present invention for minimizing ODU receiving channel is put
Big device circuit diagram；
Fig. 4 is the second level intermediate frequency filter in another embodiment of intermediate-frequency circuit of the present invention for minimizing ODU receiving channel
Wave device circuit diagram；
Fig. 5 is that the second level intermediate frequency in another embodiment of intermediate-frequency circuit of the present invention for minimizing ODU receiving channel is put
Big device circuit diagram；
Fig. 6 is that the third level intermediate frequency in another embodiment of intermediate-frequency circuit of the present invention for minimizing ODU receiving channel is put
Big device and gainequalizer, temperature compensation attenuator circuit figure；
Fig. 7 is the present invention for minimizing another embodiment theory of constitution figure of intermediate-frequency circuit of ODU receiving channel；
Fig. 8 is the topology layout figure of intermediate-frequency circuit another embodiment of the present invention for minimizing ODU receiving channel.
Specific embodiment
To facilitate the understanding of the present invention, in the following with reference to the drawings and specific embodiments, the present invention will be described in more detail.
A better embodiment of the invention is given in the attached drawing.But the invention can be realized in many different forms, and unlimited
In this specification described embodiment.On the contrary, purpose of providing these embodiments is makes to the disclosure
Understand more thorough and comprehensive.
It should be noted that unless otherwise defined, all technical and scientific terms used in this specification with belong to
The normally understood meaning of those skilled in the art of the invention is identical.Used term in the description of the invention
It is the purpose in order to describe specific embodiment, is not intended to the limitation present invention.
With reference to the accompanying drawing, various embodiments of the present invention are described in detail.Fig. 1 is the present invention for minimizing ODU
The one embodiment composition schematic diagram of intermediate-frequency circuit of receiving channel.It include signal input end of intermediate frequency 311 in the circuit, the intermediate frequency letter
Number input terminal 311 connects the intermediate-frequency filter for filtering out the clutter except the intermediate-freuqncy signal first, then by the intermediate frequency
The output end of filter is electrically connected intermediate frequency amplifier, and the intermediate frequency amplifier is to defeated after intermediate-freuqncy signal progress power amplification
Out.
Further, as shown in Figure 1, plural serial stage structure is presented in intermediate-frequency filter therein and intermediate frequency amplifier.Wherein,
The intermediate-frequency filter includes first order intermediate-frequency filter 31, and the first order intermediate-frequency filter 31 includes chip LFCN-6000,
And the first matched attenuator is also serially connected between the chip LFCN-6000 and the signal input end of intermediate frequency 311.
Further, the first order that as fig. 2 shows the composition of the first matched attenuator and be made of chip LFCN-6000
Intermediate-frequency filter 31.Intermediate-freuqncy signal is coupled to by resistance R25, R28 and R29 group by IF input terminal by the capacitor C34 of 100pF
At matched attenuator, it is all 300 Ω that wherein the resistance value of R25, which is the resistance value of 18 Ω, R28 and R29, and R28 and R29 difference
The both ends of resistance R25 are connected, are then respectively grounded.It can make the impedance matching of front stage by the adaptation, keep intermediate frequency
Signal has good conductibility in the circuit.In Fig. 2, the connecting pin of R25 and R29 and No. 1 pin of chip LFCN-6000,
I.e. signal input part is electrically connected, and No. 2 pins, No. 4 pins of chip LFCN-6000 are grounded, and No. 3 pins are signal output ends.
The filter is small in size, peripheral without interface circuit, the intermediate-frequency channel circuit suitable for miniaturization.In addition, the intermediate frequency letter entered
Number frequency range be concentrated mainly on 950MHz-2150MHz, and chip LFCN-6000 all have in 6000MHz or less it is good
Low-pass characteristic, such as in 5000MHz, corresponding insertion loss is 0.57dB, and VSWR is 1.37:1, it is corresponding in 6000MHz
Insertion loss be 0.75dB, VSWR is 1.24:1, and in 6800MHz, corresponding insertion loss is 2.80dB, and VSWR is
3.31:1.Forming the first intermediate-frequency filter using the chip is mainly the local oscillation signal filtered out in previous stage in frequency mixer, and
Harmonic components in intermediate-freuqncy signal are filtered out.
Further, in Fig. 1, the intermediate frequency amplifier includes first order intermediate frequency amplifier 32, and first intermediate frequency is put
Big device 32 includes chip UPC3226TB, the output end of the input terminal of the chip UPC3226TB and the chip LFCN-6000
Electrical connection.
As shown in figure 3, give chip UPC3226TB and its peripheral circuit composition, wherein by capacitor C36 with it is previous
Signal output end (the i.e. No. 3 pins) electrical connection of grade chip LFCN-6000.Chip UPC3226TB power end Vcc passes through power supply
Filter network meets direct current+5V, which is mainly a RC network, can reduce power-supply fluctuation pair by the network
The adverse effect of intermediate-freuqncy signal amplification, from its No. 4 pin outputs after chip amplification, and No. 4 pins also pass through electricity
Sense L8 is connected to power filter network.It can be seen that the RC network includes capacitor C46, the C30 being electrically connected with+5V, the two electricity
The other end of appearance is grounded, be electrically connected with+5V there are two in parallel resistance R22, R23, the other end of the two resistance is total
It is same to be electrically connected to chip UPC3226TB power end Vcc.The working frequency range of chip UPC3226TB is 0-3GHz, and gain is 25dB@
1GHz, noise coefficient 5.3dB export 1dB compression horsepower+7.5dBm ,+5V power supply, operating current 15mA.The chip uses 6 feet
Encapsulation, shape is small and circuit is easy to use.
Further, in Fig. 1, the intermediate-frequency filter includes second level intermediate-frequency filter 33, the second level intermediate frequency
Filter 33 includes chip LFCN-8400, and in the input terminal of the chip LFCN-8400 and the chip UPC3226TB
Output end between be also serially connected with the second matched attenuator.
The second level intermediate frequency filtering for showing the composition of the second matched attenuator such as Fig. 4 and being made of chip LFCN-8400
Device 33.Intermediate-freuqncy signal is further coupled to by resistance by the output end of the chip UPC3226TB by the capacitor C31 of 100pF
The matched attenuator of R24, R26 and R27 composition, it is all 300 Ω that wherein the resistance value of R24, which is the resistance value of 18 Ω, R26 and R27, and
And R26 and R27 are separately connected the both ends of resistance R24, are then respectively grounded.It can make the impedance of front stage by the adaptation
Matching keeps intermediate-freuqncy signal to have good conductibility in the circuit.In Fig. 4, the connecting pin of R24 and R27 and chip LFCN-
The electrical connection of 8400 No. 1 pin, i.e. signal input part, No. 2 pins, No. 4 pins of chip LFCN-8400 are grounded, No. 3 pins
It is signal output end.The filter is small in size, peripheral without interface circuit, the intermediate-frequency channel circuit suitable for miniaturization.Thus
As it can be seen that the second level intermediate-frequency filter and the second matched attenuator, match with first with first order intermediate-frequency filter above-mentioned and decline
It is similar to subtract device circuit structure, the main distinction is that chip LFCN-8400 has good low-pass characteristic in 8000MHz or less,
The radio-frequency component in intermediate-freuqncy signal is further filtered out.Such as in 7000MHz, corresponding insertion loss is 0.58dB, VSWR
It is 1.15:1, in 8000MHz, corresponding insertion loss is 0.89dB, and VSWR is 1.34:1, corresponding to insert in 9000MHz
Entering loss is 1.89dB, and VSWR is 2.08:1.
Further, in Fig. 1, the intermediate-frequency filter includes second level intermediate frequency amplifier 34, the second level intermediate frequency
Amplifier 34 includes chip ECG001F-G, and in the input terminal of the chip ECG001F-G and the chip LFCN-8400
Output end electrical connection.
As shown in figure 5, giving chip ECG001F-G and its peripheral circuit composition, wherein previous stage chip LFCN-
8400 signal output end (i.e. No. 3 pins) passes through No. 3 pins of capacitor C33 and chip ECG001F-G, i.e. signal input part electricity
Connection.Chip ECG001F-G 1,2 and 4,5 pins be grounded, No. 6 pins be by amplification after signal output
End.And it is possible to see, which meets direct current+5V also by inductance L9 one power filter network of connection, power supply filter
Wave network is mainly a RC network, can reduce the adverse effect that intermediate-freuqncy signal is amplified in power-supply fluctuation by the network.So
It is conducted and is exported to rear stage by capacitor C43 afterwards.The RC network includes capacitor C37, the C38 being electrically connected with+5V, the two capacitors
The other end be grounded, be electrically connected with+5V there are two in parallel resistance R30, R31, the other end of the two resistance is common
It is electrically connected to inductance L9, No. 6 pins of the other end electrical connection chip ECG001F-G of inductance, which is also to draw as power supply
Foot.
The working frequency range of chip ECG001F-G is 0-6GHz, and gain is 20dB@1GHz, noise coefficient 3.4dB, exports 1dB
Compression horsepower 12.5dBm ,+5V power supply, operating current 30mA.The chip is encapsulated using 6 feet, and shape is small and circuit is easy to use.
Further, in Fig. 1, the intermediate-frequency filter includes third level intermediate-frequency filter 35, the third level intermediate frequency
Filter includes chip LFCN-2250, and the input terminal of the chip LFCN-2250 and the chip ECG001F-G's is defeated
Outlet electrical connection.
As shown in fig. 6, No. 6 pins of chip ECG001F-G pass through No. 1 pin of capacitor C43 connection LFCN-2250, core
No. 2 pins, No. 4 pins of piece LFCN-2250 are grounded, and No. 3 pins are signal output ends.By selecting chip LFCN-2250
Proximal end harmonic signal can be filtered out, band stray is made to meet index request -50dBc.The chip is corresponding to insert in 2000MHz
Entering loss is 0.51dB, and VSWR is 1.06:1, and in 2250MHz, corresponding insertion loss is 0.82dB, and VSWR is 1.20:1,
In 2575MHz, corresponding insertion loss is 2.84dB, and VSWR is 2.10:1.It can be brought if frequency is further added by higher
Insertion loss.And the chip, only 3.20mm × 1.60mm × 0.94mm volume, occupy little space.
It can be seen that the aforementioned intermediate-frequency channel circuit that have passed through three-level filtering and two-stage amplification.Wherein in three-level filtering,
First against intermediate-freuqncy signal in the frequency range of 950MHz-2150MHz, low pass was carried out by cutoff frequency of 6000MHz before this
Filtering, then low-pass filtering is carried out by cutoff frequency of 8000MHz, it mainly realizes and the harmonic components in intermediate-freuqncy signal is filtered
Then wave carries out low-pass filtering by cutoff frequency of 2250MHz again, mainly filters out the harmonic components of proximal end.
In Fig. 1, it is equal that gain is also electrically connected in the output end of third level intermediate-frequency filter 35 (i.e. chip LFCN-2250)
Weighing apparatus 36.And in conjunction with Fig. 6, it is also serially connected with third matching between the chip LFCN-2250 and the gainequalizer and declines
Subtract device.
In Fig. 6, No. 3 pins of chip LFCN-2250 are exported by capacitor C42 to rear stage, wherein third matching attenuation
Device includes the resistors match attenuation network of resistance R33, R36 and R37 composition, the network and the first matched attenuator above-mentioned, the
Two matched attenuators circuit composition having the same, which is not described herein again.And gainequalizer then mainly by C39, R34, R38 and
L10, R41 composition.It can be seen that this is a RLC passive network, wherein being parallel with the resistance being serially connected at the both ends of capacitor C39
R34 and R38, the access inductance L10 again between the two resistance, and the other end of inductance L10 then electric connection resistance R41, resistance
The other end of R41 is then grounded.
Increase such a gainequalizer in intermediate-frequency circuit, the frequency range for being primarily due to the intermediate-freuqncy signal is
950MHz-2150MHz, bandwidth 1.2GHz, and the amplifier of entire intermediate-frequency circuit gain flatness in entire frequency band is presented
The characteristic that low-frequency gain is high, high-frequency gain is low, so the passive RLC gainequalizer as last output plus level-one is needed
Improve unevenness of the amplifier in entire frequency band.
Preferably, in Fig. 1, temperature compensation attenuator 37 is associated in the further grade of output end of the gainequalizer 36.?
Show that the temperature compensation attenuator mainly includes chip PXV1220S, the ground terminal ground connection of the chip, input terminal connection capacitor in Fig. 6
C39 with gainequalizer to cascade, and output end can reconnect an adaptation, and the adaptation is by resistance R32, R39 and R40
Composition.Since complete machine operating ambient temperature range is very wide, entire intermediate frequency amplifier can cause output gain under high and low temperature environment
It is different, therefore change in gain of the intermediate frequency gain amplifier under high/low temperature is compensated by setting temperature compensation attenuator.
In addition, this circuit will also fully consider the changed power to intermediate-freuqncy signal, to guarantee in entire intermediate-frequency channel
The power of middle intermediate-freuqncy signal always works in a reasonable section, while also ensuring the transmission characteristic of intermediate-freuqncy signal, noise
Characteristic keeps good.Therefore from the intermediate-freuqncy signal that signal input end of intermediate frequency enters when by this circuit, it is necessary to consider signal function
The attenuation change of rate, so that intermediate-freuqncy signal can have enough power to enter next stage circuit after this circuit.
As shown in fig. 7, when from signal input end of intermediate frequency enter the first matched attenuator 301 radiofrequency signal power be-
36.6dBm, there is the loss of 3dB after first matched attenuator 301, i.e. intermediate-freuqncy signal is defeated from the first matched attenuator 301
Power after out is -39.6dBm.Then, by first order intermediate-frequency filter 302, i.e. LFCN-6000, there is the decaying of 2dB, in
Frequency signal power is -41.6dBm.By first order intermediate frequency amplifier 303, put by the gain that chip UPC3226TB carries out 25dB
Greatly, so that it is -16.6dBm that intermediate-freuqncy signal power, which increases, higher gain amplification is obtained.But it is this amplification also bring along it is miscellaneous
The amplification of wave component, and be mixed into intermediate-freuqncy signal together, it is also needed thus through second level intermediate-frequency filter 305, i.e. LFCN-
8400, which carry out second, filters, and is between second level intermediate-frequency filter 305 (2dB decaying) and first order intermediate frequency amplifier 303
Second matched attenuator 304 (3dB decaying), thus by second level intermediate-frequency filter 305 export intermediate-freuqncy signal power be-
21.6dBm.Then, power amplification is carried out to intermediate-freuqncy signal by second level intermediate frequency amplifier 306, gain amplifier is 20dB, thus
The power of intermediate-freuqncy signal is -1.6dBm.Then it successively declines again by second level intermediate-frequency filter 307 (3dB decaying), third matching
Subtract device 308 (3dB decaying), gainequalizer 309 (4dB decaying) and temperature compensation attenuator 310 (5dB decaying), in final output
The power of frequency signal is -16.6dBm.As can be seen that passing through yield value and reasonable selection intermediate frequency that each amplifier is rationally arranged
Filter, matched attenuator can be accurately controlled the changed power situation of intermediate-freuqncy signal, and guarantee entire intermediate-frequency channel
Under conditions of gain, flatness all meet the requirements, using integrated micro device, resolution element, single power supply power supply (direct current are reduced
The modes such as use 5V) optimize the volume of intermediate-frequency channel circuit, meet the needs of device miniaturization.
NF in Fig. 7 indicates that noise coefficient, Gain indicate that yield value, OP1dB indicate that power amplifier inputs compression point,
OIP3 indicates that the output third order intermodulation point of power amplifier, Po indicate the intermediate-freuqncy signal output power value of each component.
The changed power situation of intermediate-freuqncy signal in the circuit is shown in Fig. 7, it can be seen which provided multiple
With attenuator, such as the first matched attenuator 301, the second matched attenuator 304, third matched attenuator 308.By the way that these are arranged
Attenuator can will realize good impedance match between the component between front stage, avoid and produce in intermediate-freuqncy signal transmission process
Raw distortion and backward power problem can guarantee that intermediate-freuqncy signal has foot by multistage amplification although producing certain decaying
Enough big power.
In order to realize the structure design of intermediate-frequency circuit miniaturization, as shown in figure 8, to including power supply in intermediate-frequency circuit layout
Cavity Q0, the first cavity Q1, the second cavity Q2 and third cavity Q3 refer to intermediate-frequency circuit here why it is referred to as cavity
Periphery is provided with metallic walls, and the height of metallic walls is higher than the height of each component in intermediate-frequency circuit, and also in metallic walls
Top cover metal cover, thus entire intermediate-frequency circuit is isolated in a cavity, it is possible thereby to avoid external other electricity
Road is to the issuable electromagnetic interference of intermediate-frequency circuit.It mainly is provided with power filtering capacitor in power supply cavity Q0, to outside
The direct current 5V voltage of input carries out voltage regulation filtering.It mainly include first order intermediate-frequency filter chip LFCN- in the first cavity Q1
6000, and the first matched attenuator concatenated before chip LFCN-6000；It is connect in the first cavity Q1 with the second cavity Q2
Portion Q12 is provided with chip the first intermediate frequency amplifier chip UPC3226TB, and mainly includes that the second matching declines in the second cavity Q2
Subtract device and second level intermediate-frequency filter chip LFCN-8400；And cavity Q2 and the second cavity Q3 interconnecting piece Q23 are provided with
Second level intermediate frequency amplifier chip ECG001F-G, and third level intermediate-frequency filter chip LFCN- is provided in third cavity Q3
2250, and corresponding third matched attenuator, gainequalizer circuit and temperature compensation attenuator chip PXV1220S.Thus may be used
See, is that the first filter mainly is carried out to the intermediate-freuqncy signal of input herein based on first order intermediate frequency filtering in the first cavity
Wave mainly carries out second level intermediate frequency filtering in the second cavity, and carries out the in the engaging portion of the first cavity and the second cavity
The amplification of level-one EF power, the in this way intermediate-freuqncy signal after the amplification of first time intermediate frequency are mainly filtered in the second cavity
Wave；And third cavity is mainly also to carry out third level intermediate frequency filtering, and be provided with second between the second cavity and third cavity
EF power amplification, the in this way intermediate-freuqncy signal after second of intermediate frequency amplification are mainly filtered in third cavity,
And complete the processing of gain balance and temperature compensation compensation.This structure setting will make non-linear shadow caused by power amplification
It rings and is reduced to a minimum on the influence of the radiofrequency characteristics of radiofrequency signal, be mainly filtered in these cavitys, and
The engaging portion of cavity is arranged in power amplification, this is also mainly completed by single-chip with power amplification related, and is put to power
The power supply of large chip also has higher requirements, the two power amplifiers are mainly also the upper and lower part that the second cavity is arranged in,
The second cavity is passed through along straight line from top to bottom substantially come for chip by the+5V voltage of power supply cavity Q0 output in this way
UPC3226TB and chip ECG001F-G power supply.And it is possible to find out, the first cavity Q1, the second cavity Q2 and third cavity Q3
It is designed at continuous S type structure, this structure design has the effect of extending circuit length in a limited space, is suitable for this small
Type application demand.
Based on above embodiments, the invention discloses a kind of for minimizing the intermediate-frequency circuit of ODU receiving channel, intermediate frequency letter
Number input terminal, the first order intermediate-frequency filter being electrically connected with RF signal input end, and the first order intermediate frequency being sequentially connected in series are put
Big device, second level intermediate-frequency filter, second level intermediate frequency amplifier, third level intermediate-frequency filter constitute two-stage amplification and three-level filter
The intermediate-frequency channel circuit of wave.Also, also further grade is associated with gainequalizer after third level intermediate-frequency filter and temperature compensation declines
Subtract device.This circuit can very well filter out clutter, the harmonic components in intermediate-freuqncy signal, and provide enough channels and increase
Benefit ensure that the characteristic that intermediate-freuqncy signal is not influenced in the flatness of entire frequency band and gain by high/low temperature, the component of selection
Mainly integrated monomer component, also with advantage in terms of reducing volume, reducing cost, keep signal stabilization.
The above description is only an embodiment of the present invention, is not intended to limit the scope of the invention, all to utilize this hair
Equivalent structure transformation made by bright specification and accompanying drawing content is applied directly or indirectly in other relevant technical fields,
It is included within the scope of the present invention.
Claims (10)
1. a kind of for minimizing the intermediate-frequency circuit of ODU receiving channel, including signal input end of intermediate frequency, which is characterized in that described
Signal input end of intermediate frequency connects the intermediate-frequency filter for filtering out the clutter except the intermediate-freuqncy signal first, then by described
The output end of frequency filter is electrically connected intermediate frequency amplifier, and the intermediate frequency amplifier is to defeated after intermediate-freuqncy signal progress power amplification
Out.
2. according to claim 1 for minimizing the intermediate-frequency circuit of ODU receiving channel, which is characterized in that the intermediate frequency
Filter includes first order intermediate-frequency filter, and the first order intermediate-frequency filter includes chip LFCN-6000, and in the core
The first matched attenuator is also serially connected between piece LFCN-6000 and the signal input end of intermediate frequency.
3. according to claim 2 for minimizing the intermediate-frequency circuit of ODU receiving channel, which is characterized in that the intermediate frequency
Amplifier further includes first order intermediate frequency amplifier, and the first order intermediate frequency amplifier includes chip UPC3226TB, the chip
The input terminal of UPC3226TB is electrically connected with the output end of the chip LFCN-6000.
4. according to claim 3 for minimizing the intermediate-frequency circuit of ODU receiving channel, which is characterized in that the intermediate frequency
Filter includes second level intermediate-frequency filter, and the second level intermediate-frequency filter includes chip LFCN-8400, and in the core
The second matched attenuator is also serially connected between the input terminal of piece LFCN-8400 and the output end of the chip UPC3226TB.
5. according to claim 4 for minimizing the intermediate-frequency circuit of ODU receiving channel, which is characterized in that the intermediate frequency
Amplifier includes second level intermediate frequency amplifier, and the second level intermediate frequency amplifier includes chip ECG001F-G, and in the core
The input terminal of piece ECG001F-G is electrically connected with the output end of the chip LFCN-8400.
6. according to claim 5 for minimizing the intermediate-frequency circuit of ODU receiving channel, which is characterized in that the intermediate frequency
Filter includes third level intermediate-frequency filter, and the third level intermediate-frequency filter includes chip LFCN-2250, and the chip
The input terminal of LFCN-2250 is electrically connected with the output end of the chip ECG001F-G.
7. according to claim 6 for minimizing the intermediate-frequency circuit of ODU receiving channel, which is characterized in that in the core
The output end of piece LFCN-2250 is also electrically connected with gainequalizer.
8. according to claim 7 for minimizing the intermediate-frequency circuit of ODU receiving channel, which is characterized in that in the core
Third matched attenuator is also serially connected between piece LFCN-2250 and the gainequalizer.
9. according to claim 8 for minimizing the intermediate-frequency circuit of ODU receiving channel, which is characterized in that in the increasing
The further grade of the output end of beneficial balanced device is associated with temperature compensation attenuator.
10. according to claim 9 for minimizing the intermediate-frequency circuit of ODU receiving channel, which is characterized in that the intermediate frequency
Circuit is set in cavity, and the cavity includes power supply cavity, the first cavity, the second cavity and third cavity, the power source cavity
Body is connected to the second cavity, and first cavity, the second cavity and the S-type structure of third cavity are combined as a whole.
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| CN109194347B (en) | 2024-01-23 |
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