CN109037147B - Preparation method of contact hole in metal interconnection layer - Google Patents
Preparation method of contact hole in metal interconnection layer Download PDFInfo
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- CN109037147B CN109037147B CN201810843862.9A CN201810843862A CN109037147B CN 109037147 B CN109037147 B CN 109037147B CN 201810843862 A CN201810843862 A CN 201810843862A CN 109037147 B CN109037147 B CN 109037147B
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- metal layer
- contact hole
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- 229910052751 metal Inorganic materials 0.000 title claims abstract description 56
- 239000002184 metal Substances 0.000 title claims abstract description 56
- 238000002360 preparation method Methods 0.000 title description 8
- 238000000034 method Methods 0.000 claims abstract description 34
- 238000005530 etching Methods 0.000 claims abstract description 24
- 238000004140 cleaning Methods 0.000 claims abstract description 16
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 14
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 239000004020 conductor Substances 0.000 claims abstract description 8
- 239000010410 layer Substances 0.000 claims description 115
- 238000004519 manufacturing process Methods 0.000 claims description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 6
- 239000002131 composite material Substances 0.000 claims description 6
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 6
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 5
- 239000011241 protective layer Substances 0.000 claims description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 150000003863 ammonium salts Chemical class 0.000 claims description 3
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 239000010949 copper Substances 0.000 claims description 3
- 238000005468 ion implantation Methods 0.000 claims description 3
- 150000007524 organic acids Chemical class 0.000 claims description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 3
- 239000007788 liquid Substances 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 229910021645 metal ion Inorganic materials 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 150000001879 copper Chemical class 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
The invention relates to the technical field of semiconductors, in particular to a method for preparing a contact hole in a metal interconnection layer, which comprises the following steps: step S1, providing a substrate on which stacked metal layers and dielectric layers are formed; step S2, preparing and forming a photoresist layer with an etching pattern on the upper surface of the dielectric layer; step S3, etching the dielectric layer exposed by the pattern by an etching process to form a groove with the bottom connected with the metal layer; step S4, removing the photoresist layer; step S5, performing electronegativity treatment on the exposed surface of the metal layer at the bottom of the groove, wherein the electronegativity treatment is used for negatively charging the exposed surface of the metal layer at the bottom of the groove; step S6, cleaning the upper surface of the dielectric layer and the groove by a cleaning solution; step S7, filling the groove with a conductive material to form a contact hole; the derivative can be prevented from forming residues on the surface of the metal layer, so that the damage condition of the surface of the metal layer is improved, and the good conductivity of the contact hole is ensured.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a method for preparing a contact hole in a metal interconnection layer.
Background
With the development of integrated circuit technology, the yield of wafer products is more and more concerned by the industry, and the user experience can be greatly guaranteed by the high-yield products.
The metal interconnection process is a process of depositing a metal film on an integrated circuit chip, forming wiring by a photolithography technique, and interconnecting mutually isolated elements into a desired circuit as required. During the process of preparing the metal interconnection layer, residues of certain derivatives are easily generated on the metal surface, and after the residues of the derivatives react with a cleaning solution such as ST250, metal ions are easily further generated. These derivatives remain on the surface of the metal layer and easily affect the yield of the product.
Disclosure of Invention
In order to solve the above problems, the present invention provides a method for manufacturing a contact hole in a metal interconnection layer, including:
step S1, providing a substrate, wherein a metal layer and a dielectric layer are stacked on the substrate;
step S2, preparing and forming a photoresist layer with an etching pattern on the upper surface of the dielectric layer;
step S3, etching the dielectric layer exposed by the etching pattern by an etching process to form a groove with the bottom connected with the metal layer;
step S4, removing the photoresist layer;
step S5, performing electronegativity treatment on the exposed surface of the metal layer at the bottom of the groove, wherein the electronegativity treatment is used for negatively charging the exposed surface of the metal layer at the bottom of the groove;
step S6, cleaning the upper surface of the dielectric layer and the groove by a cleaning solution;
and step S7, filling the groove with a conductive material to form a contact hole.
In the above preparation method, the dielectric layer is a composite layer and includes stacked silicon nitride layers and a first oxide layer.
In the above manufacturing method, the first oxide layer is formed by using silicon oxide.
In the above manufacturing method, in step S7, before the groove is filled with the conductive material, a protective layer covering the sidewall and the bottom of the groove and the upper surface of the dielectric layer is formed.
In the above preparation method, the protective layer is a composite layer, and includes a first titanium nitride layer, an aluminum metal layer, a second titanium nitride layer, and a second oxide layer, which are stacked in sequence.
In the above manufacturing method, the second oxide layer is formed using silicon oxide.
In the above manufacturing method, in step S1, the metal layer is formed by using copper metal.
In the above preparation method, in step S6, ST250 is used as the cleaning liquid.
The preparation method, wherein the ST250 comprises ammonium salt, organic acid and water.
In the above preparation method, the electronegativity treatment is a negative ion implantation process or an electron irradiation process.
Has the advantages that: according to the preparation method of the contact hole in the metal interconnection layer, the derivative can be prevented from forming residues on the surface of the metal layer, so that the damage condition of the surface of the metal layer is improved, and the good conductivity of the contact hole is ensured.
Drawings
FIG. 1 is a flowchart illustrating a method for forming a contact hole in a metal interconnect layer according to an embodiment of the present invention;
fig. 2 to 4 are schematic structural diagrams formed in each step of a method for manufacturing a contact hole in a metal interconnection layer according to an embodiment of the present invention.
Detailed Description
The invention is further illustrated with reference to the following figures and examples.
In a preferred embodiment, as shown in fig. 1, a method for forming a contact hole in a metal interconnection layer is provided, which may include:
step S1, providing a substrate on which a stacked metal layer 10 and a dielectric layer 20 are formed;
step S2, forming a photoresist layer 30 with an etching pattern on the upper surface of the dielectric layer 20;
step S3, etching the dielectric layer 20 exposed by the etching pattern by using an etching process to form a groove TR having a bottom connected to the metal layer 10;
step S4, removing the photoresist layer 30 by using a photoresist remover;
step S5 of performing electronegativity treatment on the exposed surface of the metal layer 10 at the bottom of the groove TR, the electronegativity treatment being used to negatively charge the exposed surface of the metal layer 10 at the bottom of the groove TR;
step S6, cleaning the upper surface of the dielectric layer 20 and the inside of the groove TR with a cleaning solution;
in step S7, the grooves TR are filled with a conductive material to form contact holes.
In the above technical solution, the substrate 10 may be mainly formed of silicon, and conventional structures such as a gate and a source may also be formed in the substrate 10, which is a conventional technical means in the field and is not described herein again; the etching process in step S3 may be one-time etching or multiple-step etching, and the etching may stop in the metal layer 10, immediately etch through the dielectric layer 20 and etch away a small portion of the metal layer 10 to ensure the connection; only one metal layer 10 and dielectric layer 20 are shown in fig. 1, but this does not mean that only the metal layer 10 and the dielectric layer 20 are present, the metal layer 10 and the dielectric layer 20 may be stacked and spaced one upon another, and the contact hole formed may be formed between any two metal layers 10; after removing the photoresist layer 30, derivatives, such as derivatives of copper and/or fluorine, are easily formed on the surface of the metal layer 10, and after performing electronegativity treatment, the derivatives can be separated from the surface of the metal layer 10, so as to avoid generating positively charged metal ions when cleaning is performed subsequently with a cleaning solution; in step S4, a dry etching process or a wet etching process may be used to remove the photoresist layer, wherein the wet etching process may specifically use a photoresist etching solution to complete the etching; the present invention may also include other processes necessary for forming contact holes, which are conventional in the art and will not be described herein.
In a preferred embodiment, the dielectric layer 20 may be a composite layer including a stacked silicon nitride layer 21 and a first oxide layer 22.
In the above technical solution, the silicon nitride layer 21 and the first oxide layer 22 may have only one layer, or may be stacked and spaced multiple layers; the stacking order of the silicon nitride layer 21 and the first oxide layer 22 may be arbitrary.
In the above embodiment, the first oxide layer 22 may be preferably formed using silicon oxide.
In a preferred embodiment, a protection layer 40 is formed to cover the sidewalls and bottom of the trench TR and the top surface of the dielectric layer 20 before filling the trench TR with the conductive material in step S7.
In the above embodiment, preferably, the protection layer 40 may be a composite layer, and may include a first titanium nitride layer, an aluminum metal layer, a second titanium nitride layer, and a second oxide layer, which are sequentially stacked.
In the above embodiment, preferably, the second oxide layer may be formed using silicon oxide.
In a preferred embodiment, in step S1, the metal layer 10 may be formed by using copper metal.
In a preferred embodiment, in step S6, ST250 may be used as the cleaning solution.
In the above embodiment, ST250 may preferably include ammonium salt, organic acid and water.
In a preferred embodiment, in step S5, the electronegative treatment may be a negative ion implantation process or an electron irradiation process.
In the above technical solution, the electron irradiation process may adopt, for example, ultraviolet electron for irradiation.
In summary, the method for manufacturing a contact hole in a metal interconnection layer provided by the invention includes: step S1, providing a substrate on which stacked metal layers and dielectric layers are formed; step S2, preparing and forming a photoresist layer with an etching pattern on the upper surface of the dielectric layer; step S3, etching the dielectric layer exposed by the pattern by an etching process to form a groove with the bottom connected with the metal layer; step S4, removing the photoresist layer; step S5, performing electronegativity treatment on the exposed surface of the metal layer at the bottom of the groove, wherein the electronegativity treatment is used for negatively charging the exposed surface of the metal layer at the bottom of the groove; step S6, cleaning the upper surface of the dielectric layer and the groove by a cleaning solution; step S7, filling the groove with a conductive material to form a contact hole; the derivative can be prevented from forming residues on the surface of the metal layer, so that the damage condition of the surface of the metal layer is improved, and the good conductivity of the contact hole is ensured.
While the specification concludes with claims defining exemplary embodiments of particular structures for practicing the invention, it is believed that other modifications will be made in the spirit of the invention. While the above invention sets forth presently preferred embodiments, these are not intended as limitations.
Various alterations and modifications will no doubt become apparent to those skilled in the art after having read the above description. Therefore, the appended claims should be construed to cover all such variations and modifications as fall within the true spirit and scope of the invention. Any and all equivalent ranges and contents within the scope of the claims should be considered to be within the intent and scope of the present invention.
Claims (9)
1. A method for preparing a contact hole in a metal interconnection layer is characterized by comprising the following steps:
step S1, providing a substrate, wherein a metal layer and a dielectric layer are stacked on the substrate;
step S2, preparing and forming a photoresist layer with an etching pattern on the upper surface of the dielectric layer;
step S3, etching the dielectric layer exposed by the etching pattern by an etching process to form a groove with the bottom connected with the metal layer;
step S4, removing the photoresist layer;
step S5, performing electronegativity treatment on the exposed surface of the metal layer at the bottom of the groove, wherein the electronegativity treatment is used for negatively charging the exposed surface of the metal layer at the bottom of the groove;
step S6, cleaning the upper surface of the dielectric layer and the groove by a cleaning solution;
step S7, filling the groove with a conductive material to form a contact hole;
the electronegativity treatment is a negative ion implantation process or an electron irradiation process.
2. The method according to claim 1, wherein the dielectric layer is a composite layer including a stacked silicon nitride layer and a first oxide layer.
3. The production method according to claim 2, wherein the first oxide layer is formed using silicon oxide.
4. The method as claimed in claim 1, wherein a protective layer is formed to cover sidewalls and bottom of the recess and an upper surface of the dielectric layer before the step S7 of filling the recess with the conductive material.
5. The method according to claim 4, wherein the protective layer is a composite layer including a first titanium nitride layer, an aluminum metal layer, a second titanium nitride layer, and a second oxide layer stacked in this order.
6. The production method according to claim 5, wherein the second oxide layer is formed using silicon oxide.
7. The method according to claim 1, wherein in step S1, the metal layer is formed using copper metal.
8. The production method according to claim 1, wherein in step S6, ST250 is used as the cleaning liquid.
9. The method according to claim 8, wherein the ST250 comprises an ammonium salt, an organic acid and water.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810843862.9A CN109037147B (en) | 2018-07-27 | 2018-07-27 | Preparation method of contact hole in metal interconnection layer |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810843862.9A CN109037147B (en) | 2018-07-27 | 2018-07-27 | Preparation method of contact hole in metal interconnection layer |
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| Publication Number | Publication Date |
|---|---|
| CN109037147A CN109037147A (en) | 2018-12-18 |
| CN109037147B true CN109037147B (en) | 2021-04-06 |
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| CN201810843862.9A Active CN109037147B (en) | 2018-07-27 | 2018-07-27 | Preparation method of contact hole in metal interconnection layer |
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Address after: 430205 No.18, Gaoxin 4th Road, Donghu Development Zone, Wuhan City, Hubei Province Patentee after: Wuhan Xinxin Integrated Circuit Co.,Ltd. Country or region after: China Address before: 430205 No.18, Gaoxin 4th Road, Donghu Development Zone, Wuhan City, Hubei Province Patentee before: Wuhan Xinxin Semiconductor Manufacturing Co.,Ltd. Country or region before: China |
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