CN109032989A - A kind of server master board framework based on Shen prestige processor and bridge piece - Google Patents
A kind of server master board framework based on Shen prestige processor and bridge piece Download PDFInfo
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- CN109032989A CN109032989A CN201810811954.9A CN201810811954A CN109032989A CN 109032989 A CN109032989 A CN 109032989A CN 201810811954 A CN201810811954 A CN 201810811954A CN 109032989 A CN109032989 A CN 109032989A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/16—Constructional details or arrangements
- G06F1/18—Packaging or power distribution
- G06F1/183—Internal mounting support structures, e.g. for printed circuit boards, internal connecting means
- G06F1/184—Mounting of motherboards
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
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Abstract
The present invention provides a kind of server master board framework with processor and bridge piece, comprising: domestic processor, ICH2 module, BMC management module, CPLD module, level switch module, PCIE switch controller and memory；Domestic processor is used to expand three PCIEx8 expansion slots and a PCIEx16 expansion slot using PCIE switch controller using interfaces such as ICH2 extension SATA, network, USB as the CPU of server.Four USB3.0 interfaces, two gigabit network interfaces, three SATA3.0 interfaces, two miniSAS interfaces are expanded using ICH2.BMC management module can also monitoring and rotation speed of the fan to mainboard voltage, temperature information management.
Description
Technical field
The present invention relates to server field more particularly to a kind of server master board frameworks with processor and bridge piece.
Background technique
At present national information safely under the exploitation dynamics of domestic central processing unit also gradually increasing, and by domestic center
Processor is applied in server.Wherein, prestige processor in Shen is one end typically domestic processing chip.Since Shen Wei handles utensil
The characteristics of having itself and connection type, are configured to and need that there is different frameworks to be adapted in different servers.How by Shen
It is current assistant officer technical problem to be solved that prestige processor, which is applied to currently used server,.
Although in the prior art, there are some server architectures used based on Shen prestige processor, Shen prestige processors
It is mostly just integrated with PCIE, does not integrate common peripheral interface, influences the use scope of Shen prestige processor.And at present
Server field is more using type, there is calculation server, storage server, application server etc..Need various servers common
External expansion card, such as magnetic disc array card, HBA card.Cause Shen prestige processor configuration frame integrated level low, interface is single,
It is unable to satisfy the use demand of different function server product.
Summary of the invention
In order to overcome the deficiencies in the prior art described above, the present invention provides a kind of server master with processor and bridge piece
Type structure, comprising: BMC management module, CPLD module, ICH module, processor, first choice chip, the second selection chip,
PCIE switch controller and memory；
Processor PCIE interface one is connect with PCIE switch controller PCIE interface；
Processor memory control unit interface is connect with memory；
Processor SPI interface is connect with the first input/output terminal of first choice chip；
Processor jtag interface is connect with second selection the first input/output terminal of chip；
Processor PCIE interface two is connect with ICH module PCIE interface；
The second input/output terminal of first choice chip is connect with BMC management module SPI interface；
BMC management module GPIO interface is connect with first choice chip selection control terminal；
BMC management module jtag interface is connect with second selection the second input/output terminal of chip；
Second selection the second input/output terminal of chip is connect with ICH module J TAG interface；
BMC management module USB interface is connect with ICH module USB interface；
ICH module LPC interface is connect with BMC management module LPC interface and CPLD module LPC interface respectively；
BMC management module GPIO interface is connect with CPLD module GPIO interface；
Processor GPIO interface is connect with the second selection chip selection control terminal.
Preferably, further includes: SPI FLASH chip；
SPI FLASH chip is connect with first choice chip third input/output terminal.
Preferably, ICH module is equipped at least one USB interface, at least one minisas interface, RJ45 interface, SATA connects
Mouth and UART interface.
Preferably, ICH module is connected with RTC clock circuit, for the temperature sensing circuit of measurement processor running temperature,
SPI FLASH chip and by the first level translator connect PCIE slot.
Preferably, further includes: second electrical level converter；
BMC management module USB interface is connect with ICH module USB interface by usb protocol communication；
BMC management module LPC interface by second electrical level converter respectively with ICH module LPC interface and CPLD module LPC
Interface connection.
Preferably, BMC management module GPIO interface is connect with CPLD module GPIO interface, for realizing remote on-off and
Reset function；
CPLD module is connected with JTAG and plate grade electrification reset circuit.
Preferably, further includes: the radiator fan for radiating to processor；
BMC management module is connect with radiator fan；
BMC management module is configured with USB interface, RJ45 interface, UART interface and voltage detecting circuit.
Preferably, PCIE switch controller is connected with multiple PCIEX8 slots and multiple PCIEX16 slots.
Preferably, PCIE switch controller uses PEX8748；
Processor uses Shen prestige 1621.
Preferably, pass through third level between the second input/output terminal of first choice chip and BMC management module SPI interface
Converter connection；
Pass through the 4th level translator between BMC management module jtag interface and second selection the second input/output terminal of chip
Connection.
As can be seen from the above technical solutions, the invention has the following advantages that
In the present invention, processor is used to make as the CPU of server using interfaces such as ICH2 extension SATA, network, USB
PCIE channel is extended with a PEX8748, realizes the program burn writing of processor and ICH2 bridge piece using BMC chip and to entire main
The health status of plate monitors.
And extend at least one USB interface, at least one minisas interface, RJ45 interface, SATA interface and
UART interface.Three PCIEx8 expansion slots and a PCIEx16 expansion slot are expanded using PCIE switch controller.
Four USB3.0 interfaces, two gigabit network interfaces, three SATA3.0 interfaces, two miniSAS interfaces are expanded using ICH2.BMC
Management network port exports VGA all the way for realizing the programming to Shen prestige 1621 processor and ICH2 firmware all the way for management module output
Signal is for showing.BMC management module can also monitoring and rotation speed of the fan to mainboard voltage, temperature information management.
Detailed description of the invention
In order to illustrate more clearly of technical solution of the present invention, attached drawing needed in description will be made below simple
Ground introduction, it should be apparent that, drawings in the following description are only some embodiments of the invention, for ordinary skill
For personnel, without creative efforts, it is also possible to obtain other drawings based on these drawings.
Fig. 1 is the server master board framework overall schematic with processor and bridge piece.
Specific embodiment
The present invention provides a kind of server master board framework with processor and bridge piece, as shown in Figure 1, comprising: BMC management
Module 1, CPLD module 2, ICH module 3, processor 4, first choice chip 5, the second selection chip 6, PCIE switch control
Device 7 and memory 8；
Processor 4PCIE interface one is connect with PCIE switch controller 7PCIE interface 1；4 Memory Controller Hub of processor
Interface is connect with memory 8；Processor 4SPI interface is connect with 5 first input/output terminal of first choice chip；Processor 4JTAG
Interface is connect with the second selection 6 first input/output terminal of chip；Processor 4PCIE interface two and ICH module 3PCIE interface connect
It connects；
5 second input/output terminal of first choice chip is connect with BMC management module 1BMC interface；BMC management module 1GPIO
Interface selects control terminal to connect with first choice chip 5；BMC management module 1JTAG interface and the second selection chip 6 second input
Output end connection；Second selection 6 second input/output terminal of chip is connect with ICH module 3JTAG interface；BMC management module 1USB
Interface is connect with ICH module 3USB interface；BMC management module 1LPC interface respectively with ICH module 3LPC interface and CPLD module
The connection of 2LPC interface；BMC management module 1GPIO interface is connect with CPLD module 2GPIO interface；Processor 4GPIO interface and
Two selection chips 6 select control terminal connection.
PCIE switch controller 7 uses PEX8748；Processor 4 uses Shen prestige 1621.Prestige 1621 processor in Shen is base
In the domestic high-performance multi-core processor of the third generation " Shen Wei 64 " core enhanced edition, it is mainly directed towards high-performance calculation and middle and high end clothes
Business device application.The processor uses 28nm technique, integrates 16 general 64 superscalar cores of Shen prestige of new generation, exemplary operation
Frequency 1.8GHz, reaches as high as 2.0GHz, shares three-level Cache in the piece of 32MB by bidirectional loop network.Integrated 8 DDR3 storage
Controller integrates 2 PCIE3.0X8 interfaces, and is internally integrated SPI interface controller.Memory 8 uses DDR3 memory.
It in order to make the invention's purpose, features and advantages of the invention more obvious and easy to understand, below will be with specific
Examples and drawings, the technical solution protected to the present invention are clearly and completely described, it is clear that implementation disclosed below
Example is only a part of the embodiment of the present invention, and not all embodiment.Based on the embodiment in this patent, the common skill in this field
Art personnel all other embodiment obtained without making creative work belongs to the model of this patent protection
It encloses.
ICH module I CHI/O controller hub means that " it is total to be responsible for connection PCI for i/o controller " center "
Line, IDE equipment, I/O equipment etc.
Server master board framework with processor and bridge piece further include: SPI FLASH chip 23；SPI FLASH chip
23 connect with 5 third input/output terminal of first choice chip.FLASH chip uses W25Q64FWSSIG.
ICH module 3 be equipped at least one USB interface, at least one minisas interface, RJ45 interface, SATA interface and
UART interface.
In the present invention, ICH module 3 is connected with RTC clock circuit 16, the temperature detection for measurement processor running temperature
Circuit 15, SPI FLASH chip 18 and by the first level translator 14 connect PCIE slot 17.
The invention also includes: second electrical level converter 13；BMC management module 1USB interface and ICH module 3USB interface are logical
Cross the connection of usb protocol communication；BMC management module 1LPC interface cross second electrical level converter 13 respectively with ICH module 3LPC interface
It is connected with CPLD module 2LPC interface.
In the present invention, BMC management module 1GPIO interface is connect with CPLD module 2GPIO interface, for realizing remote switch
Machine and reset function；CPLD module 2 is connected with JTAG seat 21 and plate grade electrification reset circuit 22.
BMC management module 1 is connect with radiator fan 19；BMC management module 1 is configured with USB interface, RJ45 interface, UART
Interface and voltage detecting circuit.
In the present invention, PCIE switch controller 7 is connected with multiple PCIEX8 slots and multiple PCIEX16 slots.
In the present invention, pass through third between 5 second input/output terminal of first choice chip and BMC management module 1SPI interface
Level translator 11 connects；Pass through the between BMC management module 1JTAG interface and the second selection 6 second input/output terminal of chip
The connection of four level translators 12.CD4053 is respectively adopted in first choice chip 5 and the second selection chip 6.
Safe I/O chip ICH2 is the System on Chip/SoC for a entirely autonomous design that Shen Wei is released, raw using 40nm technique
It produces.SWICH is integrated with multi-level on chip communication architecture, power PC I-E crossbar switch supports PCI-E Gen2, total 32Lane,
Wherein 24Lane can be used for PCI-E extension, graph image subsystem (including display control section, two-dimensional/three-dimensional figure acceleration portion
Part, H.264 codec component, MPEG-1/2/4 high definition media decode acceleration components), DDR2/3 storage control, high speed input
Output block (including 10M/100M/1G ethernet controller, 3.0 multiport controller of USB, SATA3.0 multiport controller,
Multi-channel high-speed dma controller), low speed inputoutput unit (including 97 controller of AC ', UART controller, I2C controller,
SPI controller, PS/2 keyboard and mouse controller, LPC Host controller, GPIO and programmable interrupt controller) and system control
Component processed etc., the production domesticization series platform products application needed suitable for high safety.ICH2 system interface meets various specifications and connects
Mouth requires, and can be widely applied to have in all production domesticization platform products of 2.0 bus of standard PCI-E.
In the present invention, use prestige 1621 processor in Shen as the CPU of server, extends SATA, network, USB using ICH2
Equal interfaces, extend PCIE channel using a PEX8748, realize 1621 processor of Shen prestige and Shen Wei ICH2 bridge using BMC chip
The program burn writing of piece and the health status of entire mainboard is monitored.
Use prestige 1621 processor in Shen as the CPU of server master board, is equipped with the total 128GB DDR3 memory bar of 8 16GB.
The channel two-way PCIEx8 of 1621 processor of Shen prestige is connected to Shen prestige bridge piece ICH2 for extending low-speed peripheral port, all the way all the way
PEX8748PCIE Switch chip is connected to for extending PCIE channel.Three PCIEx8 are expanded using PEX8748 to extend
Slot and a PCIEx16 expansion slot.Four USB3.0 interfaces are expanded using ICH2, two gigabit network interfaces, three
SATA3.0 interface, two miniSAS interfaces.Management network port is handled the output of BMC management module all the way for realizing to Shen prestige 1621
The programming of device and ICH2 firmware, VGA signal is used to show all the way for output.BMC management module can also believe mainboard voltage, temperature
The monitoring of breath and the management of rotation speed of the fan.
Each embodiment in this specification is described in a progressive manner, the highlights of each of the examples are with other
The difference of embodiment, the same or similar parts in each embodiment refer to mutually.
The foregoing description of the disclosed embodiments enables those skilled in the art to implement or use the present invention.
Various modifications to these embodiments will be readily apparent to those skilled in the art, as defined herein
General Principle can be realized in other embodiments without departing from the spirit or scope of the present invention.Therefore, of the invention
It is not intended to be limited to the embodiments shown herein, and is to fit to and the principles and novel features disclosed herein phase one
The widest scope of cause.
Claims (10)
1. a kind of server master board framework with processor and bridge piece characterized by comprising BMC management module (1),
CPLD module (2), ICH module (3), processor (4), first choice chip (5), the second selection chip (6), PCIE switch
Controller (7) and memory (8)；
Processor (4) PCIE interface one is connect with PCIE switch controller (7) PCIE interface；
Processor (4) memory controller interface is connect with memory (8)；
Processor (4) SPI interface is connect with (5) first input/output terminal of first choice chip；
Processor (4) jtag interface is connect with the second selection (6) first input/output terminal of chip；
Processor (4) PCIE interface two is connect with ICH module (3) PCIE interface；
(5) second input/output terminal of first choice chip is connect with BMC management module (1) SPI interface；
BMC management module (1) GPIO interface is connect with first choice chip (5) selection control terminal；
BMC management module (1) jtag interface is connect with the second selection (6) second input/output terminal of chip；
Second selection (6) second input/output terminal of chip is connect with ICH module (3) jtag interface；
BMC management module (1) USB interface is connect with ICH module (3) USB interface；
ICH module (3) LPC interface is connect with BMC management module (1) LPC interface and CPLD module (2) LPC interface respectively；
BMC management module (1) GPIO interface is connect with CPLD module (2) GPIO interface；
Processor (4) GPIO interface is connect with the second selection chip (6) selection control terminal.
2. the server master board framework according to claim 1 with processor and bridge piece, which is characterized in that
Further include: SPI FLASH chip (23)；
SPI FLASH chip (23) is connect with first choice chip (5) third input/output terminal.
3. the server master board framework according to claim 1 with processor and bridge piece, which is characterized in that
ICH module (3) be equipped at least one USB interface, at least one minisas interface, RJ45 interface, SATA interface and
UART interface.
4. the server master board framework according to claim 1 or 3 with processor and bridge piece, which is characterized in that
ICH module (3) is connected with RTC clock circuit (16), for the temperature sensing circuit (15) of measurement processor running temperature,
SPI FLASH chip (18) and by the first level translator (14) connection PCIE slot (17).
5. the server master board framework according to claim 1 or 3 with processor and bridge piece, which is characterized in that also wrap
It includes: second electrical level converter (13)；
BMC management module (1) USB interface is connect with ICH module (3) USB interface by usb protocol communication；
BMC management module (1) LPC interface by second electrical level converter (13) respectively with ICH module (3) LPC interface and CPLD
The connection of module (2) LPC interface.
6. the server master board framework according to claim 1 or 3 with processor and bridge piece, which is characterized in that
BMC management module (1) GPIO interface is connect with CPLD module (2) GPIO interface, for realizing remote on-off and reset
Function；
CPLD module (2) is connected with JTAG (21) and plate grade electrification reset circuit (22).
7. the server master board framework according to claim 1 or 3 with processor and bridge piece, which is characterized in that also wrap
It includes: the radiator fan (19) for radiating to processor；
BMC management module (1) is connect with radiator fan (19)；
BMC management module (1) is configured with USB interface, RJ45 interface, UART interface and voltage detecting circuit.
8. the server master board framework according to claim 1 or 3 with processor and bridge piece, which is characterized in that
PCIE switch controller (7) is connected with multiple PCIEX8 slots and multiple PCIEX16 slots.
9. the server master board framework with processor and bridge piece according to claim 1 or 8, which is characterized in that
PCIE switch controller (7) uses PEX8748；
Processor (4) uses Shen prestige 1621.
10. the server master board framework according to claim 1 with processor and bridge piece, which is characterized in that
Pass through third level conversion between (5) second input/output terminal of first choice chip and BMC management module (1) SPI interface
Device (11) connection；
Pass through the 4th level conversion between BMC management module (1) jtag interface and the second selection (6) second input/output terminal of chip
Device (12) connection.
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| CN201810811954.9A CN109032989A (en) | 2018-07-23 | 2018-07-23 | A kind of server master board framework based on Shen prestige processor and bridge piece |
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| CN201810811954.9A CN109032989A (en) | 2018-07-23 | 2018-07-23 | A kind of server master board framework based on Shen prestige processor and bridge piece |
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109947682A (en) * | 2019-03-21 | 2019-06-28 | 浪潮商用机器有限公司 | A kind of server master board and server |
| CN110045795A (en) * | 2019-04-12 | 2019-07-23 | 山东超越数控电子股份有限公司 | A kind of integration machine mainboard and domestic all-in-one machine based on Shen prestige processor |
| CN110162502A (en) * | 2019-04-15 | 2019-08-23 | 深圳市同泰怡信息技术有限公司 | A kind of server for realizing various configurations based on central processing unit |
| CN110232041A (en) * | 2019-05-17 | 2019-09-13 | 无锡泰泓信息科技有限公司 | A kind of implementation method of the domestic server master board based on Shen prestige chip |
| CN111797049A (en) * | 2020-07-20 | 2020-10-20 | 山东超越数控电子股份有限公司 | Double-path calculation mainboard architecture |
| CN112260839A (en) * | 2020-10-20 | 2021-01-22 | 河北素数信息安全有限公司 | Micro transmission encryption device based on embedded technology and starting method thereof |
| CN113050767A (en) * | 2021-03-30 | 2021-06-29 | 联想(北京)有限公司 | Expansion slot channel distribution method and device, electronic equipment and medium |
| TWI768769B (en) * | 2021-03-16 | 2022-06-21 | 英業達股份有限公司 | Server motherboard for single-processor system |
| CN115048327A (en) * | 2022-06-14 | 2022-09-13 | 中国电子科技集团公司第五十八研究所 | PCIE-SATA (peripheral component interface express) bridge chip |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN203535549U (en) * | 2013-11-05 | 2014-04-09 | 浪潮集团有限公司 | BMC module applicable to application of multiple server main boards |
| CN107038139A (en) * | 2017-04-13 | 2017-08-11 | 广东浪潮大数据研究有限公司 | A kind of implementation method of the domestic server master board based on FT1500A |
| CN207367115U (en) * | 2017-11-09 | 2018-05-15 | 湖南长城银河科技有限公司 | A kind of server master board and server based on Feiteng processor |
-
2018
- 2018-07-23 CN CN201810811954.9A patent/CN109032989A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN203535549U (en) * | 2013-11-05 | 2014-04-09 | 浪潮集团有限公司 | BMC module applicable to application of multiple server main boards |
| CN107038139A (en) * | 2017-04-13 | 2017-08-11 | 广东浪潮大数据研究有限公司 | A kind of implementation method of the domestic server master board based on FT1500A |
| CN207367115U (en) * | 2017-11-09 | 2018-05-15 | 湖南长城银河科技有限公司 | A kind of server master board and server based on Feiteng processor |
Non-Patent Citations (2)
| Title |
|---|
| 成都申威科技有限责任公司: "《申威1621 2U服务器数据手册》", 《HTTP://WWW.SWCPU.CN/LIST-209-1.HTML》 * |
| 成都申威科技有限责任公司: "《申威1621服务器用户使用手册》", 《HTTP://WWW.SWCPU.CN/LIST-209-1.HTML》 * |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109947682A (en) * | 2019-03-21 | 2019-06-28 | 浪潮商用机器有限公司 | A kind of server master board and server |
| CN110045795A (en) * | 2019-04-12 | 2019-07-23 | 山东超越数控电子股份有限公司 | A kind of integration machine mainboard and domestic all-in-one machine based on Shen prestige processor |
| CN110162502A (en) * | 2019-04-15 | 2019-08-23 | 深圳市同泰怡信息技术有限公司 | A kind of server for realizing various configurations based on central processing unit |
| CN110232041A (en) * | 2019-05-17 | 2019-09-13 | 无锡泰泓信息科技有限公司 | A kind of implementation method of the domestic server master board based on Shen prestige chip |
| CN111797049A (en) * | 2020-07-20 | 2020-10-20 | 山东超越数控电子股份有限公司 | Double-path calculation mainboard architecture |
| CN112260839A (en) * | 2020-10-20 | 2021-01-22 | 河北素数信息安全有限公司 | Micro transmission encryption device based on embedded technology and starting method thereof |
| TWI768769B (en) * | 2021-03-16 | 2022-06-21 | 英業達股份有限公司 | Server motherboard for single-processor system |
| CN113050767A (en) * | 2021-03-30 | 2021-06-29 | 联想(北京)有限公司 | Expansion slot channel distribution method and device, electronic equipment and medium |
| CN113050767B (en) * | 2021-03-30 | 2024-06-18 | 联想(北京)有限公司 | Expansion slot channel allocation method and device, electronic equipment and medium |
| CN115048327A (en) * | 2022-06-14 | 2022-09-13 | 中国电子科技集团公司第五十八研究所 | PCIE-SATA (peripheral component interface express) bridge chip |
| CN115048327B (en) * | 2022-06-14 | 2024-03-22 | 中国电子科技集团公司第五十八研究所 | Bridge chip for converting PCIE into SATA |
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Application publication date: 20181218 |