CN202383569U - Mainboard with multifunctional extensible peripheral component interconnect express (PCIE) interface device - Google Patents
Mainboard with multifunctional extensible peripheral component interconnect express (PCIE) interface device Download PDFInfo
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- CN202383569U CN202383569U CN2011205703518U CN201120570351U CN202383569U CN 202383569 U CN202383569 U CN 202383569U CN 2011205703518 U CN2011205703518 U CN 2011205703518U CN 201120570351 U CN201120570351 U CN 201120570351U CN 202383569 U CN202383569 U CN 202383569U
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Abstract
The utility model discloses a mainboard with a multifunctional extensible peripheral component interconnect express (PCIE) interface device. The mainboard comprises a processor, a south bridge chip connected with the processor through a bus, and a PCIE8x interface connected with the south bridge chip, wherein the south bridge chip can provide at least five PCIE1x signals. The mainboard defines or is connected with different extensible chips through different pins. The PCIE8x interface can be connected with PCIE4x equipment and PCIE1x equipment. In addition, the PCIE8x interface has a plurality of undefined pins, and can be connected with universal serial bus (USB) equipment and special control and monitoring equipment by introducing signals such as USB signals and general purpose input/output (GPIO) signals. Therefore, by the mainboard, the requirements of multi-network card, multi-storage, monitoring and the like can be met; and the mainboard is applied to the fields of network security, storage, security monitoring, video conferences and the like, and the application flexibility of the mainboard is greatly enhanced.
Description
Technical field
The utility model relates to computing machine electricity consumption daughter card product scope, is specifically related to a kind of computer motherboard with extendible PCIE interface arrangement
Background technology
technology is the higher development of PCI, and the interface of PCIE is different and difference to some extent comprise X1, X4, X8 and X16, and the X2 pattern will be used for internal interface but not the slot pattern according to the bus bit wide.The PCI-E specification is connected to 32 passages from 1 passage and connects, and very strong retractility is arranged, to satisfy different system equipment to the data transfer bandwidth different demands.In addition, short PCI-E card can insert in the long PCI-E slot and use, and the PCI-E interface can also be supported hot-swappable, and this also is a no small leap.250MB/ transmission speed second of PCI-E X1 can satisfy main flow sound effect chip, network card chip and the memory device demand to data transfer bandwidth, but can't satisfy the demand of graphic chips to data transfer bandwidth far away.Therefore, the PCI-E interface bit wide that is used to replace the AGP interface is X16, and the bandwidth of 5GB/s can be provided, even if the loss on the coding is arranged but still the actual bandwidth that is about about 4GB/s can be provided, considerably beyond the bandwidth of the 2.1GB/s of AGP 8X.
Present low-power consumption computing machine is used mainboard, though its south bridge provides 4 or above PCIE1X interface, often it is independently defined use; For example, adopt the mainboard of Intel PineView CPU+ICH8M, its south bridge is supported the signal of 6 PCIE 1x altogether; In the existing specification in market, its 6 PCIE 1x signals are many independent to be used, have different interface shapes (such as: in network safety filed; 6 PCIE 1x all are used as network interface card); Do not have independent PCIE 4x interface, in case and interface structure is confirmed, with the function that greatly limits such mainboard
Summary of the invention
for overcoming above-mentioned defective, the purpose of the utility model promptly is to provide a kind of mainboard with multi-functional, extendible PCIE interface arrangement.
The purpose of the utility model realizes through following technical scheme:
A kind of mainboard with multi-functional, extendible PCIE interface arrangement of the utility model mainly comprises:
processor and with its through the South Bridge chip that bus is connected, also comprise: the PCIE 8x interface that is connected with this South Bridge chip, said South Bridge chip are to provide the South Bridge chip of at least five PCIE1x signals.
are further, and described processor is the central processing unit with Memory Controller Hub integrated graphics card.
are further, and said processor is connected through direct media interface bus with South Bridge chip.
are further, and said PCIE 8x interface connects PCIE 4x integrated circuit board.
are further, and said PCIE 8x interface connects USB device through usb bus.
are further, and said mainboard with multi-functional, extendible PCIE interface arrangement also comprises: the clock expansion card, said PCIE 8x interface converts four PCIE1x interfaces into through this clock expansion card.
are further, and said mainboard with multi-functional, extendible PCIE interface arrangement also comprises: bus extender, said PCIE8x interface converts four PCIE1x interfaces or a PCIE 4x signaling interface into through this bus extender.
are further, and bus extender connects devices such as control and monitoring.
the utility model comprises: processor and with its through the South Bridge chip that bus is connected, also comprise: the PCIE 8x interface that is connected with this South Bridge chip, said South Bridge chip are to provide the South Bridge chip of at least five PCIE1x signals; This kind mainboard is through different pin definitions or connect different extended chips, and PCIE 8x interface can connect PCIE 4x and PCIE 1x equipment; In addition, it is undefined that PCIE 8x interface has a lot of pins, and through introducing signals such as similar USB, GPIO, this interface can connect USB device, special-purpose control and watch-dog.Therefore, this mainboard can satisfy many network interface cards, store and demand such as monitoring more, is applied in the fields such as network safety filed, field of storage, safety monitoring, video conference; Its application flexibility strengthens greatly.
Description of drawings
In order to be easy to explanation, the utility model is done to describe in detail by following preferred embodiment and accompanying drawing
.
Fig. 1 is the circuit theory synoptic diagram of the utility model.
Embodiment
For the purpose, technical scheme and the advantage that make the utility model is clearer,, the utility model is further elaborated below in conjunction with accompanying drawing and embodiment.Should be appreciated that specific embodiment described herein only in order to explanation the utility model, and be not used in qualification the utility model.
See also Fig. 1, a kind of mainboard with multi-functional, extendible PCIE interface arrangement of the utility model mainly comprises:
processor and South Bridge chip; Also comprise: the PCIE 8x interface that is connected with this South Bridge chip; Said South Bridge chip is for providing the South Bridge chip of at least five PCIE1x signals, and what this embodiment adopted certainly is the South Bridge chip with six PCIE 1x signals.The utility model is to the PCIE8x interface of the mainboard of Intel PineView CPU+ICH8M.Perhaps connect different extended chips through different pin definitions, the interface of PCIE8x can connect PCIE 4x and PCIE 1x equipment; In addition, it is undefined that PCIE 8x interface has a lot of pins, and through introducing signals such as similar USB, GPIO, this interface can connect USB device, special-purpose control and watch-dog, the very big function that must expand this interface.Processor is connected through direct media interface bus (DMI) with South Bridge chip.
interface connects PCIE 4x integrated circuit board.
mainboard also comprises: the clock expansion card, said PCIE 8x interface converts four PCIE1x interfaces into through this clock expansion card.
mainboard also comprises: bus extender (GPIO), can be used as the selection signal of 1 PCIE 4x and 4 PCIE 1x, and also can connect devices such as control and monitoring, relevant function is provided.。
can determine that 4 PCIE 1x signals are whole uses through BIOS control GPIO as switching signal, and the signal that still is divided into 4 PCIE 1x uses.If the former also needs the clock extended chip that unified clock is expanded to 4 clocks, thereby 1 PCIE 4x signal is split into 4 PCIE 1x signals.The mainboard structure of the utility model is implemented on its PINE TRAIL at INTEL ATOM CPU (INTEL low power processor family) platform, and its technical advantage is obvious especially.
The above is merely the preferred embodiment of the utility model, not in order to restriction the utility model, any modification of being done within all spirit at the utility model and the principle, is equal to and replaces and improvement etc., all should be included within the protection domain of the utility model
Claims (8)
1. mainboard with multi-functional, extendible PCIE interface arrangement; Mainly comprise: processor reaches and its South Bridge chip that is connected through bus; It is characterized in that; Also comprise: the PCIE 8x interface that is connected with this South Bridge chip, said South Bridge chip is for providing the South Bridge chip of at least five PCIE1x signals.
2. the mainboard with multi-functional, extendible PCIE interface arrangement according to claim 1 is characterized in that, described processor is the central processing unit with Memory Controller Hub integrated graphics card.
3. the mainboard with multi-functional, extendible PCIE interface arrangement according to claim 2 is characterized in that, said processor is connected through direct media interface bus with South Bridge chip.
4. the mainboard with multi-functional, extendible PCIE interface arrangement according to claim 3 is characterized in that, said PCIE8x interface connects PCIE 4x integrated circuit board.
5. the mainboard with multi-functional, extendible PCIE interface arrangement according to claim 4 is characterized in that, said PCIE8x interface connects USB device through usb bus.
6. the mainboard with multi-functional, extendible PCIE interface arrangement according to claim 5 is characterized in that, also comprises: the clock expansion card, said PCIE 8x interface converts four PCIE1x interfaces into through this clock expansion card.
7. the mainboard with multi-functional, extendible PCIE interface arrangement according to claim 6; It is characterized in that; Also comprise: bus extender, said PCIE8x interface converts four PCIE1x interfaces or a PCIE 4x signaling interface into through this bus extender.
8. the mainboard with multi-functional, extendible PCIE interface arrangement according to claim 7 is characterized in that, said bus extender connects control and supervising device.
Priority Applications (1)
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CN2011205703518U CN202383569U (en) | 2011-12-31 | 2011-12-31 | Mainboard with multifunctional extensible peripheral component interconnect express (PCIE) interface device |
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CN2011205703518U CN202383569U (en) | 2011-12-31 | 2011-12-31 | Mainboard with multifunctional extensible peripheral component interconnect express (PCIE) interface device |
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CN2011205703518U Expired - Fee Related CN202383569U (en) | 2011-12-31 | 2011-12-31 | Mainboard with multifunctional extensible peripheral component interconnect express (PCIE) interface device |
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Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103176930A (en) * | 2013-04-02 | 2013-06-26 | 无锡江南计算技术研究所 | Input/output (I/O) framework expanding method based on standard PCIe upstream port |
CN103984646A (en) * | 2014-06-05 | 2014-08-13 | 浪潮电子信息产业股份有限公司 | Method for designing storage system based on PCIE data transmission |
CN104714910A (en) * | 2013-12-17 | 2015-06-17 | 研祥智能科技股份有限公司 | Method and system for configuring PCIE bus interface in self-adaption mode |
CN107168911A (en) * | 2017-05-05 | 2017-09-15 | 天津市英贝特航天科技有限公司 | A kind of PCIE extended methods and expansion equipment for processor |
CN108415867A (en) * | 2018-03-13 | 2018-08-17 | 联想(北京)有限公司 | The signal processing method and processing system of electronic equipment |
CN114511439A (en) * | 2022-01-28 | 2022-05-17 | 北京十纪科技有限公司 | High-tech GPU expansion board |
-
2011
- 2011-12-31 CN CN2011205703518U patent/CN202383569U/en not_active Expired - Fee Related
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103176930A (en) * | 2013-04-02 | 2013-06-26 | 无锡江南计算技术研究所 | Input/output (I/O) framework expanding method based on standard PCIe upstream port |
CN104714910A (en) * | 2013-12-17 | 2015-06-17 | 研祥智能科技股份有限公司 | Method and system for configuring PCIE bus interface in self-adaption mode |
CN104714910B (en) * | 2013-12-17 | 2018-11-30 | 研祥智能科技股份有限公司 | The method and system of adaptive configuration PCIE bus interface |
CN103984646A (en) * | 2014-06-05 | 2014-08-13 | 浪潮电子信息产业股份有限公司 | Method for designing storage system based on PCIE data transmission |
CN103984646B (en) * | 2014-06-05 | 2018-01-02 | 浪潮电子信息产业股份有限公司 | A kind of design of memory systems method based on PCIE data transfers |
CN107168911A (en) * | 2017-05-05 | 2017-09-15 | 天津市英贝特航天科技有限公司 | A kind of PCIE extended methods and expansion equipment for processor |
CN108415867A (en) * | 2018-03-13 | 2018-08-17 | 联想(北京)有限公司 | The signal processing method and processing system of electronic equipment |
CN114511439A (en) * | 2022-01-28 | 2022-05-17 | 北京十纪科技有限公司 | High-tech GPU expansion board |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120815 Termination date: 20161231 |