CN108987487A - A kind of super barrier transverse diode device integrated - Google Patents
A kind of super barrier transverse diode device integrated Download PDFInfo
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- CN108987487A CN108987487A CN201810820599.1A CN201810820599A CN108987487A CN 108987487 A CN108987487 A CN 108987487A CN 201810820599 A CN201810820599 A CN 201810820599A CN 108987487 A CN108987487 A CN 108987487A
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- 230000004888 barrier function Effects 0.000 title claims abstract description 22
- 238000001465 metallisation Methods 0.000 claims description 18
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 12
- 239000000463 material Substances 0.000 claims description 9
- 239000000377 silicon dioxide Substances 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 5
- 229920005591 polysilicon Polymers 0.000 claims description 4
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 3
- 239000002131 composite material Substances 0.000 claims description 2
- 230000005611 electricity Effects 0.000 claims 1
- 230000003647 oxidation Effects 0.000 claims 1
- 238000007254 oxidation reaction Methods 0.000 claims 1
- 230000008901 benefit Effects 0.000 abstract description 5
- 238000011084 recovery Methods 0.000 abstract description 5
- 230000015556 catabolic process Effects 0.000 abstract description 3
- 230000000694 effects Effects 0.000 abstract description 3
- 238000005516 engineering process Methods 0.000 abstract description 3
- 239000004065 semiconductor Substances 0.000 abstract description 3
- 238000009825 accumulation Methods 0.000 abstract description 2
- 238000001727 in vivo Methods 0.000 abstract description 2
- 230000005684 electric field Effects 0.000 abstract 1
- 150000002500 ions Chemical class 0.000 description 7
- 238000000034 method Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 230000008859 change Effects 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 238000001259 photo etching Methods 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 238000000927 vapour-phase epitaxy Methods 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000009833 condensation Methods 0.000 description 1
- 230000005494 condensation Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66136—PN junction diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/8611—Planar PN junction diodes
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
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- Electrodes Of Semiconductors (AREA)
Abstract
The invention belongs to power semiconductor technologies fields, it is related to a kind of super barrier transverse diode device that can be integrated, the present invention essentially consists in gate electrode while covering P-doped zone and N-type doped region, pass through bulk effect, voltage needed for reducing P-doped zone surface transoid, electron accumulation layer is introduced on N-type doped region surface, pass through single current-carrying subconductivity, the present invention combines the advantages of PN junction diode and Schottky diode, compared to PN junction diode, the present invention can reduce positive cut-in voltage, improve the Reverse recovery speed of diode, compared to Schottky diode, reverse leakage is smaller and stablizes, make the reduction of device surface electric field by introducing P+ type heavily doped region progress assisted depletion below N-type doped region simultaneously, reverse breakdown point is adjusted in vivo.
Description
Technical field
The present invention relates to power semiconductor technologies, in particular to a kind of super barrier transverse diode device that can be integrated.
Background technique
Traditional rectifier diode mainly has two class of PN junction diode and Schottky diode, wherein PN junction diode is just
To unlatching pressure drop VFIt is larger, reverse recovery time TrrIt is longer, but the stability of PN junction diode is preferable, can work in high voltage feelings
Under condition；Advantage is larger at low voltage for Schottky diode, and forward voltage drop is small, and reverse recovery time is short, but two pole of Schottky
The reverse leakage current of pipe is larger, and unstable.In order to improve diode behavior, industry proposes Junction Barrier Controlled rectifier
(JBS), PIN/ Schottky rectifier (MPS) is mixed, MOS controls devices such as diode (MCD).In recent years, fierce market is competing
It strives and not only device itself is required higher and higher, also more stringent requirements are proposed to the integration of device.So how to reduce
Diode leakage accelerates Reverse recovery speed, and integration is improved while reducing forward voltage drop becomes what each producer made great efforts
Direction.
Summary of the invention
In view of the foregoing deficiencies of prior art, the purpose of the present invention is to provide the super barrier transverse directions that one kind can integrate
Diode component.
For achieving the above object, technical solution of the present invention is as follows:
A kind of super barrier transverse diode device integrated, including P+ type substrate, the P being cascading from bottom to up
Type extension, N-type trap, oxide layer, gate electrode have P-doped zone, P+ type heavily doped region, N-type doped region in the N-type trap；
Upper left side has P+ type heavily doped region and N+ type heavily doped region inside the P-doped zone；The right side of the P+ type heavily doped region
It is adjacent with the left side of N+ type heavily doped region and contact；Upper right side has N+ type heavily doped region inside the N-type doped region；It is described
N-type doped region is located at right above P+ type heavily doped region and contacts with the upper surface of P+ type heavily doped region, the P+ type heavily doped region
It is in contact with the left side of N-type doped region with P-doped zone；The lower surface of the oxide layer is in contact with N-type trap upper surface, oxygen
The length of the upper surface of change layer and the following table face contact of gate electrode, the oxide layer and gate electrode extends to N+ type heavily doped region
The left margin of right margin and N+ type heavily doped region；The lower surface of the metallization anode and upper surface, the N+ weight of P+ heavily doped region
The upper surface of doped region all contacts, and the metallization anode is all contacted with the left margin of oxide layer and gate electrode, and is extended to the right
To gate electrode is completely covered；The metallization cathode is contacted with the upper surface of N+ type heavily doped region.
It is preferred that the material that uses of the oxide layer answering for silica or silica and silicon nitride
Condensation material.
It is preferred that the material that the gate electrode uses is polysilicon.
The invention has the benefit that the present invention provides the super barrier transverse diode device that one kind can integrate, it is comprehensive
The advantages of PN junction diode and Schottky diode, PN junction diode is compared, the present invention can reduce positive cut-in voltage, mention
High Reverse recovery speed；Compared to Schottky diode, reverse leakage is smaller and stablizes.
Detailed description of the invention
Fig. 1 is the schematic diagram of the section structure for integrating super barrier transverse diode of the invention；
Fig. 2 is that the super barrier transverse diode that integrates of the invention exhausts line schematic diagram in no applied voltage；
Fig. 3 is of the invention to integrate current path of the super barrier transverse diode when anode voltage reaches cut-in voltage
Schematic diagram；
Fig. 4-Figure 12 is a kind of manufacturing process flow schematic diagram for integrating super barrier transverse diode device of the invention；
1 is P+ type substrate, and 2 be p-type extension, and 3 be N-type trap, and 4 be P-doped zone, and 5 be P+ type heavily doped region, and 6 be N-type
Doped region, 7 be P+ type heavily doped region, and 8 be N+ type heavily doped region, and 9 be N+ type heavily doped region, and 10 be oxide layer, and 11 be gate electrode,
12 be metallization anode, and 13 be the cathode that metallizes, and 14 be depletion region edge boundary line, and 15 be current line.
Specific embodiment
Illustrate embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this specification
Other advantages and efficacy of the present invention can be easily understood for disclosed content.The present invention can also pass through in addition different specific realities
The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints and application, without departing from
Various modifications or alterations are carried out under spirit of the invention.
As shown in Figure 1, the present invention provides a kind of super barrier transverse diode device that can be integrated, including from bottom to up successively
The P+ type substrate 1 that is stacked, p-type extension 2, N-type trap 3, oxide layer 10, gate electrode 11 have p-type doping in the N-type trap 3
Area 4, P+ type heavily doped region 5, N-type doped region 6；The 4 inside upper left side of P-doped zone has P+ type heavily doped region 7 and N+ type
Heavily doped region 8；The right side of the P+ type heavily doped region 7 and the left side of N+ type heavily doped region 8 are adjacent and contact；The N-type doping
6 inside upper right side of area has N+ type heavily doped region 9；The N-type doped region 6 is located at right above P+ type heavily doped region 5 and and P+ type
The upper surface of heavily doped region 5 contacts, and the left side of the P+ type heavily doped region 5 and N-type doped region 6 is in contact with P-doped zone 4；
The lower surface of the oxide layer 10 is in contact with 3 upper surface of N-type trap, and the upper surface of oxide layer 10 and the lower surface of gate electrode 11 connect
The length of touching, the oxide layer 10 and gate electrode 11 extends to the right margin of N+ type heavily doped region 8 and a left side for N+ type heavily doped region 9
Boundary；The lower surface and the upper surface of P+ type heavily doped region 7 of the metallization anode 12, N+ type heavily doped region 8 upper surface all
Contact, the metallization anode 12 is all contacted with the left margin of oxide layer 10 and gate electrode 11, and is extended right up to and be completely covered
Gate electrode 11；The metallization cathode 13 is contacted with the upper surface of N+ type heavily doped region 9.
The material that the oxide layer 10 uses is silica or the composite material of silica and silicon nitride.
The material that the gate electrode 11 uses is polysilicon.
Working principle of the present invention is as follows:
The super barrier transverse diode device that one kind provided by the present invention can integrate, as shown in Figure 1, structure of the invention
Similar to DMOS, but it is different from DMOS.Electrode connection mode when its forward conduction are as follows: metallization anode 12 connects positive potential, gold
Categoryization cathode 13 connects zero potential.In metallization anode without applied voltage or added positive voltage very hour due to P+ type heavily doped region
5 doping concentration is much larger than N-type doped region 6, the Built-in potential for the PN junction that P+ type heavily doped region 5 and N-type doped region 6 are constituted
Meeting is so that 6 fully- depleted of N-type doped region between P+ type heavily doped region 5 and oxide layer 10, and electron channel is blocked, such as Fig. 2 institute
Show, diode is in off state at this time.
When metallization anode 12 plus positive voltage, when metallization cathode 13 connects zero potential, the drain-gate for being equivalent to N-channel MOS is same
When add positive voltage, source electrode connects zero potential.Due to the bulk effect of MOS, work as VBSVoltage be timing channel barrier reduce, threshold voltage
It can reduce.The built-in barrier region for the PN junction that P+ type heavily doped region 5 and N-type doped region 6 are constituted simultaneously is gradually reduced, potential barrier drop
It is low.Due to the presence of N-type doped region 6, accumulation layer is more easier to be formed to form a low impedance path, as shown in figure 3, this
When diode current flow, electronics from metallization cathode 13 flow direction metallization anode 12.So the cut-in voltage of device is compared to PN junction
Diode can reduce.Simultaneously because diode of the invention is unipolar device, there is no minority carrier in forward conduction
Storage problem, so reversely restoring process is faster than PN junction diode.
The super barrier transverse diode device integrated of the invention, electrode connection mode when reverse blocking are as follows: gold
Categoryization anode 12 connects zero potential, and metallization cathode 13 connects positive potential.Device is PN junction pressure resistance, P+ type heavily doped region 5 and oxygen at this time
Change 6 fully- depleted of N-type doped region between layer 10, the reverse leakage of device can very little compared to Schottky diode at this time.And
Due to 6 fully- depleted of N-type doped region, the surface field of device can be lowered, when the voltage on metallization cathode 13 reaches breakdown potential
When pressure, breakdown can occur in vivo.
The process for making for the super barrier transverse diode device that can be integrated shown in the present invention can be according to specific work
Skill process carries out appropriate adjustment, one of manufacturing process flow are as follows:
1 monocrystalline silicon prepares and epitaxial growth: such as Fig. 4, using p-type heavy doping monocrystalline substrate, crystal orientation is<100>.Using
The p-type extension 2 of the methods of vapour phase epitaxy VPE growth certain thickness and doping concentration；
2 ion implantings: as shown in figure 5, injecting manufacture N-type trap 3 using photoetching；
3 ion implantings: as shown in fig. 6, injecting to form N-type doped region 6 using photoetching；
The injection of 4 high energy ions and knot: as shown in fig. 7, the ion implanting formation P+ type for carrying out a high-energy is heavily doped
Miscellaneous area 5, and acceptor impurity dosage herein answers larger, and knot；
5 ion implantings and knot: as shown in figure 8, forming P-doped zone 4 using photoetching injection and knot；
The ion implanting of 6 high doses: as shown in figure 9, the ion implanting for carrying out multiple low energy high dose forms P+ type weight
Doped region 7, N+ type heavily doped region 8, N+ type heavily doped region 9 are prepared for the contact of subsequent metal；
The preparation and etching of 7 gate oxides: as shown in Figure 10, gate oxide is grown using thermal process, controls time and temperature
Degree reaches the oxidated layer thickness of needs.Then carry out the etching of oxide layer；
8 depositing polysilicons and etching: as shown in figure 11, grid material is made using the method for deposit and is etched, is located at
Right above oxide layer；
9 deposit metals simultaneously etch: as shown in figure 12, depositing metal and etch, make anode and cathode；
The super barrier transverse diode that one kind proposed by the present invention can integrate, is equally applicable to silicon carbide, GaAs, phosphatization
The device of the semiconductor materials such as indium or germanium silicon.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe
The personage for knowing this technology all without departing from the spirit and scope of the present invention, carries out modifications and changes to above-described embodiment.Cause
This, all those of ordinary skill in the art are completed without departing from the spirit and technical ideas disclosed in the present invention
All equivalent modifications or change, should be covered by the claims of the present invention.
Claims (3)
1. the super barrier transverse diode device that one kind can integrate, it is characterised in that: including the P being cascading from bottom to up
+ type substrate (1), p-type extension (2), N-type trap (3), oxide layer (10), gate electrode (11) are mixed with p-type in the N-type trap (3)
Miscellaneous area (4), P+ type heavily doped region (5), N-type doped region (6)；The internal upper left side of the P-doped zone (4) has P+ type heavily doped
Miscellaneous area (7) and N+ type heavily doped region (8)；The right side of the P+ type heavily doped region (7) and the left side of N+ type heavily doped region (8) are adjacent
And it contacts；The internal upper right side of the N-type doped region (6) has N+ type heavily doped region (9)；The N-type doped region (6) is located at P+
It is contacted right above type heavily doped region (5) and with the upper surface of P+ type heavily doped region (5), the P+ type heavily doped region (5) and N-type
The left side of doped region (6) is in contact with P-doped zone (4)；The lower surface of the oxide layer (10) and N-type trap (3) upper surface phase
Contact, the upper surface of oxide layer (10) and the following table face contact of gate electrode (11), the oxide layer (10) and gate electrode (11)
Length extends to the right margin of N+ type heavily doped region (8) and the left margin of N+ type heavily doped region (9)；The metallization anode (12)
Lower surface all contacted with the upper surface of the upper surface of P+ type heavily doped region (7), N+ type heavily doped region (8), metallization sun
Pole (12) is all contacted with the left margin of oxide layer (10) and gate electrode (11), and extends right up to and gate electrode (11) are completely covered；
Metallization cathode (13) contacts with the upper surface of N+ type heavily doped region (9).
2. the super barrier transverse diode device that one kind according to claim 1 can integrate, it is characterised in that: the oxidation
The material that layer (10) uses is silica or the composite material of silica and silicon nitride.
3. the super barrier transverse diode device that one kind according to claim 1 can integrate, it is characterised in that: the grid electricity
The material that pole (11) uses is polysilicon.
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| CN201810820599.1A CN108987487A (en) | 2018-07-24 | 2018-07-24 | A kind of super barrier transverse diode device integrated |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201810820599.1A CN108987487A (en) | 2018-07-24 | 2018-07-24 | A kind of super barrier transverse diode device integrated |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111863973A (en) * | 2020-09-23 | 2020-10-30 | 同方威视技术股份有限公司 | Schottky diode and preparation method thereof |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102956707A (en) * | 2011-08-12 | 2013-03-06 | 瑞萨电子株式会社 | Power mosfet, an igbt, and a power diode |
| CN104900691A (en) * | 2015-04-10 | 2015-09-09 | 旺宏电子股份有限公司 | Semiconductor element and manufacture method thereof |
| US20170338335A1 (en) * | 2016-05-19 | 2017-11-23 | Rohm Co., Ltd. | High-speed diode and method for manufacturing the same |
-
2018
- 2018-07-24 CN CN201810820599.1A patent/CN108987487A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102956707A (en) * | 2011-08-12 | 2013-03-06 | 瑞萨电子株式会社 | Power mosfet, an igbt, and a power diode |
| CN104900691A (en) * | 2015-04-10 | 2015-09-09 | 旺宏电子股份有限公司 | Semiconductor element and manufacture method thereof |
| US20170338335A1 (en) * | 2016-05-19 | 2017-11-23 | Rohm Co., Ltd. | High-speed diode and method for manufacturing the same |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111863973A (en) * | 2020-09-23 | 2020-10-30 | 同方威视技术股份有限公司 | Schottky diode and preparation method thereof |
| CN111863973B (en) * | 2020-09-23 | 2020-12-11 | 同方威视技术股份有限公司 | Schottky diode and preparation method thereof |
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