CN108928802A - Chip die packaging method, micro electro-mechanical system packaging method and MEMS - Google Patents
Chip die packaging method, micro electro-mechanical system packaging method and MEMS Download PDFInfo
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- CN108928802A CN108928802A CN201710392149.2A CN201710392149A CN108928802A CN 108928802 A CN108928802 A CN 108928802A CN 201710392149 A CN201710392149 A CN 201710392149A CN 108928802 A CN108928802 A CN 108928802A
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- 238000004806 packaging method and process Methods 0.000 title claims abstract description 78
- 238000000034 method Methods 0.000 title claims abstract description 58
- 229920005989 resin Polymers 0.000 claims abstract description 69
- 239000011347 resin Substances 0.000 claims abstract description 69
- 238000005538 encapsulation Methods 0.000 claims abstract description 64
- 238000004519 manufacturing process Methods 0.000 claims abstract description 39
- 239000004033 plastic Substances 0.000 claims abstract description 37
- 238000002161 passivation Methods 0.000 claims abstract description 36
- 239000005022 packaging material Substances 0.000 claims abstract description 32
- 239000002184 metal Substances 0.000 claims abstract description 25
- 229910052751 metal Inorganic materials 0.000 claims abstract description 25
- 238000011068 loading method Methods 0.000 claims abstract description 16
- 238000007747 plating Methods 0.000 claims abstract description 14
- 230000000149 penetrating effect Effects 0.000 claims abstract description 4
- 238000005516 engineering process Methods 0.000 claims description 13
- 239000000463 material Substances 0.000 claims description 10
- 230000005611 electricity Effects 0.000 claims description 5
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- 238000009738 saturating Methods 0.000 claims description 3
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- 238000010586 diagram Methods 0.000 description 12
- 230000005540 biological transmission Effects 0.000 description 7
- 230000010354 integration Effects 0.000 description 6
- 238000004904 shortening Methods 0.000 description 3
- 239000004642 Polyimide Substances 0.000 description 2
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 239000003292 glue Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 125000003700 epoxy group Chemical group 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
- 239000011147 inorganic material Substances 0.000 description 1
- JEIPFZHSYJVQDO-UHFFFAOYSA-N iron(III) oxide Inorganic materials O=[Fe]O[Fe]=O JEIPFZHSYJVQDO-UHFFFAOYSA-N 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
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Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/02—Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00261—Processes for packaging MEMS devices
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Micromachines (AREA)
Abstract
The invention discloses a kind of chip die packaging methods, including：The front of chip is temporarily bonded with loading plate；Chip is embedded in organic resin layer；Loading plate is torn open with disk and is bonded, and exposes the pin on chip；Make a layer insulating；Blind hole is formed in the corresponding position removal insulating layer of pin；The first rewiring layer that production is electrically connected by blind hole with pin in the bottom of organic resin layer, makes the first passivation layer；The plastic packaging material through hole for penetrating organic resin layer and being connected to pin is made at the top of organic resin layer；The via metal that plating is electrically connected with the first rewiring layer is filled out in plastic packaging material through hole, production second reroutes layer, makes the second passivation layer；The convex block being electrically connected with pin is made, obtains being fanned out to the chip die that encapsulation is completed.MEMS chip by fan-out package form, is enable its size and asic chip wafer to realize wafer-level packaging by the present invention.
Description
Technical field
The present invention relates to field of micro electromechanical technology more particularly to a kind of chip die packaging methods, micro electro-mechanical system packaging
Method and MEMS.
Background technique
MEMS (Micro-Electro-Mechanical System, MEMS) chip is collection microsensor, micro- holds
The micro- energy of row device, micro mechanical structure, micro battery, signal processing and control circuit, high-performance electronic integrated chip, interface, communication
Deng in one microchip, be widely used in new high-tech industry.
In general, meeting design specialized integrated circuit (Application Specific Integrated Circuit, ASIC)
Chip drives MEMS chip, forms MEMS.
However, the size of existing MEMS chip is not adapted to the size of asic chip, it is caused to can not achieve wafer
Grade encapsulation, existing packing forms are most or encapsulate using traditional WB etc., the stacking of MEMS chip and asic chip
Its encapsulation is realized by WB mode afterwards.
Summary of the invention
It is an object of the invention to overcome the prior art to cannot achieve the skill of MEMS chip Yu asic chip wafer-level packaging
Art problem provides a kind of chip die packaging method, micro electro-mechanical system packaging method and MEMS.
Technical solution of the present invention provides a kind of chip die packaging method, including：
The front of chip is temporarily bonded with loading plate；
The chip is embedded in organic resin layer, the embedding disk for having chip is obtained；
The loading plate is torn open with the disk and is bonded, and exposes the pin on the chip；
In one layer insulating of front production of the chip；
The insulating layer, which is removed, in the corresponding position of the pin forms blind hole；
The first rewiring layer that production is electrically connected by the blind hole with the pin in the bottom of the organic resin layer,
Production covering described first reroutes the first passivation layer of layer；
The plastic packaging material for penetrating the organic resin layer and being connected to the pin is made at the top of the organic resin layer
Through-hole；
The via metal that plating is electrically connected with the first rewiring layer is filled out in the plastic packaging material through hole, production passes through described
The second rewiring layer that via metal in plastic packaging material through hole is electrically connected with the first rewiring layer, production covering described second
Reroute the second passivation layer of layer；
The convex block being electrically connected with the pin is made in first passivation layer, obtains being fanned out to the chip crystalline substance that encapsulation is completed
Circle.
Further, the convex block is arranged in the drop shadow spread of the organic resin layer.
Further, the chip is dedicated IC chip or chip of micro-electro-mechanical system.
Further, the chip is chip of micro-electro-mechanical system, described that the chip is embedded in organic resin layer, is obtained
To the embedding disk for having chip, specifically include：
The chip of micro-electro-mechanical system is embedded in the organic resin layer, and exposes the chip of micro-electro-mechanical system
Functional area obtains the embedding disk for having chip of micro-electro-mechanical system.
The present invention provides a kind of micro electro-mechanical system packaging method, including：
Using foregoing chip die packaging method to dedicated IC chip be fanned out to encapsulation obtain it is dedicated
Ic core wafer carries out fan-in to chip of micro-electro-mechanical system and encapsulates to obtain chip of micro-electro-mechanical system wafer；
Micro electro-mechanical system packaging is carried out to the dedicated IC chip wafer and the chip of micro-electro-mechanical system wafer,
Obtain include the dedicated IC chip wafer and the chip of micro-electro-mechanical system wafer micro-electro-mechanical systems irrespective of size envelope
Assembling structure.
Further, described micro- to the dedicated IC chip wafer and chip of micro-electro-mechanical system wafer progress
Electromechanical system package obtains including the micro- of the dedicated IC chip wafer and the chip of micro-electro-mechanical system wafer
Mechatronic Systems class encapsulation structure, specifically includes：
It will complete the front for the dedicated IC chip wafer for being fanned out to encapsulation and complete the MEMS of fan-in encapsulation
The front of chip die assembling interconnection is completed by wafer scale bonding technology；
The first welded ball array ball is made at the back side of the dedicated IC chip wafer, and to the dedicated integrated electricity
Road chip die and the chip of micro-electro-mechanical system wafer carry out cutting-up, obtain being formed include chip of micro-electro-mechanical system wafer with
And the MEMS class encapsulation structure of dedicated IC chip wafer.
The present invention provides a kind of micro electro-mechanical system packaging method, including：
Using foregoing chip die packaging method to chip of micro-electro-mechanical system be fanned out to encapsulation obtain it is micro electronmechanical
System on Chip/SoC wafer carries out fan-in to dedicated IC chip and encapsulates to obtain dedicated IC chip wafer；
Micro electro-mechanical system packaging is carried out to the chip of micro-electro-mechanical system wafer and the dedicated IC chip wafer,
Obtain include the chip of micro-electro-mechanical system wafer and the dedicated IC chip wafer micro-electro-mechanical systems irrespective of size envelope
Assembling structure.
Further, described micro- to the chip of micro-electro-mechanical system wafer and dedicated IC chip wafer progress
Electromechanical system package obtains including the micro- of the chip of micro-electro-mechanical system wafer and the dedicated IC chip wafer
Mechatronic Systems class encapsulation structure, specifically includes：
It will complete the front for the chip of micro-electro-mechanical system wafer for being fanned out to encapsulation and complete the specific integrated circuit of fan-in encapsulation
The front of chip die assembling interconnection is completed by wafer scale bonding technology；
Pass through etch process for required MEMS physics at the back side of the chip of micro-electro-mechanical system wafer
Structure is discharged；
Nut cap bonding is carried out to the chip of micro-electro-mechanical system wafer by wafer scale bonding technology；
The second welded ball array ball is made at the back side of the chip of micro-electro-mechanical system wafer, and to the MEMS core
Wafer and the dedicated IC chip wafer carry out cutting-up, and obtaining being formed includes the chip of micro-electro-mechanical system wafer
And the MEMS class encapsulation structure of the dedicated IC chip wafer.
The present invention provides a kind of MEMS, including：Using dedicated IC chip wafer, the use for being fanned out to encapsulation
The chip of micro-electro-mechanical system wafer of fan-in encapsulation, the dedicated IC chip wafer are equipped with and specific integrated circuit pin
The specific integrated circuit convex block of electrical connection, the specific integrated circuit convex block are positive with the chip of micro-electro-mechanical system wafer
The electrical connection of MEMS convex block.
Further, the dedicated IC chip wafer includes：Dedicated IC chip, the dedicated integrated electricity
Road chip is embedded in specific integrated circuit organic resin layer, the front of the dedicated IC chip be provided with one layer it is dedicated
Integrated circuit isolation layer, specific integrated circuit insulating layer position corresponding with the specific integrated circuit pin are provided with specially
With integrated circuit blind hole, it is equipped in the bottom of the specific integrated circuit organic resin layer and passes through the specific integrated circuit blind hole
The first specific integrated circuit being electrically connected with the specific integrated circuit pin reroutes layer, in first specific integrated circuit
It reroutes layer and is equipped with the first specific integrated circuit passivation layer, be equipped with and wear at the top of the specific integrated circuit organic resin layer
The specific integrated circuit plastic packaging material through hole that the saturating organic resin layer is connected to the specific integrated circuit pin, described dedicated
It is logical that the specific integrated circuit that plating is electrically connected with first specific integrated circuit rewiring layer is filled out in integrated circuit plastic packaging material through hole
Mesoporous metal is equipped at the top of the specific integrated circuit organic resin layer by the specific integrated circuit plastic packaging material through hole
Specific integrated circuit via metal and first specific integrated circuit reroute the second specific integrated circuit that layer is electrically connected
Layer is rerouted, is rerouted in second specific integrated circuit and is equipped with the second specific integrated circuit passivation layer on layer, described the
One specific integrated circuit passivation layer is equipped with the specific integrated circuit convex block being electrically connected with the specific integrated circuit pin.
The present invention provides a kind of MEMS, including：Using be fanned out to the chip of micro-electro-mechanical system wafer of encapsulation, using fan
Enter the dedicated IC chip wafer of encapsulation, the chip of micro-electro-mechanical system wafer is equipped with and is electrically connected with MEMS pin
The MEMS convex block connect, the positive dedicated collection of the MEMS convex block and the dedicated IC chip wafer
It is electrically connected at circuit convex block.
Further, the chip of micro-electro-mechanical system wafer includes：Chip of micro-electro-mechanical system, the chip of micro-electro-mechanical system
It is embedded in MEMS organic resin layer, the front of the chip of micro-electro-mechanical system is provided with one layer of MEMS insulation
Layer, MEMS insulating layer position corresponding with the MEMS pin are provided with MEMS blind hole,
The bottom of the MEMS organic resin layer, which is equipped with, passes through the MEMS blind hole and the MEMS pin
First MEMS of electrical connection reroutes layer, reroutes in first MEMS and is equipped with the first micro-electro-mechanical systems on layer
System passivation layer, is equipped at the top of the MEMS organic resin layer and penetrates the MEMS organic resin layer and institute
State MEMS pin connection MEMS plastic packaging material through hole, filled out in the MEMS plastic packaging material through hole plating with
First MEMS reroutes the MEMS via metal of layer electrical connection, in the MEMS organic resin
The top of layer is equipped with through MEMS via metal in the MEMS plastic packaging material through hole and first microcomputer
The second MEMS that electric system reroutes layer electrical connection reroutes layer, reroutes in second MEMS and sets on layer
There is the second MEMS passivation layer, is equipped on the first MEMS passivation layer and the MEMS pin electricity
The MEMS convex block of connection.
After adopting the above technical scheme, having the advantages that：The present invention passes through asic chip or MEMS chip
Fan-out package form enables its size and MEMS chip or asic chip wafer to realize wafer-level packaging, convex by its
Block (bump) welding mode being drawn out to extraneous connection by way of the fan-in of MEMS chip or asic chip, so as to
To realize MEMS chip and asic chip integration packaging by the encapsulation of wafer scale.Due to being effectively shortened using wafer-level packaging
The path being connected between chip and with the external world, to improve the performance of system.Directly pass through RDL from the back side of asic chip
It is drawn out to the external world, thereby may be ensured that the transmission of the high speed signal of asic chip.
Detailed description of the invention
Referring to attached drawing, the disclosure of the present invention will become more readily understood.It should be understood that：These attached drawings are merely illustrative
Purpose, and be not intended to limit the scope of protection of the present invention.In figure：
Fig. 1 is a kind of flow diagram of chip die packaging method provided by the invention；
Fig. 2 is a kind of flow diagram of dedicated IC chip wafer packaging method provided by the invention；
Fig. 3 is a kind of flow diagram of chip of micro-electro-mechanical system wafer packaging method provided by the invention；
Fig. 4 is a kind of work flow diagram for micro electro-mechanical system packaging method that one embodiment of the invention provides；
Fig. 5 is shown in Fig. 4 to dedicated IC chip wafer and chip of micro-electro-mechanical system wafer progress micro-electro-mechanical systems
The flow diagram of system encapsulation；
Fig. 6 be another embodiment of the present invention provides a kind of micro electro-mechanical system packaging method work flow diagram；
Fig. 7 is shown in fig. 6 to chip of micro-electro-mechanical system wafer and dedicated IC chip wafer progress micro-electro-mechanical systems
The flow diagram of system encapsulation；
Fig. 8 is a kind of structural schematic diagram for MEMS that one embodiment of the invention provides；
Fig. 9 be another embodiment of the present invention provides a kind of MEMS structural schematic diagram.
Specific embodiment
Further illustrate a specific embodiment of the invention with reference to the accompanying drawing.
It is readily appreciated that, according to the technique and scheme of the present invention, in the case where not changing true spirit, the general skill of this field
The various structures mode and implementation that art personnel can be replaced mutually.Therefore, following specific embodiments and attached drawing are only
To the exemplary illustration of technical solution of the present invention, and it is not to be construed as whole of the invention or is considered as to inventive technique scheme
It defines or limits.
It mentions in the present specification or up, down, left, right, before and after, front, the back side, top, the bottom that may mention etc.
Positional terms are defined relative to each construction shown in the drawings, they are opposite concepts, and it is therefore possible to can root
Correspondingly changed according to different location locating for it, different use states.So also should not be by these or others side
Position term is construed to restricted term.
Embodiment one
As shown in Figure 1, Fig. 1 is a kind of flow diagram of chip die packaging method provided by the invention, including：
Step S11：The front of chip 101 is temporarily bonded with loading plate 102；
Step S12：Chip 101 is embedded in organic resin layer 103, the embedding disk for having chip is obtained；
Step S13：Loading plate 102 is torn open with disk and is bonded, and exposes the pin 104 on chip 101；
Step S14：In one layer of special isolation layer 105 of front production of chip 101；
Step S15：In the corresponding position of pin 104, removal insulating layer 105 forms blind hole 106；
Step S16：The first heavy cloth that production is electrically connected by blind hole 106 with pin 104 in the bottom of organic resin layer 103
Line layer 107, production covering first reroute the first passivation layer of layer 107；
Step S17：The modeling for penetrating organic resin layer 103 and being connected to pin 104 is made at the top of organic resin layer 103
Seal material through hole 108；
Step S18：The via metal that plating is electrically connected with the first rewiring layer 107 is filled out in plastic packaging material through hole 108, production is logical
The second rewiring layer 109 that the via metal crossed in plastic packaging material through hole 108 is electrically connected with the first rewiring layer 107, production covering
Second reroutes the second passivation layer of layer；
Step S19：The convex block 110 being electrically connected with pin 104 is made in the first passivation layer, obtains being fanned out to the core that encapsulation is completed
Wafer.
Specifically：
Step S11, temporary patch：Chip 101 is waited according to its certain position precision just by temporarily bonding glue 1021
Down in attachment to loading plate 102, the size of the loading plate 102 is identical as the wafer size for the chip 101 to be bonded,
Material can be the materials such as metal, silicon (Si), glass；
Step S12, plastic packaging：Chip 101 is embedded into organic resin layer 103 by relevant device, which can be
Mould top (molding) glue, or other relevant epoxies, polyimides (Polyimide, PI), benzocyclobutene
Resin materials such as (Benzocyclobutene, BCB), the form of material can be liquid, solid-state, membranaceous etc., used to set
Standby can be plastic packaging machine, film laminator, high temperature press etc.；
Step S13 tears interim bonding loading plate open：Loading plate 102 is torn open with the embedding disk for having chip and is bonded, thus
Input/output (I/O) pin (pad) 104 on chip 101 is exposed, for the rewiring layer for carrying out lower step
The production of (Redistribution Layer, RDL) is ready；
The production of step S14, RDL insulating layer：A layer insulating 105 is made on the positive disk of chip 101, equally
105 material of insulating layer can may be inorganic material for organic resin, production method include spraying, whirl coating, press mold,
Vapor deposition etc.；
The blind hole production that step S15, RDL are connect with chip：Pass through certain technique in the corresponding position chip 101pad
Method by insulating layer 105 removal form blind hole 106, the process can for bore process, by exposure development technique, can also
It is made in a manner of through dry or wet etch technique etc.；
The production of step S16, RDL line layer：It is real by processing steps such as production seed layer, plating, exposure, development, etchings
The bottom of present organic resin layer 103 makes redistribution line layer, and one layer of passivation layer is made on the line layer, is used for
Protect the route of RDL；
Step S17, plastic packaging material through hole (TMV) production：At the top of organic resin layer 103, production penetrates the tree of embedding chip
The hole TMV 108 of rouge layer；
Step S18, TMV hole metallization and RDL layer production：Plating metal is filled out in the made hole TMV 108, in addition upper
Level makes the RDL layer 109 on upper layer, for by chip 101 and IC chip and extraneous interconnecting channel；
Step S19, Flip Chip Bond Technique (Bumping)：Pass through flip chip bonding in the corresponding position of I/O convex block of chip 101
Technique makes the dimpling block (micro bump) being connected with chip, and the material of the bump can be copper pillar bumps (Copper
Pillar bump) etc..
Asic chip or MEMS chip are passed through fan-out package shape by chip die packaging method provided by the invention
Formula enables its size and MEMS chip or asic chip wafer to realize wafer-level packaging, is welded by its convex block (bump)
Mode being drawn out to extraneous connection by way of the fan-in of MEMS chip or asic chip, so as to pass through wafer scale
Encapsulation realize MEMS chip and asic chip integration packaging.Due to being effectively shortened between chip using wafer-level packaging and
The path being connected with the external world, to improve the performance of system.Directly pass through RDL from the back side of asic chip and be drawn out to the external world,
It thereby may be ensured that the transmission of the high speed signal of asic chip.
Convex block is arranged in the drop shadow spread of organic resin in one of the embodiments,.
Convex block is arranged in the drop shadow spread of organic resin the present embodiment, enables in cutting in organic resin model
Internal cutting is enclosed, chip itself is not interfered with.
Embodiment two
As shown in Fig. 2, Fig. 2 is a kind of process signal of dedicated IC chip wafer packaging method provided by the invention
Figure, including：
Step S21：The front of dedicated IC chip 201 is subjected to ephemeral key with specific integrated circuit loading plate 202
It closes；
Step S22：Dedicated IC chip 201 is embedded in specific integrated circuit organic resin layer 203, is buried
It is equipped with the disk of chip；
Step S23：Specific integrated circuit loading plate 202 is torn open with disk and is bonded, and exposes dedicated IC chip
Specific integrated circuit pin 204 on 201；
Step S24：In one layer of specific integrated circuit insulating layer 205 of front production of dedicated IC chip 201；
Step S25：In the corresponding position of the specific integrated circuit pin 204 removal formation of specific integrated circuit insulating layer 205
Specific integrated circuit blind hole 206；
Step S26：In the bottom of specific integrated circuit organic resin layer 203, production passes through specific integrated circuit blind hole 206
The first specific integrated circuit being electrically connected with specific integrated circuit pin 204 reroutes layer 207, and production covering first is dedicated integrated
First specific integrated circuit passivation layer of circuit rewiring layer 207；
Step S27：At the top of specific integrated circuit organic resin layer 203, production penetrates specific integrated circuit organic resin
The specific integrated circuit plastic packaging material through hole 208 that layer 203 is connected to specific integrated circuit pin 204；
Step S28：Plating is filled out in specific integrated circuit plastic packaging material through hole 208 reroutes layer with the first specific integrated circuit
The specific integrated circuit via metal of 207 electrical connections, production pass through dedicated integrated in specific integrated circuit plastic packaging material through hole 208
Circuit via metal reroutes the second specific integrated circuit that layer 207 is electrically connected with the first specific integrated circuit and reroutes layer 209,
Production the second specific integrated circuit of covering reroutes the second specific integrated circuit passivation layer of layer 209；
Step S29：The first specific integrated circuit passivation layer make be electrically connected with specific integrated circuit pin 204 it is dedicated
Integrated circuit convex block 210 obtains being fanned out to the dedicated IC chip wafer that encapsulation is completed.
Asic chip is passed through fan-out package shape by dedicated IC chip wafer packaging method provided by the invention
Formula enables its size and MEMS chip wafer to realize wafer-level packaging, passes through in such a way that its convex block (bump) welds
The mode of the fan-in of MEMS chip is drawn out to extraneous connection, so as to by the encapsulation of wafer scale realize MEMS chip with
Asic chip integration packaging.Due to effectively shortening the path being connected between chip and with the external world using wafer-level packaging, from
And improve the performance of system.Directly pass through RDL from the back side of asic chip and be drawn out to the external world, thereby may be ensured that asic chip
High speed signal transmission.
Embodiment three
As shown in figure 3, Fig. 3 is a kind of process signal of chip of micro-electro-mechanical system wafer packaging method provided by the invention
Figure, including：
Step S31：The front of chip of micro-electro-mechanical system 301 is temporarily bonded with MEMS loading plate 302；
Step S32：Chip of micro-electro-mechanical system 301 is embedded in MEMS organic resin layer 303, obtains embedding having
The disk of chip；
Step S33：MEMS loading plate 302 is torn open with disk and is bonded, and is exposed on chip of micro-electro-mechanical system 301
MEMS pin 304；
Step S34：In one layer of MEMS insulating layer 305 of front production of chip of micro-electro-mechanical system 301；
Step S35：In the corresponding position of MEMS pin 304, removal MEMS insulating layer 305 forms microcomputer
Electric system blind hole 306；
Step S36：MEMS organic resin layer 303 bottom production by MEMS blind hole 306 with it is micro-
The first MEMS that Mechatronic Systems pin 304 is electrically connected reroutes layer 307, and production the first MEMS of covering reroutes
First MEMS passivation layer of layer 307；
Step S37：At the top of MEMS organic resin layer 303, production penetrates MEMS organic resin layer
The 303 MEMS plastic packaging material through hole 308 being connected to MEMS pin 304；
Step S38：Plating is filled out in MEMS plastic packaging material through hole 308 reroutes 307 electricity of layer with the first MEMS
The MEMS via metal of connection, production pass through the MEMS through-hole gold in MEMS plastic packaging material through hole 308
Belong to and reroute the second MEMS rewiring layer 309 that layer 307 is electrically connected with the first MEMS, production covering second is micro-
Second MEMS passivation layer of Mechatronic Systems rewiring layer 309；
Step S39：The micro-electro-mechanical systems being electrically connected with MEMS pin 304 are made in the first MEMS passivation layer
System convex block 310 obtains being fanned out to the chip of micro-electro-mechanical system wafer that encapsulation is completed.
The step S302 in one of the embodiments, specifically includes：
Chip of micro-electro-mechanical system 301 is embedded in MEMS organic resin layer 303, and exposes MEMS core
The functional area 311 of piece 301 obtains the embedding disk for having chip.
The present embodiment exposes the functional area of chip of micro-electro-mechanical system, consequently facilitating MEMS chip is exchanged with the external world.
MEMS chip is passed through fan-out package form by chip of micro-electro-mechanical system wafer packaging method provided by the invention,
So that its size and asic chip wafer is realized wafer-level packaging, passes through ASIC core in such a way that its convex block (bump) welds
The mode of the fan-in of piece is drawn out to extraneous connection, so as to realize MEMS chip and asic chip by the encapsulation of wafer scale
Integration packaging.Due to effectively shortening the path being connected between chip and with the external world using wafer-level packaging, to improve
The performance of system.Directly pass through RDL from the back side of asic chip and be drawn out to the external world, thereby may be ensured that the high speed letter of asic chip
Number transmission.
Example IV
As shown in figure 4, Fig. 4 is a kind of workflow for micro electro-mechanical system packaging method that one embodiment of the invention provides
Figure, including：
Step S41：Dedicated IC chip is carried out to be fanned out to encapsulation using foregoing chip die packaging method
Dedicated IC chip wafer is obtained, fan-in is carried out to chip of micro-electro-mechanical system and encapsulates to obtain chip of micro-electro-mechanical system wafer；
Specifically, it is convex to make MEMS corresponding with specific integrated circuit convex block on chip of micro-electro-mechanical system
Block obtains the chip of micro-electro-mechanical system wafer that encapsulation is completed.
Step S42：Micro electro-mechanical system packaging is carried out to dedicated IC chip wafer and chip of micro-electro-mechanical system wafer,
Obtain include dedicated IC chip wafer and chip of micro-electro-mechanical system wafer MEMS class encapsulation structure.
Micro electro-mechanical system packaging method provided by the invention, effectively shortened between chip using wafer-level packaging and with
The connected path in the external world, to improve the performance of system.Directly pass through RDL from the back side of asic chip and is drawn out to the external world, from
And it can guarantee the transmission of the high speed signal of asic chip.
In one of the embodiments, as shown in figure 5, the step S402, specifically includes：
Step S51：By the front for completing the dedicated IC chip wafer 2 for being fanned out to encapsulation and complete the micro- of fan-in encapsulation
The front of Mechatronic Systems chip die 3 assembling interconnection is completed by wafer scale bonding technology；
Step S52：The first welded ball array ball 4 is made at the back side of dedicated IC chip wafer 2, and to dedicated integrated
Circuit chip wafer 2 and the chip of micro-electro-mechanical system wafer 3 carry out cutting-up, and obtaining being formed includes chip of micro-electro-mechanical system crystalline substance
The MEMS class encapsulation structure of circle 3 and dedicated IC chip wafer 2.
Specifically：
Step S51, the bonding of ASIC wafer grade：Front and the MEMS chip of the asic chip wafer 2 of encapsulation will be completed
The front of wafer 3 is by wafer scale bonding technology to the MEMS convex block 210 and dedicated collection of chip of micro-electro-mechanical system wafer
Assembling interconnection is completed at the specific integrated circuit convex block 310 of circuit chip wafer；
Step S52 plants welded ball array (Ball Grid Array, BGA) ball：In the second corresponding weight of asic chip
The position of wiring layer carries out planting BGA ball to complete itself and extraneous direct connectivity port, it should be noted that is being planted
Before BGA ball, need to make ball lower metal layer (Under Bump on the second passivation layer corresponding with the position of ball is planted
Metalization, UBM), and cutting-up is carried out, so that being formed includes MEMS chip wafer and its ASIC driving chip wafer
MEMS system class encapsulation structure.
The present embodiment specific implementation to the chip of micro-electro-mechanical system wafer and the dedicated IC chip wafer into
Row micro electro-mechanical system packaging, and cutting-up is carried out to chip of micro-electro-mechanical system wafer and dedicated IC chip wafer, to meet
Various sizes of wafer demand.
Embodiment five
As shown in fig. 6, Fig. 6 be another embodiment of the present invention provides a kind of micro electro-mechanical system packaging method workflow
Figure, including：
Step S61：Chip of micro-electro-mechanical system be fanned out to encapsulating using foregoing chip die packaging method
To chip of micro-electro-mechanical system wafer, fan-in is carried out to dedicated IC chip and encapsulates to obtain dedicated IC chip wafer；
It is convex that specific integrated circuit corresponding with MEMS convex block is specifically made on dedicated IC chip
Block obtains the dedicated IC chip wafer that encapsulation is completed.
Step S62：Micro electro-mechanical system packaging is carried out to chip of micro-electro-mechanical system wafer and dedicated IC chip wafer,
Obtain include chip of micro-electro-mechanical system wafer and dedicated IC chip wafer MEMS class encapsulation structure.
Micro electro-mechanical system packaging method provided by the invention, effectively shortened between chip using wafer-level packaging and with
The connected path in the external world, to improve the performance of system.Directly pass through RDL from the back side of asic chip and is drawn out to the external world, from
And it can guarantee the transmission of the high speed signal of asic chip.
In one of the embodiments, as shown in fig. 7, the step S602, specifically includes：,
Step S71：By the front for completing the chip of micro-electro-mechanical system wafer 3 for being fanned out to encapsulation and complete the dedicated of fan-in encapsulation
The front of ic core wafer 2 assembling interconnection is completed by wafer scale bonding technology；
Step S72：Pass through etch process for required MEMS at the back side of chip of micro-electro-mechanical system wafer 3
Physical structure is discharged；
Step S73：Nut cap bonding is carried out to chip of micro-electro-mechanical system wafer 3 by wafer scale bonding technology；
Step S74：The second welded ball array ball 5 is made at the back side of chip of micro-electro-mechanical system wafer 3, and to MEMS
Chip die 3 and dedicated IC chip wafer 2 carry out cutting-up, obtain being formed include chip of micro-electro-mechanical system wafer 3 with
And the MEMS class encapsulation structure of dedicated IC chip wafer 2.
Specifically：
Step S71, the bonding of MEMS wafer grade：The MEMS chip wafer 3 for having completed encapsulation and asic chip wafer 2 are led to
Wafer scale bonding technology is crossed to the MEMS convex block 310 and dedicated IC chip wafer of chip of micro-electro-mechanical system wafer
Specific integrated circuit convex block 210 complete assembling interconnection；
Step S72, MEMS chip structure release：Required by the back side of MEMS chip wafer 3 passes through etch process for it
MEMS physical structure discharged, the back side of MEMS chip wafer 3 and the back side direction of MEMS chip are consistent；
Step S73, MEMS chip nut cap (cap) production：It will be needed for MEMS chip wafer by wafer scale bonding technology
CAP is bonded, to protect the movable structure member of its MEMS chip；
Step S74 plants BGA ball：The position of the corresponding second rewiring layer of MEMS chip plant BGA ball to
Itself and extraneous direct connectivity port are completed, and carries out cutting-up, so that being formed includes that MEMS chip wafer and its ASIC drive
The MEMS system class encapsulation structure of dynamic chip die.
The present embodiment specific implementation to the chip of micro-electro-mechanical system wafer and the dedicated IC chip wafer into
Row micro electro-mechanical system packaging, and cutting-up is carried out to chip of micro-electro-mechanical system wafer and dedicated IC chip wafer, to meet
Various sizes of wafer demand.
Embodiment six
As shown in figure 8, Fig. 8 is a kind of structural schematic diagram for MEMS that one embodiment of the invention provides, including：It adopts
It is dedicated integrated with the dedicated IC chip wafer 2 for being fanned out to encapsulation, the chip of micro-electro-mechanical system wafer 3 encapsulated using fan-in
Circuit chip wafer 1 is equipped with the specific integrated circuit convex block 210 being electrically connected with specific integrated circuit pin, specific integrated circuit
Convex block 210 is electrically connected with the positive MEMS convex block 310 of chip of micro-electro-mechanical system wafer 3.
Mems structure provided by the invention enables its size by asic chip by fan-out package form
Wafer-level packaging is realized with MEMS chip wafer, passes through the fan-in's of MEMS chip in such a way that its convex block (bump) welds
Mode is drawn out to extraneous connection, so as to realize MEMS chip and asic chip integration packaging by the encapsulation of wafer scale.By
In effectively shortening the path being connected between chip and with the external world using wafer-level packaging, to improve the performance of system.
Directly pass through RDL from the back side of asic chip and be drawn out to the external world, thereby may be ensured that the transmission of the high speed signal of asic chip.
Dedicated IC chip wafer 2 includes in one of the embodiments,：Dedicated IC chip 201, it is dedicated
IC chip 201 is embedded in specific integrated circuit organic resin 203, and the front of dedicated IC chip 201 is equipped with
One layer of specific integrated circuit insulating layer 205, the position corresponding with specific integrated circuit pin 204 of specific integrated circuit insulating layer 205
It installs and is equipped with specific integrated circuit blind hole 206, be equipped in the bottom of specific integrated circuit organic resin layer 203 by dedicated integrated
The first specific integrated circuit that circuit blind hole 206 is electrically connected with specific integrated circuit pin 204 reroutes layer 207, specially first
Layer 207 is rerouted with integrated circuit and is equipped with the first specific integrated circuit passivation layer, is equipped with and is worn at the top of organic resin layer 203
The specific integrated circuit plastic packaging material through hole that saturating specific integrated circuit organic resin layer 203 is connected to specific integrated circuit pin 204
208, filled out in specific integrated circuit plastic packaging material through hole 208 plating with the first specific integrated circuit rewiring layer 207 be electrically connected it is special
With integrated circuit via metal, it is equipped at the top of specific integrated circuit organic resin layer 203 and passes through specific integrated circuit plastic packaging
It is special that specific integrated circuit via metal in material through hole 208 and the first specific integrated circuit reroute layer 207 be electrically connected second
Layer 209 is rerouted with integrated circuit, is rerouted in the second specific integrated circuit and is equipped with the passivation of the second specific integrated circuit on layer 209
It is convex to be equipped with the specific integrated circuit being electrically connected with specific integrated circuit pin 204 on the first specific integrated circuit passivation layer for layer
Block 210.
The asic chip of the present embodiment is fan-out package structure, so that the wafer of its size and MEMS chip is realized brilliant
Circle grade encapsulation.
Embodiment seven
As shown in figure 9, Fig. 9 be another embodiment of the present invention provides a kind of MEMS structural schematic diagram, including：
It is micro electronmechanical using the chip of micro-electro-mechanical system wafer 3 for being fanned out to encapsulation, the dedicated IC chip wafer 2 encapsulated using fan-in
System on Chip/SoC wafer 3 is equipped with the MEMS convex block 310 being electrically connected with MEMS pin, MEMS convex block
310 are electrically connected with the positive specific integrated circuit convex block 210 of dedicated IC chip wafer 2.
MEMS provided by the invention, by MEMS chip by fan-out package form, enable its size with
Asic chip wafer realizes wafer-level packaging, passes through the side of the fan-in of asic chip in such a way that its convex block (bump) welds
Formula is drawn out to extraneous connection, so as to realize MEMS chip and asic chip integration packaging by the encapsulation of wafer scale.Due to
The path being connected between chip and with the external world is effectively shortened using wafer-level packaging, to improve the performance of system.From
The back side of asic chip directly passes through RDL and is drawn out to the external world, thereby may be ensured that the transmission of the high speed signal of asic chip.
Chip of micro-electro-mechanical system wafer 3 includes in one of the embodiments,：Chip of micro-electro-mechanical system 301, micro-electro-mechanical systems
System chip 301 is embedded in MEMS organic resin 303, and the front of chip of micro-electro-mechanical system 301 is micro electronmechanical equipped with one layer
System insulation layer 305, the position corresponding with chip of micro-electro-mechanical system pin 304 of MEMS insulating layer 305 are provided with microcomputer
Electric system blind hole 306 is equipped in the bottom of MEMS organic resin layer 303 and passes through MEMS blind hole 306 and microcomputer
The first MEMS that electric system pin 304 is electrically connected reroutes layer 307, reroutes on layer 307 in the first MEMS
Equipped with the first MEMS passivation layer, it is equipped at the top of MEMS organic resin layer 303 and penetrates MEMS and have
The MEMS plastic packaging material through hole 308 that machine resin layer 303 is connected to MEMS pin 304, in MEMS plastic packaging
Plating is filled out in material through hole 308 and reroutes the MEMS via metal that layer is electrically connected with the first MEMS, in micro-electro-mechanical systems
Unite organic resin layer 303 top be equipped with by MEMS via metal in MEMS plastic packaging material through hole 308 with
First MEMS reroutes the second MEMS that layer 307 is electrically connected and reroutes layer 309, in the second MEMS weight
Wiring layer 309 is equipped with the second MEMS passivation layer, is equipped on the first MEMS passivation layer and MEMS
The MEMS convex block 310 that pin 304 is electrically connected.
The MEMS chip of the present embodiment is fan-out package structure, its size and asic chip wafer is enable to realize wafer
Grade encapsulation.
Above-described is only the principle of the present invention and preferred embodiment.It should be pointed out that for the common skill of this field
For art personnel, on the basis of the principle of the invention, several other modifications can also be made, also should be regarded as protection model of the invention
It encloses.
Claims (12)
1. a kind of chip die packaging method, which is characterized in that including：
The front of chip is temporarily bonded with loading plate；
The chip is embedded in organic resin layer, the embedding disk for having chip is obtained；
The loading plate is torn open with the disk and is bonded, and exposes the pin on the chip；
In one layer insulating of front production of the chip；
The insulating layer, which is removed, in the corresponding position of the pin forms blind hole；
The first rewiring layer that production is electrically connected by the blind hole with the pin in the bottom of the organic resin layer, production
Cover the described first the first passivation layer for rerouting layer；
The plastic packaging material through hole for penetrating the organic resin layer and being connected to the pin is made at the top of the organic resin layer；
The via metal that plating is electrically connected with the first rewiring layer is filled out in the plastic packaging material through hole, production passes through the plastic packaging
The second rewiring layer that via metal in material through hole is electrically connected with the first rewiring layer, production cover the second heavy cloth
Second passivation layer of line layer；
The convex block being electrically connected with the pin is made in first passivation layer, obtains being fanned out to the chip die that encapsulation is completed.
2. chip die packaging method as described in claim 1, which is characterized in that the convex block is arranged in the organic resin
In the drop shadow spread of layer.
3. chip die packaging method as described in claim 1, which is characterized in that the chip is dedicated IC chip
Or chip of micro-electro-mechanical system.
4. chip die packaging method as claimed in claim 3, which is characterized in that the chip is chip of micro-electro-mechanical system,
It is described that the chip is embedded in organic resin layer, the embedding disk for having chip is obtained, is specifically included：
The chip of micro-electro-mechanical system is embedded in organic resin layer, and exposes the functional areas of the chip of micro-electro-mechanical system
Domain obtains the embedding disk for having chip of micro-electro-mechanical system.
5. a kind of micro electro-mechanical system packaging method, which is characterized in that including：
Dedicated IC chip is carried out to be fanned out to envelope using such as claim 1-2 described in any item chip die packaging methods
Dress obtains dedicated IC chip wafer, carries out fan-in to chip of micro-electro-mechanical system and encapsulates to obtain chip of micro-electro-mechanical system crystalline substance
Circle；
Micro electro-mechanical system packaging is carried out to the dedicated IC chip wafer and the chip of micro-electro-mechanical system wafer, is obtained
It include the micro-electro-mechanical systems irrespective of size encapsulation knot of the dedicated IC chip wafer and the chip of micro-electro-mechanical system wafer
Structure.
6. micro electro-mechanical system packaging method as claimed in claim 5, which is characterized in that described to the specific integrated circuit core
Wafer and the chip of micro-electro-mechanical system wafer carry out micro electro-mechanical system packaging, obtain including the specific integrated circuit core
The MEMS class encapsulation structure of wafer and the chip of micro-electro-mechanical system wafer, specifically includes：
It will complete the front for the dedicated IC chip wafer for being fanned out to encapsulation and complete the chip of micro-electro-mechanical system of fan-in encapsulation
The front of wafer assembling interconnection is completed by wafer scale bonding technology；
The first welded ball array ball is made at the back side of the dedicated IC chip wafer, and to the specific integrated circuit core
Wafer and the chip of micro-electro-mechanical system wafer carry out cutting-up, and obtaining being formed includes chip of micro-electro-mechanical system wafer and specially
With the MEMS class encapsulation structure of ic core wafer.
7. a kind of micro electro-mechanical system packaging method, which is characterized in that including：
Chip of micro-electro-mechanical system is carried out to be fanned out to encapsulation using the chip die packaging method as described in Claims 1 to 4 is any
Chip of micro-electro-mechanical system wafer is obtained, fan-in is carried out to dedicated IC chip and encapsulates to obtain dedicated IC chip crystalline substance
Circle；
Micro electro-mechanical system packaging is carried out to the chip of micro-electro-mechanical system wafer and the dedicated IC chip wafer, is obtained
It include the micro-electro-mechanical systems irrespective of size encapsulation knot of the chip of micro-electro-mechanical system wafer and the dedicated IC chip wafer
Structure.
8. micro electro-mechanical system packaging method as claimed in claim 7, which is characterized in that described to the chip of micro-electro-mechanical system
Wafer and the dedicated IC chip wafer carry out micro electro-mechanical system packaging, obtain including the chip of micro-electro-mechanical system
The MEMS class encapsulation structure of wafer and the dedicated IC chip wafer, specifically includes：
It will complete the front for the chip of micro-electro-mechanical system wafer for being fanned out to encapsulation and complete the dedicated IC chip of fan-in encapsulation
The front of wafer assembling interconnection is completed by wafer scale bonding technology；
Pass through etch process for required MEMS physical structure at the back side of the chip of micro-electro-mechanical system wafer
It is discharged；
Nut cap bonding is carried out to the chip of micro-electro-mechanical system wafer by wafer scale bonding technology；
The second welded ball array ball is made at the back side of the chip of micro-electro-mechanical system wafer, and brilliant to the chip of micro-electro-mechanical system
The round and dedicated IC chip wafer carries out cutting-up, obtain being formed include the chip of micro-electro-mechanical system wafer and
The MEMS class encapsulation structure of the dedicated IC chip wafer.
9. a kind of MEMS, which is characterized in that including：Using dedicated IC chip wafer, the use for being fanned out to encapsulation
The chip of micro-electro-mechanical system wafer of fan-in encapsulation, the dedicated IC chip wafer are equipped with and specific integrated circuit pin
The specific integrated circuit convex block of electrical connection, the specific integrated circuit convex block are positive with the chip of micro-electro-mechanical system wafer
The electrical connection of MEMS convex block.
10. MEMS as claimed in claim 9, which is characterized in that the dedicated IC chip wafer includes：Specially
With IC chip, the dedicated IC chip is embedded in specific integrated circuit organic resin layer, the dedicated collection
The front of circuit chip is provided with one layer of specific integrated circuit insulating layer, the specific integrated circuit insulating layer with it is described dedicated
The corresponding position of ic pin is provided with specific integrated circuit blind hole, at the bottom of the specific integrated circuit organic resin layer
Portion is equipped with the first specific integrated circuit being electrically connected by the specific integrated circuit blind hole with the specific integrated circuit pin
Layer is rerouted, is rerouted in first specific integrated circuit and is equipped with the first specific integrated circuit passivation layer on layer, described special
It is equipped with the top of integrated circuit organic resin layer and penetrates what the organic resin layer was connected to the specific integrated circuit pin
Specific integrated circuit plastic packaging material through hole fills out plating and the described first dedicated integrated electricity in the specific integrated circuit plastic packaging material through hole
Road reroutes the specific integrated circuit via metal of floor electrical connection, is equipped at the top of the specific integrated circuit organic resin layer
Pass through specific integrated circuit via metal in the specific integrated circuit plastic packaging material through hole and first specific integrated circuit
The second specific integrated circuit for rerouting layer electrical connection reroutes layer, reroutes in second specific integrated circuit and is equipped on layer
Second specific integrated circuit passivation layer is equipped with and the specific integrated circuit pipe on the first specific integrated circuit passivation layer
The specific integrated circuit convex block of foot electrical connection.
11. a kind of MEMS, which is characterized in that including：Using be fanned out to the chip of micro-electro-mechanical system wafer of encapsulation, using fan
Enter the dedicated IC chip wafer of encapsulation, the chip of micro-electro-mechanical system wafer is equipped with and is electrically connected with MEMS pin
The MEMS convex block connect, the positive dedicated collection of the MEMS convex block and the dedicated IC chip wafer
It is electrically connected at circuit convex block.
12. MEMS as claimed in claim 11, which is characterized in that the chip of micro-electro-mechanical system wafer includes：It is micro-
Mechatronic Systems chip, the chip of micro-electro-mechanical system are embedded in MEMS organic resin layer, the MEMS core
The front of piece is provided with one layer of MEMS insulating layer, the MEMS insulating layer and the MEMS pin pair
The position answered is provided with MEMS blind hole, is equipped in the bottom of the MEMS organic resin layer and passes through the microcomputer
The first MEMS that electric system blind hole is electrically connected with the MEMS pin reroutes layer, micro electronmechanical described first
System reroutes layer and is equipped with the first MEMS passivation layer, is equipped with and wears at the top of the MEMS organic resin layer
The MEMS plastic packaging material through hole that the saturating MEMS organic resin layer is connected to the MEMS pin, in institute
It is logical to state the MEMS for filling out in MEMS plastic packaging material through hole and plating and being electrically connected with first MEMS rewiring layer
Mesoporous metal is equipped at the top of the MEMS organic resin layer by micro- in the MEMS plastic packaging material through hole
Mechatronic Systems via metal reroutes the second MEMS that layer is electrically connected with first MEMS and reroutes layer,
Second MEMS reroutes layer and is equipped with the second MEMS passivation layer, is passivated in first MEMS
Layer is equipped with the MEMS convex block being electrically connected with the MEMS pin.
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