CN108897161B - display panel - Google Patents

Abstract

The application discloses a display panel. The display panel comprises a first substrate, a second substrate, a liquid crystal layer, a plurality of thin film transistors, a plurality of metal wires, a protection layer, a first alignment layer and a plurality of aggregates (aggregates). The first substrate is provided with at least one display area and a non-display area, and the non-display area is positioned outside the display area. The second substrate is arranged opposite to the first substrate, and the liquid crystal layer is positioned between the first substrate and the second substrate. The thin film transistor and the metal wire are positioned on the first substrate, and the protection layer at least covers part of the metal wire. The first alignment layer is located on the protection layer and exposes a first surface of the protection layer. The agglomerate is located on at least a portion of the first surface.

Description

Display panel

The application relates to a divisional application of Chinese patent application (application number: 201410244733.X, application date: 2014, 06, 04, application name: display panel).

Technical Field

The present application relates to a display panel, and more particularly, to a display panel having good display quality.

Background

Liquid crystal displays (lcds) have been widely used in various electronic products, such as mobile phones, notebook computers (notebook) and Tablet PCs (Tablet PCs), and with the rapid development of the large-sized flat panel displays, the liquid crystal displays having light weight and thin profile have become important roles, so as to gradually replace Cathode Ray Tube (CRT) displays to become the main stream of the market.

A vertical alignment (vertical alignment) liquid crystal display panel is one of the mainstream products of the current flat panel display. However, the vertically aligned liquid crystal display panel is more prone to have a problem of affecting display quality due to light leakage. Therefore, how to provide a vertically aligned liquid crystal display panel with good display quality is one of the subjects of related industries' efforts.

Disclosure of Invention

The application aims to provide a display panel. In the display panel, the clusters in the non-display area make the vertical alignment effect of the liquid crystal molecules in the liquid crystal layer better, so that the liquid crystal molecules can be recovered quickly when operated by external force, the light leakage phenomenon can be reduced, and the quality of the display image is improved.

In order to achieve the above object, according to one embodiment of the present disclosure, a display panel is provided. The display panel comprises a first substrate, a second substrate, a liquid crystal layer, a plurality of thin film transistors, a plurality of metal wires, a protection layer, a first alignment layer and a plurality of aggregates (aggregates). The first substrate is provided with at least one display area and a non-display area, and the non-display area is positioned outside the display area. The second substrate is arranged opposite to the first substrate, and the liquid crystal layer is positioned between the first substrate and the second substrate. The thin film transistor and the metal wire are positioned on the first substrate, and the protection layer at least covers part of the metal wire. The first alignment layer is located on the protection layer and exposes a first surface of the protection layer. The agglomerate is located on at least a portion of the first surface.

For a better understanding of the above and other aspects of the application, reference will now be made in detail to the preferred embodiments, examples of which are illustrated in the accompanying drawings, in which:

drawings

FIG. 1A is a schematic top view of a display panel according to an embodiment of the disclosure;

FIG. 1B is a schematic cross-sectional view taken along section line 1B-1B' of FIG. 1A;

FIG. 2 is a simplified exploded view of a display panel according to an embodiment of the present disclosure;

FIG. 3 is a partial perspective view of the metal traces in the non-display area shown in FIG. 2;

FIG. 4 is a schematic cross-sectional view of a display panel along the section line 4-4' of FIG. 1A according to another embodiment of the present disclosure;

FIG. 5 is a schematic top view of a display panel according to another embodiment of the disclosure;

FIG. 6 is a graph of the ratio of openings of a masking pattern versus the concentration of reactive monomers according to an embodiment of the present disclosure;

FIG. 7 is a diagram illustrating the aperture ratio of a shielding pattern relative to the ghost phenomenon according to an embodiment of the present disclosure;

FIG. 8A is a schematic diagram of a masking pattern according to an embodiment of the present disclosure;

fig. 8B is a schematic view of a shielding pattern according to another embodiment of the present disclosure.

Symbol description

100. 200: display panel

110: first substrate

120: second substrate

130: liquid crystal layer

140: thin film transistor

150. ML, M: metal wire

160: first protective layer

161: a second protective layer

160s: a first surface

170: a first alignment layer

180. 180a, 180b, 180c, 180d: agglomerate of

190. 290: electrode layer

270: a second alignment layer

290s: a second surface

291: spacing element

293: light shielding layer

293a: light transmission area

293b: shading area

294: insulating layer

295: frame glue

297: color filter layer

299: drive element on panel

310: nano-channel

320: submicron protruding structure

701. 701a, 702, 703: region(s)

803a: an opening

900: masking film

1B-1B ', 4-4': section line

A: display area

A1: part of the

B: non-display area

B1: peripheral edge

C. 801, 803: shading pattern

D1, D2: direction of extension

D3: size of the device

DL: data line

I. II, III, IV, V, VI: curve of curve

P: pixel area

SL: scanning line

W1: width of (L)

W2: distance of

W3: line width

Detailed Description

According to the embodiments of the present application, in the display panel, the clusters in the non-display area make the vertical alignment effect of the liquid crystal molecules in the liquid crystal layer better, so that the liquid crystal molecules can recover faster when operated by external force, and the light leakage phenomenon can be reduced, thereby improving the quality of the display image. Embodiments of the present application will be described in detail below with reference to the attached drawings. The same reference numbers will be used throughout the drawings to refer to the same or like parts. It should be noted that the drawings are simplified to clearly illustrate the embodiments, and that the detailed structure of the embodiments is presented for purposes of illustration only and is not intended to limit the scope of the application. Those skilled in the art will readily modify or adapt for such specific embodiments depending upon the specific application.

Fig. 1A is a schematic top view of a display panel 100 according to an embodiment of the application, and fig. 1B is a schematic cross-sectional view along a cross-sectional line 1B-1B' of fig. 1A. Referring to fig. 1A to 1B, the display panel 100 includes a first substrate 110, a second substrate 120, a liquid crystal layer 130, a plurality of thin film transistors 140, a plurality of metal wires 150, at least one passivation layer (e.g. a first passivation layer 160 and a second passivation layer 161), a first alignment layer 170 and a plurality of clusters 180. The first substrate 110 has at least one display area a and a non-display area B, and the non-display area B is located outside the display area a. The second substrate 120 is disposed opposite to the first substrate 110, and the liquid crystal layer 130 is disposed between the first substrate 110 and the second substrate 120. The thin film transistor 140 and the metal trace 150 are disposed on the first substrate 110, and the first protective layer 160 and the second protective layer 161 at least cover a portion of the metal trace 150. The first passivation layer 160 is disposed on the second passivation layer 161, and the first passivation layer 160 covers the thin film transistor 140 and the metal trace 150. The first alignment layer 170 is disposed on the first protective layer 160, and the first alignment layer 170 partially covers the first protective layer 160 to expose a first surface 160s of the first protective layer 160. The agglomerates 180 are located at least partially on this first surface 160s. In another embodiment, the first protection layer 160 partially covers the second protection layer 161 to expose a portion of the surface of the second protection layer 161, and the polymer 180 is at least located on the exposed portion of the surface of the second protection layer 161 (not shown). In yet another embodiment, the first protection layer 160 partially covers the second protection layer 161 to expose a portion of the surface (not shown) of the second protection layer 161, and the polymer 180 is at least on the first protection layer 160 and on the exposed portion of the surface of the second protection layer 161.

The display area a represents an area of the display panel 100 for displaying an image, and the non-display area B represents an area not for displaying an image. In one embodiment, as shown in fig. 1A, the non-display area B surrounds the display area a. In the embodiment, the display area a is, for example, an area for displaying a picture in a pixel area, and the non-display area B is, for example, a fan-out area (fan out), but not limited thereto, the non-display area B may include any area not for displaying an image.

In an embodiment, the first protection layer 160 directly contacts at least one of the thin film transistor 140 and the metal trace 150. As shown in fig. 1B, in the present embodiment, the first protection layer 160 directly contacts the thin film transistor 140 and the metal trace 150.

In one embodiment, the first protective layer 160 and the second protective layer 161 each independently comprise an inorganic dielectric material, such as silicon nitride (SiN) _x ) Silicon oxide (SiO) _x ) And/or silicon oxynitride (SiO) _x N _y ). As shown in fig. 1B, the first surface 160s of the first protection layer 160 exposed outside the first alignment layer 170 corresponds to the non-display area B.

In the embodiment, the aggregates 180 in the non-display area B do not have a specific arrangement and alignment direction, in other words, the aggregates 180 are irregularly arranged on the first substrate 110 (above). The agglomerates 180 in the display area a have a specific alignment function to direct the liquid crystal to tilt in a specific direction. The same applies to the aggregate 180, but the aggregate 180 with different functions can be generated in different areas according to the light curing step in the manufacturing process and the difference of whether the electric field is applied. Since the agglomerates 180 in the non-display region B have better vertical alignment effect on the liquid crystal molecules in the liquid crystal layer 130, the liquid crystal molecules can be recovered quickly when operated by external force, so that the light leakage of the display panel 100 can be reduced, and the quality of the display image can be improved.

In an embodiment, the agglomerates 180 directly contact the liquid crystal molecules in the liquid crystal layer 130. It should be noted that the dimensional proportion of the agglomerate 180 in the drawings is not drawn to scale in the actual product, but is merely used to clearly illustrate the contents of the embodiments, and is not used to limit the scope of the present application.

In embodiments, the agglomerates 180 may be formed in a variety of ways. For example, in one embodiment, when the liquid crystal layer 130 or the first alignment layer 170 is formed, an ultraviolet light curable (UV curable) monomer is added thereto, and then ultraviolet light is irradiated from the first substrate 110 side or the second substrate 120 side to form the agglomerates 180 on the first substrate 110 (i.e., at least a portion of the first surface 160s of the first protective layer 160 exposed outside the first alignment layer 170) or on the first alignment layer 170. The polymer 180 formed by photo-polymerizing the ultraviolet light hardening monomer is a high molecular polymer (polymer), and the reaction conditions in different regions are different.

In an embodiment, taking the display panel 100 as a nano-protrusion structure and a vertical alignment liquid crystal display panel (nano-protrusion vertical aligned liquid crystal display panel) as an example, the aligned nano-protrusion structures on the surfaces of the agglomerates 180 and the first alignment layer 170 may be formed by using the same monomer raw materials. For example, the monomers in the display area a are polymerized under the condition of continuously providing an external electric field to form an alignment nano-protrusion structure; the monomers in the non-display region B are polymerized under the condition of no external electric field to form the clusters 180 which have no alignment function of specific guiding direction and are irregularly arranged. In this way, the alignment nano-protrusion structure in the display area a can help the liquid crystal molecules to have alignment in a specific direction, and the agglomerates 180 in the non-display area B can make the vertical alignment effect of the liquid crystal molecules in the liquid crystal layer 130 better, so that the liquid crystal molecules can recover faster when operated by external force, and the light leakage phenomenon of the display panel 100 can be reduced, thereby improving the quality of the display image.

The above-described formation of the segmented aligned nano-protrusion structures and the agglomerates 180 can be made in a variety of ways. For example, the electrode pattern may be designed such that the substrate corresponding to the non-display area B has no electrode portion, and the monomer is not affected by the electric field when undergoing uv polymerization; or, when the electric field is continuously provided and ultraviolet light irradiation is performed, the non-display area B is shielded by using the matched patterning photomask, so that the ultraviolet light polymerization reaction is not performed when the monomers in the non-display area B are subjected to the external electric field, and the ultraviolet light polymerization reaction is performed after the electric field is removed.

As shown in fig. 1B, in the embodiment, the display panel 100 may further include a plurality of spacer elements 291, wherein the spacer elements 291 are located between the first substrate 110 and the second substrate 120 and are used for providing a gap to dispose the liquid crystal layer 130. The plurality of spacing elements 291 may have different heights to provide a cushion that can have spacing elements 291 of different heights when the panel is pressed.

In an embodiment, as shown in fig. 1B, the display panel 100 may include an electrode layer 190 formed on at least a portion of the first substrate 110, where the electrode layer 190 is, for example, a patterned electrode layer. As shown in fig. 1B, the display panel 100 may further include another electrode layer 290 disposed on the second substrate 120, and the display panel 100 may further include a second alignment layer 270 disposed on the electrode layer 290, wherein the second alignment layer 270 exposes a second surface 290s of the electrode layer 290, and the polymer 180 may further be disposed on at least a portion of the second surface 290s, i.e., the exposed second surface 290s of the electrode layer 290. In an embodiment, the electrode layer 290 on the second substrate 120 may be a patterned transparent electrode layer or a full-scale transparent electrode layer, and the electrode layer material is, for example, ITO or IZO.

In an embodiment, the first alignment layer 170 and the second alignment layer 270 are, for example, polyimide (PI) films.

In an embodiment, as shown in fig. 1B, the display panel 100 may further include a sealant 295. The sealant 295 is disposed between the first substrate 110 and the second substrate 120 and is disposed in a peripheral area of the non-display area B.

As shown in fig. 1A to 1B, in the embodiment, the first alignment layer 170 does not completely cover the area in the sealant 295. In this case, the sealant 295 is completely adhered to the first alignment layer 170, but the adhesion between the sealant 295 and the first alignment layer 170 is poor, so that the peeling problem is easily generated. According to the embodiment of the application, since the first alignment layer 170 partially covers the first substrate 110, at least part of the sealant 295 can be adhered to the material with better adhesion on the first substrate 110, so that the problem of peeling of the film of the display panel 100 can be reduced.

In this case, the agglomerates 180 are also located on the first surface 160s of the first protection layer 160 exposed outside the first alignment layer 170, and the agglomerates 180 located in the non-display area B make the vertical alignment effect of the liquid crystal molecules in the liquid crystal layer 130 better, so that the liquid crystal molecules can be recovered quickly when operated by external force, and the light leakage phenomenon of the display panel 100 can be reduced, so as to further improve the quality of the display image.

In an embodiment, as shown in fig. 1B, the display panel 100 may further include a color filter layer 297 disposed on the first substrate 110. In another embodiment, the color filter layer may also be disposed on the second substrate 120 (not shown).

Fig. 2 is a simplified exploded view of a display panel 100 according to an embodiment of the present disclosure. It should be noted that, some elements in fig. 2 are omitted or simplified to clearly illustrate the embodiments, and the dimensional proportion in the drawings is not drawn to scale as an actual product, so that the scope of the present disclosure is not limited. In this embodiment, the frame glue 295 is disposed adjacent (or aligned) to the side of the substrate 110/120, and in another embodiment, the frame glue 295 is not disposed adjacent to the side of the substrate 110/120, or in another embodiment, the frame glue 295 is disposed adjacent to only three sides of the substrate 110, and the other side is not disposed adjacent to the side of the substrate 110.

In the embodiment, the display panel 100 further includes at least one data line DL and at least one scan line SL. The display area a has a plurality of pixels P therein, and the data lines DL and the scan lines SL intersect to define a pixel region P. The non-display area B is further provided with a plurality of metal traces ML, wherein a portion of the plurality of metal traces ML and the scan lines SL are formed by the same metal layer or in the same process, and a portion of the plurality of metal traces ML and the data lines DL are formed by the same metal layer or in the same process. However, the metal traces ML may also have different configurations than those shown in fig. 1-2, depending on the design requirements.

Referring to fig. 1B and fig. 2, the display panel 100 may further include a light shielding layer 293. In an embodiment, the light shielding layer 293 is, for example, a Black Matrix (BM) on the second substrate 120. In an embodiment, the non-display area B may include a driver on panel (panel) 299, and the driver on panel 299 is, for example, a Gate On Panel (GOP) or a data line (data line) driving circuit. The gate line driving circuit or the data line driving circuit may exist at the same time or separately provided on the panel. Only one set of gate driving circuits is schematically depicted in the figure, and a plurality of sets of gate driving circuits or a plurality of sets of data line driving circuits can also be provided, so as to meet design requirements.

Fig. 3 is a partial perspective view of the metal traces ML in the non-display area B shown in fig. 2.

In one embodiment, as shown in fig. 3, the display panel 100 may further have a plurality of nano-channels (nano-channels) 310. The nano-channel 310 is located at one side of at least one of the metal traces ML in the non-display region B. As shown in fig. 3, the nano-channel 310 is located on at least one inclined surface (inclined surface) of the metal trace ML. In an embodiment, the nano-channel 310 may also be formed on the inclined plane at both sides of the at least one metal trace ML in the non-display region B. In an embodiment, the nano-channel 310 may be formed in a region having an alignment layer and a region having no alignment layer in the non-display region B. In an embodiment, as shown in fig. 3, the extending direction D1 of the nano-channel 310 and the extending direction D2 of the metal trace ML intersect and have an angle. In one embodiment, the angle is, for example, about 90 °.

In general, the metal traces ML in the non-display area B may be easily reflective. According to the embodiment of the present application, the nano-channel 310 is located at one side of the metal trace ML, especially on the inclined plane of the metal trace ML, so as to reduce the reflection of light by the metal trace ML, thereby reducing the brightness of the area, forming a good dark area, and improving the light leakage phenomenon. In other embodiments, the metal traces ML may have other configurations, and are not limited to the metal traces having a straight shape.

In one embodiment, as shown in fig. 3, the display panel 100 may further include a plurality of sub-micron protrusion structures (submicron protrusion) 320, wherein the sub-micron protrusion structures 320 are located in the non-display area B. The sub-micron protrusion structures 320 are arranged along an extending direction D2 of at least one of the metal traces ML. In other words, the plurality of sub-micron bump structures 320 grow along the extending direction D2 of the metal traces ML. In one embodiment, the sub-micron bump structures 320 may be configured parallel to the edges of the metal traces ML. In another embodiment, the sub-micron bump structures 320 may also be formed on the inclined surfaces of the metal traces ML. The sub-micron protrusion structures 320 have a size of approximately less than 1 micron (μm). In an embodiment, the submicron-sized protrusion structures 320 are located in the non-display region B without an alignment layer, and the submicron-sized protrusion structures 320 can be located in the exposed first surface 160s of the first protective layer 160.

In the non-display area B, particularly in the area without the alignment layer, the submicron-sized protrusion structures 320 are disposed along the extending direction D2 of the metal traces ML, so that edges of the metal traces ML are less smooth and tidy, and reflection of light by the metal traces ML can be reduced. Therefore, the brightness of the area can be reduced, a good dark area is formed, and the effect of improving the light leakage phenomenon is achieved.

Fig. 4 is a schematic cross-sectional view of a display panel along a section line 4-4' of fig. 1A according to another embodiment of the present disclosure. In one embodiment, as shown in fig. 4, the light shielding layer 293 is disposed on the second substrate 120, and at least a portion of the light shielding layer 293 corresponds to the non-display area B. The light shielding layer 293 has a light transmitting region 293a and a light shielding region 293b, and a plurality of clusters are formed corresponding to the light transmitting region 293a and the light shielding region 293 b. The light-transmitting region 293a of the light-shielding layer 293 is used to make the photo-hardening reaction of the agglomerate 180 more complete. In an embodiment, the agglomerates are formed on the first substrate 110 and the agglomerates may also be formed on the second substrate 120, so that the surface roughness on the first substrate 110 and the second substrate 120 is formed by the agglomerates. The influence of the landform shapes corresponding to different roughness on the tilting of the liquid crystal is different, and the larger the influence of the landform shape with larger roughness on the liquid crystal is. The influence and the action mode of the roughness on the tilting of the liquid crystal are different according to the characteristics of the aggregates in each region, and also depend on the region range of the influence of the operating voltage. The roughness can be adjusted by using gray-scale photomask or mask to control the illumination degree and time of display area A and non-display area B respectively.

As shown in fig. 4, in the embodiment, the agglomerate 180a corresponding to the light-transmitting region 293a generates a first surface roughness, and the agglomerate 180c corresponding to the light-shielding region 293b generates a second surface roughness, and the first surface roughness is greater than the second surface roughness. In one embodiment, the first surface roughness and the second surface roughness may represent surface roughness on the first substrate 110 and on the second substrate 120.

As shown in fig. 4, the agglomerate 180b corresponding to the display area a generates a third surface roughness. In an embodiment, the first surface roughness is greater than the third surface roughness, and the third surface roughness is greater than the second surface roughness. In one embodiment, the first surface roughness, the second surface roughness, and the third surface roughness represent surface roughness on the second substrate 120.

As shown in fig. 4, the agglomerate 180d corresponding to the adjacent sealant 295 has a fourth surface roughness, which is greater than the third surface roughness. In one embodiment, the third surface roughness and the fourth surface roughness represent surface roughness on the first substrate 110.

In the above embodiment, the first surface roughness, the second surface roughness, the third surface roughness, and the fourth surface roughness may be at least one of a root mean square roughness, an average roughness, or a maximum roughness. In one embodiment, the first surface roughness, the second surface roughness, the third surface roughness, and the fourth surface roughness are expressed, for example, as average roughness.

The examples are further described below. The following list the roughness measurement results of several different areas of the display panel 100 to illustrate the characteristics of the display panel 100 according to the present disclosure. The following examples are, however, for illustration only and should not be construed as limiting the practice of this disclosure. The measurement results of the roughness of each region are shown in table 1, wherein the measured roughness includes root mean square roughness (Rq), average roughness (Ra) and maximum roughness (Rmax). The various roughnesses listed in table 1 were measured in an area of 5x5 square microns in selected areas using an atomic force microscope (AFM, machine model: VEECO Dimension-icon).

TABLE 1

As can be seen from the results of table 1, the average roughness (ra=20.7 nm) of the agglomerates corresponding to the light transmitting region 293a was greater than the average roughness (ra=14.1 nm) of the agglomerates corresponding to the light shielding region 293 b. Further, the average roughness (ra=15.8 nm) of the aggregates corresponding to the display region a and the average roughness (ra=14.1 nm) of the aggregates corresponding to the light shielding region 293b were larger. In other words, the average roughness (first average roughness) of the light-transmitting region 293a is the largest, the average roughness (third average roughness) of the display region a is the second time, and the average roughness (second average roughness) of the light-shielding region 293b is smaller than in both the foregoing regions.

In addition, the square root roughness (rq=27.3 nm) and the maximum roughness (rmax=270 nm) of the cluster generated in the light-transmitting region 293a corresponding to the non-display region B are respectively larger than those of the cluster generated in the light-shielding region 293B corresponding to the non-display region B (rq=18.7 nm) and the maximum roughness (rmax=168 nm). Further, the square root roughness (rq=20.6 nm) and the maximum roughness (rmax=172 nm) of the clusters corresponding to the display area a are respectively larger than those of the clusters corresponding to the light-shielding area 293b (rq=18.7 nm) and the maximum roughness (rmax=168 nm). Therefore, in the non-display region B, since the pixel operation voltage is not applied in the display region a under the operation, the roughness of the topography formed by the aggregates in the light shielding region 293a is utilized to increase the influence on the liquid crystal, so that the aggregates 180 in the non-display region B have better vertical alignment effect on the liquid crystal molecules in the liquid crystal layer 130, and thus can recover faster when operated by external force, and the light leakage phenomenon of the display panel 100 can be reduced, thereby improving the quality of the display image. Since the light shielding region 293b is a light shielding region, the roughness of the topography formed by the aggregates thereof may be smaller than that of the light transmitting region 293 a. The display area a may have a roughness inferior to that of the light-transmitting area 293a in the non-display area B due to the pixel operation voltage applied during the display. Therefore, the roughness of the transparent region 293a (first root average roughness, first maximum roughness) is maximum, the roughness of the display region a (third root average roughness, third maximum roughness) is sub-time, and the roughness of the light shielding region 293b (second root average roughness, second maximum roughness) is smaller than that of the two regions. The light irradiation angle of the irradiation frame glue 295 when curing can be adjusted to make the fourth surface affected by more irradiation light, so the irradiation time of the fourth surface is longer than that of other areas, and the roughness of the fourth surface is larger than that of other areas.

Fig. 5 is a schematic top view of a display panel 200 according to an embodiment of the disclosure. As shown in fig. 5, the display panel 200 includes a first substrate 110, a second substrate 120, a liquid crystal layer (not shown), a shielding pattern (shielding pattern) C, and a Reactive Monomer (RM). The reactive monomer is a material which is added into the liquid crystal layer, contains specific functional groups (such as acrylic groups) and can generate polymerization reaction by irradiating a light source with specific wavelength so as to form a high polymer structure. The first substrate 110 has at least one display area a and a non-display area B, the non-display area B is located outside the display area a, and the second substrate 120 is disposed opposite to the first substrate 110. The liquid crystal layer is located between the first substrate 110 and the second substrate 120, and the reactive monomer is mixed in at least the liquid crystal layer. The shielding pattern C may be located on the first substrate 110 or the second substrate 120 and corresponds to the non-display area B and a portion A1 of the display area a adjacent to the non-display area B, that is, the shielding pattern C refers to a shielding pattern from the inner edge of the sealant 295 toward the non-display area B and the display area a and located in the non-display area B and the display area a, and the shielding pattern (not shown) on (overlapping) the sealant 295 or in an area other than the outer edge of the sealant 295 is not the shielding pattern C. In a region corresponding to the shielding pattern C, the aperture ratio (aperture ratio) of the shielding pattern C is X%, the concentration of the reactive monomer is ypppm, and X and Y satisfy the following formula: 2847.7e ^-3.6375X >Y>1774.1e ^-8.9014X . The aperture ratio represents the ratio of the effective area through which light can pass.

FIG. 6 is a graph showing the relationship between the aperture ratio (X) of the shielding pattern and the concentration (Y) of the reactive monomer according to the embodiment of the present disclosure. In an embodiment, the concentration of the reactive monomer represents the residual amount of the reactant monomer, while the aperture ratio exhibits light transmittance. In fig. 6, curves I, II, III, IV, V and VI show the relationship between the aperture ratio (X%) of the shielding pattern and the residual amount (Y) of the reactive monomer, respectively, for the irradiation reaction times of 30 minutes, 60 minutes, 90 minutes, 120 minutes, 150 minutes, and 180 minutes. As shown in fig. 6, different opening ratios may result in different residual amounts of reactive monomers; and the longer the reaction time, the lower the reactant residual quantity. When the residual amount of the reactive monomer is higher, the image sticking (image sticking) of the display panel becomes more serious, and the display quality is poor.

Fig. 7 is a schematic diagram showing an aperture ratio of a shielding pattern relative to a ghost phenomenon of a display panel according to an embodiment of the present disclosure. In fig. 7, the checkered pattern is used as a test image, and after the checkered pattern is continuously displayed for a certain period of time, the image is set to the same gray scale to compare the afterimage phenomenon of each region. The area 701 of fig. 7 is first covered with a masking film 900 and the checkered pattern is shown, and the masking film 900 can be used to block the irradiation band (200 nm to 400 nm) that affects the polymerization reaction of the Reactive Monomer (RM). After testing for a period of time, after the image is set to the same gray scale, the region of the masking film 900 after the part is torn off will form a pattern like the region 701a, and because the opening ratio of the region 701 is 0, the Reactive Monomer (RM) in the region 701 cannot absorb the light source of the reactive band to form a polymer structure, so that a large amount of Reactive Monomer (RM) remains, which results in serious image retention in the region. The aperture ratio of the region 701 is 0, the aperture ratio of the region 703 is higher than that of the region 701, and the region 702 is located at the boundary between the region 701 and the region 703, and has the same aperture ratio as the region 703. As shown in fig. 7, it can be seen that the ghost image of the region 701 having the aperture ratio of 0 is very serious, and the ghost image of the region 703 having the higher aperture ratio is relatively slight. In addition, although the region 702 has the same aperture ratio as the region 703, the unreacted reactive monomer of the region 701 diffuses into the region 702, and thus the residual image of the region 702 is more serious than that of the region 703.

In one embodiment, when the concentration of the unreacted reactive monomer is less than 400ppm (Y < 400) and the aperture ratio of the shielding pattern is more than or equal to 10% and less than 100% (10. Ltoreq.X < 100), the display panel 200 has less residual shadows and thus better display quality.

In an embodiment, for example, when the display panel 200 is a large-sized panel, as shown in fig. 5, the area covered by the shielding pattern C extends from the periphery B1 of the non-display area B toward the display area a, and the distance W2 of extending the shielding pattern C is, for example, 10 to 15 times the width W1 of the non-display area B.

In an embodiment, for example, when the display panel 200 is a smaller-sized panel, the area covered by the shielding pattern C extends from the periphery B1 of the non-display area B (i.e. the inner edge of the sealant 295) toward the display area a, and the distance W2 that the shielding pattern C extends is, for example, 3 cm; or from the outer periphery B1 of the non-display area B on the opposite sides toward the display area a, the total of the distances W2 extending from the shielding patterns on the opposite sides is, for example, 6 cm. In the embodiment, when the display panel 200 is a small-sized panel, for example, a display panel applied to a mobile phone screen, the shielding pattern C may also completely cover the non-display area B and the display area a.

Fig. 8A is a schematic diagram of a shielding pattern 801 according to an embodiment of the present disclosure, and fig. 8B is a schematic diagram of a shielding pattern 803 according to another embodiment of the present disclosure. In an embodiment, the shielding pattern may include at least one of a plurality of metal traces or a shielding layer. As shown in fig. 8A, the shielding pattern 801 includes, for example, a plurality of metal wirings; as shown in fig. 8B, the shielding pattern 803 includes, for example, a light shielding layer.

As shown in fig. 8A, the metal trace M of the shielding pattern 801 has a line width W3 of, for example, less than 50 μm in the peripheral region of the display area a.

As shown in fig. 8B, the shielding pattern 803 is, for example, a light shielding layer, and has a plurality of openings 803a, and the dimension D3 of the openings 803a is, for example, about 100 μm.

In summary, while the application has been disclosed in connection with the preferred embodiments above, it is not intended to be limiting. Those skilled in the art to which the present application pertains will appreciate that numerous modifications and variations can be made without departing from the spirit and scope of the application. Accordingly, the scope of the application should be determined from the following claims.

Claims (2)

1. A display panel, comprising:

the display device comprises a first substrate, a second substrate and a first display unit, wherein the first substrate is provided with at least one display area and a non-display area, and the non-display area is positioned outside the display area;

a second substrate disposed opposite to the first substrate;

a liquid crystal layer located between the first substrate and the second substrate;

a plurality of thin film transistors on the first substrate;

a plurality of metal wires positioned on the first substrate;

a protective layer covering at least part of the plurality of metal wires;

the first alignment layer is positioned on the protection layer and exposes a first surface of the protection layer;

a plurality of agglomerates located at least partially on the first surface; and

the frame glue is positioned between the first substrate and the second substrate and positioned in the peripheral area of the non-display area, wherein the average roughness of a fourth surface generated by the polymers corresponding to the adjacent frame glue is larger than the average roughness of a third surface generated by the polymers corresponding to the display area.

2. The display panel of claim 1, further comprising:

an electrode layer on the second substrate; and

the second alignment layer is positioned on the electrode layer and exposes a second surface of the electrode layer;

wherein the agglomerates are also located on at least a portion of the second surface.