CN108897030B - Timing extraction device and method for signal - Google Patents
Timing extraction device and method for signal Download PDFInfo
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Abstract
A timing extraction device and method of signals, the device includes: a discrimination triggering module for discriminating the drift range V according to the difference between delta V (t) and the base linenoiseJudging whether the delta V (t) is an effective trigger signal, and starting the timing extraction when the delta V (t) is the effective trigger signalPressure Δ v (t) ═ F1(t) -F2(t), F1(t) is the sampling signal, F2(t) is the first delay signal of F1(t) delayed by one period, t is the time variable; the baseline tracking module calculates a baseline sampling value baseline for the sampling point of F1 (t); and the time analysis module determines an effective timing point Tr according to F2(t), F1(t) and baseline. According to the invention, the ADC is used for carrying out waveform digital acquisition on the output signal of the detector, and the rising point of the signal is accurately timed and time extraction is carried out, so that the timing point error is effectively improved, and the timing precision is improved.
Description
Technical Field
The invention relates to the field of time measurement, in particular to a timing extraction device and method of signals.
Background
Time measurement is also a very important part in nuclear electronics. Much of the information of a nuclear event is present in the output signal of the nuclear radiation detector in the form of time information, such as excited state lifetime of the nuclei, positron annihilation lifetime, etc., which is the time relationship between one nuclear state and another, which is represented by the distribution of time intervals between the two signals. Therefore, in order to study the nature of these nuclear events, the time information carried by the detector output signal must be measured.
The currently common time measurement is mainly divided into two parts: timing discrimination and Time-to-Digital Converter (TDC). The function of the timing is to find the point in time determined by the desired input signal, converting that point in time into a timing logic signal. The timing result is sent to a time-to-digital conversion circuit for sampling and quantization to obtain a time information digitization result, and the whole time measurement is completed.
However, the above methods have certain limitations, such as:
1) the circuit consists of a multi-stage analog circuit, and more noise interference can be superposed in the process of transmitting the output signal of the detector;
2) the influence of time shaking is large, and the timing process is interfered more, so that the precision is low;
3) the circuit structure has low integration level, high power consumption and high cost;
4) the system scalability is poor.
Disclosure of Invention
Technical problem to be solved
The present invention is directed to a timing extraction apparatus and method for signals, so as to solve at least one of the above technical problems.
(II) technical scheme
In one aspect of the present invention, an apparatus for timing extraction of a signal is provided, including:
a discrimination triggering module for determining a drift range V based on Δ V (t) and a baseline drift range VnoiseJudging whether the Δ v (t) is an effective trigger signal, and when Δ v (t) is an effective trigger signal, outputting a start timing signal to a baseline tracking module and a time analysis module to start the timing extraction, wherein the characteristic voltage Δ v (t) is F1(t) -F2(t), F1(t) is a sampling signal, F2(t) is a first delay signal of F1(t) for one period, and t is a time variable and is a positive integer; and
the baseline tracking module is used for calculating a baseline sampling value baseline for the sampling point of F1 (t);
and the time analysis module is used for determining an effective timing point Tr according to F2(t), F1(t) and baseline.
In some embodiments of the present invention, the sampling signal F1(t) is a detection signal output by an ADC sampling circuit sampling a detector.
In some embodiments of the invention, further comprising:
a register for delaying F1(t) by one sampling time period, determining F2 (t); and
and the memory is used for storing the Tr output by the time analysis module and outputting the Tr to the outside.
In some embodiments of the present invention, the discrimination triggering module determines whether the Δ v (t) is a valid triggering signal: when Δ V (t) is greater than V a times consecutivelynoiseAnd if a is larger than or equal to 2, the screening triggering module judges that the delta V (t) is an effective triggering signal, outputs a starting timing signal to the baseline tracking module and the time analysis module, and starts the timing extraction.
In some embodiments of the invention, the baseline tracking module calculates a baseline finger: after the start timing signal is generated and when the waveform sampling point of F1(t) is larger than b ═ c + d sampling points, the baseline tracking module performs baseline acquisition, and obtains the baseline by using the average value of d points before the configurable c unit time periods as a baseline value, namely the baseline
In some embodiments of the invention, the Tr satisfies the formula: tc is the system coarse time count at the moment of valid triggering.
In some embodiments of the invention, the means for timing extraction of the signal is based on an FPGA chip.
In another aspect of the present invention, a method for extracting timing of a signal is further provided, including the steps of:
based on Δ V (t) and baseline shift range VnoiseJudging whether the Δ v (t) is an effective trigger signal, and starting the timing extraction when the Δ v (t) is the effective trigger signal, wherein the characteristic voltage Δ v (t) is F1(t) -F2(t), F1(t) is a sampling signal, F2(t) is a first delay signal of delaying F1(t) for one period, and t is a time variable and is a positive integer;
tracking and calculating a baseline sampling value baseline for the sampling point of F1 (t); and
and determining an effective timing point Tr according to F2(t), F1(t) and baseline, wherein F2(t) is a first delay signal delayed by F1(t) for one period.
In some embodiments of the present invention, the baseline shift range V is based on Δ V (t)noiseDetermining whether the Δ V (t) is a valid trigger signal when Δ V (t) is greater than V a timesnoiseAnd if a is larger than or equal to 2, the screening triggering module judges that the delta V (t) is an effective triggering signal.
In some embodiments of the present invention, a baseline sampling value baseline is calculated, after the start timing signal is generated and the F1(t) waveform sampling point is greater than b ═ c + d sampling points, the baseline tracking module performs baseline acquisition, and the baseline value baseline is obtained by using a configurable average value of d points before c unit time periods, that is, the baseline value baseline, that is, the baseline sampling value baseline is obtained
(III) advantageous effects
Compared with the prior art, the timing extraction device and the method for the signals have the following advantages that:
1. firstly, judging whether the characteristic voltage is an effective trigger signal or not, and then selecting whether to store the sampling signal or process a corresponding digital signal or not; and then, an effective time point is determined according to the two delay signals of the sampling signal and the base line sampling value, so that the time wandering effect of the signals with different amplitudes and different rise times on the timing point can be effectively reduced, the timing point error can be effectively improved, and the timing precision of the rise point is improved.
2. The invention is based on the digital signal processing technology, directly carries out the processing of the correlation algorithm on the sampling waveform, has strong real-time performance, avoids the use of the traditional analog timing circuit, realizes the timing requirement by using the digital timing algorithm, and can obtain good time resolution by the point proved by calculation.
3. The invention is easy to carry out multi-channel expansion in the FPGA, improves the integration level of the system and reduces the power consumption and the hardware cost.
Drawings
Fig. 1 is a schematic structural diagram of a timing extraction apparatus for signals according to an embodiment of the present invention.
Fig. 2 is a schematic step diagram of a signal timing extraction method according to an embodiment of the present invention.
FIG. 3 is a schematic diagram of the waveform processing of the timing extraction device for extracting the timing point of the signal according to the embodiment of the present invention (the signal is at t)0The moment in time a valid trigger is generated).
Detailed Description
Based on the technical defects of more noise interference, lower precision, lower circuit structure integration level, higher power consumption, high cost and poor system expandability of the time measuring device in the prior art, the invention provides a timing extraction device and a method of a signal, which judge whether a characteristic voltage is an effective trigger signal and then select whether to store or process a sampling signal or not; and then, an effective time point is determined according to the two delay signals of the sampling signal and the base line sampling value, so that the time wandering effect of the signals with different amplitudes and different rise times on the timing point can be effectively reduced, the timing point error can be effectively improved, and the timing precision of the rise point is improved.
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to specific embodiments and the accompanying drawings.
In one aspect of the embodiment of the present invention, a timing extraction device for a signal is provided, fig. 1 is a schematic structural diagram of the timing extraction device for a signal according to the embodiment of the present invention, and as shown in fig. 1, the device includes a discrimination trigger module 1, a baseline tracking module 2, and a time analysis module 3.
A discrimination triggering module 1 for determining a drift range V from Δ V (t) to a baselinenoiseDetermining whether the Δ V (t) is valid trigger signal, if Δ V (t) is valid trigger signalIf the number is equal, starting the timing extraction for F1(t), otherwise, not carrying out the timing extraction. And storing or digitally processing data of the current sampling signal in N sampling periods every time the effective trigger pulse is received (the N sampling periods need to cover the width of the effective signal, and the value of N can be set according to different actual conditions).
The sampling signal F1(t) is a continuous sampling value of the detection signal output by the detector by the ADC sampling circuit. The characteristic voltage Δ v (t) ═ F1(t) -F2(t), F1(t) is the sampling signal, F2(t) is the first delay signal delayed by F1(t) for one period, and t is a time variable and is a positive integer.
It should be further noted that the discrimination triggering module 1 determines whether the Δ v (t) is a valid triggering signal: when Δ V (t) is greater than V for a (a ≧ 2) consecutive timesnoiseThen the screening triggering module 1 determines that Δ v (t) is a valid triggering signal, and then samples F1 (t); when Δ V (t) is not greater than V a timesnoiseIf yes, the discrimination trigger module 1 determines that Δ v (t) is an invalid trigger signal, and at this time, the apparatus does not start timing extraction. Wherein, the value of a is selected according to the actual situation.
And the baseline tracking module 2 is used for calculating a baseline sampling value baseline after F1(t) is sampled. Wherein, calculating baseline means: after the starting timing signal is generated and the waveform sampling point of F1(t) is larger than c + d sampling points, the baseline tracking module acquires the baseline, and the average value of d points before the configurable c unit time periods is used, so that the baseline can be acquired
And the time analysis module 3 is used for determining an effective timing point Tr according to F2(t), F1(t) and baseline. Tr satisfies the formula:tc is the system coarse time count at the active trigger time (i.e. the current trigger active time).
Since the current trigger effective time tc is obtained according to the clock period, tc is generally an integral multiple of the clock period, and the effective timing point Tr is obtained according to the pulse, Tr is generally a small multiple of the clock period, and thus, the timing accuracy of the effective timing point Tr is higher. In some embodiments of the invention, the apparatus further comprises a register for time delay and a memory for storing the output.
And the register is used for delaying the F1(t) by one period, determining the F2(t), and delaying the F1(t) by one period to obtain the F2 (t).
And the memory is used for storing the Tr output by the time analysis module 3 and outputting the Tr to the outside. The memory may be a FIFO memory or other type of memory capable of storing the Tr timestamp and in turn transmitting to the next processing module or upper computer.
It can be understood that the timing extraction device of the signal can be based on an FPGA chip, thereby realizing programmability, and in addition, the timing extraction device can be based on chips such as a singlechip and a microprocessor and can be selected according to actual conditions.
In another aspect of the embodiments of the present invention, a method for extracting timing of a signal is further provided, and fig. 2 is a schematic step diagram of the method for extracting timing of a signal according to the embodiments of the present invention, as shown in fig. 2, the method includes the steps of:
s1, according to Δ V (t) and the baseline shift range VnoiseAnd judging whether the delta V (t) is an effective trigger signal, and starting the timing extraction when the delta V (t) is the effective trigger signal, wherein the characteristic voltage delta V (t) is F1(t) -F2(t), F1(t) is a waveform sampling signal of the high-speed ADC on the measured signal, F2(t) is a first delay signal of F1(t) delayed for one period, and t is a time variable and is a positive integer. The sampling signal F1(t) can be obtained by continuously sampling the detection signal output by the detector through an ADC sampling circuit.
Wherein, based on Δ V (t) and the baseline shift range VnoiseDetermining whether the Δ V (t) is a valid trigger signal when Δ V (t) is greater than V a timesnoiseAnd judging that the delta V (t) is an effective trigger signal by the screening trigger module, wherein a is more than or equal to 2, and the value of a is selected according to the actual situation.
S2, calculating the base line sampling of the F1(t)Samples baseline. Calculating a baseline sampling value baseline, acquiring a baseline by the baseline tracking module after starting the generation of the timing signal and when the waveform sampling point of F1(t) is more than b + c sampling points, and averaging by using d sampling points before c configurable unit time periods to obtain the baseline, wherein the baseline is obtained
And S3, determining an effective timing point Tr according to F2(t), F1(t) and baseline.
Wherein, Tr satisfies the formula:tc is the system coarse time count at the effective trigger time, i.e. the current trigger effective time t 0.
As shown in FIG. 3, the timing extraction device of the signal of the present invention can extract the signal at t0The effective trigger is generated at the moment, because the current trigger effective moment t0 is obtained according to the clock period, t0 is generally integral multiple of the clock period, and the effective timing point Tr is obtained according to the pulse, therefore Tr is generally small multiple of the clock period, and the timing precision of the effective timing point Tr is higher.
In summary, the timing extraction device and method of the signal of the invention, whether to carry out digital signal processing on the sampling signal is selected by judging whether the characteristic voltage is an effective trigger signal; and then, an effective time point is determined according to the sampling signal, the delay signal and the baseline sampling value, so that the time wandering effect of the signals with different amplitudes and different rise times on the timing point can be effectively reduced, the timing point error can be effectively improved, and the timing precision of the rise point is improved.
Unless otherwise indicated, the numerical parameters set forth in the specification and attached claims are approximations that can vary depending upon the desired properties sought to be obtained by the present invention. In particular, all numbers expressing quantities of ingredients, reaction conditions, and so forth used in the specification and claims are to be understood as being modified in all instances by the term "about". Generally, the expression is meant to encompass variations of ± 10% in some embodiments, 5% in some embodiments, 1% in some embodiments, 0.5% in some embodiments by the specified amount.
Furthermore, "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements.
The use of ordinal numbers such as "first," "second," "third," etc., in the specification and claims to modify a corresponding element does not by itself connote any ordinal number of the element or any ordering of one element from another or the order of manufacture, and the use of the ordinal numbers is only used to distinguish one element having a certain name from another element having a same name.
The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are only exemplary embodiments of the present invention, and are not intended to limit the present invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (7)
1. An apparatus for timing extraction of a signal, comprising:
a discrimination triggering module for determining a drift range V based on Δ V (t) and a baseline drift range VnoiseJudging whether the Δ v (t) is an effective trigger signal, and when Δ v (t) is an effective trigger signal, outputting a start timing signal to a baseline tracking module and a time analysis module to start the timing extraction, wherein the characteristic voltage Δ v (t) is F1(t) -F2(t), F1(t) is a sampling signal, F2(t) is a first delay signal of F1(t) for one period, and t is a time variable and is a positive integer; and
the baseline tracking module is used for calculating a baseline sampling value baseline for the sampling point of F1 (t);
the time analysis module is used for determining an effective timing point Tr according to F2(t), F1(t) and baseline;
wherein, the baseline tracking module calculates baseline indicates that: after the start timing signal is generated and when the waveform sampling point of F1(t) is larger than b ═ c + d sampling points, the baseline tracking module performs baseline acquisition, and obtains the baseline by using the average value of d points before the configurable c unit time periods as a baseline value, namely the baseline
2. The apparatus of claim 1, wherein the sampling signal F1(t) is a detection signal output by an ADC sampling circuit sampling a detector.
3. The apparatus of claim 1, further comprising:
a register for delaying F1(t) by one sampling time period, determining F2 (t); and
and the memory is used for storing the Tr output by the time analysis module and outputting the Tr to the outside.
4. The apparatus of claim 1, wherein the means for determining whether Δ v (t) is a valid trigger signal comprises: when Δ V (t) is greater than V a times consecutivelynoiseAnd if a is larger than or equal to 2, the screening triggering module judges that the delta V (t) is an effective triggering signal, outputs a starting timing signal to the baseline tracking module and the time analysis module, and starts the timing extraction.
5. The apparatus of claim 1, wherein the means for timing extraction of the signal is based on an FPGA chip.
6. A method of timing extraction of a signal, comprising the steps of:
based on Δ V (t) and baseline shift range VnoiseJudging whether the Δ v (t) is an effective trigger signal, and starting the timing extraction when the Δ v (t) is the effective trigger signal, wherein the characteristic voltage Δ v (t) is F1(t) -F2(t), F1(t) is a sampling signal, F2(t) is a first delay signal of delaying F1(t) for one period, and t is a time variable and is a positive integer;
tracking and calculating a baseline sampling value baseline for the sampling point of F1 (t); and
determining an effective timing point Tr according to F2(t), F1(t) and baseline;
wherein, calculating the baseline sampling value baseline means: after the start timing signal is generated and when the waveform sampling point of F1(t) is larger than b ═ c + d sampling points, the baseline tracking module performs baseline acquisition, and obtains the baseline by using the average value of d points before the configurable c unit time periods as a baseline value, namely the baseline
7. The method of claim 6, wherein the baseline shift range V is based on Δ V (t)noiseDetermining whether the Δ V (t) is a valid trigger signal when Δ V (t) is greater than V a timesnoiseAnd if a is larger than or equal to 2, the screening triggering module judges that the delta V (t) is an effective triggering signal.
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