CN108878524B - Gallium nitride-based high electron mobility transistor - Google Patents
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- 229910002601 GaN Inorganic materials 0.000 title claims abstract description 94
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title claims abstract description 38
- 239000004065 semiconductor Substances 0.000 claims abstract description 63
- 230000004888 barrier function Effects 0.000 claims description 42
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 claims description 24
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 22
- 239000000872 buffer Substances 0.000 claims description 19
- 239000000463 material Substances 0.000 claims description 13
- 229910052757 nitrogen Inorganic materials 0.000 claims description 13
- 239000000758 substrate Substances 0.000 claims description 11
- 238000002161 passivation Methods 0.000 claims description 10
- 238000000034 method Methods 0.000 claims description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 4
- 229910017083 AlN Inorganic materials 0.000 claims description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 2
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 2
- 229910052681 coesite Inorganic materials 0.000 claims description 2
- 229910052593 corundum Inorganic materials 0.000 claims description 2
- 229910052906 cristobalite Inorganic materials 0.000 claims description 2
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(IV) oxide Inorganic materials O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 claims description 2
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum oxide Inorganic materials [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 claims description 2
- 229910003465 moissanite Inorganic materials 0.000 claims description 2
- 229910052594 sapphire Inorganic materials 0.000 claims description 2
- 239000010980 sapphire Substances 0.000 claims description 2
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 2
- 239000000377 silicon dioxide Substances 0.000 claims description 2
- 229910052682 stishovite Inorganic materials 0.000 claims description 2
- 229910052905 tridymite Inorganic materials 0.000 claims description 2
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 2
- 229910002704 AlGaN Inorganic materials 0.000 claims 3
- 239000003814 drug Substances 0.000 claims 1
- 230000005684 electric field Effects 0.000 abstract description 22
- 230000015556 catabolic process Effects 0.000 abstract description 18
- 230000000903 blocking effect Effects 0.000 abstract description 4
- 230000003071 parasitic effect Effects 0.000 abstract description 4
- 238000004088 simulation Methods 0.000 description 8
- 230000005533 two-dimensional electron gas Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000002028 premature Effects 0.000 description 2
- 230000004913 activation Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 239000012464 large buffer Substances 0.000 description 1
- 230000010287 polarization Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
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- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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Abstract
A gallium nitride-based high electron mobility transistor belongs to the technical field of semiconductor devices. According to the invention, the transverse Schottky diode with a rectifying function is formed between the grid electrode and the drain electrode of the traditional GaNHEMT device, and is used as a voltage-resistant structure to modulate the surface electric field of the device and optimize the distribution of the transverse electric field, so that the purpose of improving the breakdown voltage of the device is achieved; meanwhile, the transverse Schottky diode can bear certain reverse voltage in a blocking state, and the phenomenon that the grid generates overlarge leakage current when positive voltage is applied to the grid is avoided in a forward conduction state, so that the forward current capability of the device is ensured; in addition, compared with a field plate structure, the invention does not introduce additional parasitic capacitance, ensures the working frequency and the switching speed of the device and improves the reliability of the device.
Description
Technical Field
The invention belongs to the technical field of semiconductor devices, and particularly relates to a gallium nitride-based high electron mobility transistor with a transverse Schottky diode voltage-resistant structure.
Background
The gallium nitride (GaN) -based high electron mobility transistor has the excellent characteristics of large forbidden bandwidth, high critical breakdown electric field, high electron saturation velocity, good heat conduction performance, radiation resistance, good chemical stability and the like, and meanwhile, a gallium nitride (GaN) material can form a two-dimensional electron gas heterojunction channel with high concentration and high mobility with materials such as aluminum gallium nitride (AlGaN) or indium gallium nitride (InGaN) and the like, so the gallium nitride (GaN) -based high electron mobility transistor is particularly suitable for application in high-voltage, high-power and high-temperature occasions and becomes one of the most potential transistors for power electronic application.
Fig. 1 is a schematic structural diagram of a common gallium nitride (GaN) -based High Electron Mobility Transistor (HEMT) in the prior art, which mainly includes a substrate 107, a gallium nitride buffer layer 106, a gallium nitride channel layer 105, an aluminum-gallium-nitrogen barrier layer 104, and a source 101, a drain 102 and a gate 103 respectively disposed on the upper surface of the aluminum-gallium-nitrogen barrier layer, wherein the source 101 and the drain 102 are both in ohmic contact with the aluminum-gallium-nitrogen barrier layer 104, and the gate 103 is in schottky contact with the aluminum-gallium-nitrogen barrier layer 104; a passivation layer 108 is disposed between the source 101 and the gate 103 and between the gate 103 and the drain 102, respectively. For a common GaN HEMT device, when the device is subjected to withstand voltage, two-dimensional electron gas in a channel between the gate 103 and the drain 102 cannot be completely depleted, so that a channel electric field is mainly concentrated on the edge of the gate 103, and the device is broken down at a lower drain voltage; meanwhile, electrons injected from the source 101 may reach the drain 102 through the GaN buffer layer 106, thereby forming a leakage channel, and too large buffer layer leakage current may also cause premature breakdown of the device, which may not fully exert the advantage of high voltage endurance of GaN material, thereby limiting the application of the GaN (GaN) hemt in high voltage.
In order to fully utilize the excellent characteristics of GaN material such as high critical breakdown electric field, researchers in the industry have made many studies on improving the voltage endurance of HEMT, and the following methods are generally adopted:
1. the field plate technology is a commonly used termination technology for improving the voltage resistance of a device, and documents (J.Li, et.al. "high breakdown down voltage GaNHFET with field plate" IEEE Electron Lett, vol.37, No.3, pp.196-197, February.2001.) disclose that a field plate short-circuited with a gate is adopted, the introduction of the field plate can reduce the curvature effect and the electric field peak of a main junction, effectively deplete the channel two-dimensional electron gas below the field plate, expand the two-dimensional electron depletion region between the gate and the drain, make the electric field distribution between the gate and the drain more uniform, and thus improve the voltage resistance. However, the introduction of the field plate increases the parasitic capacitance of the device, which affects the high frequency and switching characteristics of the device.
2. The off-state breakdown Voltage of the Device can also be improved by introducing P-GaN into the buffer layer, and the Voltage resistance of the Device is improved by introducing P-GaN in documents (ShreepidKarmalkar, et al. "RESURFAlGaN/GaN HEMT for High Voltage Power switching" IEEEElectron Device Letters, VOL.22, NO.8, AUGUST 2001), and the longitudinal Voltage resistance of the Device can be improved by introducing P-GaN to avoid premature breakdown of the Device. However, the activation rate of P-GaN is low, and the effect of improving the withstand voltage capability of the device is limited.
3. A back barrier Buffer layer structure such as AlGaN is used, and a document [ Oliver Gilt et al ] "Normal-of AlGaN/GaNHFET with p-type GaN Gate and AlGaN Buffer", Integrated Power electronics Systems,2010] mentions that the use of the back barrier such as AlGaN increases the barrier height from channel two-dimensional electron gas to the Buffer layer, thereby reducing the leakage current of the Buffer layer of the device, but the technology also has limited promotion on the breakdown voltage of the device and fails to fully embody the pressure resistance advantage of the gallium nitride material; meanwhile, the AlGaN back barrier not only introduces a trap between the buffer layer and the channel layer due to lattice mismatch, but also reduces the two-dimensional electron gas concentration of the channel due to the fact that the AlGaN in the buffer layer and the AlGaN in the barrier layer have opposite polarization effects, and therefore the on-resistance of the device is increased.
In summary, how to significantly improve the voltage endurance of the gan-based hemt without affecting other properties of the device has become a technical problem to be solved by those skilled in the art.
Disclosure of Invention
In view of the above, the present invention provides a gallium nitride based high electron mobility transistor (GaN HEMT) that has insufficient withstand voltage capability and limits the application of the GaN HEMT in high voltage applications, and the gallium nitride based high electron mobility transistor optimizes the surface electric field of the device to improve the breakdown voltage of the device, and simultaneously avoids the excessive leakage current of the gate, and improves the forward current capability of the device by forming a lateral schottky diode between the gate and the drain as a withstand voltage structure.
In order to solve the technical problems, the invention adopts the following technical scheme:
a gallium nitride-based high electron mobility transistor comprises a substrate, a gallium nitride buffer layer, a gallium nitride channel layer, an aluminum gallium nitrogen barrier layer, a source electrode, a drain electrode and a grid electrode, wherein the substrate, the gallium nitride buffer layer, the gallium nitride channel layer and the aluminum gallium nitrogen barrier layer are sequentially stacked from bottom to top, the source electrode, the drain electrode and the grid electrode are respectively arranged on the upper surface of the aluminum gallium nitrogen barrier layer, the source electrode and the drain electrode are in ohmic contact with the aluminum gallium nitrogen barrier layer, and the grid electrode and the aluminum gallium nitrogen; the method is characterized in that: an N-type semiconductor layer is arranged on the upper surface of the aluminum gallium nitrogen barrier layer between the grid electrode and the drain electrode, and comprises an N-type semiconductor layer and an N + type semiconductor layer with different doping concentrations; the N-type semiconductor layer and the grid form Schottky contact, the N + type semiconductor layer and the drain form ohmic contact, and the grid, the drain and the N-type semiconductor layer between the grid and the drain form a transverse Schottky diode; and passivation layers are arranged on the aluminum gallium nitrogen barrier layer between the source electrode and the grid electrode and the surface of the N-type semiconductor layer between the grid electrode and the drain electrode.
Further, the N-type semiconductor layer of the present invention further includes: an intrinsic semiconductor layer interposed between the N-type semiconductor layer and the N + -type semiconductor layer.
Furthermore, the thickness of the N-type semiconductor layer is 20-500 nm.
Further, N-The doping concentration of the semiconductor layer is 1 × 1013cm-3～5×1016cm-3；N+The doping concentration of the semiconductor layer is 3 × 1017cm-3～1×1020cm-3。
Furthermore, the molecular formula of the AlGaN barrier layer is AlxGayAnd N, wherein x is more than or equal to 0 and less than or equal to 1, y is more than or equal to 0 and less than or equal to 1, and x + y is equal to 1.
Furthermore, the thickness range of the aluminum gallium nitrogen barrier layer is 10 nm-40 nm.
Furthermore, the gallium nitride channel layer of the invention is made of N-type doped semiconductor material, the thickness range is 10 nm-20 nm, and the doping concentration range is 3 multiplied by 1015cm-3～1×1019cm-3。
Furthermore, the thickness of the gallium nitride buffer layer is in the range of 1 μm to 4 μm.
Furthermore, the materials of the N-type semiconductor layer and the N + type semiconductor layer are any one or a combination of several of Si, GaAs, GaN, SiC, AlN, AlGaN and InGaN.
Further, the material of the passivation layer in the invention is SiO2、HfO2、Al2O3、Si3N4And La2O3Any one or more of them.
Further, the material of the substrate in the present invention is any one of sapphire, Si, and SiC.
The invention aims to overcome the defect of insufficient voltage endurance capability of a gallium nitride-based high electron mobility transistor (GaN HEMT), and provides the GaN HEMT with the transverse Schottky diode voltage endurance structure, so that the characteristics of high critical breakdown electric field, high electron saturation velocity and the like of a gallium nitride material are fully exerted. According to the technical scheme, a rectifying structure, namely a transverse Schottky diode structure, is formed between the grid electrode and the drain electrode. The existence of the transverse Schottky diode can avoid overlarge leakage current generated on the grid when positive voltage is applied to the grid, and ensures that the device has better forward current capability; and certain reverse voltage can be borne under the blocking state, meanwhile, the electric field in the transverse Schottky diode can modulate the electric field of the channel layer, the surface electric field of the device is optimized, the electric field peak value of the grid close to the drain end is reduced, and the surface electric field is distributed more uniformly, so that the breakdown voltage of the device is remarkably improved under the condition of not introducing a field plate, additional parasitic capacitance is not introduced, and the working frequency and the switching speed of the device are not limited.
Compared with the prior art, the invention has the beneficial effects that:
according to the invention, the transverse Schottky diode with a rectifying function is formed between the grid electrode and the drain electrode of the traditional GaN HEMT device, and is used as a voltage-resistant structure to modulate the surface electric field of the device and optimize the distribution of the transverse electric field, so that the purpose of improving the breakdown voltage of the device is achieved; meanwhile, the transverse Schottky diode can bear certain reverse voltage in a blocking state, and the phenomenon that the grid generates overlarge leakage current when positive voltage is applied to the grid is avoided in a forward conduction state, so that the forward current capability of the device is ensured; in addition, compared with a field plate structure, the invention does not introduce additional parasitic capacitance, ensures the working frequency and the switching speed of the device and improves the reliability of the device.
Drawings
FIG. 1 is a schematic diagram of a conventional GaN HEMT device in the prior art; in the figure, 101 is a source, 102 is a drain, 103 is a gate, 104 is an aluminum gallium nitride barrier layer, 105 is a gallium nitride channel layer, 106 is a gallium nitride buffer layer, 107 is a substrate, and 108 is a passivation layer.
Fig. 2 is a schematic structural view of a GaN HEMT device provided in embodiment 1 of the present invention; in the figure, 201 is a source, 202 is a drain, 203 is a gate, 204 is an aluminum gallium nitride barrier layer, 205 is a gallium nitride channel layer, 206 is a gallium nitride buffer layer, 207 is a substrate, 208 is a passivation layer, 209 is an N-type semiconductor layer, and 210 is an N + -type semiconductor layer.
Fig. 3 is a schematic structural view of a GaN HEMT device provided in embodiment 2 of the present invention; in the figure, 301 is a source, 302 is a drain, 303 is a gate, 304 is an aluminum gallium nitride barrier layer, 305 is a gallium nitride channel layer, 306 is a gallium nitride buffer layer, 307 is a substrate, 308 is a passivation layer, 309 is an N-type semiconductor layer, 310 is an N + -type semiconductor layer, and 311 is an intrinsic semiconductor layer.
Fig. 4 is a voltage-withstanding simulation graph of the GaN HEMT device and the general GaN HEMT device according to an embodiment of the present invention; in the figure, the curve of the triangular icon is an IV simulation curve of a general GaN HEMT, and the curve of the pentagonal star-shaped icon is an IV simulation curve of a GaN HEMT according to an embodiment of the present invention.
Fig. 5 is a distribution diagram of a channel electric field in a horizontal direction at a breakdown bias point of the GaN HEMT device and the normal GaN HEMT device according to an embodiment of the present invention; in the figure, the curve of the triangular icon is the electric field distribution of the general GaN HEMT, and the curve of the pentagonal star icon is the electric field distribution of the GaN HEMT according to one embodiment of the present invention.
Detailed Description
The technical scheme of the invention is clearly and completely described by combining the drawings and the specific embodiments in the specification:
example 1:
the present embodiment provides a GaN-based high electron mobilityA transistor, as shown in fig. 2, including a substrate 207, a gallium nitride buffer layer 206, a gallium nitride channel layer 205, an aluminum gallium nitride barrier layer 204, and a source 201, a drain 202, and a gate 203 respectively disposed on the upper surface of the aluminum gallium nitride barrier layer 204, which are stacked in this order from bottom to top; in this embodiment, the molecular formula of the AlGaN barrier layer 204 is AlxGayN, wherein x is not less than 0 and not more than 1, y is not less than 0 and not more than 1, and x + y is 1; the source electrode 201 and the drain electrode 202 are both in ohmic contact with the AlGaN barrier layer 204, and the gate electrode 203 is in Schottky contact with the AlGaN barrier layer 204; the method is characterized in that: an N-type semiconductor layer 209 and an N + type semiconductor layer 210 which are mutually contacted are arranged on the upper surface of the aluminum gallium nitride barrier layer 204 between the grid electrode 203 and the drain electrode 202, the N-type semiconductor layer 209 and the grid electrode 203 form Schottky contact, the N + type semiconductor layer 210 and the drain electrode 202 form ohmic contact, and the grid electrode 203, the N-type semiconductor layer 209, the N + type semiconductor layer 210 and the drain electrode 202 form a transverse Schottky diode; the surface of the AlGaN barrier layer 204 between the source electrode 201 and the grid electrode 203 and the surface of the N-type semiconductor layer 209 and the N + type semiconductor layer 210 between the grid electrode 203 and the drain electrode 202 are provided with passivation layers 208.
Example 2:
the present embodiment provides a gallium nitride-based high electron mobility transistor, as shown in fig. 3, including a substrate 307, a gallium nitride buffer layer 306, a gallium nitride channel layer 305, an aluminum gallium nitride barrier layer 304, and a source 301, a drain 302, and a gate 303 respectively disposed on the upper surface of the aluminum gallium nitride barrier layer 304, which are stacked in sequence from bottom to top; in this embodiment, the molecular formula of the AlGaN barrier layer 204 is AlxGayN, wherein x is not less than 0 and not more than 1, y is not less than 0 and not more than 1, and x + y is 1; the source electrode 301 and the drain electrode 302 are both in ohmic contact with the AlGaN barrier layer 304, and the gate electrode 303 is in Schottky contact with the AlGaN barrier layer 304; the method is characterized in that: an AlGaN barrier layer 304 between the gate 303 and the drain 302 and having N on its upper surface-IN+Structure of the N-IN+The structure includes an N-type semiconductor layer 309, an N + -type semiconductor layer 310, and an intrinsic semiconductor layer 311 interposed between the N-type semiconductor layer 309 and the N + -type semiconductor layer 310; the above-mentionedThe N-type semiconductor layer 309 forms a Schottky contact with the gate electrode 303, the N + -type semiconductor layer 310 forms an ohmic contact with the drain electrode 303, and the gate electrode 303, the N-type semiconductor layer 309, the intrinsic semiconductor layer 311, the N + -type semiconductor layer 310 and the drain electrode 303 form a lateral Schottky diode; an aluminum gallium nitride barrier layer 304 between the source electrode 301 and the gate electrode 303 and an N-type semiconductor layer 309 and an N + type semiconductor layer 310 between the gate electrode 303 and the drain electrode 303 are provided with passivation layers 308 on the surfaces.
Example 3:
in this example, a two-dimensional numerical simulation test was performed using the device structure shown in fig. 2, and in order to compare the performance of the GaN HEMT device of the present invention with that of the conventional GaN HEMT device, the conventional GaN HEMT device having the same parameters except that the N-type semiconductor layer 209 and the N + -type semiconductor layer 210 were not introduced was used as a comparative example. The structural parameters used for device simulation are shown in table 1 below:
TABLE 1 device simulation Structure parameters
As shown in fig. 4 and 5, the simulation result of this embodiment fully shows the advantages of the present invention. As can be seen from fig. 4, the embodiment of the present invention proposes that the breakdown voltage value of the GaN HEMT device is 1354V, while the breakdown voltage value of the general GaN HEMT device is 505V, thereby illustrating that the present invention can greatly increase the breakdown voltage; the principle of the invention for improving the breakdown voltage is embodied in the simulation result shown in fig. 5, and as can be seen from fig. 5, when the device is in a blocking state, the schottky diode bears a certain reverse voltage, and simultaneously, the electric field in the schottky diode modulates the electric field of the channel layer, so that the electric field distribution on the surface of the device is more uniform, and the breakdown voltage of the device can be improved.
While the present invention has been particularly shown and described with reference to the preferred embodiments, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (9)
1. A gallium nitride-based high electron mobility transistor comprises a substrate (207), a gallium nitride buffer layer (206), a gallium nitride channel layer (205), an aluminum gallium nitride barrier layer (204) and a source electrode (201), a drain electrode (202) and a grid electrode (203) which are arranged on the upper surface of the aluminum gallium nitride barrier layer (204) in a stacking mode from bottom to top, wherein the source electrode (201) and the drain electrode (202) are in ohmic contact with the aluminum gallium nitride barrier layer (204), and the grid electrode (203) and the aluminum gallium nitride barrier layer (204) are in Schottky contact; the method is characterized in that: an N-type semiconductor layer is arranged on the upper surface of the aluminum gallium nitrogen barrier layer (204) between the grid electrode (203) and the drain electrode (202), and the N-type semiconductor layer comprises an N-type semiconductor layer (209) and an N + type semiconductor layer (210) with different doping concentrations; the N-type semiconductor layer (209) forms a Schottky contact with the grid electrode (203), the N + type semiconductor layer (210) forms an ohmic contact with the drain electrode (202), and the grid electrode (203) and the drain electrode (202) and the N-type semiconductor layer between the grid electrode and the drain electrode form a transverse Schottky diode; an aluminum gallium nitride barrier layer (204) between the source electrode (201) and the grid electrode (203) and a passivation layer (208) are arranged on the surface of the N-type semiconductor layer between the grid electrode (203) and the drain electrode (202).
2. The gallium nitride-based high electron mobility transistor according to claim 1, wherein the N-type semiconductor layer further comprises: an intrinsic semiconductor layer interposed between the N-type semiconductor layer and the N + -type semiconductor layer.
3. The GaN-based HEMT according to claim 1 or 2, wherein the thickness of the N-type semiconductor layer is in the range of 20-500 nm.
4. The method of claim 1 or 2A GaN-based high electron mobility transistor, wherein the N-type semiconductor layer (209) has a doping concentration in the range of 1 × 1013cm-3～5×1016cm-3(ii) a The doping concentration range of the N + type semiconductor layer (210) is 3 x 1017cm-3～1×1020cm-3。
5. The GaN-based HEMT according to claim 1 or 2, wherein the AlGaN barrier layer (204) has the formula of AlxGayAnd N, wherein x is more than or equal to 0 and less than or equal to 1, y is more than or equal to 0 and less than or equal to 1, and x + y is equal to 1.
6. The GaN-based HEMT according to claim 1 or 2, wherein the AlGaN barrier layer (204) has a thickness in the range of 10nm to 40 nm.
7. The GaN-based HEMT according to claim 1 or 2, wherein the GaN channel layer (205) is made of N-type doped semiconductor material with a thickness ranging from 10nm to 20nm and a doping concentration ranging from 3 x 1015cm-3～1×1019cm-3。
8. The GaN-based HEMT according to claim 1 or 2, wherein the thickness of the GaN buffer layer (206) is in the range of 1 μm to 4 μm.
9. The GaN-based HEMT according to claim 1 or 2, wherein the N-type semiconductor layer is made of any one or a combination of Si, GaAs, GaN, SiC, AlN, AlGaN and InGaN; the passivation layer (208) is made of SiO2、HfO2、Al2O3、Si3N4And La2O3Any one or more of the above-mentioned materials; the material of the substrate (207) is any of sapphire, Si and SiCOne kind of the medicine.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
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| CN105097911A (en) * | 2015-07-29 | 2015-11-25 | 电子科技大学 | HEMT device with junction type semiconductor layer |
| CN105762184A (en) * | 2016-04-27 | 2016-07-13 | 电子科技大学 | Gallium-nitride-based high-electronic-mobility transistor having semi-insulating layer |
| CN106783962A (en) * | 2017-01-11 | 2017-05-31 | 西安电子科技大学 | A kind of p GaN enhanced AlGaNs/GaN HEMTs |
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