CN108806629A - Pixel unit and its driving method, display panel - Google Patents
Pixel unit and its driving method, display panel Download PDFInfo
- Publication number
- CN108806629A CN108806629A CN201810716842.5A CN201810716842A CN108806629A CN 108806629 A CN108806629 A CN 108806629A CN 201810716842 A CN201810716842 A CN 201810716842A CN 108806629 A CN108806629 A CN 108806629A
- Authority
- CN
- China
- Prior art keywords
- tft
- thin film
- film transistor
- pixel
- pole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal (AREA)
Abstract
A kind of pixel unit of offer of the embodiment of the present invention and its driving method, display panel.Pixel unit includes control circuit, data circuit and N number of sub-pixel, and control circuit is more than or equal to the 2, positive integer less than or equal to N for controlling X sub-pixel connection in N number of sub-pixel, X;Data circuit is used for the X sub- pixel data output voltages.The driving method of pixel unit includes:The control circuit controls the connection of X sub-pixel in N number of sub-pixel, and the data circuit is to the X sub- pixel data output voltages.The present invention organically integrates pixel segmentation and the driving of more grayscale, combines more grayscale to drive on the basis of pixel is divided, can realize more grayscale using less thin film transistor (TFT).Compared with existing pixel partitioning scheme or more grayscale type of drive, the present invention effectively reduces the quantity of thin film transistor (TFT), and circuit structure is succinct and is conducive to be laid out, and simplifies dot structure, effectively increases pixel aperture ratio.
Description
Technical field
The present invention relates to display technology fields, and in particular to a kind of pixel unit and its driving method, display panel.
Background technology
With the rapid development of display technology, liquid crystal (Liquid Crystal Display, LCD) display device is with it
The advantages such as low-power consumption, driving voltage be low, are widely used in various electronic equipments.Meanwhile as intelligent wearing, movement are answered
With etc. technologies development, and user proposes new want for the brightness of LCD display device, color saturation and resolution ratio
It asks so that the power consumption of display device increases.
In order to reduce the power consumption of display device, the prior art proposes a kind of Novel low power consumption LCD display technologies:Pixel
Memory (Memory In Pixel, MIP) display technology.MIP display technologies are set in each pixel of LCD display devices
Static RAM (Static Random Access Memory, SRAM) is set, SRAM will input the data electricity of pixel
Pressure storage certain time for showing, without executing the write activity of data voltage with the frame period, therefore avoids data voltage
The power consumption that repeatedly write-in generates, can reduce power consumption.Since the technology is without changing LCD preparation processes, without novel
Developing material, it is simple in structure, it is at low cost, thus large development is obtained in recent years.
The grayscale performance of the existing LCD display device using MIP is very simple, and each pixel can only show 2 grayscale:
Black and white.In order to show more grayscale, prior art generally use pixel partitioning scheme and the driving of more grayscale
Mode is realized.Pixel partitioning scheme is to be divided into multiple sub-pixels, each sub-pixel individually to control grayscale one pixel.It is more
Grayscale type of drive is that the multiple driving units of setting connect a pixel, and each driving unit exports a grayscale to the pixel
Signal.
Through present inventor the study found that existing pixel partitioning scheme and more grayscale type of drive have pixel knot
The defects such as structure complexity and aperture opening ratio are low.
Invention content
The embodiment of the present invention is the technical problem to be solved is that, provide a kind of pixel unit and its driving method, display surface
Plate, with overcome it is existing realize more grayscale show existing for dot structure complexity and the defects such as aperture opening ratio is low.
In order to solve the above-mentioned technical problem, an embodiment of the present invention provides a kind of pixel unit, including N number of sub-pixel, N
For the positive integer more than or equal to 2, and
Control circuit, for controlling X sub-pixel connection in N number of sub-pixel, X is more than or equal to 2, less than or equal to N
Positive integer;
Data circuit is used for the X sub- pixel data output voltages.
Optionally, the area of N number of sub-pixel is different.
Optionally, the area ratio of N number of sub-pixel is:1:2:……:2N-1。
Optionally, the control circuit include at least N-1 control unit, each control unit include one drive line,
The grid of one input thin film transistor (TFT) and a scanning thin film transistor (TFT), the input thin film transistor (TFT) passes through the scanning
Thin film transistor (TFT) connects the driving line, and the first pole and the second pole of the input thin film transistor (TFT) are separately connected two sub- pictures
Element.
Optionally, the grid of the scanning thin film transistor (TFT) connects grid line, the first pole connection driving line, the connection of the second pole
The grid of thin film transistor (TFT) is inputted, while the second pole forms grid storage capacitance with public pressure wire;The input thin film transistor (TFT)
Grid connection scanning thin film transistor (TFT) the second pole, the first pole connects a sub-pixel, and the second pole connects another height picture
Element.
Optionally, the data circuit includes at least N number of data cell, and each data cell includes a data line, one
Item drives line, an input thin film transistor (TFT) and a scanning thin film transistor (TFT), the grid of the input thin film transistor (TFT) to pass through
The scanning thin film transistor (TFT) connects the driving line, and the first pole of the input thin film transistor (TFT) connects the data line, the
Two poles connect a sub-pixel.
Optionally, the grid of the scanning thin film transistor (TFT) connects grid line, the first pole connection driving line, the connection of the second pole
The grid of thin film transistor (TFT) is inputted, while the second pole forms grid storage capacitance with public pressure wire;The input thin film transistor (TFT)
Grid connection scanning thin film transistor (TFT) the second pole, the first pole connect data line, the second pole connect a sub-pixel.
Optionally, the pixel unit includes the first~the 4th sub-pixel, and the control circuit includes the control of first~third
Unit processed, the data circuit include the first~the 4th data cell;Wherein,
First control unit includes the first driving line, input thin film transistor (TFT) and scanning thin film transistor (TFT);It is brilliant to scan film
The grid of body pipe connects grid line, the first pole connection the first driving line, the grid of the second pole connection input thin film transistor (TFT);Input
First pole of thin film transistor (TFT) connects the 4th sub-pixel, and the second pole connects the first sub-pixel;
Second control unit includes the second driving line, input thin film transistor (TFT) and scanning thin film transistor (TFT);It is brilliant to scan film
The grid of body pipe connects grid line, the first pole connection the second driving line, the grid of the second pole connection input thin film transistor (TFT);Input
First pole of thin film transistor (TFT) connects third sub-pixel, and the second pole connects the first sub-pixel;
Third control unit includes third driving line, input thin film transistor (TFT) and scanning thin film transistor (TFT);It is brilliant to scan film
The grid of body pipe connects grid line, and the first pole connects third and drives line, the grid of the second pole connection input thin film transistor (TFT);Input
First pole of thin film transistor (TFT) connects the second sub-pixel, and the second pole connects the first sub-pixel;
First data cell includes the first data line, 4 wheel driven moving-wire, input thin film transistor (TFT) and scanning film crystal
Pipe;The grid for scanning thin film transistor (TFT) connects grid line, and the first pole connects 4 wheel driven moving-wire, the second pole connection input film crystal
The grid of pipe;The first pole for inputting thin film transistor (TFT) connects the first data line, and the second pole connects the first sub-pixel;
Second data cell includes the second data line, the 5th driving line, input thin film transistor (TFT) and scanning film crystal
Pipe;The grid for scanning thin film transistor (TFT) connects grid line, the 5th driving line of the first pole connection, the second pole connection input film crystal
The grid of pipe;The first pole for inputting thin film transistor (TFT) connects the second data line, and the second pole connects the first sub-pixel;
Third data cell includes third data line, the 6th driving line, input thin film transistor (TFT) and scanning film crystal
Pipe;The grid for scanning thin film transistor (TFT) connects grid line, the 6th driving line of the first pole connection, the second pole connection input film crystal
The grid of pipe;The first pole for inputting thin film transistor (TFT) connects third data line, and the second pole connects the first sub-pixel;
4th data cell includes the 4th data line, the 7th driving line, input thin film transistor (TFT) and scanning film crystal
Pipe;The grid for scanning thin film transistor (TFT) connects grid line, the 7th driving line of the first pole connection, the second pole connection input film crystal
The grid of pipe;The first pole for inputting thin film transistor (TFT) connects the 4th data line, and the second pole connects the first sub-pixel.
Optionally, the pixel unit includes the first~the 4th sub-pixel, and the control circuit includes the first~the 4th control
Unit processed, the data circuit include the first~the 4th data cell;Wherein,
First control unit includes the first driving line, input thin film transistor (TFT) and scanning thin film transistor (TFT);It is brilliant to scan film
The grid of body pipe connects grid line, the first pole connection the first driving line, the grid of the second pole connection input thin film transistor (TFT);Input
First pole of thin film transistor (TFT) connects the 4th sub-pixel, and the second pole connects in other control units and data cell and inputs film
Second pole of transistor;
Second control unit includes the second driving line, input thin film transistor (TFT) and scanning thin film transistor (TFT);It is brilliant to scan film
The grid of body pipe connects grid line, the first pole connection the second driving line, the grid of the second pole connection input thin film transistor (TFT);Input
First pole of thin film transistor (TFT) connects third sub-pixel, and the second pole connects the of input thin film transistor (TFT) in the first control unit
Two poles;
Third control unit includes third driving line, input thin film transistor (TFT) and scanning thin film transistor (TFT);It is brilliant to scan film
The grid of body pipe connects grid line, and the first pole connects third and drives line, the grid of the second pole connection input thin film transistor (TFT);Input
First pole of thin film transistor (TFT) connects the second sub-pixel, and the second pole connects the of input thin film transistor (TFT) in the first control unit
Two poles;
4th control unit includes 4 wheel driven moving-wire, input thin film transistor (TFT) and scanning thin film transistor (TFT);It is brilliant to scan film
The grid of body pipe connects grid line, and the first pole connects 4 wheel driven moving-wire, the grid of the second pole connection input thin film transistor (TFT);Input
First pole of thin film transistor (TFT) connects the first sub-pixel, and the second pole connects the of input thin film transistor (TFT) in the first control unit
Two poles;
First data cell includes the first data line, the 5th driving line, input thin film transistor (TFT) and scanning film crystal
Pipe;The grid for scanning thin film transistor (TFT) connects grid line, the 5th driving line of the first pole connection, the second pole connection input film crystal
The grid of pipe;The first pole for inputting thin film transistor (TFT) connects the first data line, is inputted in the first control unit of the second pole connection thin
Second pole of film transistor;
Second data cell includes the second data line, the 6th driving line, input thin film transistor (TFT) and scanning film crystal
Pipe;The grid for scanning thin film transistor (TFT) connects grid line, the 6th driving line of the first pole connection, the second pole connection input film crystal
The grid of pipe;The first pole for inputting thin film transistor (TFT) connects the second data line, is inputted in the first control unit of the second pole connection thin
Second pole of film transistor;
Third data cell includes third data line, the 7th driving line, input thin film transistor (TFT) and scanning film crystal
Pipe;The grid for scanning thin film transistor (TFT) connects grid line, the 7th driving line of the first pole connection, the second pole connection input film crystal
The grid of pipe;The first pole for inputting thin film transistor (TFT) connects third data line, is inputted in the first control unit of the second pole connection thin
Second pole of film transistor;
4th data cell includes the 4th data line, the 8th driving line, input thin film transistor (TFT) and scanning film crystal
Pipe;The grid for scanning thin film transistor (TFT) connects grid line, the 8th driving line of the first pole connection, the second pole connection input film crystal
The grid of pipe;The first pole for inputting thin film transistor (TFT) connects the 4th data line, is inputted in the first control unit of the second pole connection thin
Second pole of film transistor.
The embodiment of the present invention additionally provides a kind of display panel, including pixel unit above-mentioned.
In order to solve the above-mentioned technical problem, the embodiment of the present invention additionally provides a kind of driving method of pixel unit, pixel
Unit includes control circuit, data circuit and N number of sub-pixel, and N is the positive integer more than or equal to 2;The driving method packet
It includes:
The control circuit controls the connection of X sub-pixel in N number of sub-pixel, and X is more than or equal to 2, is less than or equal to
The positive integer of N;
The data circuit is to the X sub- pixel data output voltages.
Optionally, the area of N number of sub-pixel is different.
Optionally, the area ratio of N number of sub-pixel is:1:2:……:2N-1。
Optionally, the control circuit include at least N-1 control unit, each control unit include one drive line,
The grid of one input thin film transistor (TFT) and a scanning thin film transistor (TFT), the input thin film transistor (TFT) passes through the scanning
Thin film transistor (TFT) connects the driving line, and the first pole and the second pole of the input thin film transistor (TFT) are separately connected two sub- pictures
Element;The control circuit controls the connection of X sub-pixel in N number of sub-pixel, including:
When grid line scans, the driving line of i-th of control unit exports cut-off signals, the input film of i-th of control unit
Transistor turns off, and two sub-pixels that the input thin film transistor (TFT) connects is made to be in isolation;
When grid line scans, the driving line of i-th of control unit exports Continuity signal, the input film of i-th of control unit
Transistor turns make two sub-pixels that the input thin film transistor (TFT) connects be in connection status;
Wherein, i=1 ... ..., N-1.
Optionally, the data circuit includes at least N number of data cell, and each data cell includes a data line, one
Item drives line, an input thin film transistor (TFT) and a scanning thin film transistor (TFT), the grid of the input thin film transistor (TFT) to pass through
The scanning thin film transistor (TFT) connects the driving line, and the first pole of the input thin film transistor (TFT) connects the data line, the
Two poles connect a sub-pixel;The data circuit to the X sub- pixel data output voltages, including:
When grid line scans, the driving line of j-th of data cell exports cut-off signals, the input film of j-th of control unit
Transistor turns off, and the data voltage of data line cannot be input to the sub-pixel of the input thin film transistor (TFT) connection;
When grid line scans, the driving line of j-th of data cell exports Continuity signal, the input film of j-th of control unit
Transistor turns, the data voltage of data line are input to the sub-pixel of the input thin film transistor (TFT) connection;
Wherein, j=1 ... ..., N.
An embodiment of the present invention provides a kind of pixel unit and its driving method, display panel, pixel is divided and mostly grey
Rank driving organically integrates, and combines more grayscale to drive on the basis of pixel is divided, and less film can be utilized brilliant
Body pipe realizes more grayscale.Compared with existing pixel partitioning scheme or more grayscale type of drive, the technology of the embodiment of the present invention
Scheme effectively reduces the quantity of thin film transistor (TFT), and circuit structure is succinct and is conducive to be laid out, and simplifies dot structure, effectively carries
High pixel aperture ratio.
Certainly, implement any of the products of the present invention or method it is not absolutely required at the same reach all the above excellent
Point.Other features and advantages of the present invention will illustrate in subsequent specification embodiment, also, partly from specification reality
It applies in example and becomes apparent, or understand through the implementation of the invention.The purpose of the embodiment of the present invention and other advantages can lead to
Specifically noted structure in specification, claims and attached drawing is crossed to realize and obtain.
Description of the drawings
Attached drawing is used for providing further understanding technical solution of the present invention, and a part for constitution instruction, with this
The embodiment of application technical solution for explaining the present invention together, does not constitute the limitation to technical solution of the present invention.Attached drawing
In the shapes and sizes of each component do not reflect that actual proportions, purpose are schematically illustrate the content of present invention.
Fig. 1 is the fundamental diagram of existing more grayscale type of drive;
Fig. 2 is the structural schematic diagram that existing more grayscale type of drive realize 16 grayscale;
Fig. 3 is the structural schematic diagram of pixel unit of the embodiment of the present invention;
Fig. 4 is the structural schematic diagram of present invention pixel unit first embodiment;
Fig. 5 is the structural schematic diagram of present invention pixel unit second embodiment;
Fig. 6 is the structural schematic diagram of present invention pixel unit 3rd embodiment;
Fig. 7 is the structural schematic diagram of present invention pixel unit fourth embodiment.
Specific implementation mode
The specific implementation mode of the present invention is described in further detail with reference to the accompanying drawings and examples.Implement below
Example is not limited to the scope of the present invention for illustrating the present invention.It should be noted that in the absence of conflict, this Shen
Please in embodiment and embodiment in feature mutually can arbitrarily combine.
Existing pixel partitioning scheme is to be divided into N number of sub-pixel, N number of sub-pixel combinations that can show a pixel
2NA grayscale.For example, when a pixel is divided into 3 sub-pixels, 3 sub-pixel combinations can show 8 grayscale.By
Each sub-pixel needs to use 1 SRAM in pixel partitioning scheme, so if pixel is divided into N number of sub-pixel, then often
A pixel needs N number of SRAM.Since the region that multiple SRAM occupy pixel is larger, which not only makes dot structure become
Must be sufficiently complex, and significantly reduce pixel aperture ratio.
Existing more grayscale type of drive are that the N number of driving unit of setting connects a pixel, and each driving unit is responsible for output
One grayscale.Fig. 1 is the fundamental diagram of existing more grayscale type of drive.As shown in Figure 1, a pixel A connects 2 drivings
Unit, each driving unit include a grid line, a data line and 2 thin film transistor (TFT) (Thin Film
Transistor, TFT), pixel A further includes a driving line and a public pressure wire, and 2 thin film transistor (TFT)s are respectively to sweep
Retouch thin film transistor (TFT) (G-TFT) and input thin film transistor (TFT) (D-TFT).Wherein, the grid of the D-TFT1 of the first driving unit is logical
G-TFT1 connections driving line is crossed, source electrode connects data line 1, and drain electrode connects pixel A;The grid of G-TFT1 connects grid line 1,
Source electrode connection driving line, drain electrode connects the grid of D-TFT1, while drain electrode forms first grid storage with public pressure wire
(gate memory) capacitance C_gm1.The grid of the D-TFT2 of second driving unit drives line, source electrode by G-TFT2 connections
Data line 2 is connected, drain electrode connects pixel A, and the grid of G-TFT2 connects grid line 2, source electrode connection driving line, and drain electrode connects
The grid of D-TFT2 is connect, while drain electrode forms second gate storage capacitance C_gm2 with public pressure wire.D-TFT1 and D-TFT2
For different types of TFT.
When work, grid line 1 and grid line 2 are used for putting high level voltage VGHOr low level voltage VGL, to control G-TFT1
With the on or off of G-TFT2, driving line is used for putting high level voltage VGHOr low level voltage VGL, with control D-TFT1 and
The on or off of D-TFT2.Its driving principle is:When driving the signal of line output to make D-TFT1 disconnections, D-TFT2 conductings,
Data line 2 applies the second data voltage to pixel A (such as+2V~-2V).At this point, although data line 1 is provided with the first data electricity
Pressure, but since D-TFT1 is disconnected, so not influenced on pixel A.When the signal of driving line output makes D-TFT1 conductings, D-
When TFT2 is disconnected, data line 1 applies the first data voltage to pixel A (such as+4V~-4V).At this point, although data line 2 is provided with
Second data voltage, but since D-TFT2 is disconnected, so not influenced on pixel A.In this way, realizing 2 by 2 driving units
The display of a grayscale.
Fig. 2 is the structural schematic diagram that existing more grayscale type of drive realize 16 grayscale.As shown in Fig. 2, in order to realize 16
The driving circuit of a grayscale, each pixel A includes 16 driving units, is arranged with 4*4 matrix-styles, driving circuit further includes 4
Grid line, 16 data lines and 4 driving lines, the data voltage inputted by every data line determine the grayscale of pixel A.Due to
Each driving unit includes 2 thin film transistor (TFT)s, therefore driving circuit needs 32 thin film transistor (TFT)s altogether.When work, pixel A
1 data voltage signal is only received a moment.For example, when needing the data voltage of data line 16 inputting pixel A,
When grid line 1 scans, the whole output cut-off signals of 4 driving lines, then data line 1, data line 5, data line 9 and data line 13
Data voltage can not all input;When grid line 2 scans, 4 driving lines all export cut-off signals, then data line 2, data line
6, the data voltage of data line 10 and data line 14 can not all input;When grid line 3 scans, 4 driving line all output shutdowns
Signal, then the data voltage of data line 3, data line 7, data line 11 and data line 15 can not all input;When grid line 4 scans,
Line 1, driving line 2 and driving line 3 is driven to export cut-off signals, driving line 4 exports Continuity signal, then data line 4,8 and of data line
The data voltage of data line 12 can not all input, and the data voltage of data line 16 is input to pixel A.
It can be seen that according to the operation principle of more grayscale type of drive since grayscale quantity is identical as the quantity of data line,
Therefore when grayscale quantity is more, the thin film transistor (TFT) quantity that existing more each pixels of grayscale type of drive need is very more, no
So that dot structure is become sufficiently complex, and significantly reduces pixel aperture ratio.Therefore, existing pixel partitioning scheme and
The defects such as more grayscale type of drive have dot structure complexity and aperture opening ratio is low, are unfavorable for manufacturing, and are unfavorable for preparing high
The display device of resolution ratio.
Fig. 3 is the structural schematic diagram of pixel unit of the embodiment of the present invention, and multiple pixel units are formed in a manner of matrix arrangement
Display panel.As shown in figure 3, pixel unit of the embodiment of the present invention include control circuit, data circuit and with the control
N number of sub-pixel that circuit is connected with data circuit, N are the positive integer more than or equal to 2.Wherein,
Control circuit, for controlling in N number of sub-pixel X sub-pixel connection, X be more than or equal to 2, less than or equal to N just
Integer;
Data circuit is used for the X sub- pixel data output voltages;
N number of sub-pixel, the data voltage under the control of the control circuit, being exported according to the data circuit
It is shown.
Wherein, N number of sub-pixel includes sub-pixel A1、……、AN, the area of each sub-pixel is different, each sub-pixel
Area ratio is:1:2:……:2N-1。
When actual implementation, the area of each sub-pixel can also be identical, or using other area ratios, still can be real
The existing present invention, the embodiment of the present invention are not specifically limited.
Wherein, control circuit includes at least N-1 control unit.Each control unit include a driving line, one it is defeated
Enter thin film transistor (TFT) D-TFT and a scanning thin film transistor (TFT) G-TFT.The grid of D-TFT drives line by G-TFT connections, the
One pole and the second pole are separately connected 2 sub-pixels, by driving the signal of line output to control being turned on or off for D-TFT, in turn
Control the connection or isolation of 2 sub-pixels.Specifically, the grid of G-TFT connects grid line, the first pole connection driving line, the second pole
The grid of D-TFT is connected, while the second pole forms grid storage capacitance C_gm with public pressure wire.The grid of D-TFT connects G-
The second pole of TFT drives line, the first pole to connect a sub-pixel by G-TFT connections, and the second pole connects another sub-pixel.
Since each control unit is by two sub-pixels of D-TFT connections, two sub-pixels can be made to connect by D-TFT conductings
It connects, is combined into the pixel shown, two sub-pixels can be made to be in isolation by D-TFT disconnections.
Wherein, data circuit includes at least N number of data cell.Each data cell includes a data line, a driving
Line, an input thin film transistor (TFT) D-TFT and a scanning thin film transistor (TFT) G-TFT.The grid of D-TFT is connected by G-TFT
Line, the first pole is driven to connect data line, the second pole connects a sub-pixel, by driving the signal of line output to control D-TFT's
It is turned on or off, and then can the data voltage that control data line be input to the sub-pixel.Specifically, the grid connection of G-TFT
Grid line, the first pole connection driving line, the second pole connects the grid of D-TFT, while the second pole forms grid with public pressure wire and deposits
Storing up electricity holds C_gm.The second pole of the grid connection G-TFT of D-TFT, drives line, the first pole to connect data by G-TFT connections
Line, the second pole connect a sub-pixel.
Identical in input data voltage for a pixel unit, the display area of control circuit control is not
Together, the grayscale presented is different.Identical in display area, the data voltage of data circuit output is different, is presented
The depth it is also different.In the embodiment of the present invention, different sub-pixels is controlled by control circuit and is connected, pixel list can be controlled
The size that area is shown in member exports different data voltages by data circuit, can control the depth of display, pass through face
The multiple combinations of product and the depth realize that more grayscale are shown.
It should be noted that the first pole and the second pole described in the embodiment of the present invention refer to 2 electricity of thin film transistor (TFT)
Pole, when actual implementation, it is drain electrode that the first pole may be used, which is source electrode, the second pole, and it is electric leakage that can also use the first pole
Pole, the second pole are source electrodes.Input thin film transistor (TFT) type can be identical in each control unit, is swept in each control unit
Retouching thin film transistor (TFT) type can be identical.
The pixel unit that the embodiment of the present invention is provided organically integrates pixel segmentation and the driving of more grayscale,
It combines more grayscale to drive on the basis of pixel is divided, can realize more grayscale using less thin film transistor (TFT).With it is existing
There are pixel partitioning scheme or more grayscale type of drive to compare, the technical solution of the embodiment of the present invention effectively reduces thin film transistor (TFT)
Quantity, circuit structure is succinct and is conducive to be laid out, and simplifies dot structure, effectively increases pixel aperture ratio.
Below by the technical solution of specific embodiment the present invention will be described in detail embodiment.
First embodiment
Fig. 4 is the structural schematic diagram of present invention pixel unit first embodiment.Pixel unit includes pixel circuit and 2
Sub-pixel A1、A2, the display of 4 grayscale may be implemented.In the present embodiment, sub-pixel A1With sub-pixel A2Area ratio can be with
It is 1:2, can also be 1:1, the grayscale value that can be shown as needed determines.As shown in figure 4, the present embodiment pixel unit packet
Enclosed tool pixel A1、A2, control circuit 10 and data circuit 20.
Wherein, control circuit 10 includes 1 control unit, i.e. the first control unit 11.First control unit 11 includes the
One driving line 1, input thin film transistor (TFT) D-TFT and scanning thin film transistor (TFT) G-TFT.The grid of G-TFT connects grid line, source electricity
Pole connection the first driving line 1, drain electrode connects the grid of D-TFT, while drain electrode forms grid storage electricity with public pressure wire
Hold.The drain electrode of the grid connection G-TFT of D-TFT, line 1, source electrode connexon pixel A are driven by G-TFT connections first2,
Drain electrode connexon pixel A1。
Wherein, data circuit 20 includes 2 data cells, i.e. the first data cell 21 and the second data cell 22.First
Data cell 21 includes the first data line 1, second driving line 2, D-TFT and G-TFT.The grid of G-TFT connects grid line, source electricity
Pole connection the second driving line 2, drain electrode connects the grid of D-TFT, while drain electrode forms grid storage electricity with public pressure wire
Hold.The drain electrode of the grid connection G-TFT of D-TFT, drives line 2, source electrode to connect the first data by G-TFT connections second
Line 1, drain electrode connexon pixel A1.Second data cell 22 includes the second data line 2, third driving line 3, D-TFT and G-
TFT.The grid of G-TFT connects grid line, and source electrode connects third and line 3, drain electrode is driven to connect the grid of D-TFT, leak electricity simultaneously
Pole forms grid storage capacitance with public pressure wire.The drain electrode of the grid connection G-TFT of D-TFT, third is connected by G-TFT
Line 3, source electrode is driven to connect the second data line 2, drain electrode connexon pixel A1。
Below with pixel unit for normally-black (Normally black) pattern, simple declaration the present embodiment realizes 4 grayscale
The driving process of display.
1, when grid line scans, 3 driving lines all export cut-off signals, then the first control unit 11, the first data cell
21 and the second D-TFT in data cell 22 cannot be connected, sub-pixel A1With sub-pixel A2Between be in isolation, first number
It cannot be inputted according to the data voltage of line 1 and the second data line 2, sub-pixel A1With sub-pixel A2Show that black, pixel unit are in
Existing low grayscale.
2, when grid line scans, the first driving line 1 and third driving line 3 export cut-off signals, and the second driving output of line 2 is led
Messenger, then the D-TFT in the first control unit 11 cannot be connected, sub-pixel A1With sub-pixel A2Between be in isolation, the
D-TFT in two data cells 22 cannot be connected, and the data voltage of the second data line 2 cannot input, in the first data cell 21
D-TFT conductings, the data voltage (white appliances pressure, such as DC+4V~DC-4V, 1Hz~4Hz) of the first data line 1 is input to sub- picture
Plain A1.Due to sub-pixel A2No data control source still shows black, sub-pixel A1It is entered white appliances pressure, is displayed in white, therefore
Black sub-pixels A is presented in pixel unit2With white sub-pixels A1Comprehensive the first grayscale formed.
3, when grid line scans, the first driving line 1 and second drives line 2 to export cut-off signals, and the third driving output of line 3 is led
Messenger, then the D-TFT in the first control unit 11 cannot be connected, sub-pixel A1With sub-pixel A2Between be in isolation, the
D-TFT in one data cell 21 cannot be connected, and the data voltage of the first data line 1 cannot input, in the second data cell 22
D-TFT conductings, the data voltage (gray voltage, such as DC+2V~DC-2V) of the second data line 2 is input to sub-pixel A1.Due to
Sub-pixel A2No data control source still shows black, sub-pixel A1It is entered gray voltage, shows grey, therefore pixel unit
Black sub-pixels A is presented2With grey sub-pixels A1Comprehensive the second grayscale formed.
4, when grid line scans, third drives line 3 to export cut-off signals, and the first driving line 1 and second drives the output of line 2 to lead
Messenger, then the D-TFT conductings in the first control unit 11, sub-pixel A1With sub-pixel A2It connects, the second data cell
D-TFT in 22 cannot be connected, and the data voltage of the second data line 2 cannot input, and the D-TFT in the first data cell 21
The data voltage of conducting, the first data line 1 is input to sub-pixel A simultaneously1With sub-pixel A2.Due to sub-pixel A1With sub-pixel A2
White appliances pressure is inputted simultaneously, is displayed in white, therefore high gray is presented in pixel unit.
Existing pixel partitioning scheme realizes that 4 grayscale need 2 SRAM, usual SRAM to be made of CMOS circuits, each
SRAM includes two not circuits, and about 4 thin film transistor (TFT)s, i.e. pixel partitioning scheme realize that 4 grayscale need 8 films
Transistor.Existing more grayscale type of drive realize that 4 grayscale need 8 thin film transistor (TFT)s, as shown in Figure 2.In contrast, originally
4 grayscale can be realized only with 6 thin film transistor (TFT)s in embodiment, effectively reduce the quantity of thin film transistor (TFT), circuit structure
Succinctly and be conducive to be laid out, simplify dot structure, effectively increase pixel aperture ratio.
It should be noted that when data line input white appliances pressure, voltage value includes two parts of superposition, and a part is full
The voltage V charged normal enoughGH, another part is allowance (Margin) voltage, even if for leaking electricity in C_gm
(leakage), the voltage that can also maintain Vgh or more is not in flicker (Flicker) phenomenon.In general, margin voltage
Maintenance ability determines the limit of low frequency driving.
Second embodiment
Fig. 5 is the structural schematic diagram of present invention pixel unit second embodiment.The present embodiment pixel unit includes pixel electricity
The road sub-pixel A different with 3 areas1、A2、A3, the display of 12 grayscale may be implemented.As shown in figure 5, the present embodiment pixel
Circuit includes the control circuit 10 being connect with each sub-pixel and data circuit 20.Control circuit 10 includes 2 control units, i.e.,
First control unit 11 and the second control unit 12, data circuit 20 include 3 data cells, i.e. the first data cell 21, the
Two data cells 22 and third data cell 23.Wherein,
First control unit 11 includes the first driving line 1, input thin film transistor (TFT) D-TFT and scanning thin film transistor (TFT) G-
TFT.The grid of G-TFT connects grid line, source electrode connection the first driving line 1, and drain electrode connects the grid of D-TFT, leaks electricity simultaneously
Pole forms grid storage capacitance with public pressure wire.The drain electrode of the grid connection G-TFT of D-TFT, passes through G-TFT connections first
Drive line 1, source electrode connexon pixel A3, drain electrode connexon pixel A1。
Second control unit 12 includes the second driving line 2, input thin film transistor (TFT) D-TFT and scanning thin film transistor (TFT) G-
TFT.The grid of G-TFT connects grid line, source electrode connection the second driving line 2, and drain electrode connects the grid of D-TFT, leaks electricity simultaneously
Pole forms grid storage capacitance with public pressure wire.The drain electrode of the grid connection G-TFT of D-TFT, passes through G-TFT connections second
Drive line 2, source electrode connexon pixel A2, drain electrode connexon pixel A1。
First data cell 21 includes the first data line 1, third driving line 3, D-TFT and G-TFT.The grid of G-TFT connects
Grid line is connect, source electrode connects third and drives line 3, and drain electrode connects the grid of D-TFT, while drain electrode and common voltage are linear
At grid storage capacitance.The drain electrode of the grid connection G-TFT of D-TFT, drives line 3, source electrode to connect by G-TFT connection thirds
Connect the first data line 1, drain electrode connexon pixel A1。
Second data cell 22 includes the second data line 2,4 wheel driven moving-wire 4, D-TFT and G-TFT.The grid of G-TFT connects
Grid line is connect, source electrode connects 4 wheel driven moving-wire 4, and drain electrode connects the grid of D-TFT, while drain electrode and common voltage are linear
At grid storage capacitance.The drain electrode of the grid connection G-TFT of D-TFT, by G-TFT connection 4 wheel drivens moving-wire 4, source electrode connects
Connect the second data line 2, drain electrode connexon pixel A1。
Third data cell 23 includes that third data line the 3, the 5th drives line 5, D-TFT and G-TFT.The grid of G-TFT connects
Grid line is connect, the 5th driving line 5 of source electrode connection, drain electrode connects the grid of D-TFT, while drain electrode and common voltage are linear
At grid storage capacitance.The drain electrode of the grid connection G-TFT of D-TFT, drives line 5, source electrode to connect by G-TFT connections the 5th
Connect third data line 3, drain electrode connexon pixel A1。
Still with pixel unit for normally-black (Normally black) pattern, simple declaration the present embodiment realizes 12 grayscale
The driving process of display.
1, when grid line scans, the first driving line 1 and second drives line 2 to export cut-off signals, makes between three sub-pixels
In isolation.When third drives line 3,4 wheel driven moving-wire 4 and the 5th drives line 5 to export Continuity signal respectively, the first data
The different data voltage of line 1, the second data line 2 and third data line 3 is separately input to sub-pixel A1, then sub-pixel A1It can show
3 corresponding grayscale, grayscale show that area is SA1.At this point, sub-pixel A2With sub-pixel A3Still show black, black display face
Product is SA2+A3.3 grayscale show area SA1Respectively with black display area SA2+A3Comprehensive, pixel unit can be presented 3 not
Same grayscale.
2, when grid line scans, the first driving line 1 exports cut-off signals, and the second driving line 2 exports Continuity signal, makes sub- picture
Plain A1With sub-pixel A3Between be in isolation, but sub-pixel A1With sub-pixel A2Between connect.When third drives line the 3, the 4th
When driving line 4 and the 5th drives line 5 to export Continuity signal respectively, the first data line 1, the second data line 2 and third data line 3
Different data voltage be separately input to sub-pixel A1With sub-pixel A2, then sub-pixel A1With sub-pixel A2It can show 3 accordingly
Grayscale, grayscale show area be SA1+A2.At this point, sub-pixel A3Still show that black, black display area are SA3.3 grayscale
Show area SA1+A2Respectively with black display area SA3Comprehensive, 3 different grayscale can be presented in pixel unit.
3, when grid line scans, the first driving line 1 exports Continuity signal, and the second driving line 2 exports cut-off signals, makes sub- picture
Plain A1With sub-pixel A2Between be in isolation, but sub-pixel A1With sub-pixel A3Between connect.When third drives line the 3, the 4th
When driving line 4 and the 5th drives line 5 to export Continuity signal respectively, the first data line 1, the second data line 2 and third data line 3
Different data voltage be separately input to sub-pixel A1With sub-pixel A3, then sub-pixel A1With sub-pixel A3It can show 3 accordingly
Grayscale, grayscale show area be SA1+A3.At this point, sub-pixel A2Still show that black, black display area are SA2.3 grayscale
Show area SA1+A3Respectively with black display area SA2Comprehensive, 3 different grayscale can be presented in pixel unit.
4, when grid line scans, the first driving line 1 and second drives line 2 to export Continuity signal, makes sub-pixel A1, sub- picture
Plain A2With sub-pixel A3Between connect.When third drives line 3,4 wheel driven moving-wire 4 and the 5th that line 5 is driven to export Continuity signal respectively
When, the different data voltage of the first data line 1, the second data line 2 and third data line 3 is separately input to sub-pixel A1, sub- picture
Plain A2With sub-pixel A3, then sub-pixel A1, sub-pixel A2With sub-pixel A3It can show that 3 corresponding grayscale, grayscale show that area is
SA1+A2+A3.At this point, showing that 3 different grayscale can be presented in black, pixel unit without sub-pixel.
In the present embodiment, if setting sub-pixel A1、A2、A3Area ratio be 1:2:If 4, the present embodiment can control
Display area have 4, be respectively:
SA1, sub-pixel A1;
SA1+A2, sub-pixel A1+ sub-pixel A2;
SA1+A3, sub-pixel A1+ sub-pixel A3;
SA1+A2+A3, sub-pixel A1+ sub-pixel A2+ sub-pixel A3;
Assuming that SA1=S, then 4 show that Line Integrals are not:S, 3S, 5S, 7S.
In each display area, 3 data lines can export 3 different data voltages, then 4* may be implemented
3=12 grayscale.
So far, the present embodiment can realize 12 grayscale using 10 thin film transistor (TFT)s, and the technical solution of the present embodiment is by picture
Element segmentation and the driving of more grayscale organically integrate, and combine more grayscale to drive on the basis of pixel is divided, can utilize
Less thin film transistor (TFT) realizes more grayscale.Compared with existing pixel partitioning scheme or more grayscale type of drive, this implementation
The technical solution of example effectively reduces the quantity of thin film transistor (TFT), and circuit structure is succinct and is conducive to be laid out, and simplifies pixel knot
Structure effectively increases pixel aperture ratio.
3rd embodiment
Fig. 6 is the structural schematic diagram of present invention pixel unit 3rd embodiment.The present embodiment pixel unit includes pixel electricity
The road sub-pixel A different with 4 areas1、A2、A3、A4, the display of 32 grayscale may be implemented.As shown in fig. 6, the present embodiment
Pixel circuit includes the control circuit 10 being connect with each sub-pixel and data circuit 20.Control circuit 10 includes that 3 controls are single
Member, i.e. the first control unit 11, the second control unit 12 and third control unit 13, data circuit 20 include 4 data sheets
Member, i.e. the first data cell 21, the second data cell 22, third data cell 23 and the 4th data cell 24.Wherein,
First control unit 11 includes the first driving line 1, input thin film transistor (TFT) D-TFT and scanning thin film transistor (TFT) G-
TFT.The grid of G-TFT connects grid line, source electrode connection the first driving line 1, and drain electrode connects the grid of D-TFT, leaks electricity simultaneously
Pole forms grid storage capacitance with public pressure wire.The drain electrode of the grid connection G-TFT of D-TFT, passes through G-TFT connections first
Drive line 1, source electrode connexon pixel A4, drain electrode connexon pixel A1。
Second control unit 12 includes the second driving line 2, input thin film transistor (TFT) D-TFT and scanning thin film transistor (TFT) G-
TFT.The grid of G-TFT connects grid line, source electrode connection the second driving line 2, and drain electrode connects the grid of D-TFT, leaks electricity simultaneously
Pole forms grid storage capacitance with public pressure wire.The drain electrode of the grid connection G-TFT of D-TFT, passes through G-TFT connections second
Drive line 2, source electrode connexon pixel A3, drain electrode connexon pixel A1。
Third control unit 13 includes third driving line 3, input thin film transistor (TFT) D-TFT and scanning thin film transistor (TFT) G-
TFT.The grid of G-TFT connects grid line, and source electrode connects third and line 3, drain electrode is driven to connect the grid of D-TFT, leak electricity simultaneously
Pole forms grid storage capacitance with public pressure wire.The drain electrode of the grid connection G-TFT of D-TFT, third is connected by G-TFT
Drive line 3, source electrode connexon pixel A2, drain electrode connexon pixel A1。
First data cell 21 includes the first data line 1,4 wheel driven moving-wire 4, D-TFT and G-TFT.The grid of G-TFT connects
Grid line is connect, source electrode connects 4 wheel driven moving-wire 4, and drain electrode connects the grid of D-TFT, while drain electrode and common voltage are linear
At grid storage capacitance.The drain electrode of the grid connection G-TFT of D-TFT, by G-TFT connection 4 wheel drivens moving-wire 4, source electrode connects
Connect the first data line 1, drain electrode connexon pixel A1。
Second data cell 22 includes the second data line the 2, the 5th driving line 5, D-TFT and G-TFT.The grid of G-TFT connects
Grid line is connect, the 5th driving line 5 of source electrode connection, drain electrode connects the grid of D-TFT, while drain electrode and common voltage are linear
At grid storage capacitance.The drain electrode of the grid connection G-TFT of D-TFT, drives line 5, source electrode to connect by G-TFT connections the 5th
Connect the second data line 2, drain electrode connexon pixel A1。
Third data cell 23 includes that third data line the 3, the 6th drives line 6, D-TFT and G-TFT.The grid of G-TFT connects
Grid line is connect, the 6th driving line 6 of source electrode connection, drain electrode connects the grid of D-TFT, while drain electrode and common voltage are linear
At grid storage capacitance.The drain electrode of the grid connection G-TFT of D-TFT, drives line 6, source electrode to connect by G-TFT connections the 6th
Connect third data line 3, drain electrode connexon pixel A1。
4th data cell 24 includes the 4th data line the 4, the 7th driving line 7, D-TFT and G-TFT.The grid of G-TFT connects
Grid line is connect, the 7th driving line 7 of source electrode connection, drain electrode connects the grid of D-TFT, while drain electrode and common voltage are linear
At grid storage capacitance.The drain electrode of the grid connection G-TFT of D-TFT, drives line 7, source electrode to connect by G-TFT connections the 7th
Connect the 4th data line 4, drain electrode connexon pixel A1。
In the present embodiment, if setting sub-pixel A1、A2、A3、A4Area ratio be 1:2:4:If 8, the present embodiment can
There are 8 with the display area of control, is respectively:
SA1, sub-pixel A1;
SA1+A2, sub-pixel A1+ sub-pixel A2;
SA1+A3, sub-pixel A1+ sub-pixel A3;
SA1+A4, sub-pixel A1+ sub-pixel A4;
SA1+A2+A3, sub-pixel A1+ sub-pixel A2+ sub-pixel A3;
SA1+A2+A4, sub-pixel A1+ sub-pixel A2+ sub-pixel A4;
SA1+A3+A4, sub-pixel A1+ sub-pixel A3+ sub-pixel A4;
SA1+A2+A3+A4, sub-pixel A1+ sub-pixel A2+ sub-pixel A3+ sub-pixel A4;
Assuming that SA1=S, then 8 show that Line Integrals are not:
S, 3S, 5S, 7S, 9S, 11S, 13S, 15S.
In each display area, 4 data lines can export 4 different data voltages, then 8* may be implemented
4=32 grayscale.
Related the present embodiment realizes the driving process that 32 grayscale are shown, the driving process phase with aforementioned second embodiment
Together, which is not described herein again.
The present embodiment uses 14 thin film transistor (TFT)s and 7 capacitances, you can realize 32 grayscale, and existing more grayscale are driven
It is 4.5 times of the present embodiment that flowing mode, which then needs 64 thin film transistor (TFT)s, thin film transistor (TFT) quantity,.It can be seen that the present embodiment
Pixel segmentation and more grayscale are driven into the scheme organically integrated, the quantity of thin film transistor (TFT) is drastically reduced, has
Effect simplifies dot structure, improves pixel aperture ratio to the maximum extent.
Fourth embodiment
Fig. 7 is the structural schematic diagram of present invention pixel unit fourth embodiment.The present embodiment pixel unit includes pixel electricity
The road sub-pixel A different with 4 areas1、A2、A3、A4, the display of 60 grayscale may be implemented.As shown in fig. 7, the present embodiment
Pixel circuit includes the control circuit 10 being connect with each sub-pixel and data circuit 20.Control circuit 10 includes that 4 controls are single
Member, i.e. the first control unit 11, the second control unit 12, third control unit 13 and the 4th control unit 13, data circuit 20
Including 4 data cells, i.e. the first data cell 21, the second data cell 22, third data cell 23 and the 4th data sheet
Member 24.Wherein,
First control unit 11 includes the first driving line 1, input thin film transistor (TFT) D-TFT and scanning thin film transistor (TFT) G-
TFT.The grid of G-TFT connects grid line, source electrode connection the first driving line 1, and drain electrode connects the grid of D-TFT, leaks electricity simultaneously
Pole forms grid storage capacitance with public pressure wire.The drain electrode of the grid connection G-TFT of D-TFT, passes through G-TFT connections first
Drive line 1, source electrode connexon pixel A4, drain electrode connects the second control unit 12, third control unit the 13, the 4th controls
D-TFT in unit 13, the first data cell 21, the second data cell 22, third data cell 23 and the 4th data cell 24
Drain electrode.
Second control unit 12 includes the second driving line 2, input thin film transistor (TFT) D-TFT and scanning thin film transistor (TFT) G-
TFT.The grid of G-TFT connects grid line, source electrode connection the second driving line 2, and drain electrode connects the grid of D-TFT, leaks electricity simultaneously
Pole forms grid storage capacitance with public pressure wire.The drain electrode of the grid connection G-TFT of D-TFT, passes through G-TFT connections second
Drive line 2, source electrode connexon pixel A3, drain electrode connect the first control unit 11 in D-TFT drain electrode.
Third control unit 13 includes third driving line 3, input thin film transistor (TFT) D-TFT and scanning thin film transistor (TFT) G-
TFT.The grid of G-TFT connects grid line, and source electrode connects third and line 3, drain electrode is driven to connect the grid of D-TFT, leak electricity simultaneously
Pole forms grid storage capacitance with public pressure wire.The drain electrode of the grid connection G-TFT of D-TFT, third is connected by G-TFT
Drive line 3, source electrode connexon pixel A2, drain electrode connect the first control unit 11 in D-TFT drain electrode.
4th control unit 14 includes 4 wheel driven moving-wire 4, input thin film transistor (TFT) D-TFT and scanning thin film transistor (TFT) G-
TFT.The grid of G-TFT connects grid line, and source electrode connects 4 wheel driven moving-wire 4, and drain electrode connects the grid of D-TFT, leaks electricity simultaneously
Pole forms grid storage capacitance with public pressure wire.The drain electrode of the grid connection G-TFT of D-TFT, passes through G-TFT connections the 4th
Drive line 4, source electrode connexon pixel A1, drain electrode connect the first control unit 11 in D-TFT drain electrode.
First data cell 21 includes the first data line the 1, the 5th driving line 5, D-TFT and G-TFT.The grid of G-TFT connects
Grid line is connect, the 5th driving line 5 of source electrode connection, drain electrode connects the grid of D-TFT, while drain electrode and common voltage are linear
At grid storage capacitance.The drain electrode of the grid connection G-TFT of D-TFT, drives line 5, source electrode to connect by G-TFT connections the 5th
The first data line 1 is connect, drain electrode connects the drain electrode of D-TFT in the first control unit 11.
Second data cell 22 includes the second data line the 2, the 6th driving line 6, D-TFT and G-TFT.The grid of G-TFT connects
Grid line is connect, the 6th driving line 6 of source electrode connection, drain electrode connects the grid of D-TFT, while drain electrode and common voltage are linear
At grid storage capacitance.The drain electrode of the grid connection G-TFT of D-TFT, drives line 6, source electrode to connect by G-TFT connections the 6th
The second data line 2 is connect, drain electrode connects the drain electrode of D-TFT in the first control unit 11.
Third data cell 23 includes that third data line the 3, the 7th drives line 7, D-TFT and G-TFT.The grid of G-TFT connects
Grid line is connect, the 7th driving line 7 of source electrode connection, drain electrode connects the grid of D-TFT, while drain electrode and common voltage are linear
At grid storage capacitance.The drain electrode of the grid connection G-TFT of D-TFT, drives line 7, source electrode to connect by G-TFT connections the 7th
Third data line 3 is connect, drain electrode connects the drain electrode of D-TFT in the first control unit 11.
4th data cell 24 includes the 4th data line the 4, the 8th driving line 8, D-TFT and G-TFT.The grid of G-TFT connects
Grid line is connect, the 8th driving line 8 of source electrode connection, drain electrode connects the grid of D-TFT, while drain electrode and common voltage are linear
At grid storage capacitance.The drain electrode of the grid connection G-TFT of D-TFT, drives line 8, source electrode to connect by G-TFT connections the 8th
The 4th data line 4 is connect, drain electrode connects the drain electrode of D-TFT in the first control unit 11.
In the present embodiment, if setting sub-pixel A1、A2、A3、A4Area ratio be 1:2:4:If 8, the present embodiment can
There are 15 with the display area of control, is respectively:
SA1, sub-pixel A1;
SA2, sub-pixel A2;
SA3, sub-pixel A3;
SA4, sub-pixel A4;
SA1+A2, sub-pixel A1+ sub-pixel A2;
SA1+A3, sub-pixel A1+ sub-pixel A3;
SA1+A4, sub-pixel A1+ sub-pixel A4;
SA2+A3, sub-pixel A2+ sub-pixel A3;
SA2+A4, sub-pixel A2+ sub-pixel A4;
SA3+A4, sub-pixel A3+ sub-pixel A4;
SA1+A2+A3, sub-pixel A1+ sub-pixel A2+ sub-pixel A3;
SA1+A2+A4, sub-pixel A1+ sub-pixel A2+ sub-pixel A4;
SA1+A3+A4, sub-pixel A1+ sub-pixel A3+ sub-pixel A4;
SA2+A3+A4, sub-pixel A2+ sub-pixel A3+ sub-pixel A4;
SA1+A2+A3+A4, sub-pixel A1+ sub-pixel A2+ sub-pixel A3+ sub-pixel A4;
Assuming that SA1=S, then 15 show that Line Integrals are not:
S, 2S, 3S, 4S, 5S, 6S, 7S, 8S, 9S, 10S, 11S, 12S, 13S, 14S, 15S.
In each display area, 4 data lines can export 4 different data voltages, then may be implemented
15*4=60 grayscale.
Related the present embodiment realizes the driving process that 60 grayscale are shown, identical as the principle of previous embodiment, here not
It repeats again.
The present embodiment uses 16 thin film transistor (TFT)s and 8 capacitances, you can realizes 60 grayscale, existing more grayscale drivings
It is 7.5 times of the present embodiment that mode, which then needs 120 thin film transistor (TFT)s, thin film transistor (TFT) quantity,.Although existing pixel segmentation side
For formula in order to realize 60 grayscale, it is this theoretically to need 6 SRAM, about 24 thin film transistor (TFT)s, thin film transistor (TFT) quantity altogether
1.5 times of embodiment, but since pixel partitioning scheme needs a pixel being divided into 6 sub-pixels, the face of each sub-pixel
Product is not enough to setting SRAM, therefore it is practically impossible to realize 60 grayscale for existing pixel partitioning scheme.It can be seen that existing pair
In the prior art, the present embodiment has apparent advantage, drastically reduces the quantity of thin film transistor (TFT), be effectively simplified picture
Plain structure, improves pixel aperture ratio to the maximum extent.
5th embodiment
Technical concept based on previous embodiment, the present embodiment additionally provide a kind of driving method of pixel unit, pixel
Unit includes pixel circuit and N number of sub-pixel, and pixel circuit includes control circuit and data circuit, control circuit, data circuit
It is the positive integer more than or equal to 2 that the structure type of previous embodiment, N are used with the structure of sub-pixel.The present embodiment pixel unit
Driving method include:
S1, control circuit control the connection of X sub-pixel in N number of sub-pixel;Wherein, X is more than or equal to 2, is less than or equal to
The positive integer of N
S2, data circuit are to the X sub- pixel data output voltages.
Wherein, N number of sub-pixel includes sub-pixel A1、……、AN, the area of each sub-pixel is different, each sub-pixel
Area ratio is:1:2:……:2N-1。
Wherein, control circuit include at least N-1 control unit, each control unit include one drive line, one it is defeated
Enter thin film transistor (TFT) and a scanning thin film transistor (TFT), the grid of the input thin film transistor (TFT) passes through scanning film crystalline substance
Body pipe connects the driving line, and the first pole and the second pole of the input thin film transistor (TFT) are separately connected two sub-pixels.Specifically
Ground, the grid connection grid line of G-TFT, the first pole connection driving line, the second pole connect the grid of D-TFT, while the second pole and public affairs
Common voltage line forms grid storage capacitance.D-TFT grid connection G-TFT the second pole, by G-TFT connections driving line, first
Pole connects a sub-pixel, and the second pole connects another sub-pixel.
Step S1 includes:
When S11, grid line scanning, the driving line of i-th of control unit exports cut-off signals, the input of i-th of control unit
Thin film transistor (TFT) turns off, and 2 sub-pixels that the input thin film transistor (TFT) connects is made to be in isolation;
When S12, grid line scanning, the driving line of i-th of control unit exports Continuity signal, the input of i-th of control unit
Thin film transistor (TFT) is connected, and 2 sub-pixels that the input thin film transistor (TFT) connects is made to be in connection status.
Wherein, i=1 ... ..., N-1.
Wherein, data circuit includes at least N number of data cell, and each data cell includes a data line, a driving
The grid of line, an input thin film transistor (TFT) and a scanning thin film transistor (TFT), the input thin film transistor (TFT) is swept by described
It retouches thin film transistor (TFT) and connects the driving line, the first pole of the input thin film transistor (TFT) connects the data line, and the second pole connects
Connect a sub-pixel.Specifically, the grid of G-TFT connects grid line, and the first pole connection driving line, the second pole connects the grid of D-TFT
Pole, while the second pole forms grid storage capacitance with public pressure wire.The second pole of the grid connection G-TFT of D-TFT, passes through G-
TFT connections drive line, the first pole to connect data line, and the second pole connects a sub-pixel.
Step S2 includes:
When S21, grid line scanning, the driving line of j-th of data cell exports cut-off signals, the input of j-th of control unit
Thin film transistor (TFT) turns off, and the data voltage of data line cannot be input to the sub-pixel of the input thin film transistor (TFT) connection;
When S22, grid line scanning, the driving line of j-th of data cell exports Continuity signal, the input of j-th of control unit
Thin film transistor (TFT) is connected, and the data voltage of data line is input to the sub-pixel of the input thin film transistor (TFT) connection.
Wherein, j=1 ... ..., N.
The specific driving process of the driving method of the present embodiment pixel unit, reference can be made to the explanation of previous embodiment, arranges
It is not repeating.
Sixth embodiment
The embodiment of the present invention additionally provides a kind of display panel, and display panel includes any one pixel of previous embodiment
Unit.Display panel can be:Mobile phone, tablet computer, television set, display, laptop, Digital Frame, navigator etc.
Any product or component with display function.
The driving circuit knot of existing more grayscale type of drive may be used in the driving circuit of display panel of the embodiment of the present invention
Configuration formula, setting realize the I/C of grid line scanning function, realize the I/C of driving line conducting turn-off function and realize common voltage work(
The I/C of energy is not required to setting source driving I/C.When actual implementation, the electricity for the I/C for realizing driving line conducting turn-off function can be set
Range is pressed to be less than the voltage range for the I/C for realizing grid line scanning function, it is 1Hz~4Hz that drive cycle, which can be arranged,.
In the description of the embodiment of the present invention, it is to be understood that term " middle part ", "upper", "lower", "front", "rear",
The orientation or positional relationship of the instructions such as "vertical", "horizontal", "top", "bottom" "inner", "outside" be orientation based on ... shown in the drawings or
Position relationship is merely for convenience of description of the present invention and simplification of the description, and does not indicate or imply the indicated device or element must
There must be specific orientation, with specific azimuth configuration and operation, therefore be not considered as limiting the invention.
In the description of the embodiment of the present invention, it should be noted that unless otherwise clearly defined and limited, term " peace
Dress ", " connected ", " connection " shall be understood in a broad sense, for example, it may be being fixedly connected, may be a detachable connection, or one
Ground connects;It can be mechanical connection, can also be electrical connection;It can be directly connected, the indirect phase of intermediary can also be passed through
Even, can be the connection inside two elements.For the ordinary skill in the art, on being understood with concrete condition
State the concrete meaning of term in the present invention.
Although disclosed herein embodiment it is as above, the content only for ease of understanding the present invention and use
Embodiment, be not limited to the present invention.Technical staff in any fields of the present invention, is not departing from the present invention
Under the premise of disclosed spirit and scope, any modification and variation, but this can be carried out in the form and details of implementation
The scope of patent protection of invention, still should be subject to the scope of the claims as defined in the appended claims.
Claims (15)
1. a kind of pixel unit, which is characterized in that including N number of sub-pixel, N is the positive integer more than or equal to 2, and
Control circuit, for controlling in N number of sub-pixel X sub-pixel connection, X be more than or equal to 2, less than or equal to N just
Integer;
Data circuit is used for the X sub- pixel data output voltages.
2. pixel unit according to claim 1, which is characterized in that the area of N number of sub-pixel is different.
3. pixel unit according to claim 2, which is characterized in that the area ratio of N number of sub-pixel is:1:
2:……:2N-1。
4. according to any pixel unit of claims 1 to 3, which is characterized in that the control circuit includes at least N-1
Control unit, each control unit include a driving line, an input thin film transistor (TFT) and a scanning thin film transistor (TFT), institute
The grid for stating input thin film transistor (TFT) connects the driving line, the input thin film transistor (TFT) by the scanning thin film transistor (TFT)
The first pole and the second pole be separately connected two sub-pixels.
5. pixel unit according to claim 4, which is characterized in that the grid of the scanning thin film transistor (TFT) connects grid
Line, the first pole connection driving line, the grid of the second pole connection input thin film transistor (TFT), while the second pole is formed with public pressure wire
Grid storage capacitance;Second pole of the grid connection scanning thin film transistor (TFT) of the input thin film transistor (TFT), the first pole connects one
Sub-pixel, the second pole connect another sub-pixel.
6. according to any pixel unit of claims 1 to 3, which is characterized in that the data circuit includes at least N number of number
According to unit, each data cell includes a data line, a driving line, an input thin film transistor (TFT) and a scanning film
The grid of transistor, the input thin film transistor (TFT) connects the driving line, the input by the scanning thin film transistor (TFT)
First pole of thin film transistor (TFT) connects the data line, and the second pole connects a sub-pixel.
7. pixel unit according to claim 6, which is characterized in that the grid of the scanning thin film transistor (TFT) connects grid
Line, the first pole connection driving line, the grid of the second pole connection input thin film transistor (TFT), while the second pole is formed with public pressure wire
Grid storage capacitance;Second pole of the grid connection scanning thin film transistor (TFT) of the input thin film transistor (TFT), the first pole connects data
Line, the second pole connect a sub-pixel.
8. according to any pixel unit of claims 1 to 3, which is characterized in that the pixel unit includes the first~the
Four sub-pixels, the control circuit include first~third control unit, and the data circuit includes the first~the 4th data sheet
Member;Wherein,
First control unit includes the first driving line, input thin film transistor (TFT) and scanning thin film transistor (TFT);Scan thin film transistor (TFT)
Grid connect grid line, the first pole connection first driving line, the second pole connection input thin film transistor (TFT) grid;It is brilliant to input film
First pole of body pipe connects the 4th sub-pixel, and the second pole connects the first sub-pixel;
Second control unit includes the second driving line, input thin film transistor (TFT) and scanning thin film transistor (TFT);Scan thin film transistor (TFT)
Grid connect grid line, the first pole connection second driving line, the second pole connection input thin film transistor (TFT) grid;It is brilliant to input film
First pole of body pipe connects third sub-pixel, and the second pole connects the first sub-pixel;
Third control unit includes third driving line, input thin film transistor (TFT) and scanning thin film transistor (TFT);Scan thin film transistor (TFT)
Grid connect grid line, the first pole connect third drive line, the second pole connection input thin film transistor (TFT) grid;It is brilliant to input film
First pole of body pipe connects the second sub-pixel, and the second pole connects the first sub-pixel;
First data cell includes the first data line, 4 wheel driven moving-wire, input thin film transistor (TFT) and scanning thin film transistor (TFT);Scanning
The grid of thin film transistor (TFT) connects grid line, and the first pole connects 4 wheel driven moving-wire, the grid of the second pole connection input thin film transistor (TFT);
The first pole for inputting thin film transistor (TFT) connects the first data line, and the second pole connects the first sub-pixel;
Second data cell includes the second data line, the 5th driving line, input thin film transistor (TFT) and scanning thin film transistor (TFT);Scanning
The grid of thin film transistor (TFT) connects grid line, the 5th driving line of the first pole connection, the grid of the second pole connection input thin film transistor (TFT);
The first pole for inputting thin film transistor (TFT) connects the second data line, and the second pole connects the first sub-pixel;
Third data cell includes third data line, the 6th driving line, input thin film transistor (TFT) and scanning thin film transistor (TFT);Scanning
The grid of thin film transistor (TFT) connects grid line, the 6th driving line of the first pole connection, the grid of the second pole connection input thin film transistor (TFT);
The first pole for inputting thin film transistor (TFT) connects third data line, and the second pole connects the first sub-pixel;
4th data cell includes the 4th data line, the 7th driving line, input thin film transistor (TFT) and scanning thin film transistor (TFT);Scanning
The grid of thin film transistor (TFT) connects grid line, the 7th driving line of the first pole connection, the grid of the second pole connection input thin film transistor (TFT);
The first pole for inputting thin film transistor (TFT) connects the 4th data line, and the second pole connects the first sub-pixel.
9. according to any pixel unit of claims 1 to 3, which is characterized in that the pixel unit includes the first~the
Four sub-pixels, the control circuit include the first~the 4th control unit, and the data circuit includes the first~the 4th data sheet
Member;Wherein,
First control unit includes the first driving line, input thin film transistor (TFT) and scanning thin film transistor (TFT);Scan thin film transistor (TFT)
Grid connect grid line, the first pole connection first driving line, the second pole connection input thin film transistor (TFT) grid;It is brilliant to input film
First pole of body pipe connects the 4th sub-pixel, and the second pole, which connects, inputs thin film transistor (TFT) in other control units and data cell
Second pole;
Second control unit includes the second driving line, input thin film transistor (TFT) and scanning thin film transistor (TFT);Scan thin film transistor (TFT)
Grid connect grid line, the first pole connection second driving line, the second pole connection input thin film transistor (TFT) grid;It is brilliant to input film
First pole of body pipe connects third sub-pixel, and the second pole connects the second pole that thin film transistor (TFT) is inputted in the first control unit;
Third control unit includes third driving line, input thin film transistor (TFT) and scanning thin film transistor (TFT);Scan thin film transistor (TFT)
Grid connect grid line, the first pole connect third drive line, the second pole connection input thin film transistor (TFT) grid;It is brilliant to input film
First pole of body pipe connects the second sub-pixel, and the second pole connects the second pole that thin film transistor (TFT) is inputted in the first control unit;
4th control unit includes 4 wheel driven moving-wire, input thin film transistor (TFT) and scanning thin film transistor (TFT);Scan thin film transistor (TFT)
Grid connect grid line, the first pole connect 4 wheel driven moving-wire, the second pole connection input thin film transistor (TFT) grid;It is brilliant to input film
First pole of body pipe connects the first sub-pixel, and the second pole connects the second pole that thin film transistor (TFT) is inputted in the first control unit;
First data cell includes the first data line, the 5th driving line, input thin film transistor (TFT) and scanning thin film transistor (TFT);Scanning
The grid of thin film transistor (TFT) connects grid line, the 5th driving line of the first pole connection, the grid of the second pole connection input thin film transistor (TFT);
The first pole for inputting thin film transistor (TFT) connects the first data line, and the second pole connects input thin film transistor (TFT) in the first control unit
Second pole;
Second data cell includes the second data line, the 6th driving line, input thin film transistor (TFT) and scanning thin film transistor (TFT);Scanning
The grid of thin film transistor (TFT) connects grid line, the 6th driving line of the first pole connection, the grid of the second pole connection input thin film transistor (TFT);
The first pole for inputting thin film transistor (TFT) connects the second data line, and the second pole connects input thin film transistor (TFT) in the first control unit
Second pole;
Third data cell includes third data line, the 7th driving line, input thin film transistor (TFT) and scanning thin film transistor (TFT);Scanning
The grid of thin film transistor (TFT) connects grid line, the 7th driving line of the first pole connection, the grid of the second pole connection input thin film transistor (TFT);
The first pole for inputting thin film transistor (TFT) connects third data line, and the second pole connects input thin film transistor (TFT) in the first control unit
Second pole;
4th data cell includes the 4th data line, the 8th driving line, input thin film transistor (TFT) and scanning thin film transistor (TFT);Scanning
The grid of thin film transistor (TFT) connects grid line, the 8th driving line of the first pole connection, the grid of the second pole connection input thin film transistor (TFT);
The first pole for inputting thin film transistor (TFT) connects the 4th data line, and the second pole connects input thin film transistor (TFT) in the first control unit
Second pole.
10. a kind of display panel, which is characterized in that include the pixel unit as described in claim 1~9 is any.
11. a kind of driving method of pixel unit, which is characterized in that pixel unit includes control circuit, data circuit and N number of
Sub-pixel, N are the positive integer more than or equal to 2;The driving method includes:
The control circuit control X sub-pixel in N number of sub-pixel connection, X be more than or equal to 2, less than or equal to N just
Integer;
The data circuit is to the X sub- pixel data output voltages.
12. driving method according to claim 11, which is characterized in that the area of N number of sub-pixel is different.
13. driving method according to claim 11, which is characterized in that the area ratio of N number of sub-pixel is:1:
2:……:2N-1。
14. according to any driving method of claim 11~13, which is characterized in that the control circuit includes at least N-
1 control unit, each control unit include a driving line, an input thin film transistor (TFT) and a scanning film crystal
The grid of pipe, the input thin film transistor (TFT) connects the driving line, the input film by the scanning thin film transistor (TFT)
The first pole and the second pole of transistor are separately connected two sub-pixels;The control circuit controls the X in N number of sub-pixel
Sub-pixel connects, including:
When grid line scans, the driving line of i-th of control unit exports cut-off signals, the input film crystal of i-th of control unit
Pipe turns off, and two sub-pixels that the input thin film transistor (TFT) connects is made to be in isolation;
When grid line scans, the driving line of i-th of control unit exports Continuity signal, the input film crystal of i-th of control unit
Pipe is connected, and two sub-pixels that the input thin film transistor (TFT) connects is made to be in connection status;
Wherein, i=1 ... ..., N-1.
15. according to any driving method of claim 11~13, which is characterized in that the data circuit includes at least N
A data cell, each data cell include a data line, a driving line, an input thin film transistor (TFT) and a scanning
The grid of thin film transistor (TFT), the input thin film transistor (TFT) connects the driving line by the scanning thin film transistor (TFT), described
The first pole for inputting thin film transistor (TFT) connects the data line, and the second pole connects a sub-pixel;The data circuit is to the X
A sub- pixel data output voltage, including:
When grid line scans, the driving line of j-th of data cell exports cut-off signals, the input film crystal of j-th of control unit
Pipe turns off, and the data voltage of data line cannot be input to the sub-pixel of the input thin film transistor (TFT) connection;
When grid line scans, the driving line of j-th of data cell exports Continuity signal, the input film crystal of j-th of control unit
Pipe is connected, and the data voltage of data line is input to the sub-pixel of the input thin film transistor (TFT) connection;
Wherein, j=1 ... ..., N.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810716842.5A CN108806629B (en) | 2018-07-03 | 2018-07-03 | Pixel unit, driving method thereof and display panel |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810716842.5A CN108806629B (en) | 2018-07-03 | 2018-07-03 | Pixel unit, driving method thereof and display panel |
Publications (2)
Publication Number | Publication Date |
---|---|
CN108806629A true CN108806629A (en) | 2018-11-13 |
CN108806629B CN108806629B (en) | 2020-12-01 |
Family
ID=64074182
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201810716842.5A Active CN108806629B (en) | 2018-07-03 | 2018-07-03 | Pixel unit, driving method thereof and display panel |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN108806629B (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110033729A (en) * | 2019-05-17 | 2019-07-19 | 京东方科技集团股份有限公司 | Pixel circuit, display panel and driving method, display device |
CN114220403A (en) * | 2021-11-15 | 2022-03-22 | 重庆惠科金渝光电科技有限公司 | Display panel driving circuit, control method thereof and display device |
WO2023066155A1 (en) * | 2021-10-18 | 2023-04-27 | 华为技术有限公司 | Display device and driving method therefor, and electronic paper |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050280621A1 (en) * | 2001-04-27 | 2005-12-22 | Sanyo Electric Co., Ltd. | Active matrix display device |
CN101435966A (en) * | 2007-11-15 | 2009-05-20 | 统宝光电股份有限公司 | Active matrix display devices |
CN101727814A (en) * | 2008-10-31 | 2010-06-09 | 统宝光电股份有限公司 | Active matrix display devices and display methods thereof |
CN103177669A (en) * | 2011-12-23 | 2013-06-26 | 元太科技工业股份有限公司 | Display device and display method capable of displaying multiple gray scales |
KR20130121388A (en) * | 2012-04-27 | 2013-11-06 | 엘지디스플레이 주식회사 | Liquid crystal display device |
CN104361870A (en) * | 2014-11-05 | 2015-02-18 | 深圳市华星光电技术有限公司 | Liquid crystal display panel and method for setting pixel units of liquid crystal display panel |
CN107589610A (en) * | 2017-09-29 | 2018-01-16 | 上海天马微电子有限公司 | Liquid crystal display panel and display device |
-
2018
- 2018-07-03 CN CN201810716842.5A patent/CN108806629B/en active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050280621A1 (en) * | 2001-04-27 | 2005-12-22 | Sanyo Electric Co., Ltd. | Active matrix display device |
CN101435966A (en) * | 2007-11-15 | 2009-05-20 | 统宝光电股份有限公司 | Active matrix display devices |
CN101727814A (en) * | 2008-10-31 | 2010-06-09 | 统宝光电股份有限公司 | Active matrix display devices and display methods thereof |
CN103177669A (en) * | 2011-12-23 | 2013-06-26 | 元太科技工业股份有限公司 | Display device and display method capable of displaying multiple gray scales |
KR20130121388A (en) * | 2012-04-27 | 2013-11-06 | 엘지디스플레이 주식회사 | Liquid crystal display device |
CN104361870A (en) * | 2014-11-05 | 2015-02-18 | 深圳市华星光电技术有限公司 | Liquid crystal display panel and method for setting pixel units of liquid crystal display panel |
CN107589610A (en) * | 2017-09-29 | 2018-01-16 | 上海天马微电子有限公司 | Liquid crystal display panel and display device |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110033729A (en) * | 2019-05-17 | 2019-07-19 | 京东方科技集团股份有限公司 | Pixel circuit, display panel and driving method, display device |
WO2023066155A1 (en) * | 2021-10-18 | 2023-04-27 | 华为技术有限公司 | Display device and driving method therefor, and electronic paper |
CN114220403A (en) * | 2021-11-15 | 2022-03-22 | 重庆惠科金渝光电科技有限公司 | Display panel driving circuit, control method thereof and display device |
CN114220403B (en) * | 2021-11-15 | 2022-10-21 | 重庆惠科金渝光电科技有限公司 | Display panel driving circuit, control method thereof and display device |
Also Published As
Publication number | Publication date |
---|---|
CN108806629B (en) | 2020-12-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101231434B (en) | Array panel and drive method thereof | |
TW558707B (en) | Display apparatus and driving method of same | |
CN102566177B (en) | Display panel, pixel unit in display panel and driving method in display panel | |
CN102023434B (en) | Array substrate and driving method thereof | |
CN104882107B (en) | Gate driving circuit | |
CN106023928B (en) | Source drive module and liquid crystal display device | |
CN106601204B (en) | Array substrate and its driving method, display device | |
CN106531096A (en) | Driving method of RGBW four-primary-color display panel | |
CN104882106B (en) | The liquid crystal display panel and its driving method of row inverted pattern | |
CN107301853A (en) | The driving method of display panel, the drive device of display panel and display device | |
CN107742504A (en) | The driving method of drive device and display panel | |
CN107255894A (en) | Array base palte and liquid crystal display panel | |
CN104090438A (en) | Array substrate, display device and driving method of display device | |
CN109637482A (en) | Pixel-driving circuit | |
CN105467704A (en) | Display panel, display device and drive method | |
CN108873530B (en) | Array substrate, display panel and display device | |
CN104503179B (en) | Display and its driving method, display device | |
CN106652932A (en) | Liquid crystal display and driving method thereof | |
CN108806629A (en) | Pixel unit and its driving method, display panel | |
CN104834116A (en) | Liquid crystal display panel and drive method thereof | |
US20100259519A1 (en) | Subpixel structure and liquid crystal display panel | |
CN209103799U (en) | Pixel driving circuit and display device | |
CN109637428A (en) | The driving method and display device of display panel | |
CN100578330C (en) | Multi-domain LCD device and drive method threof | |
CN109785803A (en) | A kind of display methods, display unit and display |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |