CN108776421B

CN108776421B - Manufacturing method of test mask

Info

Publication number: CN108776421B
Application number: CN201810658155.2A
Authority: CN
Inventors: 张月雨; 康萌
Original assignee: Shanghai Huali Integrated Circuit Manufacturing Co Ltd
Current assignee: Shanghai Huali Integrated Circuit Manufacturing Co Ltd
Priority date: 2018-06-25
Filing date: 2018-06-25
Publication date: 2021-08-10
Anticipated expiration: 2038-06-25
Also published as: CN108776421A

Abstract

The invention discloses a manufacturing method of a test mask, which comprises the following steps: the main pattern exposure energy is D2 ═ a × D1 or D2 ═ B × D1; d1 is the optimum exposure energy for the photoresist layer; adjusting the mask size of the secondary graph structure until a trace is exposed; adjusting the second exposure energy D2 until CD (max) > CD (min), and respectively establishing OPC models for the first exposure energy D1 and the second exposure energy D2; generating a first test pattern T1, generating a second test pattern T2, and simulating the expanded first test pattern T1 by using an OPC model to obtain CD simulation results CD1 and CD 2; obtaining a target layer F2, and carrying out OPC correction on the target layer F2 to obtain a mask M2; taking T1 as a target layer, taking a mark in M2, which is in contact with T1, as a correction layer, and taking a mark in M2, which is in contact with T2, as a reference layer; the final mask M1 was obtained by correcting the OPC model corresponding to D1. The test mask produced by the invention can be suitable for various exposure energies, can be suitable for a plurality of groups of different pattern densities, can reduce the production cost and improve the production efficiency.

Description

Manufacturing method of test mask

Technical Field

The invention relates to the field of integrated circuit manufacturing, in particular to a manufacturing method of a test mask.

Background

In a semiconductor fabrication platform, many process developments and maintenance, such as etching, material filling and growth or chemical mechanical polishing, are closely related to the overall and local density of the pattern, and the final pattern density is determined by the density of the pre-lithographic pattern. Generally, a test mask only has an optimal exposure condition, corresponds to a fixed overall pattern density and a limited local pattern density area, and has very limited corresponding experimental sample conditions, so that the detection of a process window and the discovery of potential problems are not facilitated in a process development stage. On the test mask, the wider the coverage range of the pattern density, the more the density sample conditions are, the more the safety of process development can be ensured, the process platform can deal with the product mask with variable conditions, the occurrence of unexpected problems is avoided, and the out-of-control risk is effectively reduced. But publishing multiple test reticles will undoubtedly add significant development costs.

The conventional pattern design of the test mask has the following limitations:

(1) the optimal exposure condition is single, and the overall pattern density of the Mask plate (Mask) is a fixed value;

(2) each local graph of the mask is usually a square area with the side length of 400-2500 micrometers, and the area occupation ratio is high, so the utilization rate of the mask area is not high;

(3) the local graph corresponds to a local graph density, the types of the local graphs are generally 200-400, and the local graph density is determined by the area ratio of the total area of the mask to the area of the local graph block;

(4) if the exposure energy is directly adjusted to change the density of the photoetching pattern, the density of the pattern after the energy is changed cannot be accurately quantified, the problems that the groove pattern cannot be opened or the line pattern collapses and the like are easy to occur, and a plurality of adverse effects are generated on the experimental verification process windows of subsequent etching, grinding and the like.

Disclosure of Invention

The invention aims to provide a manufacturing method of a test mask which can be suitable for various exposure energies and can be suitable for a plurality of groups of different pattern densities.

In order to solve the technical problem, the manufacturing method of the test mask provided by the invention comprises the following steps:

(1) for a given lithographic layer, the optimal exposure energy is set to the first exposure energy D1;

(2) when the main pattern of the photoetching layer is a first pattern, the first exposure energy D2 is A D1, and when the main pattern is a second pattern, the second exposure energy D2 is B D1; wherein, the range of A is 0.4-0.9, and the range of B is selected from 1.1-1.6; if D2 is too small or too large, the difference between the mask size and the exposure size becomes too large, and correction becomes difficult.

(3) Under the condition of first exposure energy D1, adjusting the mask size C of the secondary pattern structure of the test mask plate until a trace is exposed;

(4) measuring the photoetching CD value (photoetching CD value, namely photoetching characteristic dimension, the minimum dimension which can be realized by photoetching) of the test mask plate secondary pattern structure under the condition of second exposure energy D2, and recording the value as CD (max); if CD (max) ≦ CD (min), adjusting the second exposure energy D2 until CD (max) > CD (min), wherein CD (min) is the minimum lithography CD value of the current layer;

(5) establishing OPC models 1 and 2 for the first exposure energy D1 and the second exposure energy D2 respectively;

(6) generating a first test pattern T1, wherein the photoetching CD value of the first test pattern T1 is CD (T1), CD (T1) is more than or equal to CD (min), the period of the first test pattern T1 is X1, X1 is more than or equal to 2X, and X is the minimum period of the current layer;

(7) generating a second test pattern T2, wherein the photoetching CD value of the second test pattern T2 is CD (T2), CD (max) is not less than CD (T2) not less than CD (min), the period of the second test pattern T2 is X2, X2 is not less than 2X, the interval from the second test pattern T2 to the first test pattern T1 is CD (in), CD (in) is not less than CD (in min), and CD (in min) is the minimum CD interval of the current layer;

(8) expanding the first test pattern T1, simulating the expanded first test pattern T1' by using OPC models 1 and 2 to obtain CD simulation results CD1 and CD2, and taking the absolute value | CD2-CD1| of the difference value;

(9) enlarging each side of the pattern CD by | CD2-CD1|/2 on the basis of the first test pattern T1 to obtain a first test pattern enlargement layer ST 1;

(10) superposing the first test pattern expanded layer ST1 and the second test pattern T2 to obtain a target layer F2, and carrying out OPC correction on the target layer F2 by using a Model2 to obtain a corrected mask M2;

(11) the contact with T1 in M2 is labeled as T1M2, and the contact with T2 is labeled as T2M 2; with T1 as the target layer, T1M2 as the correction layer, and T2M2 as the reference layer, OPC correction was performed using the Model1 corresponding to the first exposure energy D1, and the final mask M1 was obtained.

The manufacturing method of the test mask is further improved, wherein the first type of pattern is a photoresist, and the second type of pattern is a groove.

And (3) further improving the manufacturing method of the test mask, wherein when the step (3) is carried out, the mask size C of the secondary pattern structure of the test mask is gradually increased until the trace is exposed.

And (3) further improving the manufacturing method of the test mask, wherein when the step (3) is implemented, the mask size C of the secondary pattern structure is more than or equal to 10nm and is required to be more than the minimum size value which can be manufactured by the mask.

Further improving the manufacturing method of the test mask, wherein, if the CD (max) is less than or equal to CD (min), the D2 is adjusted to be smaller when the main pattern is the first pattern; when the main pattern is the second type pattern, D2 is adjusted to be larger.

The test reticle manufacturing method is further improved wherein, when step (7) is performed, the second test pattern T2 is generated at intervals of the first test pattern.

The test mask manufacturing method is further improved, wherein the first test pattern T1 is enlarged by 1.5 times to 3 times when step (8) is performed. If the exposure size is too small or too large, the line width and space ratio of the pattern are unbalanced, which may cause an abnormality in the exposure size difference | CD2-CD1| during model simulation.

According to the invention, through special design and correction of the main and auxiliary patterns under the optimal exposure energy and the second exposure energy, the pattern is exposed only by the main pattern under the optimal exposure energy, and the patterns are simultaneously exposed by the main and auxiliary patterns under the second exposure energy, so that the same mask can be realized, the local and overall pattern densities of the same mask can be pre-designed corresponding to a plurality of photoetching energy conditions, compared with the traditional method, the number of pattern densities far more than that of the traditional test mask can be obtained after photoetching, the cost for publishing a plurality of sets of masks is saved, and the process development period is effectively shortened.

Drawings

The invention will be described in further detail with reference to the following detailed description and accompanying drawings:

FIG. 1 is a schematic flow diagram of the present invention.

FIG. 2 is a diagram of a first embodiment of the present invention, which shows the layout generated in step (6).

FIG. 3 is a diagram of a second embodiment of the present invention, which shows the layout generated in step (7).

FIG. 4 is a diagram of a third embodiment of the present invention, which shows the layout generated in step (8).

Fig. 5 is a diagram of a fourth embodiment of the present invention, which shows the layouts generated in steps (8) and (9).

FIG. 6 is a schematic diagram of a fifth embodiment of the present invention, which shows the layout generated in steps (9) and (10).

FIG. 7 is a schematic diagram of a sixth embodiment of the present invention, which shows the layout generated in step (10).

FIG. 8 is a schematic diagram seven of the embodiment of the present invention, which shows the layout generated in step (11).

Fig. 9 is a schematic view eight illustrating the layout generated in step (11).

Description of the reference numerals

T1 is a first test pattern

T2 is a second test pattern

T1' is enlarged T1

CD1 is the result of Model1 simulation

CD2 is the result of Model2 simulation

F2 is the target layer

M2 is the corrected mask

ST1 is the first test pattern expansion layer

T1M2 is a correction layer

T2M2 is the reference layer

M1 is the final mask

Q is the expansion distance of each side of the graphic CD | CD2-CD1|/2

Detailed Description

The invention provides a manufacturing method of a test mask, which comprises the following steps:

(2) when the main pattern of the photoetching layer is a photoresist, the first exposure energy D2 is A D1, and when the main pattern is a groove, the second exposure energy D2 is B D1; wherein, the range of A is 0.4-0.9, and the range of B is selected from 1.1-1.6;

(3) under the condition of first exposure energy D1, gradually increasing the mask size C of the secondary pattern structure of the test mask plate until a trace is exposed; wherein C is more than or equal to 10 nm;

(4) measuring the photoetching CD value (photoetching CD value, namely photoetching characteristic dimension, the minimum dimension which can be realized by photoetching) of the test mask plate secondary pattern structure under the condition of second exposure energy D2, and recording the value as CD (max); if CD (max) ≦ CD (min), adjusting the second exposure energy D2 until CD (max) > CD (min), wherein CD (min) is the minimum photoetching CD value of the current layer; if CD (max) is less than or equal to CD (min), when the main pattern is a photoresist, adjusting D2 to be smaller; when the main pattern is a trench, D2 is adjusted to be large.

(6) as shown in fig. 2, a first test pattern T1 is generated, the lithographic CD value of the first test pattern T1 is CD (T1), CD (T1) ≧ CD (min), the period of the first test pattern T1 is X1, X1 ≧ 2X, X is the minimum period of the current layer;

(7) as shown in FIG. 3, a second test pattern T2 is generated at the interval of the first test pattern, the photoetching CD value of the second test pattern T2 is CD (T2), CD (max) ≧ CD (T2) ≧ CD (min), the period of the second test pattern T2 is X2, X2 ≧ 2X, the interval from the second test pattern T2 to the first test pattern T1 is CD (in), CD (in) ≧ CD (in min), CD (in min) is the minimum CD interval of the current layer;

(8) as shown in fig. 4 and 5, the first test pattern T1 is enlarged by 1.5 times to 3 times, and the enlarged first test pattern T1' is simulated by using OPC models 1 and 2 to obtain CD simulation results CD1 and CD2, and the absolute value of the difference is | CD2-CD1 |;

(9) as shown in fig. 6, each side of the pattern CD is enlarged | CD2-CD1|/2 on the basis of the first test pattern T1, resulting in a first test pattern enlargement layer ST 1;

(10) with continuing reference to fig. 6 and with reference to fig. 7, the first test pattern enlarged layer ST1 and the second test pattern T2 are superimposed to obtain a target layer F2, and OPC correction is performed on the target layer F2 using a Model2 to obtain a corrected mask M2;

(11) as shown in fig. 8 and 9, M2 is labeled as T1M2 in contact with T1, and T2M2 in contact with T2; with T1 as the target layer, T1M2 as the correction layer, and T2M2 as the reference layer, OPC correction was performed using the Model1 corresponding to the first exposure energy D1, and the final mask M1 was obtained.

The present invention has been described in detail with reference to the specific embodiments and examples, but these are not intended to limit the present invention. Many variations and modifications may be made by one of ordinary skill in the art without departing from the principles of the present invention, which should also be considered as within the scope of the present invention.

Claims

1. A manufacturing method of a test mask is characterized by comprising the following steps:

(2) when the main pattern of the photoetching layer is of a first type, the second exposure energy D2 is A D1, and when the main pattern is of a second type, the second exposure energy D2 is B D1; wherein, the range of A is 0.4-0.9, and the range of B is selected from 1.1-1.6;

(4) measuring the photoetching CD value of the test mask plate secondary pattern structure under the condition of second exposure energy D2, and recording the CD value as CD (max); if CD (max) ≦ CD (min), adjusting the second exposure energy D2 until CD (max) > CD (min), wherein CD (min) is the minimum lithography CD value of the current layer;

2. The test reticle manufacturing method of claim 1, wherein: the first pattern is a photoresist and the second pattern is a trench.

3. The test reticle manufacturing method of claim 1, wherein: and (4) gradually increasing the mask size C of the secondary pattern structure of the test mask plate until the exposure mark is formed when the step (3) is implemented.

4. The test reticle manufacturing method of claim 3, wherein: when the step (3) is implemented, the mask size C of the secondary pattern structure is more than or equal to 10 nm.

5. The test reticle manufacturing method of claim 1, wherein: if the CD (max) is less than or equal to CD (min), adjusting the D2 to be smaller when the main graph is the first graph; when the main pattern is the second type pattern, D2 is adjusted to be larger.

6. The test reticle manufacturing method of claim 1, wherein: in the implementation of step (7), the second test pattern T2 is generated at intervals of the first test pattern.

7. The test reticle manufacturing method of claim 1, wherein: in the step (8), the first test pattern T1 is enlarged by 1.5 to 3 times.