CN108733510A - Data storage device and mapping table reconstruction method - Google Patents
Data storage device and mapping table reconstruction method Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 35
- 238000013500 data storage Methods 0.000 title abstract description 6
- 230000008439 repair process Effects 0.000 claims description 24
- 238000012163 sequencing technique Methods 0.000 claims description 5
- 230000015654 memory Effects 0.000 abstract description 36
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
- G06F11/1016—Error in accessing a memory location, i.e. addressing error
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1446—Point-in-time backing up or restoration of persistent data
- G06F11/1458—Management of the backup or restore process
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/0292—User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1032—Reliability improvement, data loss prevention, degraded operation etc
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7201—Logical to physical mapping or translation of blocks or pages
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7202—Allocation control and policies
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Abstract
The invention relates to a data storage device and a mapping table rebuilding method. The non-volatile memory stores a data block. The microcontroller selects a source block and a destination block from the data blocks and copies effective data of the source block to the destination block, and when one of the effective data is damaged and cannot be repaired, the microcontroller records an uncorrectable error bit corresponding to the one of the effective data to the destination block.
Description
Technical field
The present invention is about data reconstruction techniques, particularly with regard to a kind of logic suitable for data memory device to entity
Address mapping table (logical-to-physical address mapping table) method for reconstructing.
Background technology
With the evolution of computer technology, various dense storage device is gradually developed, wherein being again most wide with memory
The storage medium used, in general, other according to storage characteristic, memory can divide into volatility (volatile) and deposit again
Reservoir and non-volatile (non-volatile) memory, the wherein data stored by volatile storage can be in power supply supplies
Have no progeny disappearance, even and if the data stored by non-volatility memorizer still can be saved when power is off, as long as again
Power supply can read internal storage data.
It by taking non-volatility memorizer as an example, is widely used in electronic product in recent years, especially portable electricity
Sub- product is (such as：Mobile phone, digital still camera and mini game machine etc.), to preserve data for a long time.Have on the market at present
Many kinds of different types of non-volatility memorizers, including：Flash memory (flash memory), magnetic-resistance random access are deposited
Reservoir (Magneto-resistive RAM), ferroelectric RAM (Ferroelectric RAM), resistor type random access
Access memory (Resistive RAM) and spin transfer torque random access memory (Spin Transfer
Torque-RAM, STT-RAM) etc..
During the use of non-volatility memorizer, need to carry out the logical address at managing main frame end and non-with mapping table
Mapping relations between the physical address at volatile storage end, to realize correct data access operation.However, in use
If improper power-off or power-off suddenly occurs, it would be possible to the damage of internal storage data is caused, such as：Mapping table is damaged.Therefore, there is an urgent need for have
A kind of mapping table method for reconstructing can effectively solve the problem that the problem of mapping table is damaged.
Invention content
To solve the above-mentioned problems, a kind of data memory device of present invention proposition and mapping table method for reconstructing, will especially patrol
It collects to unrepairable mistake (uncorrectable error, UNC error) bit in physical address mapping table and backups to reality
Body is standby to logical address mapping table (physical-to-logical address mapping table) and/or data page
With area (data page spare area) so that also can quickly be rebuild when rebuilding logic to physical address mapping table can not
Repair wrong bit.
One embodiment of the invention provides a kind of data memory device, including a non-volatility memorizer and a micro-control
Device processed.Above-mentioned non-volatility memorizer includes multiple data blocks.Above-mentioned microcontroller chooses one from above-mentioned data block
Source area block and a mesh block and by it is above-mentioned come source area block multiple valid data with being copied to above-mentioned mesh block, have when above-mentioned
When the one of effect data is damaged and can not be repaired, the unrepairable error bit corresponding to the above-mentioned one by above-mentioned valid data
Member records to above-mentioned mesh block.
Preferably, above-mentioned unrepairable mistake bit is a block terminal of with being recorded in above-mentioned mesh block, or
Person, a spare area of above-mentioned unrepairable mistake bit with being recorded in above-mentioned mesh block.
Another embodiment of the present invention provides a kind of data memory device, including a non-volatility memorizer and one micro-
Controller.Above-mentioned non-volatility memorizer includes multiple data blocks.Above-mentioned microcontroller is read in each above-mentioned data block
An entity to logical address mapping table, each above-mentioned entity to logical address mapping table includes a unrepairable mistake bit,
And the sequencing according to above-mentioned entity to logical address mapping table establishes a logic to physical address mapping table, wherein above-mentioned
Logic to physical address mapping table include above-mentioned unrepairable mistake bit.
Preferably, above-mentioned entity is stored in the block terminal of above-mentioned data block to logical address mapping table.On
The sequencing for stating data block is recorded in a period of time sequence table, alternatively, the sequencing of above-mentioned data block is with reference on each
It states a time stab of data block and determines.
Another embodiment of the present invention provides a kind of mapping table method for reconstructing, is suitable for a data memory device, above-mentioned
Mapping table method for reconstructing includes the following steps：Enable the space of a non-volatility memorizer of above-mentioned data memory device be divided into
A few system information block and an at least data block；And in an above system information area logic in the block to physical address
When mapping table is damaged, one is read from an above-mentioned data field entity in the block to logical address mapping table or a data page spare area
Unrepairable mistake bit, to rebuild above-mentioned logic to physical address mapping table.
Preferably, mapping table method for reconstructing is further comprising the steps of：When writing data to above-mentioned data block,
Above-mentioned unrepairable mistake bit is read from above-mentioned logic to physical address mapping table and is written to above-mentioned entity to logical address
Mapping table or above-mentioned data page spare area；When mistake but occurs from above-mentioned data block reading data, executes a data and repair
Multiple program；And when above-mentioned data repair procedure fails, above-mentioned in above-mentioned logic to physical address mapping table can not be repaiied
Multiple mistake bit is set as " true ".
Above-mentioned logic indicates a host to the mapping information of above-mentioned non-volatility memorizer to physical address mapping table,
Last time entity is to logical address mapping table also indicating above-mentioned non-volatility memorizer to the mapping information of above-mentioned host.
Above-mentioned entity is stored in a block terminal of above-mentioned data block to logical address mapping table.
Above-mentioned data page spare area is also storing the metadata of each data page in above-mentioned data block.
About other additional features and advantages of the invention, the those skilled in the art in this field is not departing from this hair
In bright spirit and scope, when can be according to the data memory device and mapping table method for reconstructing disclosed in this case implementation
A little changing and retouching is done to obtain.
Description of the drawings
Figure 1A and Figure 1B is the schematic diagram for the physical space configuration for showing an example flash memory.
Fig. 2 is the schematic diagram of the data memory device according to one embodiment of the invention.
Fig. 3 is shown with the schematic diagram for the H2F mapping tables that logical address is index.
Fig. 4 is the flow chart of the H2F mapping table method for reconstructing according to one embodiment of the invention.
Symbol description
100 flash memories；
102 data areas；
104 spare areas；
200 data memory devices；
210 flash memories；
Block pond is programmed on 211 lines；
212 system information block ponds；
213 idle block ponds；
214 data block ponds；
220 control units；
221 microcontrollers；
222 random access memory；
223 read-only memory；
300 hosts；
S401~S405 number of steps；
BLK#1, BLK#2, BLK#Z physical blocks；
U#i, U# (i+1), U# (i+2), U# (i+3) storage element；
BLK# physical block numbers；
U# storage elements are numbered；
H2F_H#1, H2F_H#2 host block mapping table；
H2F H2F mapping tables；
F2H F2H mapping tables；
EOB block terminals.
Specific implementation mode
What this section was described is preferred embodiment of the present invention, it is therefore intended that illustrate the present invention spirit rather than to
Limit protection scope of the present invention, it should be understood that the following example can come real via software, hardware, firmware or above-mentioned arbitrary combination
It is existing.
Non-volatility memorizer includes：Flash memory, magnetic random access memory, ferro-electric random access storage
Device, resistance-type memory, spin transfer torque random access memory etc. have the characteristic for preserving data for a long time.Below
Especially illustrated by taking flash memory as an example.
Present-day data storage device is commonly used to realize memory card (memory often using flash memory as storage medium
Card), universal serial bus flash memory device (USB flash device) and solid hard disc (Solid State
Drive, SSD) etc. products.One of which application is to adopt multi-die package, and flash memory and its controller are packaged together,
Referred to as embedded flash memory module is (such as：Embedded multi-media card (embedded MultiMedia Card, eMMC)).
It can be applied in a variety of electronic devices by the data memory device of storage medium of flash memory, including：Wisdom
Type mobile phone, object wearing device, tablet computer and virtual reality equipment etc., and in general, the so centre in electronic device
Reason unit (Central Processing Unit, CPU) can be considered as operating a host of the data memory device.
Figure 1A and Figure 1B is the schematic diagram for the physical space configuration for showing an example flash memory.
As shown in Figure 1A, the data storage space of flash memory 100 can be divided into multiple blocks (or physical blocks
(physical block)) BLK#1, BLK#2 ... BLK#Z, wherein Z are positive integer.Each physical blocks include multiple Physical Page
(physical page), or data page (data page) is can be described as, such as：256 data pages.
As shown in Figure 1B, each data page includes data area (data area) 102 and spare area (spare
area)104.Data area 102 can be further divided into multiple storage element U#i, U# (i+1), U# (i+2), U# (i+3), warp
With postponing, the logical address at corresponding host end stores data.There are many forms for the logical address of host side, for example, with logic area
Block address (Logical Block Address, LBA) or universe host page (Global Host Page, GHP) are numbered.
It is 16KB (Kilo-Byte, kilobit tuple), storage element U#i, U# in the size of an embodiment, data area 102
(i+1), U# (i+2), U# (i+3) size be respectively 4KB, each storage element can be mapped to 8 logical block addresses (such as：
LBA#0~LBA#7) or correspond to 1 universe host page.
Spare area 104 is used for storing the metadata (metadata) of affiliated data page, including mapping information and block
Identification code.Block identification code to physical blocks belonging to recording block identification code.Information is mapped to indicate storage element U#
I, the logical address for the host side that U# (i+1), U# (i+2), the content stored by U# (i+3) correspond to.For example, mapping money
News can record the number of 4 sections of logical block addresses (each section of number for including 8 logical block addresses) or 4 universe host pages.
It is illustrated by taking universe host page as an example below, but not limited to this.
Fig. 2 is the schematic diagram of the data memory device according to one embodiment of the invention.Data memory device 200 includes
Flash memory 210 and control unit 220, wherein control unit 220 are coupled between host 300 and flash memory 210,
And the instruction assigned according to host 300 is (such as：Read, be written or reset etc.) operating flash memory 210.
Control unit 220 includes microcontroller 221, random access memory 222 and read-only memory 223, wherein
Random access memory 222 may be disposed at the same crystal grain (die) with microcontroller 221, or be fabricated separately, thereby increases and it is possible to space
Limited (compared to large scale DRAM).For example, a safety digit (Secure Digital, SD) card can be used 512KB's
Static RAM (Static Random Access Memory, SRAM) realizes random access memory 222.
Read-only memory 223 is storing read-only procedure code (e.g., ROM code).Microcontroller 221 can be loaded into and execute
Read-only procedure code stored by read-only memory 223 and/or programming (in-system on the line of flash memory 210
Programming, ISP) program on line stored by block pond 211, to be operated, and using depositing at random in operating
Access to memory 222 makees dynamic information storage.The running content of microcontroller 221 also particularly including：Dynamic arranges flash memory
Mapping information between 210 logical address (visual angle of host 300) and physical address (visual angle of flash memory 210), packet
Host is included to memory cache (Host to Flash, H2F) mapping table (referred to as H2F mapping tables after text) and data block
Respective memory cache is to host (Flash to Host, F2H) mapping table (text after referred to as F2H mapping tables).
The space configuration of flash memory 210 includes：Block pond 211 is programmed on line, system information block pond 212, is left unused
Block pond 213 and data block pond 214.
Block in system information block pond 212 is deposited to stocking system information, including the non-volatile formula of H2F mapping tables
Storage, the example of H2F mapping tables Fig. 3 will be described further after text.
Block in idle block pond 213 can be configured by microcontroller 221 to store data (for example, as active block
Data or the target block as garbage reclamation is written in receiving host 300), and pending data storage is completed (to write full or interrupt not
Recycling) i.e. pushed data block pond 214 is defined as data block.
Block in data block pond 214 is referred to alternatively as data block again, be by physical address define Lai data
Storage space, that is, the data to be read of host 300 true position.F2H mapping tables are stored in corresponding block
In block terminal (End of Block, EOB), and block terminal is preferably stored in the most end data page of corresponding block.
Under general running, the control unit 220 of data memory device 200 can dynamically arrange mapping table, including：H2F maps
Table and F2H mapping tables.H2F mapping tables can be index with universe host page, record the data (significant figure of each universe host page
According to) be stored to which physical address of flash memory 210, that is, which physical areas which data page in the block or which
One storage element.F2H mapping tables then can record in described physical blocks, the content institute stored by data page or storage element
Why is the universe host page corresponded to.It follows that mapping table, which is data memory device 200, operates required important evidence.
Fig. 3 is shown with the schematic diagram for the H2F mapping tables that logical address is index.Each project in H2F mapping tables
(entry) data of record Different Logic address (e.g., logical block addresses or universe host page) are to be stored to flash
Which storage element (U# is denoted as in figure) of which physical blocks (BLK# is denoted as in figure), i.e. physics object location in device 100.?
In one embodiment, the data length of logical address and physics object location is 32 bits, wherein the data length of BLK# is 16 bits,
The data length of U# is also 16 bits.And in order to which in response to huge storage space, H2F mapping tables can be with host block (host
Block it is) unit, is subdivided into host block mapping table H2F_H#0, H2F_H#1 ... etc..In an embodiment, each host block
The size of mapping table is 64KB.Those host block mapping tables H2F_H#0, H2F_H#1 ... can be with an index list managements.
In the present invention, each project in H2F mapping tables is closed in addition to record universe host page is corresponding with physical address
Except system, also records a unrepairable mistake (uncorrectable error, UNC error) bit and (be denoted as UNC in figure
Bit), whether once it had been read out the mistake that unrepairable occurs to the universe host page belonging to indicating.Implement one
Example, unrepairable mistake bit can be the not used bits of any one of each project, in preferably each project
31st bit of logical address or the 31st bit of physics object location or the 15th bit.
The unrepairable in H2F mapping tables corresponding to each valid data (logical address or physical address) is wrong at the beginning
Accidentally the preset value of bit is all " false (false) ".When data memory device 200 executes garbage collection (garbage
Collection) or when other data-moving mechanism, a block for coming source area block and a mesh can be chosen, wherein carry out source area block
There is maximum to smear to write number (erase count) or smear the number for writing that number is more than a preset value preferably in data block pond 214
It is more than the data of a preset value according to block, or with maximum wrong bit number (error bit count) or wrong bit number
Block, such as physical blocks BLK#1；Purpose block is preferably in idle block pond 213, and there is minimum to smear the idle area for writing number
Idle block in block, any or queue, such as physical blocks BLK#2.Wherein, garbage collection or other data-moving mechanism compared with
It is good to be executed under background mode, it can also be executed under foreground mode.When valid data origin source area block moves (or duplication) to mesh
Block when, if come a physics object location of source area block valid data damage, data memory device 200 can first carry out data
Repair procedure attempts to repair the valid data damaged, and when data repair procedure fails, then identification is the mistake of unrepairable
And the unrepairable mistake bit corresponding to this valid data in H2F mapping tables is set as " true ".Finally, data memory device
200 can stop moving (or duplication) this valid data, and update the unrepairable in this H2F mapping table corresponding to this valid data
Mistake bit；Or valid data of this damage are directly moved into (or replicate) to purpose block, and update this in H2F mapping tables and have
Unrepairable mistake bit corresponding to effect data and unrepairable mistake bit corresponding to this valid data is stored to spare
Region 104, and in purpose block be written EOB information when, by the unrepairable mistake bit corresponding to this valid data be written to
F2H mapping tables.In an embodiment, errors repair code (Error Correction Code, ECC) can be used in data repair procedure
Mechanism realize error detection and reparation, the operating mechanism about errors repair code will be further illustrated in follow-up.
After this, when host 300 is intended to read this valid data, data memory device 200 exists according to this valid data
Unrepairable mistake bit in H2F mapping tables directly responds the digital independent requirement of host 300.Once unrepairable mistake
Bit is set as " true ", then data memory device 200 can direct omitted data reading operation, that is, omit to flash memory 210
Operation, directly return unrepairable mistake or read error to host 300, thus, effectively promote data memory device
200 total system efficiency.In addition, the present invention proposes that a mapping table method for reconstructing can be together with unrepairable mistake bit together
Quickly rebuild.
In the present invention, in addition to H2F mapping tables have record valid data unrepairable mistake bit, F2H mapping tables with
And the spare area of each data page also has the unrepairable mistake bit for recording this valid data.Therefore, when H2F mapping tables are ruined
When damage, microcontroller 221 can be during rebuilding H2F mapping tables, according to the unrepairable in F2H mapping tables or spare area
Mistake bit quickly rebuilds the unrepairable mistake bit in H2F mapping tables.
Fig. 4 is the flow chart of the H2F mapping table method for reconstructing according to one embodiment of the invention.In this embodiment, H2F
Mapping table method for reconstructing is suitable for a data memory device, such as data memory device 200, in particular, in the data memory device
In, unrepairable mistake bit is recorded in addition to H2F mapping tables have, the spare area of F2H mapping tables and data page also has record
Unrepairable mistake bit.
First, when data memory device detects the damage of H2F mapping tables (step S401), the first repair procedure can be executed
Attempt the errors repair code (Error Correction Code, ECC) contained in the H2F mapping tables and directly repairs H2F mapping tables
(step S402), wherein H2F mapping tables are the data area 102 for the block being stored in system information block pond 212, mistake
Repair the spare area 104 that code is the block being stored in system information block pond 212.
The reason of causing H2F mapping tables to damage has very much, such as：Transmission line occurs during digital independent or write-in
Loosen or the improper power-off of data memory device or suddenly power-off or storage medium entity abrasion.
In an embodiment, H2F mapping tables can in each byte (word) (such as：32 bits) in an embedded check code
(checksum) and errors repair code, wherein check code are calculated when data are written to the byte according to data content
, later, when reading data, new check code can be recalculated again according to data content, if new check code and elder generation
The check code of preceding write-in is different, then it represents that data damage then uses errors repair code to attempt repair data, however, mistake is repaiied
Multiple code has its limit for repairing damage data, is only capable of repairing the damage data of limited bit number, if the data damaged are more than can
The bit number of reparation, then repairing failure.
Subsequent steps S402, if repairing successfully, flow terminates；Conversely, if repairing failure, executes the second repair procedure
Attempt to rebuild H2F mapping tables (step S403) according to F2H mapping tables.
Particularly, the second repair procedure includes：According to the F2H mapping tables of data block, for example, physical blocks BLK#2
Block terminal stored by F2H mapping tables, the physical address recorded reversely pushes back out to the correspondence of universe host page
Correspondence of the universe host page to physical address, you can rebuild the mapping information in H2F mapping tables；And by F2H mapping tables
The unrepairable mistake bit recorded copies to the unrepairable mistake bit in the H2F mapping tables of reconstruction.Due to data field
The number of data block can exceed that 1 in block pond 214, therefore, when reading the F2H mapping tables of data block, preferably foundation
The time stab (timestamp) that sequential list (linklist) or while being established according to data block are recorded comes determination data area
The reading order of the F2H mapping tables of block.
Subsequent steps S403, if rebuilding successfully, flow terminates；Conversely, if reconstruction failure, executes third repair procedure
Attempt the spare area according to data block, such as：The spare area 104 of physical blocks BLK#2, to rebuild H2F mapping tables (step
Rapid S404).
Particularly, third repair procedure includes：The mapping information recorded according to each spare area (indicates physics
Correspondence of the address to universe host page), reversely push back out universe host page to physical address correspondence, you can rebuild
Mapping information in H2F mapping tables；And the unrepairable mistake bit that each spare area is recorded is copied into reconstruction
Unrepairable mistake bit in H2F mapping tables.
Subsequent steps S404, if rebuilding successfully, flow terminates；Conversely, if reconstruction failure, generates error messages, refer to
Show that data damage (step S405) occurs for data memory device, then flow terminates.
It is connected in an embodiment if first all can not repair/rebuild H2F mapping tables to third repair procedure
The host of data memory device, such as：Resetting may be selected (such as when receiving error messages in host 300：It reinitializes)
Data memory device.
Though the present invention is disclosed as above with various embodiments, however it is only exemplary reference rather than to limit the model of the present invention
It encloses, any those skilled in the art, without departing from the spirit and scope of the present invention, when can do a little change and retouching.
Therefore above-described embodiment is not limited to the scope of the present invention, protection scope of the present invention when be defined by tbe claims for
It is accurate.
Claims (13)
1. a kind of data memory device, including：
One non-volatility memorizer, including multiple data blocks；And
One microcontroller, chosen from above-mentioned data block one with coming source area block and a mesh block and by it is above-mentioned come source area block
Block has when the one of above-mentioned valid data is damaged and can not be repaired by above-mentioned multiple valid data with being copied to above-mentioned mesh
It imitates the unrepairable mistake bit corresponding to the above-mentioned one of data and records to above-mentioned mesh block.
2. data memory device as described in claim 1, which is characterized in that above-mentioned unrepairable mistake bit is recorded in above-mentioned
Mesh block a block terminal.
3. data memory device as described in claim 1, which is characterized in that above-mentioned unrepairable mistake bit is recorded in above-mentioned
Mesh block a spare area.
4. a kind of data memory device, including：
One non-volatility memorizer, including multiple data blocks；And
One microcontroller reads each above-mentioned data field entity in the block to logical address mapping table, and each above-mentioned entity arrives
Logical address mapping table is suitable including a unrepairable mistake bit, and the priority according to above-mentioned entity to logical address mapping table
Sequence establishes a logic to physical address mapping table, wherein above-mentioned logic to physical address mapping table include above-mentioned unrepairable mistake
Bit.
5. data memory device as claimed in claim 4, which is characterized in that the sequencing of above-mentioned data block is recorded in one
In sequential list.
6. data memory device as claimed in claim 4, which is characterized in that the sequencing of above-mentioned data block is with reference to each
One time stab of above-mentioned data block and determine.
7. data memory device as claimed in claim 4, which is characterized in that above-mentioned entity is stored in logical address mapping table
The block terminal of above-mentioned data block.
8. a kind of mapping table method for reconstructing is suitable for a data memory device, including：
The space of a non-volatility memorizer of above-mentioned data memory device is enabled to be divided into an at least system information block and extremely
A few data block；And
It is real from above-mentioned data field in the block one when in above system information area, a logic in the block is damaged to physical address mapping table
Body reads a unrepairable mistake bit to logical address mapping table or a data page spare area, to rebuild above-mentioned logic in fact
Body address mapping table.
9. mapping table method for reconstructing as claimed in claim 8, which is characterized in that further include：Writing data to above-mentioned data
When block, above-mentioned unrepairable mistake bit is read from above-mentioned logic to physical address mapping table and is written to above-mentioned entity to patrolling
Collect address mapping table or above-mentioned data page spare area.
10. mapping table method for reconstructing as claimed in claim 8, which is characterized in that further include：
When mistake but occurs from above-mentioned data block reading data, a data repair procedure is executed；And
When above-mentioned data repair procedure fails, by the above-mentioned unrepairable error bit in above-mentioned logic to physical address mapping table
Member is set as "true".
11. mapping table method for reconstructing as claimed in claim 8, which is characterized in that above-mentioned logic to physical address mapping table is used
To indicate a host to the mapping information of above-mentioned non-volatility memorizer, last time entity to logical address mapping table is also indicating
Above-mentioned non-volatility memorizer to above-mentioned host mapping information.
12. mapping table method for reconstructing as claimed in claim 8, which is characterized in that above-mentioned entity to logical address mapping table stores up
It is stored in a block terminal of above-mentioned data block.
13. mapping table method for reconstructing as claimed in claim 8, which is characterized in that above-mentioned data page spare area is also storing up
Deposit the metadata of each data page in above-mentioned data block.
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Also Published As
| Publication number | Publication date |
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| US20180307558A1 (en) | 2018-10-25 |
| US20200218602A1 (en) | 2020-07-09 |
| TWI639917B (en) | 2018-11-01 |
| US10635525B2 (en) | 2020-04-28 |
| TW201839611A (en) | 2018-11-01 |
| US11249840B2 (en) | 2022-02-15 |
| CN108733510B (en) | 2023-03-28 |
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