CN108717943A - HEMT and single-pole double-throw switch circuit - Google Patents
HEMT and single-pole double-throw switch circuit Download PDFInfo
- Publication number
- CN108717943A CN108717943A CN201810291686.2A CN201810291686A CN108717943A CN 108717943 A CN108717943 A CN 108717943A CN 201810291686 A CN201810291686 A CN 201810291686A CN 108717943 A CN108717943 A CN 108717943A
- Authority
- CN
- China
- Prior art keywords
- hemt
- mentioned
- microstrip line
- layer
- grid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 229910052751 metal Inorganic materials 0.000 claims abstract description 89
- 239000002184 metal Substances 0.000 claims abstract description 89
- 239000004065 semiconductor Substances 0.000 claims abstract description 73
- 239000000463 material Substances 0.000 claims abstract description 26
- 239000000758 substrate Substances 0.000 claims abstract description 19
- 229910002704 AlGaN Inorganic materials 0.000 claims description 5
- 230000005533 two-dimensional electron gas Effects 0.000 claims description 5
- 230000005284 excitation Effects 0.000 claims description 4
- 230000001737 promoting effect Effects 0.000 claims description 2
- 238000002955 isolation Methods 0.000 abstract description 18
- 238000004088 simulation Methods 0.000 description 11
- 238000003780 insertion Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 5
- 230000037431 insertion Effects 0.000 description 5
- 230000008901 benefit Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 230000005611 electricity Effects 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000010354 integration Effects 0.000 description 3
- 238000011160 research Methods 0.000 description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 229910004166 TaN Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
The application provides a HEMT and single-pole double-throw switch circuit. The HEMT comprises two sub HEMTs arranged along a first direction, wherein each sub HEMT comprises a substrate, a first semiconductor layer, a second semiconductor layer and a metal electrode, the band gap width of the material of the second semiconductor layer is larger than that of the material of the first semiconductor layer, the metal electrodes are multiple, the multiple metal electrodes comprise multiple first metal electrodes and multiple second metal electrodes, the multiple first metal electrodes and the multiple second metal electrodes are arranged at intervals along a second direction, the HEMT further comprises multiple gate layers, the multiple gate layers comprise first gate layers and second gate layers, the first gate layers are located between two adjacent first metal electrodes, the second gate layers are located between two adjacent second metal electrodes, the first gate layers and the second gate layers are connected to form a gate of the HEMT, and the first direction is perpendicular to the second direction and perpendicular to the thickness direction of the second semiconductor layer. The HEMT has high isolation and power capacity.
Description
Technical field
This application involves semiconductor applications, in particular to a kind of HEMT and single-pole double-throw switch (SPDT) circuit.
Background technology
In modern radio-frequency and microwave system, solid-state switch plays vital effect.Solid-state switch it is main
Function is selected the signal of receiving channel or transmission channel.
With the rapid development of electronics industry, traditional pin diode switch and GaAs Phemt (High
Electron Mobility Transistor, high electron mobility transistor) cannot to have met market corresponding to its for switch
Performance requirement.As the representative of third generation wide bandgap semiconductor, the research based on GaN material system is studied with being applied to
Important content.The it is proposed of GaN HEMT high-power switching circuits solves the bottle encountered in said switching circuit evolution
Neck.
GaN has big band gap width, high breakdown electric field, electron saturation velocities height, good thermal conductivity, big dielectric
The many merits such as constant, small high-frequency noise and strong resistance to corrosion.Have benefited from third generation wide bandgap semiconductor GaN material
Development, the research of GaN HEMT is more and more extensive and receive increasing attention, and the maximum advantages of GaN HEMT exist
Two-dimensional electron gas (2DEG) can be generated in its heterojunction structure, it may have following many merits:Without ionized impurity scattering effect, two
Dimensional electron gas density is up to 2.15 × 1013cm-2, mobility is up to 1500cm2/ Vs etc..GaN HEMT are as switching device, no
The advantage of switching speed of only having high about several nanoseconds, while GaN HEMT switching devices have big power capacity, it is high
The advantages that thermal conductivity, strong high-temperature stability and Radiation hardness.Due to GaN HEMT preparation processes energy and MIMIC
(Microwave/Millimeter Wave Monolithic Integrated Circuit, micron/millimeter-wave monolithic are integrated
Circuit) process compatible, system complexity is low, is greatly reduced the production cost of MMIC circuits in the production process, and full
The present microwave integrated circuit of foot has chip the requirement of high integration.
Currently, after 5G networks propose, more next high to the performance requirement of switching circuit in communication, demand is also increasingly
Greatly.In addition to the property of single-pole double-throw switch (SPDT) circuit in T/R (Transmitter/Receiver sends and receives) system
It can be also increasing with demand.In recent years, about the research low frequency of GaN HEMT single-pole double-throw switch (SPDT) circuits to high frequency, from
Narrowband to broadband, quickly grows.But performance is not met by current performance requirement, therefore, work out with low insertion loss,
High-isolation, high power capacity, high switching speed, high integration GaN HEMT single-pole double-throw switch (SPDT) circuits have it is important
Meaning.
Disclosed information above is used only to reinforce the background technology to technology described herein in the background section
Understanding may include therefore certain information in background technology, these information not formed to those skilled in the art
The home known prior art.
Invention content
The main purpose of the application is to provide a kind of HEMT and single-pole double-throw switch (SPDT) circuit, single in the prior art to solve
The low problem of double-pole double throw switch circuit isolation.
To achieve the goals above, according to the one side of the application, a kind of HEMT is provided, which includes two edges
The sub- HEMT of first direction setting, each above-mentioned sub- HEMT includes the substrate being sequentially stacked, the first semiconductor layer, the second semiconductor layer
And metal electrode, wherein the band gap width of the material of above-mentioned second semiconductor layer is more than the material of above-mentioned first semiconductor layer
Band gap width, above-mentioned metal electrode has multiple, and multiple above-mentioned metal electrodes include multiple first metal electrodes and multiple
Second metal electrode, above-mentioned first metal electrode and above-mentioned second metal electrode are set gradually along above-mentioned first direction, Duo Geshang
It states the first metal electrode and is spaced setting in a second direction, multiple above-mentioned second metal electrodes are arranged along above-mentioned second direction interval,
Above-mentioned HEMT further includes multiple grid layer on the surface of above-mentioned second semiconductor layer, and multiple above-mentioned grid layer include along above-mentioned
The first grid layer and the second grid layer that first direction is set gradually, above-mentioned first grid layer are located at the above-mentioned first metal electricity of adjacent two
Between pole, above-mentioned second grid layer is between two adjacent above-mentioned second metal electrodes, above-mentioned first grid layer and above-mentioned second
Grid layer connects the grid to form above-mentioned HEMT, above-mentioned first direction it is vertical with above-mentioned second direction and with above-mentioned second semiconductor layer
Thickness direction it is vertical.
Further, above-mentioned HEMT further includes:Nucleating layer, between above-mentioned substrate and above-mentioned first semiconductor layer.
Further, above-mentioned HEMT further includes:Insert layer is located in above-mentioned first semiconductor layer and above-mentioned second semiconductor
Between layer, above-mentioned insert layer is for promoting the Two-dimensional electron generated between above-mentioned first semiconductor layer and above-mentioned second semiconductor layer
The excitation of gas.
Further, above-mentioned first semiconductor layer is GaN layer, and above-mentioned second semiconductor layer is AlGaN layer.
Further, above-mentioned nucleating layer is AlN layers.
Further, above-mentioned insert layer is AlN layers.
Further, each above-mentioned grid layer is less than 0.5 μm, preferably 0.25 μm along the width of above-mentioned second direction;It is mutually arbitrary
Two above-mentioned second metal electrodes of adjacent two above-mentioned first metal electrodes and/or arbitrary neighborhood are on above-mentioned first direction
Overlap width is grid width, and above-mentioned grid width is between 50~150 μm, preferably 100 μm.
According to the another aspect of the application, a kind of single-pole double-throw switch (SPDT) circuit, including HEMT are provided, above-mentioned HEMT is to appoint
A kind of above-mentioned HEMT.
Further, above-mentioned single-pole double-throw switch (SPDT) circuit includes signal input part, first voltage control terminal, second voltage control
End, the first signal output end and second signal output end processed, branch centered on the branch where above-mentioned signal input part are above-mentioned
The branch of the both sides of central branches is symmetrical and identical about above-mentioned central branches, and the side branch of above-mentioned central branches is the first side
The other side branch of branch, above-mentioned central branches is the second side branch, and above-mentioned first collateral road includes multiple first side HEMT, on
It includes that multiple the second side HEMT, above-mentioned first side HEMT and above-mentioned the second side HEMT are corresponded about above-mentioned to state the second side branch
Central branches are symmetrical and identical, and the grid of above-mentioned first side HEMT is electrically connected with above-mentioned first voltage control terminal, above-mentioned first side
The grounded drain of HEMT, the source electrode of above-mentioned first side HEMT is between above-mentioned first signal output end and above-mentioned signal input part
Branch road, the grid of above-mentioned the second side HEMT is electrically connected with above-mentioned second voltage control terminal, the drain electrode of above-mentioned the second side HEMT
Ground connection, the branch of the source electrode of above-mentioned the second side HEMT positioned at above-mentioned second signal output end and above-mentioned signal input part between is on the road.
Further, above-mentioned single-pole double-throw switch (SPDT) circuit further includes multiple resistances, the grid of each above-mentioned first side HEMT
Pole is electrically connected by an above-mentioned resistance with above-mentioned first voltage control terminal, and the grid of each above-mentioned the second side HEMT passes through one
A above-mentioned resistance is electrically connected with above-mentioned second voltage control terminal.
Further, above-mentioned single-pole double-throw switch (SPDT) circuit further includes multistage microstrip line, and the source electrode of each above-mentioned HEMT passes through upper
It states microstrip line to be electrically connected with above-mentioned signal input part, above-mentioned first collateral road and above-mentioned the second side branch include multiple micro-strips
Line.
Further, above-mentioned single-pole double-throw switch (SPDT) circuit further includes capacitance, and the other end of above-mentioned central branches is ground terminal,
Above-mentioned capacitance is connected between above-mentioned ground terminal and above-mentioned signal input part.
Further, there are three above-mentioned first side HEMT, respectively the first HEMT, the 2nd HEMT and the 3rd HEMT are above-mentioned
There are three the second side HEMT, respectively the 4th HEMT, the 5th HEMT and the 6th HEMT, above-mentioned first HEMT and above-mentioned 4th HEMT
Symmetrical and identical, above-mentioned 2nd HEMT and above-mentioned 5th HEMT are symmetrical and identical, above-mentioned 3rd HEMT with the above-mentioned 6th HEMT pairs
Claim and identical;There are six above-mentioned resistances, identical about the symmetrical two above-mentioned resistances of above-mentioned central branches;It is above-mentioned micro-
Band line has eight sections, respectively first segment microstrip line, second segment microstrip line, third section microstrip line, the 4th section of microstrip line, the 5th section it is micro-
Band line, the 6th section of microstrip line, the 7th section of microstrip line and the 8th section of microstrip line, above-mentioned first segment microstrip line and above-mentioned second segment micro-strip
Line is connected on the road of the branch between the source electrode and above-mentioned signal input part of above-mentioned first HEMT, and above-mentioned third section microstrip line is connected on
Branch road between the source electrode and the source electrode of above-mentioned 2nd HEMT of above-mentioned first HEMT, above-mentioned 4th section of microstrip line is connected on above-mentioned
Branch road between the source electrode of 2nd HEMT and the source electrode of above-mentioned 3rd HEMT, above-mentioned 5th section of microstrip line are connected on the above-mentioned 4th
Branch road between the source electrode of HEMT and above-mentioned first segment microstrip line, above-mentioned 6th section of microstrip line are connected on above-mentioned 4th HEMT's
Branch road between source electrode and the source electrode of above-mentioned 5th HEMT, above-mentioned 7th section of microstrip line are connected on the source electrode of above-mentioned 5th HEMT
Branch road between the source electrode of above-mentioned 6th HEMT, above-mentioned 8th section of microstrip line are connected on above-mentioned first segment microstrip line and above-mentioned
Branch road between ground terminal, it is identical about the symmetrical two sections of above-mentioned microstrip lines of above-mentioned central branches;There are one above-mentioned capacitances, on
Capacitance is stated to be connected between above-mentioned ground terminal and above-mentioned 8th section of microstrip line.
Further, the resistance value of above-mentioned resistance is between 4~20K Ω, preferably 10K Ω.
Further, above-mentioned single-pole double-throw switch (SPDT) circuit further includes two offset lines, and two above-mentioned offset line difference are upward
It states first voltage control terminal and above-mentioned second voltage control terminal provides voltage.
Using the technical solution of the application, it is equivalent to what the series connection of two sub- HEMT was formed, two sub- HEMT common substrates,
First semiconductor layer and the second semiconductor layer, the grid layer connection of the two sub- HEMT so that the grid width of the HEMT be (the arbitrary neighbour's of phase
Coincidence of two above-mentioned second metal electrodes of two above-mentioned first metal electrodes and/or arbitrary neighborhood on above-mentioned first direction
Width is grid width) there is certain increase, the power capacity of device will increase under equal conditions, and then when it is applied in switching circuit
When middle, the power capacity of the switching circuit can be promoted;Also, above-mentioned HEMT due to can with equivalent two devices in series,
When device is off state, input signal is separated twice, therefore the isolation of device increases, and then working as should
HEMT is applied in single-pole double-throw switch (SPDT) circuit, can promote the isolation of the circuit.
Description of the drawings
The accompanying drawings which form a part of this application are used for providing further understanding of the present application, and the application's shows
Meaning property embodiment and its explanation do not constitute the improper restriction to the application for explaining the application.In the accompanying drawings:
Fig. 1 is the schematic cross-section according to the HEMT device of the embodiment of the present invention;
Fig. 2 is the single-pole double-throw switch (SPDT) circuit topology schematic diagram according to the embodiment of the present invention;
Fig. 3 is the local overlooking structural schematic diagram according to the single-pole double-throw switch (SPDT) device of the embodiment of the present invention;
Fig. 4 is the simulation relation curve of frequency-input return loss of the input port of circuit shown in Fig. 2;
Fig. 5 is the simulation relation curve of frequency-output return loss of the output port of circuit shown in Fig. 2;
Fig. 6 is the simulation relation curve of frequency-insertion loss of circuit shown in Fig. 2;And
Fig. 7 is the simulation relation curve of frequency-isolation of circuit shown in Fig. 2.
Wherein, above-mentioned attached drawing includes the following drawings label:
11, substrate;12, nucleating layer;13, the first semiconductor layer;14, the second semiconductor layer;15, metal electrode;16, grid
Layer;151, the first metal electrode;152, the second metal electrode;161, the first grid layer;162, the second grid layer;20, L-type metal;M1,
First HEMT;M2, the 2nd HEMT;M3, the 3rd HEMT;M4, the 4th HEMT;M5, the 5th HEMT;M6, the 6th HEMT;R1, first
Resistance;R2, second grid resistance;R3, third resistance;R4, the 4th resistance;R5, the 5th resistance;R6,
6th resistance;L1, first segment microstrip line;L2, second segment microstrip line;L3, third section microstrip line;L4, the 4th section of microstrip line;
L5, the 5th section of microstrip line;L6, the 6th section of microstrip line;L7, the 7th section of microstrip line;L8, the 8th section of microstrip line.
Specific implementation mode
It is noted that following detailed description is all illustrative, it is intended to provide further instruction to the application.Unless another
It indicates, all technical and scientific terms used herein has usual with the application person of an ordinary skill in the technical field
The identical meanings of understanding.
It should be noted that term used herein above is merely to describe specific implementation mode, and be not intended to restricted root
According to the illustrative embodiments of the application.As used herein, unless the context clearly indicates otherwise, otherwise singulative
It is also intended to include plural form, additionally, it should be understood that, when in the present specification using term "comprising" and/or " packet
Include " when, indicate existing characteristics, step, operation, device, component and/or combination thereof.
It should be understood that when element (such as layer, film, region or substrate) is described as in another element "upper", this yuan
Part can be directly on another element, or intermediary element also may be present.Moreover, claims in specification and above
In, when description has element " connected " to another element, which " can be directly connected to " to another element, or pass through third
Element is " connected " to another element.
As background technology is introduced, the isolation of single-pole double-throw switch (SPDT) circuit in the prior art is relatively low, to understand
Technical problem certainly as above, present applicant proposes a kind of HEMT and single-pole double-throw switch (SPDT) circuit.
In a kind of typical embodiment of the application, a kind of HEMT is provided, as shown in Figure 1, the HEMT includes successively
Stacked substrate 11, the first semiconductor layer 13, the second semiconductor layer 14 and metal electrode 15, wherein above-mentioned second semiconductor
The band gap width of the material of layer 14 is more than the band gap width of the material of above-mentioned first semiconductor layer 13, and the two forms hetero-junctions, and
And two-dimensional electron gas (2DEG) is generated between, and as shown in figure 3, above-mentioned metal electrode 15 has multiple, and multiple metals
Electrode 15 includes multiple first metal electrodes 151 and multiple second metal electrodes 152, i.e., in multiple metal electrodes, is divided into two
Kind, one is the first metal electrode 151, another kind is the second metal electrode 152, above-mentioned first metal electrode 151 and above-mentioned the
Two metal electrodes 152 are set gradually along first direction, and the first metal electrode 151 and the second metal electrode 152 have it is multiple, it is more
A above-mentioned first metal electrode 151 is spaced setting in a second direction, and in multiple first metal electrodes 151, some is source electrode, remains
Under be drain electrode.And multiple above-mentioned second metal electrodes 152 are arranged along above-mentioned second direction interval, multiple second metal electrodes
In 152, some is source electrode, remaining for drain electrode.Above-mentioned HEMT further includes more on the surface of above-mentioned second semiconductor layer
A grid layer 16, multiple above-mentioned grid layer 16 include the first grid layer 161 and the second grid layer set gradually along above-mentioned first direction
162, above-mentioned first grid layer 161 is located between two adjacent above-mentioned first metal electrodes 151, and above-mentioned second grid layer 162 is located at phase
Between two adjacent above-mentioned second metal electrodes 152, above-mentioned first grid layer 161 and the connection of above-mentioned second grid layer 162 form above-mentioned
The grid of HEMT, above-mentioned first direction is vertical with above-mentioned second direction and vertical with the above-mentioned thickness direction of second semiconductor layer,
Actually first direction is exactly the direction of vertical paper or computer display screen, so can only see a grid layer 16 in Fig. 1.
It should be noted that above-mentioned first metal electrode and the second metal electrode at least there are two, the first grid layer and
Two grid layer can also have multiple, and the quantity of the quantity of the first grid layer and the second grid layer can be according to the quantity of the first metal electrode
It is determined with the quantity of the second metal electrode.When including multiple first grid layer and when multiple second grid layer, each first grid layer is set
It sets between two adjacent the first metal electrodes, i.e., first grid layer corresponds to two adjacent first metal electrodes, for example,
There are three first metal electrodes, and there are two the first grid layer, then two the first grid layer are separately positioned on three the first metal electrode shapes
At in two intervals.
As shown in figure 3, since two sub- HEMT in the HEMT are 4 finger Tandem devices, each refer to two first corresponding
Metal electrode 151 or two the second metal electrodes 152, while corresponding first grid layer 161 or second grid layer 162,
Every sub- HEMT includes five metal electrodes, wherein three metal electrodes form " E " font, (direction of two " E " is not
Together), it is different to form the direction of "] " font (two "] " for another two metal electrode), and in fact, four in two sub- HEMT
Metal electrode forms an I-shaped, and the material of this four metal electrodes can be identical.Four the first grid layer 161 are connected to one
It rises, four the second grid layer 162 link together, and the first grid layer 161 and the second grid layer 162 are connected by a L-type metal 20
Together, which is actually the resistance referred to below.
Above-mentioned HEMT is double-gated devices, is equivalent to what the series connection of two sub- HEMT was formed, two sub- HEMT common substrates,
First semiconductor layer and the second semiconductor layer, the grid layer connection of the two sub- HEMT so that the grid width of the HEMT be (the arbitrary neighbour's of phase
Coincidence of two above-mentioned second metal electrodes of two above-mentioned first metal electrodes and/or arbitrary neighborhood on above-mentioned first direction
Width is grid width) there is certain increase, the power capacity of device will increase under equal conditions, and then when it is applied in switching circuit
When middle, the power capacity of the switching circuit can be promoted;Also, above-mentioned HEMT due to can with equivalent two devices in series,
When device is off state, input signal is separated twice, therefore the isolation of device increases, and then working as should
HEMT is applied in single-pole double-throw switch (SPDT) circuit, can promote the isolation of the circuit.
In order to further ensure preferable first semiconductor layer 13 of forming properties, and then ensure that the HEMT has preferable property
Can, in a kind of embodiment of the application, as shown in Figure 1, the HEMT further includes nucleating layer 12, it is located at above-mentioned substrate 11 and above-mentioned the
Between semi-conductor layer 13.
The material of nucleating layer 12 can according to the material of 11 layers of the material of specific first semiconductor layer 13 and substrate come
Selection, those skilled in the art can select suitable material to form the nucleating layer 12 according to actual conditions.
In order to further promote the two dimension electricity generated between above-mentioned first semiconductor layer 13 and above-mentioned second semiconductor layer 14
The excitation of sub- gas, and then the operating rate of the HEMT is improved, in a kind of embodiment not shown in the figure of the application, above-mentioned HEMT
Further include insert layer, is located between above-mentioned first semiconductor layer 13 and above-mentioned second semiconductor layer 14.
The material of insert layer can be selected according to the material of the material of the first semiconductor layer 13 and the second semiconductor layer 14,
Those skilled in the art can select suitable material to form the insert layer according to actual conditions.
In a kind of specific embodiment, above-mentioned first semiconductor layer 13 is GaN layer, and above-mentioned second semiconductor layer 14 is
AlGaN layer, the selection of both materials can further promote the operating rate of the HEMT, when it is as switching device, open
It is about several nanoseconds to close very high speed, while the HEMT has a big power capacity, high thermal conductivity, strong high-temperature stability with
And the advantages that Radiation hardness.And the HEMT preparation processes can be with MIMIC (Microwave/Millimeter Wave
Monolithic Integrated Circuit, micron/millimeter wave monolithic integrated circuit) process compatible, system complexity is low,
It is greatly reduced the production cost of MMIC circuits in the production process, and meets present microwave integrated circuit for chip
Requirement with high integration.
When above-mentioned first semiconductor layer 13 is GaN layer, for preferable first semiconductor layer 13 of forming properties, the application
A kind of embodiment in, above-mentioned nucleating layer 12 be AlN layers.
When above-mentioned first semiconductor layer 13 is GaN layer, and above-mentioned second semiconductor layer 14 is AlGaN layer, in order to preferably
Promote the excitation of the two-dimensional electron gas generated between above-mentioned first semiconductor layer 13 and above-mentioned second semiconductor layer 14, above-mentioned insertion
Layer is AlN layers.
In a kind of embodiment of the application, in order to further enhance the switching circuit using the HEMT as switching device
Isolation and power-performance, in a kind of embodiment of the application, width of the above-mentioned each above-mentioned grid layer 16 along above-mentioned second direction
Less than 0.5 μm, preferably 0.25 μm;Mutually on two of arbitrary adjacent two above-mentioned first metal electrodes 151 and/or arbitrary neighborhood
It is grid width W to state overlap width of second metal electrode 152 on above-mentioned first direction, shown in Fig. 3, above-mentioned grid width 50~
Between 150 μm, preferably 100 μm.In Fig. 3, total grid width of the HEMT device is 800 μm, since two sub- HEMT in Fig. 3 are equal
Refer to Tandem devices for 4, i.e. there are four grid width by every sub- HEMT, and each grid width is 100 μm, and the grid width of every sub- HEMT is 400 μ
Total grid width of m, two sub- HEMT are 800 μm.
The material of substrate 11 in HEMT in the application can in the prior art any can form substrate 11
Material, such as monocrystalline silicon, sapphire, organic semiconducting materials, glass, monocrystalline germanium, GaAs and InP etc..Specifically, Ke Yigen
The material of corresponding substrate 11 is selected according to the material of the first semiconductor layer 13, when the first semiconductor layer 13 is GaN layer, preferably
Substrate 11 is SiC.
The material of the grid layer 16 of the application is in Au, Ag, Al, Pt, Ni, Ti, Pd, Pt, Mo, W, Cr, Ta, TiN and TaN
At least one, those skilled in the art can select suitable material form the grid layer 16 of the application according to actual conditions.
In the typical embodiment of another kind of the application, a kind of single-pole double-throw switch (SPDT) circuit, including HEMT are provided, it should
HEMT is any above-mentioned HEMT.
The single-pole double-throw switch (SPDT) circuit is due to including above-mentioned HEMT, due to above-mentioned so that the isolation of the switching circuit
It is higher, and power capacity is larger.
In order to further enhance the performance of the switching circuit, it is rapidly completed the switching of signal in systems, the one of the application
In kind embodiment, designed topological structure is in full symmetric form, as shown in Fig. 2, above-mentioned single-pole double-throw switch (SPDT) circuit includes
Signal input part RFin, first voltage control terminal Vg, second voltage control terminal Vg', the first signal output end RFout1 and
Binary signal output end RFout2, branch 50 centered on the branch where above-mentioned signal input part RFin, the first signal output end
RFout1 and second signal output end RFout2 is not on the central branches 50, and the branch of the both sides of above-mentioned central branches 50
Symmetrical and identical about above-mentioned central branches 50, herein identical refers to that the device in the branch of both sides is identical, among the above
The side branch of heart branch 50 is the first collateral road, and the other side branches of above-mentioned central branches 50 is the second side branch, above-mentioned the
Side branch includes multiple first side HEMT, and above-mentioned the second side branch includes multiple the second side HEMT, above-mentioned first side HEMT with
Above-mentioned the second side HEMT one-to-one correspondence is symmetrical and identical about above-mentioned central branches 50, i.e. position symmetrical structure is identical, on
The grid for stating the first side HEMT is electrically connected with above-mentioned first voltage control terminal, the grounded drain of above-mentioned first side HEMT, and above-mentioned
Branch road of the source electrode of side HEMT between above-mentioned first signal output end RFout1 and above-mentioned signal input part RFin, on
The grid for stating the second side HEMT is electrically connected with above-mentioned second voltage control terminal RFout2, the grounded drain of above-mentioned the second side HEMT,
Branch of the source electrode of above-mentioned the second side HEMT between above-mentioned second signal output end RFout2 and above-mentioned signal input part RFin
On the road.
In fact, the often end connection type of the HEMT of the application is not limited to above-mentioned mode, it can also be by above-mentioned source
The connection type of pole and drain electrode is exchanged, i.e. branch road of the drain electrode between signal output end and signal input part, source electrode ground connection.
In order to enable the device in circuit preferably matches, to advanced optimize the performance of single-pole double-throw switch (SPDT) circuit,
In a kind of embodiment of the application, as shown in figure 3, above-mentioned single-pole double-throw switch (SPDT) circuit further includes multiple resistances, it is each above-mentioned
The grid of first side HEMT is electrically connected by an above-mentioned resistance with above-mentioned first voltage control terminal, each above-mentioned the second side
The grid of HEMT is electrically connected by an above-mentioned resistance with above-mentioned second voltage control terminal, due to 50 both sides of central branches
Branch is symmetrical, so the resistance in the branch of 50 both sides of central branches is to correspond symmetrically, and symmetrical two
A resistance is identical.It is preferred that resistance type is active pull-up, can preferably be inserted from gate leakage, optimization anti-stop signal
Enter drain performance, it is horizontal to promote integrated circuit.
In another embodiment of the application, as shown in figure 3, above-mentioned single-pole double-throw switch (SPDT) circuit further includes multistage micro-strip
The source electrode of line, each above-mentioned HEMT is electrically connected by above-mentioned microstrip line with above-mentioned signal input part RFin, above-mentioned first collateral road and
Above-mentioned the second side branch includes multiple microstrip lines, also, since the branch of 50 both sides of central branches is symmetrical, so first
The positional symmetry of the microstrip line of microstrip line and the second side branch in collateral road, and two microstrip lines of positional symmetry are identical
's.
In order to preferably match, make the performance of single-pole double-throw switch (SPDT) circuit of the application more, a kind of implementation of the application
In example, as shown in figure 3, above-mentioned single-pole double-throw switch (SPDT) circuit further includes capacitance, the other end of above-mentioned central branches 50 is ground terminal,
Above-mentioned capacitance is connected between above-mentioned ground terminal and above-mentioned signal input part.
For characteristics such as the isolations, power capacity and insertion loss that advanced optimize the single-pole double-throw switch (SPDT) circuit,
In a kind of specific embodiment, there are three above-mentioned first side HEMT, respectively the first HEMT M1, the 2nd HEMT M2 and third
HEMT M3, there are three above-mentioned the second side HEMT, respectively the 4th HEMT M4, the 5th HEMT M5 and the 6th HEMT M6, above-mentioned
First HEMT M1 and above-mentioned 4th HEMT M4 are symmetrical and identical, above-mentioned 2nd HEMT M2 and above-mentioned 5th HEMT M5 it is symmetrical and
Identical, above-mentioned 3rd HEMT M3 and above-mentioned 6th HEMT M6 are symmetrical and identical;There are six above-mentioned resistances, about among the above
50 symmetrical two above-mentioned resistances of heart branch are identical;Above-mentioned microstrip line has eight sections, respectively first segment microstrip line L1, second
Section microstrip line L2, third section microstrip line L3, the 4th section of microstrip line L4, the 5th section of microstrip line L5, the 6th section of microstrip line L6, the 7th section
Microstrip line L7 and the 8th section of microstrip line L8, above-mentioned first segment microstrip line L1 and above-mentioned second segment microstrip line L2 are connected on above-mentioned first
Branch road between the source electrode of HEMT M1 and above-mentioned signal input part RFin, above-mentioned third section microstrip line L3 are connected on above-mentioned the
Branch road between the source electrode of one HEMT M1 and the source electrode of above-mentioned 2nd HEMT M1, above-mentioned 4th section of microstrip line L4 are connected on
State the branch road between the source electrode of the 2nd HEMT M2 and the source electrode of above-mentioned 3rd HEMT M3, above-mentioned 5th section of microstrip line L5 series connection
On branch road between the source electrode and above-mentioned first segment microstrip line L1 of above-mentioned 4th HEMT M4, above-mentioned 6th section of microstrip line L6 strings
It is associated in the branch road between the source electrode and the source electrode of above-mentioned 5th HEMT M5 of above-mentioned 4th HEMT M4, above-mentioned 7th section of microstrip line
L7 is connected on the road of the branch between the source electrode and the source electrode of above-mentioned 6th HEMT M6 of above-mentioned 5th HEMT M5, and above-mentioned 8th section micro-
It is connected on the road of the branch between above-mentioned first segment microstrip line L1 and above-mentioned ground terminal with line L8, it is symmetrical about above-mentioned central branches 50
Two sections of above-mentioned microstrip lines it is identical;There are one above-mentioned capacitances, and above-mentioned capacitance is connected on above-mentioned ground terminal and above-mentioned 8th section of micro-strip
Between line L8.
In order to preferably control signal from gate leakage, biasing resistor, a kind of implementation of the application are set in device grids
In example, the resistance value of above-mentioned resistance is between 4~20K Ω, preferably 10K Ω.
In the another embodiment of the application, above-mentioned single-pole double-throw switch (SPDT) circuit further includes two offset lines, and two above-mentioned
Offset line provides voltage to above-mentioned first voltage control terminal and above-mentioned second voltage control terminal respectively.
In order to enable those skilled in the art can clearly understand the technical solution of the application, it below will be with Fig. 3
Shown in illustrate for circuit the application single-pole double-throw switch (SPDT) circuit operation principle.
Embodiment
As shown in Fig. 2, the circuit includes six HEMT, respectively the first HEMT M1, the 2nd HEMT M2, the 3rd HEMT
The 4th HEMT M4 of M3, the 5th HEMT M5 and the 6th HEMT M6;Further include eight sections of microstrip lines, respectively first segment microstrip line L1,
Second segment microstrip line L2, third section microstrip line L3, the 4th section of microstrip line L4, the 5th section of microstrip line L5, the 6th section of microstrip line L6,
Seven sections of microstrip line L7 and the 8th section of microstrip line L8;Further include six resistances, is first grid resistance R1, second grid respectively
Resistance R2, third resistance R3, the 4th resistance R4, the 5th resistance R5 and the 6th resistance R6;Further include
One capacitance C, plays matching effect in circuit, keeps circuit performance more preferable;Further include offset line (not shown), offset line
The grid voltage provided needed for control switching device on/off is 0/-5V, realizes that signal is switched on and off under different biass
Switching between two states.The position of these circuit devcies is referring to Fig. 2, and symmetrically arranged two devices are identical.
Wherein, as shown in Figure 1, each HEMT includes substrate 11, nucleating layer 12, the first semiconductor layer 13, the second semiconductor layer
14, multiple metal electrodes 15 and multiple grid layer 16, wherein 11 layers of substrate is SiC layer, above-mentioned first semiconductor layer 13 is GaN
Layer, nucleating layer 12 are AlN layers, and above-mentioned second semiconductor layer 14 is AlGaN layer, and each metal electrode 15 is Ti/Al/Ti/Au (i.e. Ti
Layer, Al layer, Ti layer be sequentially stacked with Au layers) formation laminate electrode, each grid layer 16 be Ti/Au formation a lamination (i.e. Ti
Layer is set with Au stacking), multiple metal electrodes 15 divide for multiple first metal electrodes 151 and multiple second metal electrodes 152,
As shown in Figure 3, each metal electrode 15 is Ohmic contact with the contact of the second semiconductor layer 14 for specific distribution, and multiple grid layer 16 are divided
For the first grid layer 161 and the second grid layer 162, each first grid layer 161 is arranged between two adjacent the first metal electrodes 151,
Each second grid layer 162 is arranged between two adjacent the second metal electrodes 152, and each grid layer 16 connects with the second semiconductor layer 14
It touches as Schottky contacts, the first grid layer 161 and the connection of the second grid layer 162 form the grid of HEMT, and each grid layer 16 is along above-mentioned second
The width in direction is 0.25 μm;Each grid width W is 100 μm.Grid is connected on grid pad by the resistance of 10K Ω (in figure
It is not shown).
When the offset line of the first signal output end RFout1 provides the grid voltage of Vg=-5V, at device M1, M2 and M3
In off state, M1, M2 and M3 are seen as a small shutdown capacitance in device at this time, and the first collateral road is on shape
State, signal enter from signal input part RFin from the first signal output end RFout1 outputs, realize the opening state on the first collateral road
State;When the offset line of second signal output end RFout2 provides the grid of Vg'=0V, device M4, M5 and M6 are in opening state
State, device M4, M5 and M6 are equivalent to a very small series resistance, are similar to ideal conducting, and the second side branch is in isolation
State, signal are inputted from signal input part RFin, and when each HEMT of approach can be flowed into ground from HEMT, will not be exported from second signal
RFout2 outputs are held, realize the closed state of circuit.
Both sides branch is a state for opening a closing, is opened for the first collateral road in epimere, what the second side branch was closed
State can also be that the first collateral road is closed, and the state that the second side branch is opened, concrete implementation method may refer to epimere
Content.
Analogue simulation is carried out to the performance of the single-pole double-throw switch (SPDT) circuit of the embodiment using simulation softward, obtains Fig. 4 extremely
The simulation curve of Fig. 7, Fig. 4 are the simulation relation curve of the frequency and input return loss of the input port of the circuit;Fig. 5 is should
The simulation relation curve of the frequency of the output port of circuit and output return loss;Fig. 6 is the frequency and insertion loss of the circuit
Simulation relation curve;Fig. 7 is the simulation relation curve of the frequency and isolation of the circuit, the electricity it can be seen from these figures
The input return loss on road is smaller, and output return loss is smaller, and insertion loss is smaller and isolation is higher.
It can be seen from the above description that the application the above embodiments realize following technique effect:
1), the HEMT of the application is double-gated devices, is equivalent to the series connection formation of two sub- HEMT, two sub- HEMT are shared
Substrate, the first semiconductor layer and the second semiconductor layer, the grid layer connection of the two sub- HEMT so that the grid width of the HEMT (appoint by phase
Two above-mentioned second metal electrodes of two adjacent above-mentioned first metal electrodes of meaning and/or arbitrary neighborhood are on above-mentioned first direction
Overlap width be grid width) have certain increase, the power capacity of device will increase under equal conditions, and then applies and opening when it
When in powered-down road, the power capacity of the switching circuit can be promoted;Also, above-mentioned HEMT is due to can be with equivalent two device strings
Connection, therefore when device is off state, input signal is separated twice, therefore the isolation of device increases, into
And when the HEMT is applied in single-pole double-throw switch (SPDT) circuit, the isolation of the circuit can be promoted.
2), the single-pole double-throw switch (SPDT) circuit of the application is due to including above-mentioned HEMT, due to above-mentioned so that switch electricity
The isolation on road is higher, and power capacity is larger.
The foregoing is merely the preferred embodiments of the application, are not intended to limit this application, for the skill of this field
For art personnel, the application can have various modifications and variations.Within the spirit and principles of this application, any made by repair
Change, equivalent replacement, improvement etc., should be included within the protection domain of the application.
Claims (15)
1. a kind of HEMT, which is characterized in that the HEMT includes two sub- HEMT being arranged along first direction, each sub- HEMT
Including substrate, the first semiconductor layer, the second semiconductor layer and the metal electrode being sequentially stacked, wherein second semiconductor
Layer material band gap width be more than first semiconductor layer material band gap width, the metal electrode have it is multiple, and
Multiple metal electrodes include multiple first metal electrodes and multiple second metal electrodes, first metal electrode and institute
The second metal electrode to be stated to set gradually along the first direction, multiple first metal electrodes are spaced setting in a second direction,
Multiple second metal electrodes are arranged along the second direction interval, and the HEMT further includes being located at second semiconductor layer
Surface on multiple grid layer, multiple grid layer include the first grid layer set gradually along the first direction and second gate
Layer, between two adjacent first metal electrodes, second grid layer is located at two adjacent first grid layer
Between second metal electrode, first grid layer connects the grid to form the HEMT with second grid layer, and described
One direction is vertical with the second direction and vertical with the thickness direction of the second semiconductor layer.
2. HEMT according to claim 1, which is characterized in that the HEMT further includes:
Nucleating layer, between the substrate and first semiconductor layer.
3. HEMT according to claim 2, which is characterized in that the HEMT further includes:
Insert layer is located between first semiconductor layer and second semiconductor layer, and the insert layer is for promoting institute
State the excitation of the two-dimensional electron gas generated between the first semiconductor layer and second semiconductor layer.
4. HEMT according to claim 3, which is characterized in that first semiconductor layer is GaN layer, and described the second half lead
Body layer is AlGaN layer.
5. HEMT according to claim 4, which is characterized in that the nucleating layer is AlN layers.
6. HEMT according to claim 4, which is characterized in that the insert layer is AlN layers.
7. HEMT according to claim 1, which is characterized in that each grid layer is less than along the width of the second direction
0.5 μm, preferably 0.25 μm;Mutually two described second of arbitrary adjacent two first metal electrodes and/or arbitrary neighborhood
The overlap width of metal electrode in said first direction is grid width, and the grid width is between 50~150 μm, preferably 100 μm.
8. a kind of single-pole double-throw switch (SPDT) circuit, including HEMT, which is characterized in that the HEMT is any one of claim 1 to 7
The HEMT.
9. single-pole double-throw switch (SPDT) circuit according to claim 8, which is characterized in that the single-pole double-throw switch (SPDT) circuit includes
Signal input part, first voltage control terminal, second voltage control terminal, the first signal output end and second signal output end, institute
Branch centered on the branch where signal input part is stated, the branch of the both sides of the central branches is symmetrical about the central branches
And it is identical, the side branch of the central branches is the first collateral road, and the other side branch of the central branches is second collateral
Road, the first collateral road include multiple first side HEMT, and the second side branch includes multiple the second side HEMT, and described first
Side HEMT corresponds, the grid of the first side HEMT symmetrical and identical about the central branches with the second side HEMT
It is electrically connected with the first voltage control terminal, the source electrode of the grounded drain of the first side HEMT, the first side HEMT is located at
Branch road between first signal output end and the signal input part, the grid of the second side HEMT and described second
Voltage controling end is electrically connected, the grounded drain of the second side HEMT, and the source electrode of the second side HEMT, which is located at described second, to be believed
Branch road number between output end and the signal input part.
10. single-pole double-throw switch (SPDT) circuit according to claim 9, which is characterized in that the single-pole double-throw switch (SPDT) circuit is also
Including multiple resistances, the grid of each first side HEMT is controlled by a resistance and the first voltage
End electrical connection, the grid of each the second side HEMT are electrically connected by a resistance and the second voltage control terminal
It connects.
11. single-pole double-throw switch (SPDT) circuit according to claim 10, which is characterized in that the single-pole double-throw switch (SPDT) circuit is also
Including multistage microstrip line, the source electrode of each HEMT is electrically connected by the microstrip line with the signal input part, and described first
Collateral road and the second side branch include multiple microstrip lines.
12. single-pole double-throw switch (SPDT) circuit according to claim 11, which is characterized in that the single-pole double-throw switch (SPDT) circuit is also
Including capacitance, the other end of the central branches is ground terminal, and the capacitance is connected on the ground terminal and is inputted with the signal
Between end.
13. single-pole double-throw switch (SPDT) circuit according to claim 12, which is characterized in that
There are three the first side HEMT, respectively the first HEMT, the 2nd HEMT and the 3rd HEMT, and the second side HEMT has three
A, respectively the 4th HEMT, the 5th HEMT and the 6th HEMT, the first HEMT and the 4th HEMT are symmetrical and identical, institute
It states the 2nd HEMT and the 5th HEMT is symmetrical and identical, the 3rd HEMT and the 6th HEMT are symmetrical and identical;
There are six the resistances, identical about symmetrical two resistances of the central branches;
The microstrip line has eight sections, respectively first segment microstrip line, second segment microstrip line, third section microstrip line, the 4th section of micro-strip
Line, the 5th section of microstrip line, the 6th section of microstrip line, the 7th section of microstrip line and the 8th section of microstrip line, the first segment microstrip line and institute
State the branch road that second segment microstrip line is connected between the source electrode and the signal input part of the first HEMT, the third section
Microstrip line is connected on the road of the branch between the source electrode and the source electrode of the 2nd HEMT of the first HEMT, the 4th section of micro-strip
Line is connected on the road of the branch between the source electrode and the source electrode of the 3rd HEMT of the 2nd HEMT, the 5th section of microstrip line string
It is associated in the branch road between the source electrode and the first segment microstrip line of the 4th HEMT, the 6th section of microstrip line is connected on institute
The branch road between the source electrode of the 4th HEMT and the source electrode of the 5th HEMT is stated, the 7th section of microstrip line is connected on described the
Branch road between the source electrode of five HEMT and the source electrode of the 6th HEMT, the 8th section of microstrip line are connected on the first segment
Branch road between microstrip line and the ground terminal, it is identical about the symmetrical two sections of microstrip lines of the central branches;
There are one the capacitances, and the capacitance is connected between the ground terminal and the 8th section of microstrip line.
14. single-pole double-throw switch (SPDT) circuit according to claim 10, which is characterized in that the resistance value of the resistance is 4
Between~20K Ω, preferably 10K Ω.
15. single-pole double-throw switch (SPDT) circuit according to claim 9, which is characterized in that the single-pole double-throw switch (SPDT) circuit is also
Including two offset lines, two offset lines are provided to the first voltage control terminal and the second voltage control terminal respectively
Voltage.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810291686.2A CN108717943B (en) | 2018-03-30 | 2018-03-30 | HEMT and single-pole double-throw switch circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810291686.2A CN108717943B (en) | 2018-03-30 | 2018-03-30 | HEMT and single-pole double-throw switch circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
CN108717943A true CN108717943A (en) | 2018-10-30 |
CN108717943B CN108717943B (en) | 2021-08-31 |
Family
ID=63898711
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201810291686.2A Active CN108717943B (en) | 2018-03-30 | 2018-03-30 | HEMT and single-pole double-throw switch circuit |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN108717943B (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110138371A (en) * | 2019-05-15 | 2019-08-16 | 中国电子科技集团公司第十三研究所 | A kind of switching circuit and switch chip |
WO2021022913A1 (en) * | 2019-08-07 | 2021-02-11 | 南京迈矽科微电子科技有限公司 | Quarter-wavelength structure millimeter wave switch |
Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1154629A (en) * | 1997-08-06 | 1999-02-26 | New Japan Radio Co Ltd | Single-pole double-throw semiconductor switch integrated circuit |
CN1918712A (en) * | 2004-02-12 | 2007-02-21 | 国际整流器公司 | Integrated iii-nitride power devices |
US20090078965A1 (en) * | 2007-09-20 | 2009-03-26 | Briere Michael A | Individually controlled multiple iii-nitride half bridges |
CN101702627A (en) * | 2009-10-29 | 2010-05-05 | 华东师范大学 | CMOS radio frequency (RF) switch based on silicon-on-insulator (SOI) technology |
EP2634811A2 (en) * | 2012-03-02 | 2013-09-04 | Kabushiki Kaisha Toshiba | Field effect transistor |
CN103325824A (en) * | 2012-03-19 | 2013-09-25 | 富士通株式会社 | Semiconductor device and method of manufacturing the same |
EP2690657A2 (en) * | 2012-07-25 | 2014-01-29 | International Rectifier Corporation | Robust fuse-protected transistor |
CN204349944U (en) * | 2014-12-26 | 2015-05-20 | 成都华光瑞芯微电子股份有限公司 | A kind of pattern-band single-pole double-throw switch (SPDT) |
CN105810707A (en) * | 2014-12-31 | 2016-07-27 | 黄智方 | Structure of high-electron-mobility light-emitting transistor |
CN106549050A (en) * | 2015-09-17 | 2017-03-29 | 中国科学院苏州纳米技术与纳米仿生研究所 | Cascade enhancement mode HEMT device |
-
2018
- 2018-03-30 CN CN201810291686.2A patent/CN108717943B/en active Active
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1154629A (en) * | 1997-08-06 | 1999-02-26 | New Japan Radio Co Ltd | Single-pole double-throw semiconductor switch integrated circuit |
CN1918712A (en) * | 2004-02-12 | 2007-02-21 | 国际整流器公司 | Integrated iii-nitride power devices |
US20090078965A1 (en) * | 2007-09-20 | 2009-03-26 | Briere Michael A | Individually controlled multiple iii-nitride half bridges |
CN101702627A (en) * | 2009-10-29 | 2010-05-05 | 华东师范大学 | CMOS radio frequency (RF) switch based on silicon-on-insulator (SOI) technology |
EP2634811A2 (en) * | 2012-03-02 | 2013-09-04 | Kabushiki Kaisha Toshiba | Field effect transistor |
CN103325824A (en) * | 2012-03-19 | 2013-09-25 | 富士通株式会社 | Semiconductor device and method of manufacturing the same |
EP2690657A2 (en) * | 2012-07-25 | 2014-01-29 | International Rectifier Corporation | Robust fuse-protected transistor |
CN204349944U (en) * | 2014-12-26 | 2015-05-20 | 成都华光瑞芯微电子股份有限公司 | A kind of pattern-band single-pole double-throw switch (SPDT) |
CN105810707A (en) * | 2014-12-31 | 2016-07-27 | 黄智方 | Structure of high-electron-mobility light-emitting transistor |
CN106549050A (en) * | 2015-09-17 | 2017-03-29 | 中国科学院苏州纳米技术与纳米仿生研究所 | Cascade enhancement mode HEMT device |
Non-Patent Citations (2)
Title |
---|
D.P. CHANG等: "Design of High Performance HEMT Switch for S-band MSM of Satellite Transponder", 《EEE VEHICULAR TECHNOLOGY CONFERENCE PROCEEDINGS》 * |
乔瞳: "Ka波段GaN_HEMT单片集成单刀双掷开关的设计", 《中国优秀硕士学位论文全文数据库》 * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110138371A (en) * | 2019-05-15 | 2019-08-16 | 中国电子科技集团公司第十三研究所 | A kind of switching circuit and switch chip |
WO2021022913A1 (en) * | 2019-08-07 | 2021-02-11 | 南京迈矽科微电子科技有限公司 | Quarter-wavelength structure millimeter wave switch |
Also Published As
Publication number | Publication date |
---|---|
CN108717943B (en) | 2021-08-31 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN107924938B (en) | High-performance radio-frequency switch | |
US10748996B2 (en) | High power transistor with interior-fed gate fingers | |
Bahl | Control components using Si, GaAs, and GaN technologies | |
US11652461B2 (en) | Transistor level input and output harmonic terminations | |
JP2007037018A (en) | Switch circuit | |
CN108717943A (en) | HEMT and single-pole double-throw switch circuit | |
CN103414437A (en) | AB/inverse F type multi-mode power amplifier based on gallium nitride transistor with high electro mobility | |
US7368971B2 (en) | High power, high frequency switch circuits using strings of power transistors | |
Syed et al. | A highly rugged 19 dBm 28GHz PA using novel PAFET device in 45RFSOI technology achieving peak efficiency above 48% | |
CN104639135A (en) | Devices and methods related to radio-frequency switches having improved performance | |
CN105634416B (en) | A kind of interior mesh power pipe | |
CN104685704A (en) | Optimizing isolation and insertion loss of a radio frequency single-pole-double-throw switch | |
CN111916450B (en) | Cascade circuit and cascade device | |
Maune et al. | Tunable impedance matching networks for agile RF power amplifiers | |
Guo et al. | Design of a Ka-band broadband SPDT switch MMIC based on GaN HEMTs | |
Kaleem et al. | A high-power Ka-band single-pole single-throw switch MMIC using 0.25 µm GaN on SiC | |
CN108767009A (en) | Semiconductor devices and preparation method thereof | |
CN104993812B (en) | High-isolation RF switch with trapper structure | |
JPH02214125A (en) | Wireless frequency switching circuit | |
Geng et al. | Small-signal modeling of GaN HEMT switch with a new intrinsic elements extraction method | |
US8963658B2 (en) | Micropstrip transmission line/coplanar waveguide (CPW) transistor structure | |
Chaturvedi et al. | MESFET process based planar schottky diode and its application to passive power limiters | |
KR100797014B1 (en) | Hybrid switch module using GaN transistor | |
CN212725307U (en) | Cascade circuit and cascade device | |
Simin et al. | Novel approaches to microwave switching devices using nitride technology |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |