CN108666386B - P-type back contact solar cell and preparation method thereof - Google Patents
P-type back contact solar cell and preparation method thereof Download PDFInfo
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- CN108666386B CN108666386B CN201810760073.9A CN201810760073A CN108666386B CN 108666386 B CN108666386 B CN 108666386B CN 201810760073 A CN201810760073 A CN 201810760073A CN 108666386 B CN108666386 B CN 108666386B
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- 238000002360 preparation method Methods 0.000 title claims abstract description 38
- 238000002161 passivation Methods 0.000 claims abstract description 79
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 59
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 59
- 239000010703 silicon Substances 0.000 claims abstract description 59
- 239000000758 substrate Substances 0.000 claims abstract description 57
- 230000005641 tunneling Effects 0.000 claims abstract description 30
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 43
- 238000000034 method Methods 0.000 claims description 36
- 229920005591 polysilicon Polymers 0.000 claims description 22
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 18
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 15
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 15
- 239000012212 insulator Substances 0.000 claims description 14
- 229910052782 aluminium Inorganic materials 0.000 claims description 13
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 13
- 229910052709 silver Inorganic materials 0.000 claims description 12
- 239000004332 silver Substances 0.000 claims description 12
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 11
- 238000010438 heat treatment Methods 0.000 claims description 11
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 10
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 8
- 229910000676 Si alloy Inorganic materials 0.000 claims description 8
- CSDREXVUYHZDNP-UHFFFAOYSA-N alumanylidynesilicon Chemical compound [Al].[Si] CSDREXVUYHZDNP-UHFFFAOYSA-N 0.000 claims description 8
- 239000002003 electrode paste Substances 0.000 claims description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 6
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 6
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 6
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 239000010949 copper Substances 0.000 claims description 4
- 238000005468 ion implantation Methods 0.000 claims description 4
- 229910021424 microcrystalline silicon Inorganic materials 0.000 claims description 4
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- 238000009792 diffusion process Methods 0.000 claims description 2
- 238000007740 vapor deposition Methods 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 claims 3
- 238000010304 firing Methods 0.000 claims 1
- 229910021478 group 5 element Inorganic materials 0.000 claims 1
- 238000002955 isolation Methods 0.000 abstract description 6
- 238000000151 deposition Methods 0.000 description 18
- 239000002002 slurry Substances 0.000 description 15
- 238000004140 cleaning Methods 0.000 description 10
- 239000000243 solution Substances 0.000 description 10
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 9
- 229910052698 phosphorus Inorganic materials 0.000 description 9
- 239000011574 phosphorus Substances 0.000 description 9
- 238000005245 sintering Methods 0.000 description 9
- 239000011248 coating agent Substances 0.000 description 7
- 238000000576 coating method Methods 0.000 description 7
- 238000001035 drying Methods 0.000 description 7
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 6
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 6
- 238000005229 chemical vapour deposition Methods 0.000 description 6
- 230000008021 deposition Effects 0.000 description 6
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 6
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 6
- 239000011267 electrode slurry Substances 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 239000008367 deionised water Substances 0.000 description 3
- 229910021641 deionized water Inorganic materials 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 239000011259 mixed solution Substances 0.000 description 3
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 238000007639 printing Methods 0.000 description 3
- 238000007650 screen-printing Methods 0.000 description 3
- 239000000969 carrier Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000002905 metal composite material Substances 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
- H01L31/0682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells back-junction, i.e. rearside emitter, solar cells, e.g. interdigitated base-emitter regions back-junction cells
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- H01—ELECTRIC ELEMENTS
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- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
- H01L31/022458—Electrode arrangements specially adapted for back-contact solar cells for emitter wrap-through [EWT] type solar cells, e.g. interdigitated emitter-base back-contacts
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Abstract
A p-type back contact solar cell and a preparation method thereof sequentially comprise from top to bottom: the solar cell comprises a front passivation and antireflection film, a p-type silicon substrate, a passivation tunneling layer, an n-type doped film layer, a back passivation film and a cell electrode; the battery electrode comprises an anode and a cathode, wherein the anode comprises an anode thin grid line and an anode connecting electrode, and the cathode comprises a cathode thin grid line and a cathode connecting electrode; the positive thin gate line is arranged in the range of the intrinsic film layer, passes through the back passivation film, the intrinsic film layer and the passivation tunneling layer and then is contacted with the p-type silicon substrate; the negative thin grid line passes through the back passivation film and is contacted with the n-type doped film layer; the positive thin grid line is connected with the positive connecting electrode and leads out current through the positive connecting electrode, and the negative thin grid line is connected with the negative connecting electrode and leads out current through the negative connecting electrode. The intrinsic film layer is used for isolation, no contact is made in the transverse direction and the longitudinal direction of the space, the generation of leakage current is greatly reduced, and the reliability and the performance of the battery are improved.
Description
Technical Field
The invention relates to the technical field of solar cells, in particular to a p-type back contact solar cell and a preparation method thereof.
Background
Currently, with the gradual depletion of fossil energy, solar cells are increasingly used as new energy alternatives. A solar cell is a device that converts solar light energy into electrical energy. The solar cell generates carriers by utilizing the photovoltaic principle, and then the carriers are led out by using the electrodes, so that the electric energy can be effectively utilized.
Back contact cells, i.e. back contact cells, wherein p-type back contact solar cells are also called IBC cells. IBC is known as Interdigitated back contact, interdigitated back contact. The IBC battery has the biggest characteristics that the emitter and the metal contact are positioned on the back of the battery, and the front is free from the influence of shielding of the metal electrode, so that the IBC battery has higher short-circuit current Jsc, and meanwhile, the back can allow a wider metal grid line to reduce the series resistance Rs so as to improve the filling factor FF; and the front-face non-shielding battery is high in conversion efficiency and attractive in appearance, and meanwhile, the assembly of the all-back electrode is easier to assemble. IBC batteries are one of the current technical directions for realizing efficient crystalline silicon batteries.
Currently used back contact solar cells generally use an n-type sheet as a base material and silver paste is generally used on the back surface, so that when preparing IBC cells, higher concentration doping is required to be performed on the emitter and back surface field regions, so that electrode contact can be better formed in the subsequent electrode preparation process, and the cost is higher. And because of the doping process of different doping types which is required to be carried out at least twice, the process flow is longer, and particularly, when the silicon wafer is doped in the p type, higher temperature and time are required, the pn junction at the edge is difficult to remove, the complexity of the process is increased, and the process flow is prolonged.
Disclosure of Invention
The invention provides a p-type back contact solar cell and a preparation method thereof, which can better solve the problems.
In order to achieve the above object, the technical solution of the present invention is:
a p-type back contact solar cell comprising, in order from top to bottom: the device comprises a front passivation and antireflection film, a p-type silicon substrate, a passivation tunneling layer, a first film layer area, a second film layer area, a back passivation film and a battery electrode, wherein the first film layer area and the second film layer area are arranged at intervals;
the first film layer region includes: an n-type doped film layer on one side of the passivation tunneling layer, which is far away from the p-type silicon substrate;
the second film region is not additionally doped, and the second film region comprises: an intrinsic film layer on one side of the passivation tunneling layer far away from the p-type silicon substrate;
the battery electrode comprises an anode and a cathode, wherein the anode comprises an anode thin grid line and an anode connecting electrode, and the cathode comprises a cathode thin grid line and a cathode connecting electrode; the positive thin grid line is arranged in the range of the second film layer area, passes through the passivation film on the back surface, the second film layer area and the passivation tunneling layer and is contacted with the p-type silicon substrate; the negative thin grid line is arranged in the range of the first film layer area and passes through the back passivation film to form contact with the first film layer area; the positive thin grid line is connected with the positive connecting electrode and leads out current through the positive connecting electrode, and the negative thin grid line is connected with the negative connecting electrode and leads out current through the negative connecting electrode.
The first film layer area consists of one or more of polysilicon, amorphous silicon and microcrystalline silicon and is doped with V group elements; the second film layer area is composed of one or more of polysilicon, amorphous silicon and microcrystalline silicon.
The passivation tunneling layer is one of silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, silicon carbide and amorphous silicon.
The width of the first film layer area is 0.08-3 mm, and the width of the second film layer area is 0.05-1 mm.
The front passivation and antireflection film is composed of one or more of silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, silicon carbide and amorphous silicon; the back passivation film is composed of one or more of silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, silicon carbide and amorphous silicon.
And a hole doping layer with doping components of III group elements is arranged in a local contact area between the positive thin grid line and the p-type silicon substrate, and the thickness of the hole doping layer is 1-15 um.
And an aluminum-silicon alloy layer is further arranged between the hole doping layer and the positive thin grid line, and the thickness of the aluminum-silicon alloy layer is 1-5 um.
The positive thin grid line is an aluminum-containing electrode, and the width of the positive thin grid line is 20-200 um.
The negative thin grid line comprises a silver electrode, and the width of the negative thin grid line is 10-100 um.
The positive electrode connection electrode comprises one or more of silver, copper, aluminum and nickel, and the negative electrode connection electrode comprises one or more of silver, copper, aluminum and nickel.
The negative thin grid line is disconnected at the positive electrode connecting electrode, so that the connection with the positive electrode connecting electrode is avoided; the positive thin grid line is disconnected at the negative electrode connecting electrode, so that the positive thin grid line is prevented from being communicated with the negative electrode connecting electrode; the positive electrode and the negative electrode are isolated and do not cross each other.
The positive electrode connecting electrode and the negative electrode thin grid line are arranged in a crossing way, insulators are arranged at the crossing part and are mutually isolated, and the crossing part of the negative electrode connecting electrode and the positive electrode thin grid line can further comprise a layer of insulators which are mutually isolated.
A method for preparing a p-type back contact solar cell comprises the following steps,
1) Carrying out front surface texturing treatment on the p-type silicon substrate;
2) Preparing a passivation tunneling layer and a second film layer region on the back surface of the p-type silicon substrate, and forming a first film layer region and a second film layer region which are arranged at intervals;
3) Front passivation and antireflection film preparation are carried out on the front surface of the p-type silicon substrate, and back passivation film preparation is carried out on the back surface of the p-type silicon substrate;
4) Preparing a battery electrode; the positive thin grid line is contacted with the p-type silicon substrate, and the negative thin grid line is contacted with the first film layer region.
The contact between the thin grid line of the negative electrode and the first film layer area is formed by burning through the passivation film on the back surface of the electrode paste, or the electrode paste is directly contacted in the pre-opening film area.
In the electrode preparation step, the contact between the thin grid line of the negative electrode and the n-type doped film layer is formed by burning through a passivation film on the back surface of the electrode slurry, or the electrode slurry forms direct contact in a pre-opening film area.
Further, the preparation method of the intrinsic film layer on the back surface of the silicon substrate is a vapor deposition method.
Further, the forming method of the first film layer region may use a local coating collaborative heating propulsion method of an external doping source, a local ion implantation method, or a local mask collaborative gas source carrying thermal diffusion, and a local mask collaborative ion implantation method.
Further, in the electrode preparation step, the positive thin gate line is contacted with the silicon substrate, and the negative thin gate line is contacted with the back n-type doped film layer; the contact between the electrode and the doped layer can be formed by burning through the back passivation film by electrode slurry, or can be formed by directly contacting the electrode slurry in a pre-opened film area. In addition, the back surface is provided with holes for preparing contact holes of the positive electrode and the negative electrode, the arrangement mode and the shape of the holes can be optimized, so that more optimized local contact is formed on the positive electrode of the back surface, the metal composite area is reduced, and the battery performance is improved.
Further, the electrode preparation step may further include a preparation process of an insulator between the positive electrode and the negative electrode.
Compared with the prior art, the invention has the beneficial effects that:
the currently used back contact solar cell generally uses an n-type sheet as a substrate material, and silver paste is generally used on the back surface, so that the regions of the emitter and the back surface field are required to be doped with higher concentration, and electrode contact can be better formed in the subsequent electrode preparation process, and the cost is higher. And because of the doping process of different doping types which is required to be carried out at least twice, the process flow is longer, and particularly when the silicon wafer is doped with p-type, higher temperature and time are required, and the process period is increased. In the invention, the p-type sheet is used as the battery substrate, and the process of doping the p-type back surface field is canceled in the process flow, so that the complexity of the process flow is greatly reduced, and the high-temperature complex treatment process required by the doping of the p-type back surface field is avoided. In addition, the aluminum grid line is used as the battery positive electrode on the back in the battery flow, compared with silver paste which is used as the battery positive electrode, the cost is greatly reduced, and better contact can be formed on the p-type substrate without additional doping. In addition, the n-type emitter and the p-type region on the back of the battery are isolated by using the intrinsic film layer, and are not contacted in the transverse direction and the longitudinal direction of the space, so that the generation of leakage current is greatly reduced, and the reliability and the performance of the battery are improved.
Drawings
Fig. 1 is a schematic view of the battery structure of example 1;
fig. 2 is a schematic view of the battery structure of example 2;
FIG. 3 is a schematic view of an electrode of example 1;
FIG. 4 is a schematic view of an electrode in example 2;
wherein 1 is a p-type silicon substrate, 2 is a front passivation antireflection film, 3 is a passivation tunneling layer, 4 is an intrinsic film layer, 5 is an n-type doped film layer, 6 is a back passivation film, 7 is a back passivation film opening area, 8 is an anode thin gate line, 9 is a cathode thin gate line, 10 is an anode connecting electrode, 11 is a cathode connecting electrode, 12 is an insulator, 13 is a hole doped layer, and 14 is an aluminum silicon alloy layer.
Detailed Description
As shown in fig. 1, a p-type back contact solar cell of the present invention sequentially includes, from top to bottom: the front passivation and antireflection film 2, the p-type silicon substrate 1, the passivation tunneling layer 3, the first film layer region and the second film layer region which are arranged at intervals, the back passivation film 6 and the battery electrode;
the first film layer region includes: an n-type doped film layer 5 on one side of the passivation tunneling layer 3 far from the p-type silicon substrate 1;
the second film region is not additionally doped, and the second film region comprises: an intrinsic film layer 4 on the passivation tunneling layer 3 at a side far from the p-type silicon substrate 1;
the battery electrode comprises a positive electrode and a negative electrode, wherein the positive electrode comprises a positive thin grid line 8 and a positive electrode connecting electrode 10, and the negative electrode comprises a negative thin grid line 9 and a negative electrode connecting electrode 11; the positive thin grid line 8 is arranged in the range of the second film layer area, passes through the back passivation film 6, the second film layer area and the passivation tunneling layer 3 and is contacted with the p-type silicon substrate 1; the negative thin grid line 9 is arranged in the range of the first film layer area and passes through the back passivation film 6 to be in contact with the first film layer area; the positive thin gate line 8 is connected with the positive connecting electrode 10, and current is led out through the positive connecting electrode 10, and the negative thin gate line 9 is connected with the negative connecting electrode 11, and current is led out through the negative connecting electrode 11.
As shown in fig. 2, a hole doping layer 13 with a doping component of group III elements is provided in a partial contact region between the positive thin gate line 8 and the p-type silicon substrate 1, and the thickness of the hole doping layer 13 is 1 to 15um.
As shown in fig. 2, an aluminum-silicon alloy layer 14 is further included between the hole doping layer 13 and the positive thin gate line 8, and the thickness of the aluminum-silicon alloy layer 14 is 1-5 um.
As shown in fig. 3, the negative thin gate line 9 is disconnected at a positive electrode connection electrode 10 in a dividing way, so as to avoid communication with the positive electrode connection electrode 10; the positive thin grid line 8 is disconnected at the negative electrode connecting electrode 11 in a dividing way, so that the positive thin grid line is prevented from being communicated with the negative electrode connecting electrode 11; the positive electrode and the negative electrode are isolated and do not cross each other.
As shown in fig. 4, the positive electrode connection electrode 10 and the negative thin gate line 9 are arranged in a crossing manner, an insulator 12 is arranged at the crossing position to isolate each other, and the crossing position of the negative electrode connection electrode 11 and the positive thin gate line 8 can further comprise a layer of insulator 12 to isolate each other.
Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
Example 1:
the following is an example of a method for fabricating a back contact solar cell using the above structure and method, which is shown in fig. 1. The preparation method of the back contact solar cell specifically comprises the following steps:
1) The p-type silicon substrate 1 is subjected to a front surface texturing treatment. And performing damage removal treatment, surface texturing treatment and cleaning on the silicon substrate. The p-type monocrystalline silicon is used as a battery substrate, a solution containing KOH at 60 ℃ is used for damage removal treatment, a solution containing KOH is used for surface texturing treatment at 80 ℃ to form pyramid suede, the pyramid size is 2-5um, and the mixed solution of hydrofluoric acid and hydrochloric acid is used for cleaning, deionized water cleaning and drying.
2) The passivation tunneling layer 3 and the intrinsic film layer 4 are prepared on the back surface of the silicon substrate. The back side in this example is subjected to the preparation of an oxidation passivation tunneling layer 3 and an intrinsic polysilicon layer. Deposition of a tunnel oxide layer using Low Pressure Chemical Vapor Deposition (LPCVD), and deposition of intrinsic polysilicon (polysilicon), wherein the tunnel oxide layer has a thickness of 2nm and the intrinsic doped polysilicon has a thickness of 100nm.
3) The intrinsic film layer 4 is subjected to n-type region doping to form an emitter region, and the n-type doped region and the undoped region are staggered by local doping. In this embodiment an n-type doping is locally formed on the intrinsic polysilicon layer. The method for locally and graphically coating the doping slurry containing the phosphorus element on the intrinsic polycrystalline silicon layer by using the printing doping slurry comprises the steps of locally and graphically coating the doping slurry containing the phosphorus element on the intrinsic polycrystalline silicon layer, wherein the doping regions are distributed in a parallel line comb shape, the line width is 800 microns, the line spacing is 100 microns, then drying is carried out at 200 ℃, and the local n-type doping on the intrinsic polycrystalline silicon is completed under the condition of having oxygen at 840 ℃ for 20 minutes. The doped region has a sheet resistance of 80-90ohm/sq and is washed, water washed and baked with a solution containing HF after the n-type local doping is completed.
4) Passivation and antireflection film preparation are carried out on the front surface of the silicon substrate, and passivation film preparation is carried out on the back surface of the silicon substrate. And (3) depositing an aluminum oxide layer with the thickness of 80nm and the refractive index of 2.10 on the back of the battery by using enhanced plasma chemical vapor deposition (PECVD), and then depositing silicon nitride on the aluminum oxide layer to finish the preparation of the passivation film on the back.
And (3) depositing an aluminum oxide layer with the thickness of 5-10nm on the front surface of the battery by using enhanced plasma chemical vapor deposition (PECVD), and then depositing silicon nitride with the thickness of 80nm and the refractive index of 2.03 on the aluminum oxide layer to finish the preparation of the front passivation and antireflection film 2.
5) And (5) preparing a battery electrode. And (3) opening a film in an intrinsic polycrystalline silicon region without doping phosphorus on the back of the battery by using laser, wherein the opening region is linearly distributed in a region above the intrinsic undoped polycrystalline silicon, and the line width of the laser is 60nm. The scanning direction is along the doped parallel line direction, wherein the wavelength of the film-opening laser is 532nm, the scanning speed is 10000mm/s, and the frequency is 170kHz, namely, the reserved contact hole of the strip-shaped area with the line width of 60um is prepared on the strip-shaped intrinsic type area. The passivation film on the back forms an opening in the area irradiated by the light spot of the laser, the non-irradiated area is not provided with a contact hole, and after the contact hole area is provided with the laser opening, the passivation layer on the back is not provided. Making the intrinsic polysilicon labeled 4 in fig. 1 an isolation region for the p-region and n-type region, thereby preventing leakage current.
An electrode paste layer containing a conductive component is formed over the back n-region and the back p-type region of the cell by screen printing. The paste of the positive electrode thin gate line 8 and the negative electrode thin gate line 9 is sequentially coated first, then an insulator (insulating paste) material is coated, and then the paste of the positive electrode connection electrode 10 and the paste of the negative electrode connection electrode 11 are coated. The positive thin grid line 8 is composed of aluminum, the negative thin grid is composed of silver, and the grid lines of the positive electrode and the negative electrode are not connected with each other; the positive electrode fine grid is connected with the positive electrode connecting electrode, and the negative electrode connecting electrode is connected with the negative electrode fine grid; the positive thin grid line 8 and the negative thin grid line 9 are arranged in a sectional mode; the positive electrode connecting electrode 10 is arranged at the segment of the negative thin grid line 9, and the negative electrode connecting electrode 11 is arranged at the segment of the positive thin grid line 8; the positive electrode and the negative electrode are insulated from each other. The width of the positive thin gate is 80um, which completely covers the open hole area on the back passivation film, the width of the negative thin gate line 9 is 50um, the number of positive electrode connecting electrodes 10 is 4, and the number of negative electrode connecting electrodes 11 is 4. The electrode is formed as shown in fig. 3.
And (5) finishing the heating sintering treatment in a sintering furnace. The heating peak temperature is 600-800 ℃. The preferred peak temperature for the heat treatment in this example is 700 ℃. Through this step, the battery preparation is completed. In the sintering process, the thin grid line 9 of the negative electrode burns through the silicon nitride on the back surface and the emitter of the n-type doped polycrystalline silicon layer to form direct contact; the aluminum paste thin gate used by the anode can burn through the intrinsic polycrystalline silicon layer and the tunneling oxide layer in the film opening area and form direct contact with the silicon substrate.
Example 2:
the following is an example of a method for fabricating a back contact solar cell using the above structure and method, which is shown in fig. 1. The preparation method of the back contact solar cell specifically comprises the following steps:
1) The p-type silicon substrate 1 is subjected to a front surface texturing treatment. And performing damage removal treatment, surface texturing treatment and cleaning on the silicon substrate. The p-type monocrystalline silicon is used as a battery substrate, a solution containing KOH at 60 ℃ is used for damage removal treatment, a solution containing KOH is used for surface texturing treatment at 80 ℃ to form pyramid suede, the pyramid size is 2-5um, and the mixed solution of hydrofluoric acid and hydrochloric acid is used for cleaning, deionized water cleaning and drying.
2) The passivation tunneling layer 3 and the intrinsic film layer 4 are prepared on the back surface of the silicon substrate. The back side in this example is subjected to the preparation of an oxidation passivation tunneling layer 3 and an intrinsic polysilicon layer. Deposition of a tunnel oxide layer using Low Pressure Chemical Vapor Deposition (LPCVD), and deposition of intrinsic polysilicon (polysilicon), wherein the tunnel oxide layer has a thickness of 2nm and the intrinsic polysilicon has a thickness of 100nm.
3) The intrinsic film layer 4 is subjected to n-type region doping to form an emitter region, and the n-type doped region and the undoped region are staggered by local doping. In this embodiment an n-type doping is locally formed on the intrinsic polysilicon layer. The method for locally and graphically coating the doping slurry containing the phosphorus element on the intrinsic polycrystalline silicon layer by using the printing doping slurry comprises the steps of locally and graphically coating the doping slurry containing the phosphorus element on the intrinsic polycrystalline silicon layer, wherein the doping regions are distributed in a parallel line comb shape, the line width is 800 microns, the line spacing is 100 microns, then drying is carried out at 200 ℃, and the local n-type doping on the intrinsic polycrystalline silicon is completed under the condition of having oxygen at 840 ℃ for 20 minutes. And the square resistance of the doped region is 80-90 omega/≡and after the n-type local doping is finished, cleaning, water washing and drying are carried out by using a solution containing HF.
4) Passivation and antireflection film preparation are carried out on the front surface of the silicon substrate, and passivation film preparation is carried out on the back surface of the silicon substrate. And (3) depositing an aluminum oxide layer with the thickness of 80nm and the refractive index of 2.10 on the back of the battery by using enhanced plasma chemical vapor deposition (PECVD), and then depositing silicon nitride on the aluminum oxide layer to finish the preparation of the passivation film on the back. And (3) depositing an aluminum oxide layer with the thickness of 5-10nm on the front surface of the battery by using enhanced plasma chemical vapor deposition (PECVD), and then depositing silicon nitride with the thickness of 80nm and the refractive index of 2.03 on the aluminum oxide layer to finish the preparation of the front passivation and antireflection film 2.
5) And (5) preparing a battery electrode. And (3) opening a film in an intrinsic polycrystalline silicon region without doping phosphorus on the back of the battery by using laser, wherein the opening region is linearly distributed in a region above the intrinsic undoped polycrystalline silicon, and the line width of the laser is 60nm. The scanning direction is along the doped parallel line direction, wherein the wavelength of the film-opening laser is 532nm, the scanning speed is 10000mm/s, and the frequency is 170kHz, namely, the reserved contact hole of the strip-shaped area with the line width of 60um is prepared on the strip-shaped intrinsic type area. The passivation film on the back forms an opening in the area irradiated by the light spot of the laser, the non-irradiated area is not provided with a contact hole, and after the contact hole area is provided with the laser opening, the passivation layer on the back is not provided. Making the intrinsic polysilicon labeled 4 in fig. 1 an isolation region for the p-region and n-type region, thereby preventing leakage current.
An electrode paste layer containing a conductive component is formed over the back n-region and the back p-type region of the cell by screen printing. The slurries of the positive electrode thin gate line 8 and the negative electrode thin gate line 9 are sequentially coated first, then an insulator material is coated, and then the slurry of the positive electrode connection electrode 10 and the slurry of the negative electrode connection electrode 11 are coated. The positive thin grid line 8 is composed of aluminum, the negative thin grid is composed of silver, and the grid lines of the positive electrode and the negative electrode are not connected with each other; the positive electrode fine grid is connected with the positive electrode connecting electrode, and the negative electrode connecting electrode is connected with the negative electrode fine grid; an insulator is printed between the connecting electrode of the positive electrode and the fine grid of the negative electrode for isolation, and an insulator is printed between the connecting electrode of the negative electrode and the fine grid of the positive electrode for isolation. The width of the positive thin gate is 120um, which completely covers the open hole area on the passivation film on the back, the width of the negative thin gate line 9 is 50um, the number of positive electrode connecting electrodes 10 is 4, and the number of negative electrode connecting electrodes 11 is 4.
And (5) finishing the heating sintering treatment in a sintering furnace. The heating peak temperature is 600-800 ℃. The preferred peak temperature for the heat treatment in this example is 700 ℃. Through this step, the battery preparation is completed. In the sintering process, the thin grid line 9 of the negative electrode burns through the silicon nitride on the back surface and the emitter of the n-type doped polycrystalline silicon layer to form direct contact; the aluminum paste thin gate used by the anode can burn through the intrinsic polycrystalline silicon layer and the tunneling oxide layer in the film opening area and form direct contact with the silicon substrate. An electrode as illustrated in fig. 4 is formed. The cell structure is shown in fig. 1.
Example 3:
the following is an example of a method for fabricating a back contact solar cell using the above structure and method, which is a structure as shown in fig. 2. The preparation method of the back contact solar cell specifically comprises the following steps:
1) The p-type silicon substrate 1 is subjected to a front surface texturing treatment. And performing damage removal treatment, surface texturing treatment and cleaning on the silicon substrate. The p-type monocrystalline silicon is used as a battery substrate, a solution containing KOH at 60 ℃ is used for damage removal treatment, a solution containing KOH is used for surface texturing treatment at 80 ℃ to form pyramid suede, the pyramid size is 2-5um, and the mixed solution of hydrofluoric acid and hydrochloric acid is used for cleaning, deionized water cleaning and drying.
2) The passivation tunneling layer 3 and the intrinsic film layer 4 are prepared on the back surface of the silicon substrate. The back side in this example is subjected to the preparation of an oxidation passivation tunneling layer 3 and an intrinsic polysilicon layer. Deposition of a tunnel oxide layer using Low Pressure Chemical Vapor Deposition (LPCVD), and deposition of intrinsic polysilicon (polysilicon), wherein the tunnel oxide layer has a thickness of 2nm and the intrinsic doped polysilicon has a thickness of 100nm.
3) The intrinsic film layer 4 is subjected to n-type region doping to form an emitter region, and the n-type doped region and the undoped region are staggered by local doping. In this embodiment an n-type doping is locally formed on the intrinsic polysilicon layer. The method for locally and graphically coating the doping slurry containing the phosphorus element on the intrinsic polycrystalline silicon layer by using the printing doping slurry comprises the steps of locally and graphically coating the doping slurry containing the phosphorus element on the intrinsic polycrystalline silicon layer, wherein the doping regions are distributed in a parallel line comb shape, the line width is 800 microns, the line spacing is 100 microns, then drying is carried out at 200 ℃, and the local n-type doping on the intrinsic polycrystalline silicon is completed under the condition of having oxygen at 840 ℃ for 20 minutes. The doped region has a sheet resistance of 80-90ohm/sq and is washed, water washed and baked with a solution containing HF after the n-type local doping is completed.
4) Passivation and antireflection film preparation are carried out on the front surface of the silicon substrate, and passivation film preparation is carried out on the back surface of the silicon substrate. And (3) depositing an aluminum oxide layer with the thickness of 80nm and the refractive index of 2.10 on the back of the battery by using enhanced plasma chemical vapor deposition (PECVD), and then depositing silicon nitride on the aluminum oxide layer to finish the preparation of the passivation film on the back.
And (3) depositing an aluminum oxide layer with the thickness of 5-10nm on the front surface of the battery by using enhanced plasma chemical vapor deposition (PECVD), and then depositing silicon nitride with the thickness of 80nm and the refractive index of 2.03 on the aluminum oxide layer to finish the preparation of the front passivation and antireflection film 2.
5) And (5) preparing a battery electrode. And (3) opening a film in an intrinsic polycrystalline silicon region without doping phosphorus on the back of the battery by using laser, wherein the opening region is linearly distributed in a region above the intrinsic undoped polycrystalline silicon, and the line width of the laser is 60nm. The scanning direction is along the doped parallel line direction, wherein the wavelength of the film-opening laser is 532nm, the scanning speed is 10000mm/s, and the frequency is 170kHz, namely, the reserved contact hole of the strip-shaped area with the line width of 60um is prepared on the strip-shaped intrinsic type area. The passivation film on the back forms an opening in the area irradiated by the light spot of the laser, the non-irradiated area is not provided with a contact hole, and after the contact hole area is provided with the laser opening, the passivation layer on the back is not provided. Making the intrinsic polysilicon labeled 4 in fig. 1 an isolation region for the p-region and n-type region, thereby preventing leakage current.
An electrode paste layer containing a conductive component is formed over the back n-region and the back p-type region of the cell by screen printing. The slurries of the positive electrode thin gate line 8 and the negative electrode thin gate line 9 are sequentially coated first, then an insulator material is coated, and then the slurry of the positive electrode connection electrode 10 and the slurry of the negative electrode connection electrode 11 are coated. The positive thin grid line 8 is composed of aluminum, the negative thin grid is composed of silver, and the grid lines of the positive electrode and the negative electrode are not connected with each other; the positive electrode fine grid is connected with the positive electrode connecting electrode, and the negative electrode connecting electrode is connected with the negative electrode fine grid; the positive thin grid line 8 and the negative thin grid line 9 are arranged in a sectional mode; the positive electrode connecting electrode 10 is arranged at the segment of the negative thin grid line 9, and the negative electrode connecting electrode 11 is arranged at the segment of the positive thin grid line 8; the positive electrode and the negative electrode are insulated from each other. The width of the positive thin gate is 80um, which completely covers the open hole area on the back passivation film, the width of the negative thin gate line 9 is 50um, the number of positive electrode connecting electrodes 10 is 4, and the number of negative electrode connecting electrodes 11 is 4. The electrode is formed as shown in fig. 2.
And (5) finishing the heating sintering treatment in a sintering furnace. The heating peak temperature is 600-800 ℃. The preferred peak temperature for the heat treatment in this example is 700 ℃. Through this step, the battery preparation is completed. In the sintering process, the thin grid line 9 of the negative electrode burns through the silicon nitride on the back surface and the emitter of the n-type doped polycrystalline silicon layer to form direct contact; the aluminum paste thin gate used by the anode can burn through the intrinsic polycrystalline silicon layer and the tunneling oxide layer in the film opening area and form direct contact with the silicon substrate. In the finally formed solar cell, an aluminum-doped hole layer 13 and an aluminum-silicon alloy layer 14 are formed between the positive thin grid line 8 and the silicon substrate. The resulting cell structure is shown in fig. 3.
The above embodiments of the present invention are examples, and all embodiments having the same technical ideas and exerting the same effects as the technical ideas described in the claims of the present invention are included in the present invention.
Claims (17)
1. A p-type back contact solar cell, comprising, in order from top to bottom: the device comprises a front passivation and antireflection film (2), a p-type silicon substrate (1), a passivation tunneling layer (3), a first film layer area, a second film layer area, a back passivation film (6) and a battery electrode, wherein the first film layer area and the second film layer area are arranged at intervals;
the first film layer region includes: an n-type doped film layer (5) on one side of the passivation tunneling layer (3) far away from the p-type silicon substrate (1);
the second film region is not additionally doped, and the second film region comprises: an intrinsic film layer (4) on one side of the passivation tunneling layer (3) far away from the p-type silicon substrate (1);
the battery electrode comprises a positive electrode and a negative electrode, wherein the positive electrode comprises a positive thin grid line (8) and a positive electrode connecting electrode (10), and the negative electrode comprises a negative thin grid line (9) and a negative electrode connecting electrode (11); the positive thin grid line (8) is arranged in the range of the second film layer area, passes through the back passivation film (6), the second film layer area and the passivation tunneling layer (3) and then is contacted with the p-type silicon substrate (1); the negative thin grid line (9) is arranged in the range of the first film layer area and passes through the back passivation film (6) to be in contact with the first film layer area; the positive thin grid line (8) is connected with the positive connecting electrode (10) and leads out current through the positive connecting electrode (10), and the negative thin grid line (9) is connected with the negative connecting electrode (11) and leads out current through the negative connecting electrode (11).
2. The p-type back contact solar cell of claim 1, wherein the first film region is comprised of one or more of polysilicon, amorphous silicon, microcrystalline silicon, and doped with a group V element; the second film layer area is composed of one or more of polysilicon, amorphous silicon and microcrystalline silicon.
3. The p-type back contact solar cell according to claim 1, wherein the passivation tunneling layer (3) is one of silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, silicon carbide and amorphous silicon.
4. The p-type back contact solar cell of claim 1, wherein the first film region has a width of 0.08 to 3mm and the second film region has a width of 0.05 to 1mm.
5. The p-type back contact solar cell according to claim 1, wherein the front passivation and antireflection film (2) is composed of one or more of silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, silicon carbide, amorphous silicon; the back passivation film (6) is composed of one or more of silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, silicon carbide and amorphous silicon.
6. The p-type back contact solar cell according to claim 1, wherein a hole doping layer (13) with a doping component of III group elements is arranged in a local contact area between the positive thin grid line (8) and the p-type silicon substrate (1), and the thickness of the hole doping layer (13) is 1-15 um.
7. The p-type back contact solar cell according to claim 6, wherein an aluminum-silicon alloy layer (14) is further included between the hole doped layer (13) and the positive thin gate line (8), and the thickness of the aluminum-silicon alloy layer (14) is 1-5 um.
8. The p-type back contact solar cell according to claim 1, wherein the positive thin-gate line (8) is an aluminum-containing electrode, and the width of the positive thin-gate line (8) is 20-200 um.
9. The p-type back contact solar cell according to claim 1, characterized in that the negative thin-gate line (9) comprises an electrode of silver, the width of the negative thin-gate line (9) being 10um to 100um.
10. The p-type back contact solar cell according to claim 1, wherein the positive connection electrode (10) comprises one or more of silver, copper, aluminum, nickel, and the negative connection electrode (11) comprises one or more of silver, copper, aluminum, nickel.
11. The p-type back contact solar cell according to any one of claims 1 to 10, wherein the negative thin-gate line (9) is disconnected at a positive connection electrode (10) by a division, avoiding communication with the positive connection electrode (10); the positive thin grid line (8) is disconnected at the negative electrode connecting electrode (11) in a dividing way, so that the positive thin grid line is prevented from being communicated with the negative electrode connecting electrode (11); the positive electrode and the negative electrode are isolated and do not cross each other.
12. The p-type back contact solar cell according to any one of claims 1 to 10, wherein the positive electrode connection electrode (10) and the negative thin-gate line (9) are arranged to intersect, an insulator (12) is arranged at the intersection to isolate each other, and a layer of insulator (12) is arranged at the intersection of the negative electrode connection electrode (11) and the positive thin-gate line (8) to isolate each other.
13. A preparation method of a p-type back contact solar cell is characterized by comprising the following steps,
1) Carrying out front surface texturing treatment on the p-type silicon substrate (1);
2) Preparing a passivation tunneling layer (3) and a second film region on the back surface of a p-type silicon substrate (1), and forming a first film region and a second film region which are arranged at intervals;
3) Front passivation and antireflection film (2) preparation are carried out on the front surface of the p-type silicon substrate (1), and back passivation film (6) preparation is carried out on the back surface of the p-type silicon substrate (1);
4) Preparing a battery electrode; the positive thin grid line (8) is contacted with the p-type silicon substrate (1), and the negative thin grid line (9) is contacted with the first film layer area;
the positive thin grid line is arranged in the range of the second film layer area, passes through the passivation film on the back surface, the second film layer area and the passivation tunneling layer and is contacted with the p-type silicon substrate;
the second film region is not additionally doped, and the second film region comprises: and passivating the intrinsic film layer on the side of the tunneling layer away from the p-type silicon substrate.
14. The method for manufacturing a p-type back contact solar cell according to claim 13, wherein the contact between the negative thin gate line (9) and the first film layer region is formed by firing electrode paste through a back passivation film or is formed by directly contacting electrode paste in a pre-opening film region.
15. The method of claim 13, wherein the forming the first film region is performed by using a locally-coated hybrid material combined with a heating propulsion method, a locally-implanted ion implantation method, or a locally-masked hybrid gas-carried thermal diffusion and a locally-masked hybrid ion implantation method.
16. The method of manufacturing a p-type back contact solar cell according to claim 13 or 15, characterized in that the method of manufacturing the intrinsic film layer (4) is a vapor deposition method.
17. The method of claim 13, further comprising a step of preparing an insulator between the positive electrode and the negative electrode.
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| CN113690334A (en) * | 2021-08-11 | 2021-11-23 | 浙江中晶新能源股份有限公司 | P-type heterojunction all-back-electrode contact crystalline silicon photovoltaic cell and preparation method thereof |
| CN114188431B (en) * | 2021-10-22 | 2024-02-02 | 泰州隆基乐叶光伏科技有限公司 | Solar cell and preparation method thereof |
| CN114823968A (en) * | 2022-03-11 | 2022-07-29 | 浙江爱旭太阳能科技有限公司 | Preparation method of P-type back contact solar cell, cell structure, assembly and power generation system |
| CN117253929B (en) * | 2023-11-16 | 2024-04-09 | 隆基绿能科技股份有限公司 | Back contact battery and manufacturing method thereof |
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