CN108598174A - 阵列基板的制作方法 - Google Patents
阵列基板的制作方法 Download PDFInfo
- Publication number
- CN108598174A CN108598174A CN201810439398.7A CN201810439398A CN108598174A CN 108598174 A CN108598174 A CN 108598174A CN 201810439398 A CN201810439398 A CN 201810439398A CN 108598174 A CN108598174 A CN 108598174A
- Authority
- CN
- China
- Prior art keywords
- production method
- array substrate
- layer
- metal layer
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 51
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 26
- 229910052751 metal Inorganic materials 0.000 claims abstract description 40
- 239000002184 metal Substances 0.000 claims abstract description 40
- 239000004065 semiconductor Substances 0.000 claims abstract description 19
- 239000010410 layer Substances 0.000 claims description 98
- 238000012545 processing Methods 0.000 claims description 21
- 239000000463 material Substances 0.000 claims description 16
- 239000010949 copper Substances 0.000 claims description 14
- 239000002346 layers by function Substances 0.000 claims description 14
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 13
- 230000004888 barrier function Effects 0.000 claims description 13
- 229910052802 copper Inorganic materials 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 13
- 238000009832 plasma treatment Methods 0.000 claims description 10
- 238000002161 passivation Methods 0.000 claims description 9
- 239000007789 gas Substances 0.000 claims description 8
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 6
- 239000011733 molybdenum Substances 0.000 claims description 6
- 229910052750 molybdenum Inorganic materials 0.000 claims description 6
- 239000001307 helium Substances 0.000 claims description 4
- 229910052734 helium Inorganic materials 0.000 claims description 4
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical group [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims description 4
- 210000002381 plasma Anatomy 0.000 claims description 4
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 230000003746 surface roughness Effects 0.000 abstract description 23
- 238000003851 corona treatment Methods 0.000 abstract description 6
- 239000010408 film Substances 0.000 description 7
- 239000004973 liquid crystal related substance Substances 0.000 description 7
- 239000004411 aluminium Substances 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 239000013078 crystal Substances 0.000 description 3
- 238000011161 development Methods 0.000 description 3
- 239000007769 metal material Substances 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 210000004027 cell Anatomy 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- WUUZKBJEUBFVMV-UHFFFAOYSA-N copper molybdenum Chemical compound [Cu].[Mo] WUUZKBJEUBFVMV-UHFFFAOYSA-N 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- HTCXJNNIWILFQQ-UHFFFAOYSA-M emmi Chemical compound ClC1=C(Cl)C2(Cl)C3C(=O)N([Hg]CC)C(=O)C3C1(Cl)C2(Cl)Cl HTCXJNNIWILFQQ-UHFFFAOYSA-M 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 239000000565 sealant Substances 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28079—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a single metal, e.g. Ta, W, Mo, Al
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/7866—Non-monocrystalline silicon transistors
- H01L29/78663—Amorphous silicon transistors
- H01L29/78669—Amorphous silicon transistors with inverted-type structure, e.g. with bottom gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/7866—Non-monocrystalline silicon transistors
- H01L29/78672—Polycrystalline or microcrystalline silicon transistor
- H01L29/78678—Polycrystalline or microcrystalline silicon transistor with inverted-type structure, e.g. with bottom gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Thin Film Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
本发明提供一种阵列基板的制作方法。所述阵列基板的制作方法通过对第一金属层的表面进行等离子体处理,减少第一金属层的表面粗糙度,从而减少由第一金属层制得的栅极的表面粗糙度,避免因栅极表面粗糙度过大而引起半导体层的表面粗糙度过大,改善TFT的器件特性。
Description
技术领域
本发明涉及显示技术领域,尤其涉及一种阵列基板的制作方法。
背景技术
随着显示技术的发展,液晶显示器(Liquid Crystal Display,LCD)等平面显示装置因具有高画质、省电、机身薄及应用范围广等优点,而被广泛的应用于手机、电视、个人数字助理、数字相机、笔记本电脑、台式计算机等各种消费性电子产品,成为显示装置中的主流。
通常液晶显示面板由彩膜(CF,Color Filter)基板、薄膜晶体管阵列(TFT,ThinFilm Transistor)基板、夹于彩膜基板与薄膜晶体管基板之间的液晶(LC,LiquidCrystal)及密封胶框(Sealant)组成,其成型工艺一般包括:前段阵列(Array)制程(薄膜、黄光、蚀刻及剥膜)、中段成盒(Cell)制程(TFT基板与CF基板贴合)及后段模组组装制程(驱动集成电路(IC)与印刷电路板压合)。其中,前段Array制程主要是形成TFT基板,以便于控制液晶分子的运动;中段Cell制程主要是在TFT基板与CF基板之间添加液晶;后段模组组装制程主要是驱动IC压合与印刷电路板的整合,进而驱动液晶分子转动,显示图像。
现有技术中,一般金属铝作为阵列基板中的导电金属材料,随着显示技术的发展,人们对显示面板尺寸、分辨率和画面刷新速率的要求越来越高,具有较高电阻率的金属铝在高品质显示面板中已经不足以满足技术需要,因此提出了一种采用金属铜取代金属铝作为阵列基板的导电金属材料的技术方案,但在采用金属铜作为阵列基板的导电金属材料的技术方案中,铜膜的表面粗糙度很高,尤其是在大尺寸的显示面板中,铜膜的厚度相对更大,其表面粗糙度也更大,例如10000埃米的铜膜其表面粗糙度科可达5nm,晶粒峰高出平均界面超过500埃,在利用粗糙度较高的铜膜制作栅极时,沉积在栅极上的栅极绝缘层及半导体层,其形貌会和栅极表面保持一致,粗糙度也会较大,对于厚度较薄的半导体层来说,其表面粗糙度过大,会导致其器件特性变差,影响显示面板的品质。
发明内容
本发明的目的在于提供一种阵列基板的制作方法,能够减少栅极表面的粗糙度,避免因栅极表面粗糙度过大而引起半导体层的表面粗糙度过大,改善TFT的器件特性。
为实现上述目的,本发明提供一种阵列基板的制作方法,包括如下步骤:
步骤S1、提供一基板,在所述基板上形成第一金属层;
步骤S2、对所述第一金属层进行等离子处理,减小第一金属层的表面粗糙度;
步骤S3、图案化所述第一金属层,形成栅极;
步骤S4、在所述栅极及基板上沉积栅极绝缘层;
步骤S5、在所述栅极上方的栅极绝缘层上形成半导体层;
步骤S6、在所述栅极绝缘层上形成分别与所述半导体层的两端接触的源极和漏极。
所述第一金属层包括:位于所述基板上的阻挡层及覆盖所述阻挡层的导电功能层。
所述阻挡层的材料为钼,所述导电功能层的材料为铜。
所述阻挡层的厚度为100~500埃米,所述导电功能层的厚度大于500埃米。
所述步骤S2中对第一金属层进行等离子处理时采用的处理气体为氦气。
所述步骤S2中等离子体处理时处理气体的流量为100sccm~1000sccm,能量为1kW~4kW,处理时间为10s~100s。
所述阵列基板的制作方法还包括:步骤S7、在所述栅极绝缘层、半导体层、源极及漏极上形成钝化层,在所述钝化层上形成像素电极。
所述步骤S7还形成贯穿所述钝化层并暴露出所述漏极的一部分的过孔,所述像素电极通过所述过孔与漏极接触。
所述步骤S1中采用溅射镀膜工艺形成第一金属层。
所述步骤S2中的等离子处理在真空腔室中进行。
本发明的有益效果:本发明提供一种阵列基板的制作方法,通过对第一金属层的表面进行等离子体处理,减少第一金属层的表面粗糙度,从而减少由第一金属层制得的栅极的表面粗糙度,避免因栅极表面粗糙度过大而引起半导体层的表面粗糙度过大,改善TFT的器件特性。
附图说明
为了能更进一步了解本发明的特征以及技术内容,请参阅以下有关本发明的详细说明与附图,然而附图仅提供参考与说明用,并非用来对本发明加以限制。
附图中,
图1为本发明的阵列基板的制作方法的步骤S1的示意图;
图2为本发明的阵列基板的制作方法的步骤S2的示意图;
图3为本发明的阵列基板的制作方法的步骤S3的示意图;
图4为本发明的阵列基板的制作方法的步骤S4至步骤S7的示意图;
图5为本发明的阵列基板的制作方法的流程图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图5,本发明提供一种阵列基板的制作方法,包括如下步骤:
步骤S1、提供一基板10,在所述基板上形成第一金属层20’。
具体地,如图1所示,在本发明的优选实施例中,所述第一金属层20’包括:两个层叠的膜层,分别为位于所述基板10上的阻挡层21及覆盖所述阻挡层21的导电功能层22。
优选地,所述阻挡层21的材料为钼(Mo),导电功能层22的材料为铜(Cu),通过设置所述导电功能层22的材料为铜能够降低阵列基板中导电材料的电阻率,满足大尺寸,高解析率的显示面板的要求。优选地,所述阻挡层21的厚度为100~500埃米,所述导电功能层22的厚度大于5000埃米。
当然,所述第一金属层20’的组成不限于上述的阻挡层21和导电功能层22组成的结构,材料也不局限与钼和铜,其他合适的结构和材料同样适用于本发明。
具体地,所述步骤S1中通过溅射镀膜(PVD sputter)工艺制作所述第一金属层20’。
步骤S2、如图2所示,对所述第一金属层20’进行等离子处理,减小第一金属层20’的表面粗糙度。
具体地,所述步骤S2具体包括:将所述制作有第一金属层20’的基板10放入真空腔室中,对所述第一金属层20’进行等离子处理,通过处理气体的原子轰击第一金属层20’的表面,将凸起的第一金属层20’的晶体峰轰击平整,达到减少第一金属层20’的表面粗糙度的目的。
需要说明的是,所述等离子处理需选用的原子半径较小的处理气体,以避免在轰击时造成第一金属层20’的表面产生损伤,优选地,所述处理气体为氦气(He),以上述优选实施例为例,在实验中利用氦气对5000埃米的由铜制成的导电功能层22进行等离子处理,可将其表面粗糙度由3.48nm降低至3.14nm。
进一步地,所述步骤S2中等离子体处理的处理气体的流量为100sccm~1000sccm,能量为1kW~4kW,处理时间为10s~100s,其中,对于等离子体处理时的能量控制需要在操作过程中格外注意,以避免能量过大对所述第一金属层20’的表面造成新的损伤。
可选地,所述导电功能层22的材料也可以替换为铝(Al),当导电功能层22的材料为铝时,通过等离子体处理同样可以达到减少导电功能层22的表面粗糙度的目的。
步骤S3、如图3所示,图案化所述第一金属层20’,形成栅极20。
具体地,所述步骤S3通过曝光、显影及湿蚀刻制程图案化所述第一金属层20’,以得到栅极20,此时栅极20的表面经过等离子体处理,粗糙度较小。
步骤S4、如图4所示,在所述栅极20及基板10上沉积栅极绝缘层30。
具体地,所述栅极绝缘层30的材料为氧化硅及氮化硅中的一种或二者的组合。
步骤S5、如图4所示,在所述栅极20上方的栅极绝缘层30上形成半导体层40。
具体地,所述半导体层40的材料为非晶硅、多晶硅或氧化物半导体。
需要说明的是,由于栅极20的表面经过等离子处理,其表面粗糙度较低,层叠于栅极20上的栅极绝缘层30及位于所述栅极20上方的栅极绝缘层30上的半导体层40的粗糙度也较低,能够有效避免半导体层40的粗糙度过大而导致的TFT的器件性能下降。
步骤S6、如图4所示,在所述栅极绝缘层30上形成分别与所述半导体层40的两端接触的源极50和漏极60。
具体地,所述源极50和漏极60的材料为钼、铝及铜中的一种或多种的组合,优选地,所述源极50和漏极60与栅极20的结构相同,由一钼层51和层叠于钼层51上的铜层52构成。
进一步地,所述半导体层40、源极50和漏极60可通过一道半色调光罩或灰阶光罩一同制得,也可分别通过两道常规光罩分别制得。
步骤S7、如图4所示,在所述栅极绝缘层30、半导体层40、源极50及漏极60上形成钝化层70,在所述钝化层70上形成像素电极80。
具体地,所述步骤S7还形成贯穿所述钝化层70并暴露出所述漏极60的一部分的过孔71,所述像素电极80通过所述过孔71与漏极60接触。
优选地,所述钝化层70的材料为氧化硅及氮化硅中的一种或二者的组合,所述过孔71通过对所述一道光罩制程制得,所述像素电极80的材料为氧化铟锡。
综上所述,本发明提供一种阵列基板的制作方法,通过对第一金属层的表面进行等离子体处理,减少第一金属层的表面粗糙度,从而减少由第一金属层制得的栅极的表面粗糙度,避免因栅极表面粗糙度过大而引起半导体层的表面粗糙度过大,改善TFT的器件特性。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明权利要求的保护范围。
Claims (10)
1.一种阵列基板的制作方法,其特征在于,包括如下步骤:
步骤S1、提供一基板(10),在所述基板上形成第一金属层(20’);
步骤S2、对所述第一金属层(20’)进行等离子处理,减小第一金属层(20’)的表面粗糙度;
步骤S3、图案化所述第一金属层(20’),形成栅极(20);
步骤S4、在所述栅极(20)及基板(10)上沉积栅极绝缘层(30);
步骤S5、在所述栅极(20)上方的栅极绝缘层(30)上形成半导体层(40);
步骤S6、在所述栅极绝缘层(30)上形成分别与所述半导体层(40)的两端接触的源极(50)和漏极(60)。
2.如权利要求1所述的阵列基板的制作方法,其特征在于,所述第一金属层(20’)包括:位于所述基板(10)上的阻挡层(21)及覆盖所述阻挡层(21)的导电功能层(22)。
3.如权利要求2所述的阵列基板的制作方法,其特征在于,所述阻挡层(21)的材料为钼,所述导电功能层(22)的材料为铜。
4.如权利要求2所述的阵列基板的制作方法,其特征在于,所述阻挡层(21)的厚度为100~500埃米,所述导电功能层(22)的厚度大于500埃米。
5.如权利要求1所述的阵列基板的制作方法,其特征在于,所述步骤S2中对第一金属层(20’)进行等离子处理时采用的处理气体为氦气。
6.如权利要求1所述的阵列基板的制作方法,其特征在于,所述步骤S2中等离子体处理时处理气体的流量为100sccm~1000sccm,能量为1kW~4kW,处理时间为10s~100s。
7.如权利要求1所述的阵列基板的制作方法,其特征在于,还包括:步骤S7、在所述栅极绝缘层(30)、半导体层(40)、源极(50)及漏极(60)上形成钝化层(70),在所述钝化层(70)上形成像素电极(80)。
8.如权利要求7所述的阵列基板的制作方法,其特征在于,所述步骤S7还形成贯穿所述钝化层(70)并暴露出所述漏极(60)的一部分的过孔(71),所述像素电极(80)通过所述过孔(71)与漏极(60)接触。
9.如权利要求1所述的阵列基板的制作方法,其特征在于,所述步骤S1中采用溅射镀膜工艺形成第一金属层(20’)。
10.如权利要求1所述的阵列基板的制作方法,其特征在于,所述步骤S2中的等离子处理在真空腔室中进行。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810439398.7A CN108598174A (zh) | 2018-05-09 | 2018-05-09 | 阵列基板的制作方法 |
PCT/CN2019/083176 WO2019214413A1 (zh) | 2018-05-09 | 2019-04-18 | 阵列基板的制作方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810439398.7A CN108598174A (zh) | 2018-05-09 | 2018-05-09 | 阵列基板的制作方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN108598174A true CN108598174A (zh) | 2018-09-28 |
Family
ID=63636621
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201810439398.7A Pending CN108598174A (zh) | 2018-05-09 | 2018-05-09 | 阵列基板的制作方法 |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN108598174A (zh) |
WO (1) | WO2019214413A1 (zh) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109991787A (zh) * | 2019-03-15 | 2019-07-09 | 惠科股份有限公司 | 一种阵列基板及其制作方法 |
WO2019214413A1 (zh) * | 2018-05-09 | 2019-11-14 | 深圳市华星光电半导体显示技术有限公司 | 阵列基板的制作方法 |
CN112885848A (zh) * | 2021-01-29 | 2021-06-01 | Tcl华星光电技术有限公司 | 阵列基板及显示装置 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101465296A (zh) * | 2007-12-19 | 2009-06-24 | 三菱电机株式会社 | 薄膜晶体管及其制造方法和显示装置 |
JP2010093165A (ja) * | 2008-10-10 | 2010-04-22 | Konica Minolta Holdings Inc | 電極の製造方法、これを用いた薄膜トランジスタ素子及び有機エレクトロルミネッセンス素子 |
CN104716201A (zh) * | 2015-04-03 | 2015-06-17 | 合肥鑫晟光电科技有限公司 | 薄膜晶体管及其制作方法、阵列基板、显示设备 |
CN104979276A (zh) * | 2014-04-09 | 2015-10-14 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件的制造方法 |
CN106803485A (zh) * | 2017-03-21 | 2017-06-06 | 深圳市华星光电技术有限公司 | 一种薄膜晶体管及其制备方法、显示器 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102068956B1 (ko) * | 2012-02-15 | 2020-01-23 | 엘지디스플레이 주식회사 | 박막트랜지스터, 박막트랜지스터 어레이 기판 및 이의 제조방법 |
CN108598174A (zh) * | 2018-05-09 | 2018-09-28 | 深圳市华星光电半导体显示技术有限公司 | 阵列基板的制作方法 |
-
2018
- 2018-05-09 CN CN201810439398.7A patent/CN108598174A/zh active Pending
-
2019
- 2019-04-18 WO PCT/CN2019/083176 patent/WO2019214413A1/zh active Application Filing
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101465296A (zh) * | 2007-12-19 | 2009-06-24 | 三菱电机株式会社 | 薄膜晶体管及其制造方法和显示装置 |
JP2010093165A (ja) * | 2008-10-10 | 2010-04-22 | Konica Minolta Holdings Inc | 電極の製造方法、これを用いた薄膜トランジスタ素子及び有機エレクトロルミネッセンス素子 |
CN104979276A (zh) * | 2014-04-09 | 2015-10-14 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件的制造方法 |
CN104716201A (zh) * | 2015-04-03 | 2015-06-17 | 合肥鑫晟光电科技有限公司 | 薄膜晶体管及其制作方法、阵列基板、显示设备 |
CN106803485A (zh) * | 2017-03-21 | 2017-06-06 | 深圳市华星光电技术有限公司 | 一种薄膜晶体管及其制备方法、显示器 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2019214413A1 (zh) * | 2018-05-09 | 2019-11-14 | 深圳市华星光电半导体显示技术有限公司 | 阵列基板的制作方法 |
CN109991787A (zh) * | 2019-03-15 | 2019-07-09 | 惠科股份有限公司 | 一种阵列基板及其制作方法 |
CN112885848A (zh) * | 2021-01-29 | 2021-06-01 | Tcl华星光电技术有限公司 | 阵列基板及显示装置 |
CN112885848B (zh) * | 2021-01-29 | 2024-05-24 | Tcl华星光电技术有限公司 | 阵列基板及显示装置 |
Also Published As
Publication number | Publication date |
---|---|
WO2019214413A1 (zh) | 2019-11-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN105895581B (zh) | Tft基板的制作方法 | |
CN105742292B (zh) | 阵列基板的制作方法及制得的阵列基板 | |
CN105633016A (zh) | Tft基板的制作方法及制得的tft基板 | |
CN105655359A (zh) | Tft基板的制作方法 | |
CN108649016A (zh) | 阵列基板的制作方法 | |
CN105514033B (zh) | 阵列基板的制作方法 | |
CN108598174A (zh) | 阵列基板的制作方法 | |
CN105470195B (zh) | Tft基板的制作方法 | |
WO2014166181A1 (zh) | 薄膜晶体管及其制造方法、阵列基板及其制造方法、显示装置 | |
CN105679714A (zh) | 阵列基板及其制作方法 | |
CN106298646B (zh) | Tft基板的制作方法 | |
CN103928400A (zh) | 阵列基板及其制作方法、显示装置 | |
US10921662B2 (en) | Manufacturing method of array substrate, array substrate, display panel and display device | |
WO2020093442A1 (zh) | 阵列基板的制作方法及阵列基板 | |
EP3459116A1 (en) | Pixel unit, array substrate, and display device, and fabrication methods thereof | |
CN106684038A (zh) | 用于4m制程制备tft的光罩及4m制程tft阵列制备方法 | |
CN106024705B (zh) | Tft基板的制作方法 | |
CN215008229U (zh) | 阵列基板、显示面板和显示装置 | |
CN107978608B (zh) | Ips型薄膜晶体管阵列基板及其制作方法 | |
US11209709B2 (en) | Display substrate and manufacturing method thereof, display panel and display device | |
WO2017012292A1 (zh) | 阵列基板及其制备方法、显示面板、显示装置 | |
WO2018176880A1 (zh) | 一种阵列基板的制作方法 | |
CN108828844A (zh) | 降低母板翘曲的成膜方法 | |
CN108682692A (zh) | 薄膜晶体管及其制作方法、阵列基板、显示装置 | |
CN206020894U (zh) | 阵列基板及显示装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20180928 |
|
WD01 | Invention patent application deemed withdrawn after publication |