CN108508959A - A kind of LDO overturning follower configuration based on cascade voltage - Google Patents
A kind of LDO overturning follower configuration based on cascade voltage Download PDFInfo
- Publication number
- CN108508959A CN108508959A CN201810543863.1A CN201810543863A CN108508959A CN 108508959 A CN108508959 A CN 108508959A CN 201810543863 A CN201810543863 A CN 201810543863A CN 108508959 A CN108508959 A CN 108508959A
- Authority
- CN
- China
- Prior art keywords
- oxide
- semiconductor
- metal
- control terminal
- ldo
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/575—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Amplifiers (AREA)
Abstract
The present invention relates to a kind of LDO overturning follower configuration based on cascade voltage.By the way that mutual conductance intensifying current type circuit is added on the basis of conventional cascade voltage overturns follower configuration, quiescent current branch and quick response loop, in the case of same power consumption, effectively increase the transient response speed of LDO, input voltage changes between 1.8V 3.3V, output voltage stabilization is in 1.6V, load capacitance changes within the sampling period, the load transient response time of system is only 177ns or so, and the quiescent current of system is 104.1uA, possesses the carrying load ability of 0mA 1mA.The LDO of the present invention effectively raises the transient response speed of LDO, meets the performance requirement of Sigma delta modulators, the reliable of its performance is confirmed by performance simulation, have huge application space in audio Sigma delta modulators.
Description
Technical field
The present invention be used for audio Sigma-delta modulators in, and in particular to one kind based on cascade voltage overturning with
With the LDO of device structure.
Background technology
In recent years, with electronic technology and the high speed development of IC system, especially Internet era it is portable and
The continuous of consumer electronics is popularized, and power management chip is in automobile, medical treatment, mobile communication, computer network and basis life
The numerous areas such as facility play increasing effect.Power management chip as the bridge between battery and electronic equipment,
The effect of the distribution of power supply, management, voltage stabilizing is carry, the performance high degree of power management chip determines the whole of electronic equipment
Body performance.With the continuous innovation and development of integrated circuit technology.Low pressure difference linear voltage regulator（Low Dropout
Regulator, abbreviation LDO）As one kind of power management chip, demand gradually expands.In Intelligent life and energy saving
Under the overall situation background of environmental protection, LDO chips are other than stabilization, reliable basic demand, gradually to low-power consumption, high-precision, fast
Speed response, the contour property development of low cost.
Traditional LDO overturns follower configuration as control loop using voltage, and being mainly disadvantageous in that for the structure is negative
Current-carrying requirement, is not suitable for no-load condition.When load current is less than certain value, the grid end voltage of power tube increases, and makes
Control pipe enters linear zone, LDO will lose regulating power to output voltage, and output voltage changes.It is overturn in voltage
On the basis of follower configuration, also cascade voltage overturning follower configuration is the modified version that pressure turns follower configuration.
Cascade voltage overturns follower configuration compared with voltage overturns follower configuration, and a common gate configuration is added in this structure
Transistor, the addition of this transistor improves the gain of feedback control loop, improves the load regulation of LDO.But herein
The grid end of structure power tube is still a high resistant node, and grid end is still a lower frequency pole, and loop bandwidth is limited, the transient state of system
Response speed is limited.
The present invention proposes a kind of novel quick response LDO that follower configuration is overturn based on cascade voltage, circuit
It is clear in structure simple, and fast loop can be started under high frequency variation, accelerate the transient response speed of LDO.
Invention content
The purpose of the present invention is to provide a kind of LDO overturning follower configuration based on cascade voltage, effectively carry
The high transient response speed of LDO, meets the performance requirement of Sigma-delta modulators, its property is confirmed by performance simulation
Can it is reliable, have huge application space in audio Sigma-delta modulators.
To achieve the above object, the technical scheme is that：One kind overturning follower configuration based on cascade voltage
LDO, including metal-oxide-semiconductor M1, M2, M3, M4, M5, M6, M7, M8, M9, M10, MP、MN, first to fourth current source, the first of M1
The first end of end and M5, MPFirst end, the first end of M8, the first end of M9, the first end of M10 be connected and be connected to VDD, the of M1
The control terminal of two ends and M6, the connection of the first end of M2, the control of the control terminal of M1 and the control terminal of M5, the control terminal of M9, M10
End, the connection of the second end of M10, the second end of M7, the second end of M2 is connected with the control terminal of M2, the control terminal of M3, and through the
One current source is connected to GND, the first end and M of M3PSecond end, MNThe output end that is connected as LDO circuit of second end,
The second end and M of M3NControl terminal, the first end of M4 is connected, and is connected to GND, M4 through the second current source, third current source
Second end and M5 second end, MPControl terminal connection, the bias voltage input of the control terminal of M4 as LDO circuit, M6
First end be connected with the first end of M7, and through the 4th current source and MNFirst end be connected and be connected to GND, the second end of M6 with
The second end of M8, the control terminal of M8, the second end of M9 are connected, and the control terminal of M7 is connected to reference voltage source.
In an embodiment of the present invention, M6, M7, M8, M9, M10, the 4th current source constitute trsanscondutance amplifier, wherein M8,
M9, M10 constitute mutual conductance intensifying current circuit.
In an embodiment of the present invention, the breadth length ratio ratio of M8, M9, M10 are：1：n：N+1, it is assumed that the electricity that M6, M7 flow through
Stream size is I, then the electric current ratio for flowing through M8, M9, M10 is：I[1/n+1]：I[n/n+1]：I；When load changes, load
By underloading mutation to when overloaded, output voltage will produce downward overshoot, therefore the output voltage of the output end of LDO circuit is unexpected
Reduce so that voltage reduces suddenly at the control terminal of M6, it is assumed that M6 electric currents are reduced to original half, i.e. 0.5I, M7 electricity at this time
Rheology is that 1.5I then flows through the electric current of M8 and is increased to original 0.5I (1/n+1), and does not increase mutual conductance intensifying current circuit
Trsanscondutance amplifier is compared, and mutual conductance enhances n+1 times；Similarly, it is sported at light load by heavy duty in load, mutual conductance enhances n+1 times.
In an embodiment of the present invention, MPIt is power tube in LDO circuit.
In an embodiment of the present invention, M3, M4, MPIt constitutes cascade voltage and overturns follower configuration.
In an embodiment of the present invention, further include a quick response loop, which includes first to the 7th
The first end of metal-oxide-semiconductor, the 5th current source, capacitance C1, the first end of the first metal-oxide-semiconductor and the second metal-oxide-semiconductor, the first of third metal-oxide-semiconductor
End, which is connected, is connected to VDD, the second end, the control terminal of the 4th metal-oxide-semiconductor, the 5th MOS of the second end of the first metal-oxide-semiconductor and the 4th metal-oxide-semiconductor
The control terminal of pipe is connected, and the control terminal of the first metal-oxide-semiconductor is connected with the control terminal of the control terminal of the second metal-oxide-semiconductor, third metal-oxide-semiconductor
It connects, the second end of the second metal-oxide-semiconductor is connected with the second end of the 5th metal-oxide-semiconductor is connected to MPControl terminal, third metal-oxide-semiconductor second end warp
5th current source is connected to GND, the second end of the first end of the 4th metal-oxide-semiconductor and the 6th metal-oxide-semiconductor, the control terminal of the 6th metal-oxide-semiconductor, the
The control terminal of seven metal-oxide-semiconductors is connected, and the first end that the 5th MOS is closed is connected with the second end of the 7th metal-oxide-semiconductor, and is connected to through C1
MPSecond end, the first end of the 6th metal-oxide-semiconductor is connected with the first end of the 7th metal-oxide-semiconductor is connected to GND.
In an embodiment of the present invention, further include biased electrical for providing bias voltage, bias current for LDO circuit
Road.
Compared to the prior art, the invention has the advantages that：The present invention, conventional cascade voltage overturning with
With on the basis of device structure by the way that mutual conductance intensifying current type circuit, quiescent current branch and quick response loop, same is added
Etc. in the case of power consumptions, effectively increase the transient response speed of LDO, input voltage changes between 1.8V-3.3V, output voltage
To stablize in 1.6V, load capacitance changes within the sampling period, and the load transient response time of system is only 177ns or so, and
And the quiescent current of system is 104.1uA, possesses the carrying load ability of 0mA-1mA；LDO designed by the present invention is effectively improved
The transient response speed of LDO, meets the performance requirement of Sigma-delta modulators, its performance is confirmed by performance simulation
It is reliable, have huge application space in audio Sigma-delta modulators.
Description of the drawings
Fig. 1 is the main body circuit structure chart for the quick response LDO that follower configuration is overturn based on cascade voltage.
Fig. 2 is quick response loop structure figure.
Fig. 3 is the integrated circuit figure for the quick response LDO that follower configuration is overturn based on cascade voltage.
Fig. 4 is the line regulation simulation waveform for the quick response LDO that follower configuration is overturn based on cascade voltage
Figure.
Fig. 5 is the load regulation simulation waveform for the quick response LDO that follower configuration is overturn based on cascade voltage
Figure.
Fig. 6 is the load transient simulation curve figure for the quick response LDO that follower configuration is overturn based on cascade voltage.
Specific implementation mode
Below in conjunction with the accompanying drawings, technical scheme of the present invention is specifically described.
The present invention provides it is a kind of based on cascade voltage overturn follower configuration LDO, including metal-oxide-semiconductor M1, M2,
M3、M4、M5、M6、M7、M8、M9、M10、MP、MN, first to fourth current source, the first end of M1 and the first end of M5, MP
One end, the first end of M8, the first end of M9, the first end of M10, which are connected, is connected to VDD, the second end of M1 and the control terminal of M6, M2
The second of first end connection, the control terminal of M1 and the control terminal of M5, the control terminal of M9, the control terminal of M10, the second end of M10, M7
End connection, the second end of M2 is connected with the control terminal of M2, the control terminal of M3, and is connected to GND through the first current source, and the of M3
One end and MPSecond end, MNThe output end that is connected as LDO circuit of second end, the second end and M of M3NControl terminal, M4
First end be connected, and be connected to GND, the second end of M4 and the second end of M5, M through the second current source, third current sourceP's
Control terminal connects, and the bias voltage input of the control terminal of M4 as LDO circuit, the first end of M6 is connected with the first end of M7
It connects, and through the 4th current source and MNFirst end be connected be connected to GND, the second end of M6 and the second end of M8, the control terminal of M8, M9
Second end be connected, the control terminal of M7 is connected to reference voltage source.
M6, M7, M8, M9, M10, the 4th current source constitute trsanscondutance amplifier, wherein M8, M9, M10 constitute mutual conductance electric current and increase
Forceful electric power road.The breadth length ratio ratio of M8, M9, M10 is：1：n：N+1, it is assumed that the size of current that M6, M7 flow through be I, then flow through M8,
The electric current ratio of M9, M10 is：I[1/n+1]：I[n/n+1]：I；When load changes, load by underloading mutation to when overloaded,
Output voltage will produce downward overshoot, therefore the output voltage of the output end of LDO circuit reduces suddenly so that the control terminal of M6
Place's voltage reduces suddenly, it is assumed that M6 electric currents are reduced to original half, i.e. 0.5I at this time, and M7 electric currents become 1.5I and then flow through M8
Electric current be increased to original 0.5I (1/n+1), compared with the trsanscondutance amplifier for not increasing mutual conductance intensifying current circuit, mutual conductance increase
It is n+1 times strong；Similarly, it is sported at light load by heavy duty in load, mutual conductance enhances n+1 times.
MPIt is power tube in LDO circuit.M3、M4、MPIt constitutes cascade voltage and overturns follower configuration.
Further include a quick response loop, which includes the first to the 7th metal-oxide-semiconductor, the 5th current source, electricity
Hold C1, the first end of the first metal-oxide-semiconductor is connected with the first end of the first end of the second metal-oxide-semiconductor, third metal-oxide-semiconductor is connected to VDD, and first
The second end of metal-oxide-semiconductor is connected with the second end of the 4th metal-oxide-semiconductor, the control terminal of the 4th metal-oxide-semiconductor, the control terminal of the 5th metal-oxide-semiconductor, the
The control terminal of one metal-oxide-semiconductor is connected with the control terminal of the control terminal of the second metal-oxide-semiconductor, third metal-oxide-semiconductor, the second end of the second metal-oxide-semiconductor
It is connected with the second end of the 5th metal-oxide-semiconductor and is connected to MPControl terminal, the second end of third metal-oxide-semiconductor is connected to GND through the 5th current source,
The first end of 4th metal-oxide-semiconductor is connected with the second end of the 6th metal-oxide-semiconductor, the control terminal of the 6th metal-oxide-semiconductor, the control terminal of the 7th metal-oxide-semiconductor
It connects, the first end that the 5th MOS is closed is connected with the second end of the 7th metal-oxide-semiconductor, and is connected to M through C1PSecond end, the 6th MOS
The first end of pipe is connected with the first end of the 7th metal-oxide-semiconductor is connected to GND.
It further include the biasing circuit for providing bias voltage, bias current for LDO circuit.
It is the specific implementation process of the present invention below.
A kind of novel quick response LDO that follower configuration is overturn based on cascade voltage proposed by the present invention.This
Invention carries out simulating, verifying using SMIC0.18 μm of CMOS technology, and input voltage range is：1.8V-3.3V, output voltage are
1.6V, load capacitance 10pF, load current 0mA-1mA are applied to audio based on LDO of the present invention in the design process
The background of Sigma-delta modulators finally realizes fast transient response and low-power consumption.
The main body circuit of the quick response LDO proposed by the present invention that follower configuration is overturn based on cascade voltage is as schemed
Shown in 1.In Fig. 1, MPPipe is power tube, from elaboration above it is found that transistor M3, M4, MPConstitute cascade voltage overturning with
It is the major loop of LDO with device structure.M6, M7, M8, M9, M10 tail current Is together constitute trsanscondutance amplifier, metal-oxide-semiconductor M2, M3
Size is identical, and flows through identical quiescent current, metal-oxide-semiconductor MNThere is certain quiescent current, is connected with output end.
When output voltage Vout changes, pass through metal-oxide-semiconductor M3, M4 regulation power pipe MPGrid end voltage change output
Size of current makes output voltage revert to stationary value.M6, M7, M8, M9, M10 tail current Is together constitute mutual conductance amplification
Device, M8, M9, M10 together constitute mutual conductance enhancing circuit, and a NMOS tube M is accessed in output endN, when loading mutation,
MNPipe provides additional quiescent current so that the load transient response speed of system faster, while metal-oxide-semiconductor MNGrid end and main ring
Road is connected, and facilitation is played to the feedback of loop.
M6, M7, M8, M9, M10 tail current Is together constitute trsanscondutance amplifier, and transconductance amplifier section adds mutual conductance
Intensifying current circuit.M8, M9, M10 constitute mutual conductance intensifying current circuit in dashed rectangle in figure, for convenience of description, by metal-oxide-semiconductor
The breadth length ratio ratio setting of M8, M9, M10 is：1：n：N+1, it is known that the electric current that metal-oxide-semiconductor M6, M7 flows through under quiescent conditions is equal,
Assuming that size of current is I, so the ratio between the electric current for flowing through tri- pipes of M8, M9, M10 is：I[1/n+1]：I[n/n+1]：I；When
When load changes, load is by underloading mutation to when overloaded, and output voltage will produce downward overshoot, therefore VOUT subtracts suddenly
It is small so that ~ VREF reduces suddenly, it is assumed that M6 electric currents are reduced to original half, i.e. 0.5I at this time, and M7 electric currents become 1.5I then
The electric current for flowing through M8 is increased to original 0.5I (1/n+1), compared with the trsanscondutance amplifier for not increasing mutual conductance intensifying current circuit,
Mutual conductance enhances n+1 times.Underloading is sported by heavy duty in load, same analysis is it is found that mutual conductance enhances n+1 times.
To further increase the load transient response speed of LDO, fast loop is additionally added in present invention design.Such as Fig. 2 electricity
It is simple cascode structures shown in road, to reduce power consumption, bias current uses 1:10 ratio setting.Fast loop passes through
Power tube M in capacitance connection to Fig. 1POutput end vo ut, x points are the grid end tie point with power tube in figure.There is depositing for capacitance C1
Under DC operation environment, capacitance is in open-circuit condition, is not influenced on the quiescent point of the major loop of LDO, works as exchange
When variation, capacitors conductive, fast loop normal work.Fig. 3 is the quick response LDO that follower is overturn based on cascade voltage
Integrated circuit figure.
Next, by taking load sports heavy duty by underloading as an example, analysis is proposed by the present invention to be turned over based on cascade voltage
Turn the main operational principle of the quick response LDO of follower configuration：
When load is by underloading mutation to heavy duty, output end is pumped a large amount of electric currents, and output voltage becomes hour suddenly：
1, when load current increases, output voltage is pulled low, major loop：Make power tube by metal-oxide-semiconductor M3, M4 of common gate structure
Grid end voltage reduces, and power tube output current increases, and output voltage is restored to steady-state value, while common gate pipe is added and makes ring
Road gain is turned up, and the load regulation of LDO is improved.
2, when load current becomes larger, from MNPipe provides additional quiescent current so that the overshoot voltage of output voltage becomes
It is small, while MNTube current reduction makes its grid end voltage reduce, and power tube grid end electricity is further decreased by common gate metal-oxide-semiconductor M4
Pressure so that power tube current increases, and output voltage raising is restored to steady-state value.MNThe addition of pipe effectively increases the load of LDO
Transient response speed reduces output voltage overshoot.
3, under high frequency variation, output voltage variation makes power tube grid end voltage quickly reduce by fast loop, defeated
Go out electric current increase, output voltage is restored to steady-state value.
The results are shown in Figure 4 for the Transient of LDO circuit, and it is the line changed from 0mA-1mA to be illustrated in figure 4 load current
Property regulation simulation waveform, when load current be 1mA when, output voltage change size be 1.5669mV, according to Serial regulation
The calculation formula of rate is it is found that line regulation is respectively：0.583mV/V, when load is 0mA, input voltage changes from 1.8V
When to 3.3V, output voltage variation is 1.779mV, learns that line regulation is 0.659mV/V by calculating.
Present invention focuses on the promotions to load transient response speed.Therefore it in DC characteristic of the present invention emulation, bears
Curent change is carried only from 0mA-1mA.Fig. 5 is the analogous diagram for the load regulation that input voltage is 1.8V-3.3V, when load electricity
For stream from 0mA-1mA, maximum output voltage variation is only 0.109mV.In different supply voltage 1.8V, 2.3V, 2.8V, 3.3V
Under variation, output voltage variation is respectively：0.109mV、0.093mV、0.091mV、0.093mV.According to the meter of load regulation
Formula is calculated it is found that load regulation is respectively：0.0605V/V*A、0.0404V/V*A、0.0325V/V*A、0.0281V/V*A.
The maximum static current of this section LDO is only：104.1uA realizing low power dissipation design.Fig. 6 provides the load transient response of LDO
Figure.When output load capacitance changes within the sampling period, output voltage transient response time is only 177ns or so.
The present invention devises a modified LDO circuit applied to audio Sigma-delta modulators.The present invention uses
SMIC0.18 μm of CMOS technology carries out simulating, verifying, and input voltage range is：1.8V-3.3V, output voltage 1.6V, load electricity
Hold is that 10pF, load current 0mA-1mA are applied to audio Sigma-delta tune based on LDO of the present invention in the design process
The background of device processed finally realizes fast transient response and low-power consumption.Finally, total design circuit connected applications are in Sigma-
In delta modulator, and actual chips are carried out to it and have been taken pictures.
The above are preferred embodiments of the present invention, all any changes made according to the technical solution of the present invention, and generated function is made
When with range without departing from technical solution of the present invention, all belong to the scope of protection of the present invention.
Claims (7)
1. it is a kind of based on cascade voltage overturn follower configuration LDO, which is characterized in that including metal-oxide-semiconductor M1, M2, M3,
M4、M5、M6、M7、M8、M9、M10、MP、MN, first to fourth current source, the first end of M1 and the first end of M5, MPFirst
End, the first end of M8, the first end of M9, the first end of M10, which are connected, is connected to VDD, the second end of M1 and the control terminal of M6, M2 the
One end connects, the control terminal of M1 and the control terminal of M5, the control terminal of M9, the control terminal of M10, the second end of M10, the second end of M7
Connection, the second end of M2 is connected with the control terminal of M2, the control terminal of M3, and is connected to GND through the first current source, and the first of M3
End and MPSecond end, MNThe output end that is connected as LDO circuit of second end, the second end and M of M3NControl terminal, M4
First end is connected, and is connected to GND, the second end of M4 and the second end of M5, M through the second current source, third current sourcePControl
End processed connection, the bias voltage input of the control terminal of M4 as LDO circuit, the first end of M6 are connected with the first end of M7,
And through the 4th current source and MNFirst end be connected and be connected to GND, the second end of M6 and the second end of M8, the control terminal of M8, M9
Second end is connected, and the control terminal of M7 is connected to reference voltage source.
2. a kind of LDO overturning follower configuration based on cascade voltage according to claim 1, which is characterized in that
M6, M7, M8, M9, M10, the 4th current source constitute trsanscondutance amplifier, wherein M8, M9, M10 constitute mutual conductance intensifying current circuit.
3. a kind of LDO overturning follower configuration based on cascade voltage according to claim 2, which is characterized in that
The breadth length ratio ratio of M8, M9, M10 is：1：n：N+1, it is assumed that the size of current that M6, M7 flow through is I, then flows through M8, M9, M10
Electric current ratio is：I[1/n+1]：I[n/n+1]：I；When load changes, load by underloading mutation to when overloaded, output voltage
Downward overshoot is will produce, therefore the output voltage of the output end of LDO circuit reduces suddenly so that voltage is prominent at the control terminal of M6
So reduce, it is assumed that M6 electric currents are reduced to original half, i.e. 0.5I at this time, and M7 electric currents become the electric current increasing that 1.5I then flows through M8
Greatly original 0.5I (1/n+1), compared with the trsanscondutance amplifier for not increasing mutual conductance intensifying current circuit, mutual conductance enhances n+1
Times；Similarly, it is sported at light load by heavy duty in load, mutual conductance enhances n+1 times.
4. a kind of LDO overturning follower configuration based on cascade voltage according to claim 1, which is characterized in that MP
It is power tube in LDO circuit.
5. a kind of LDO overturning follower configuration based on cascade voltage according to claim 4, which is characterized in that
M3、M4、MPIt constitutes cascade voltage and overturns follower configuration.
6. a kind of LDO overturning follower configuration based on cascade voltage according to claim 1, which is characterized in that
Further include a quick response loop, which includes the first to the 7th metal-oxide-semiconductor, the 5th current source, capacitance C1, and first
The first end of metal-oxide-semiconductor is connected with the first end of the first end of the second metal-oxide-semiconductor, third metal-oxide-semiconductor is connected to VDD, and the second of the first metal-oxide-semiconductor
End is connected with the second end of the 4th metal-oxide-semiconductor, the control terminal of the 4th metal-oxide-semiconductor, the control terminal of the 5th metal-oxide-semiconductor, the control of the first metal-oxide-semiconductor
End processed is connected with the control terminal of the control terminal of the second metal-oxide-semiconductor, third metal-oxide-semiconductor, the second end of the second metal-oxide-semiconductor and the 5th metal-oxide-semiconductor
Second end be connected be connected to MPControl terminal, the second end of third metal-oxide-semiconductor is connected to GND through the 5th current source, the 4th metal-oxide-semiconductor
First end is connected with the second end of the 6th metal-oxide-semiconductor, the control terminal of the 6th metal-oxide-semiconductor, the control terminal of the 7th metal-oxide-semiconductor, and the 5th MOS is closed
First end be connected with the second end of the 7th metal-oxide-semiconductor, and be connected to M through C1PSecond end, the first end of the 6th metal-oxide-semiconductor with
The first end of 7th metal-oxide-semiconductor, which is connected, is connected to GND.
7. a kind of LDO overturning follower configuration based on cascade voltage according to claim 1, which is characterized in that
It further include the biasing circuit for providing bias voltage, bias current for LDO circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810543863.1A CN108508959B (en) | 2018-05-31 | 2018-05-31 | LDO (low dropout regulator) based on cascode voltage flip follower structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810543863.1A CN108508959B (en) | 2018-05-31 | 2018-05-31 | LDO (low dropout regulator) based on cascode voltage flip follower structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108508959A true CN108508959A (en) | 2018-09-07 |
| CN108508959B CN108508959B (en) | 2023-05-23 |
Family
ID=63402005
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810543863.1A Active CN108508959B (en) | 2018-05-31 | 2018-05-31 | LDO (low dropout regulator) based on cascode voltage flip follower structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108508959B (en) |
Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5889393A (en) * | 1997-09-29 | 1999-03-30 | Impala Linear Corporation | Voltage regulator having error and transconductance amplifiers to define multiple poles |
| US20080169795A1 (en) * | 2006-08-31 | 2008-07-17 | Texas Instruments Incorporated | Compensating nmos ldo regulator using auxiliary amplifier |
| CN101419479A (en) * | 2008-12-10 | 2009-04-29 | 武汉大学 | Low-voltage difference linear constant voltage regulator with novel structure |
| CN102298407A (en) * | 2010-06-28 | 2011-12-28 | 中国人民解放军国防科学技术大学 | Low-output voltage and fast response low-dropout regulator (LDO) circuit based on current control loop |
| CN202110462U (en) * | 2011-05-11 | 2012-01-11 | 电子科技大学 | LDO based on dynamic zero-pole tracking techniques |
| US20130082671A1 (en) * | 2011-09-30 | 2013-04-04 | Texas Instruments Incorporated | Low noise voltage regulator and method with fast settling and low-power consumption |
| US20130147447A1 (en) * | 2011-12-12 | 2013-06-13 | Dialog Semiconductor Gmbh | High-Speed LDO Driver Circuit using Adaptive Impedance Control |
| CN104898752A (en) * | 2015-06-26 | 2015-09-09 | 中国兵器工业集团第二一四研究所苏州研发中心 | Capacitor-less LDO (low dropout regulator) capable of achieving fast transient response |
| CN105005351A (en) * | 2015-07-23 | 2015-10-28 | 中山大学 | Cascode fully integrated low-dropout linear voltage regulator circuit |
| US20160154415A1 (en) * | 2014-11-29 | 2016-06-02 | Infineon Technologies Ag | Dual mode low-dropout linear regulator |
| CN107102665A (en) * | 2016-02-22 | 2017-08-29 | 联发科技（新加坡）私人有限公司 | Low pressure difference linear voltage regulator |
| CN208188718U (en) * | 2018-05-31 | 2018-12-04 | 福州大学 | Quick response LDO circuit based on cascade voltage overturning follower configuration |
-
2018
- 2018-05-31 CN CN201810543863.1A patent/CN108508959B/en active Active
Patent Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5889393A (en) * | 1997-09-29 | 1999-03-30 | Impala Linear Corporation | Voltage regulator having error and transconductance amplifiers to define multiple poles |
| US20080169795A1 (en) * | 2006-08-31 | 2008-07-17 | Texas Instruments Incorporated | Compensating nmos ldo regulator using auxiliary amplifier |
| CN101419479A (en) * | 2008-12-10 | 2009-04-29 | 武汉大学 | Low-voltage difference linear constant voltage regulator with novel structure |
| CN102298407A (en) * | 2010-06-28 | 2011-12-28 | 中国人民解放军国防科学技术大学 | Low-output voltage and fast response low-dropout regulator (LDO) circuit based on current control loop |
| CN202110462U (en) * | 2011-05-11 | 2012-01-11 | 电子科技大学 | LDO based on dynamic zero-pole tracking techniques |
| CN103034275A (en) * | 2011-09-30 | 2013-04-10 | 德克萨斯仪器股份有限公司 | Low noise voltage regulator and method with fast settling and low-power consumption |
| US20130082671A1 (en) * | 2011-09-30 | 2013-04-04 | Texas Instruments Incorporated | Low noise voltage regulator and method with fast settling and low-power consumption |
| US20130147447A1 (en) * | 2011-12-12 | 2013-06-13 | Dialog Semiconductor Gmbh | High-Speed LDO Driver Circuit using Adaptive Impedance Control |
| US20160154415A1 (en) * | 2014-11-29 | 2016-06-02 | Infineon Technologies Ag | Dual mode low-dropout linear regulator |
| CN105652939A (en) * | 2014-11-29 | 2016-06-08 | 英飞凌科技股份有限公司 | Dual-mode low dropout regulator |
| CN104898752A (en) * | 2015-06-26 | 2015-09-09 | 中国兵器工业集团第二一四研究所苏州研发中心 | Capacitor-less LDO (low dropout regulator) capable of achieving fast transient response |
| CN105005351A (en) * | 2015-07-23 | 2015-10-28 | 中山大学 | Cascode fully integrated low-dropout linear voltage regulator circuit |
| CN107102665A (en) * | 2016-02-22 | 2017-08-29 | 联发科技（新加坡）私人有限公司 | Low pressure difference linear voltage regulator |
| CN208188718U (en) * | 2018-05-31 | 2018-12-04 | 福州大学 | Quick response LDO circuit based on cascade voltage overturning follower configuration |
Non-Patent Citations (2)
| Title |
|---|
| HAN WANG等: "A fully on-chip fast-transient NMOS low dropout voltage regulator with quasi floating gate pass element" * |
| 林嵩等: "一种分高低压供电的低压差线性稳压器的设计" * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108508959B (en) | 2023-05-23 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Chava et al. | A frequency compensation scheme for LDO voltage regulators | |
| US7492137B2 (en) | Series regulator and differential amplifier circuit thereof | |
| CN202995523U (en) | Linear dropout regulator (LDO) with ultra-low power consumption and without output filtering capacitor | |
| CN107544613B (en) | LDO circuit based on FVF control | |
| CN208188718U (en) | Quick response LDO circuit based on cascade voltage overturning follower configuration | |
| CN103149962A (en) | Low voltage-drop voltage stabilizer with extremely low static current | |
| CN114200994B (en) | Low dropout linear regulator and laser ranging circuit | |
| CN207249522U (en) | Regulator circuit | |
| TW201217934A (en) | Programmable low dropout linear regulator | |
| CN113760029A (en) | Novel low dropout linear regulator based on full MOS reference source | |
| CN107783588B (en) | Push-pull type quick response LDO circuit | |
| CN108508953A (en) | Novel slew rate enhancing circuit, low pressure difference linear voltage regulator | |
| CN108733118A (en) | A kind of high PSRR quick response LDO | |
| CN114546025A (en) | LDO circuit and chip with low static power consumption and rapid transient response | |
| CN207909011U (en) | Adaptive dynamic bias LDO circuit applied to low-voltage output | |
| CN108227815B (en) | Self-adaptive dynamic bias LDO circuit applied to low-voltage output | |
| KR100662517B1 (en) | Operational trans-conductance amplifier using current sink | |
| CN108268078B (en) | Low-dropout linear voltage regulator with low cost and low power consumption | |
| CN112732000A (en) | Novel transient response enhanced LDO | |
| CN108255223A (en) | Ldo circuit | |
| Lee et al. | Implementation of a ramp generator with Schmitt trigger circuit for PWM modulator applications | |
| CN108508959A (en) | A kind of LDO overturning follower configuration based on cascade voltage | |
| Kamel et al. | A hybrid NMOS/PMOS low-dropout regulator with fast transient response for SoC applications | |
| CN207992862U (en) | A kind of push-pull type quick response LDO circuit | |
| CN112558668A (en) | LDO circuit based on chopping technology |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |