CN108461408B - 形成安装在基板上的半导体器件的方法 - Google Patents
形成安装在基板上的半导体器件的方法 Download PDFInfo
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- CN108461408B CN108461408B CN201810150056.3A CN201810150056A CN108461408B CN 108461408 B CN108461408 B CN 108461408B CN 201810150056 A CN201810150056 A CN 201810150056A CN 108461408 B CN108461408 B CN 108461408B
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- 239000000758 substrate Substances 0.000 title claims abstract description 88
- 239000004065 semiconductor Substances 0.000 title claims abstract description 68
- 238000000034 method Methods 0.000 title claims abstract description 48
- 229910052751 metal Inorganic materials 0.000 claims abstract description 211
- 239000002184 metal Substances 0.000 claims abstract description 211
- 238000007747 plating Methods 0.000 claims abstract description 39
- 238000000151 deposition Methods 0.000 claims abstract description 28
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 43
- 239000010931 gold Substances 0.000 claims description 43
- 239000000463 material Substances 0.000 claims description 42
- 238000005219 brazing Methods 0.000 claims description 30
- 239000010936 titanium Substances 0.000 claims description 23
- 229910052737 gold Inorganic materials 0.000 claims description 19
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 18
- 239000011651 chromium Substances 0.000 claims description 14
- 229910052759 nickel Inorganic materials 0.000 claims description 12
- 229910052719 titanium Inorganic materials 0.000 claims description 12
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 11
- 239000010949 copper Substances 0.000 claims description 11
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 7
- 229910045601 alloy Inorganic materials 0.000 claims description 7
- 239000000956 alloy Substances 0.000 claims description 7
- 229910052804 chromium Inorganic materials 0.000 claims description 7
- 238000005530 etching Methods 0.000 claims description 7
- 239000006023 eutectic alloy Substances 0.000 claims description 7
- 229910000990 Ni alloy Inorganic materials 0.000 claims description 6
- 238000009713 electroplating Methods 0.000 claims description 6
- 239000007769 metal material Substances 0.000 claims description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052802 copper Inorganic materials 0.000 claims description 5
- 230000001747 exhibiting effect Effects 0.000 claims description 5
- 238000005520 cutting process Methods 0.000 claims description 4
- 239000011347 resin Substances 0.000 claims description 4
- 229920005989 resin Polymers 0.000 claims description 4
- 229910000679 solder Inorganic materials 0.000 claims description 4
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 claims description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N argon Substances [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 3
- 229910052731 fluorine Inorganic materials 0.000 claims description 3
- 239000011737 fluorine Substances 0.000 claims description 3
- 239000007789 gas Substances 0.000 claims description 3
- 229910052786 argon Inorganic materials 0.000 claims description 2
- 230000000149 penetrating effect Effects 0.000 claims description 2
- JVPLOXQKFGYFMN-UHFFFAOYSA-N gold tin Chemical compound [Sn].[Au] JVPLOXQKFGYFMN-UHFFFAOYSA-N 0.000 claims 2
- ZCYVEMRRCGMTRW-UHFFFAOYSA-N 7553-56-2 Chemical compound [I] ZCYVEMRRCGMTRW-UHFFFAOYSA-N 0.000 claims 1
- -1 argon ions Chemical class 0.000 claims 1
- 238000000227 grinding Methods 0.000 claims 1
- 229910052740 iodine Inorganic materials 0.000 claims 1
- 239000011630 iodine Substances 0.000 claims 1
- 238000003801 milling Methods 0.000 claims 1
- VNNRSPGTAMTISX-UHFFFAOYSA-N chromium nickel Chemical compound [Cr].[Ni] VNNRSPGTAMTISX-UHFFFAOYSA-N 0.000 description 18
- 229910001120 nichrome Inorganic materials 0.000 description 18
- 229920002120 photoresistant polymer Polymers 0.000 description 10
- 229910002601 GaN Inorganic materials 0.000 description 4
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 4
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 2
- MDPILPRLPQYEEN-UHFFFAOYSA-N aluminium arsenide Chemical compound [As]#[Al] MDPILPRLPQYEEN-UHFFFAOYSA-N 0.000 description 2
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- OCVXZQOKBHXGRU-UHFFFAOYSA-N iodine(1+) Chemical compound [I+] OCVXZQOKBHXGRU-UHFFFAOYSA-N 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- 229910001020 Au alloy Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 238000005275 alloying Methods 0.000 description 1
- AUCDRFABNLOFRE-UHFFFAOYSA-N alumane;indium Chemical compound [AlH3].[In] AUCDRFABNLOFRE-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- NWAIGJYBQQYSPW-UHFFFAOYSA-N azanylidyneindigane Chemical compound [In]#N NWAIGJYBQQYSPW-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- QEEKASZBZSQJIA-UHFFFAOYSA-N chloric acid hydrochloride Chemical compound Cl.O[Cl](=O)=O QEEKASZBZSQJIA-UHFFFAOYSA-N 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
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Abstract
本发明披露了一种形成半导体器件的方法。该方法包括以下步骤:将含有Ni的第一金属层沉积在基板的背面,镀敷基板的背面,从而使刻线部分中的第一金属层露出,将第三金属层沉积在基板的整个背面,并且选择性地去除刻线部分中的第三金属层,从而将第一金属层留在刻线中。
Description
技术领域
本发明涉及形成半导体器件的方法,具体地说,本发明涉及可以增强半导体器件与组装基板的结合强度的方法。
背景技术
通常使用例如钎焊材料(诸如具有低熔点的共晶合金或焊料,或者导电树脂等)将半导体芯片安装在组装基板上。日本专利申请公开No.JP-2015-035495A披露了将半导体器件安装在组装基板上的技术。然而,在半导体芯片的背面露出有半导体材料(通常为半导体芯片的半导体基板)的情况下,这种半导体材料相对于钎焊材料通常表现出较小的浸润性,这可能使半导体芯片与组装基板的结合强度降低。
发明内容
本发明的一个方面涉及一种形成半导体器件的方法,所述半导体器件包括利用钎焊材料安装在安装基板上的半导体芯片。所述方法包括以下步骤:(a)制备包括顶面和与所述顶面相反的背面的基板,所述顶面上具有外延层;(b)在所述基板的整个所述背面上沉积第一金属层;(c)使所述第一金属层镀敷有第二金属层,从而使所述第一金属层的与划分所述半导体芯片的刻线对应的部分露出;(d)在所述第二金属层上以及所述刻线中的从所述第二金属层露出的所述第一金属层上沉积第三金属层;(e)去除所述第三金属层,从而将所述第一金属层留在所述刻线中并将所述第二金属层留在除所述刻线以外的区域中;(f)沿所述刻线切割所述基板,从而形成所述半导体芯片;以及(g)利用所述钎焊材料将所述半导体芯片安装在所述安装基板上。本发明的方法具有这样的特征:第一金属层含有镍(Ni)和在所述第一金属层的顶部中的金属材料,所述金属材料相对于所述钎焊材料表现出浸润性,并且所述第三金属层含有镍(Ni)和钛(Ti)中的至少一者。
附图说明
参考附图根据以下对本发明的优选实施例的详细描述,将更好地理解上述和其它目的、方面以及优点,其中:
图1A是示出根据本发明的实施例的半导体器件的平面图,并且图1B是示出沿图1A中显示的线IB-IB截取的半导体器件的剖视图;
图2A至图2C示出了形成图1A和图1B所示的半导体器件的方法;
图3A至图3C示出了继图2C所示的方法之后的形成半导体器件的方法;
图4A至图4C示出了继图3C所示的方法之后的形成半导体器件的方法;
图5A至图5C示出了继图4C所示的方法之后的形成半导体器件的方法;
图6A至图6C示出了继图5C所示的方法之后的形成半导体器件的方法;
图7A至图7C示出了继图6C所示的方法之后的形成半导体器件的方法;
图8A和图8B示出了形成与本发明的半导体器件可比较的常规半导体器件的方法;并且
图9示出了与本实施例的半导体器件可比较的常规半导体器件的剖视图。
具体实施方式
接下来,将参考附图描述本发明的实施例。在实施例的描述中,彼此相同或相似的附图标记或符号将指彼此相同或相似的元件,并且不重复进行解释。
图1A示出了根据本发明的第一实施例的半导体器件100的平面图。半导体器件100为场效应晶体管(FET)类型,半导体器件100包括基板10、栅极焊盘12、栅极叉指(gatefinger)13、源极焊盘14、源极叉指15、漏极焊盘16以及漏极叉指17。外延基板10可以包括由碳化硅(SiC)制成的绝缘基板11以及在绝缘基板11上生长的外延层19。外延层19包括由氮化镓(GaN)制成的沟道层(沟道层有时被称为载流子传输层)以及由例如铝镓氮(AlGaN)制成的势垒层。
焊盘和叉指设置在基板10的顶面上。栅极叉指13、源极叉指15和漏极叉指17分别从栅极焊盘12、源极焊盘14和漏极焊盘16延伸,并且彼此平行。源极叉指15和漏极叉指16可以在它们与源极14的电极和漏极15的电极(通过使钛(Ti)和铝(Al)的堆叠金属合金化而形成)的重叠处由金(Au)制成或优选地由Ti和Au制成,并且源极叉指15和漏极叉指16分别与源极焊盘14和漏极焊盘15同时形成。同时,可以由镍(Ni)和堆叠在Ni上的钯(Pd)制成的栅极叉指13与栅极焊盘12同时形成。
图1B示出了沿图1A中显示的线IB-IB截取的半导体器件100的剖视图,其中,半导体器件100安装在组装基板30上。如图1A和图1B所示,基板10设置有从其背面贯穿到设置在基板10的顶面的源极焊盘14的过孔(via)10a。即,源极焊盘14可以用作用于基板10的刻蚀的阻止件。
基板10在其背面还可以设置有金属层20(将被称为第一金属层)以及镀敷金属22(将被称为第二金属层)。第一金属层20从基板10的背面向过孔10a的内壁延伸,并且最终与源极焊盘14接触。镀敷金属22(即第二金属层)在半导体器件100组装和实际运行时接地。镀敷金属22通过使用第一金属层20作为晶种金属(seed metal)进行镀敷、确切地说进行电镀而形成。镀敷金属22在第一金属层20上从过孔10a的内侧延伸。另一金属层24(将被称为第三金属层)在镀敷金属22上也从过孔10a的内侧延伸。第三金属层24使其周边的镀敷金属22露出,并且镀敷金属22也使其周边的第一金属层20露出。
第一金属层20可以具有从基板10一侧起的由50至200nm厚的镍(Ni)和铬(Cr)的合金与同样50至200nm厚的金(Au)形成的叠层结构,该堆叠结构将被表示为NiCr/Au。如上文所述,镀敷金属22可以由电镀的金(Au)形成。第三金属层24可以由与第一金属层20相同的镍(Ni)和铬(Cr)的合金NiCr制成。与第一金属层20和第三金属层24中的NiCr相比,镀敷金属22(确切地说,金(Au))相对于钎焊材料32具有浸润性。本实施例中的镀敷金属22具有5至10μm的厚度,同时第三金属层24具有10至50nm的厚度。
如图1B所示,使用钎焊材料32将半导体器件100与组装基板30组装在一起或将半导体器件100安装在组装基板30上,钎焊材料32可以由例如金(Au)和锡(Sn)的共晶合金(可以表示为AuSn)或含有银(Ag)的导电树脂制成。钎焊材料(具体地说,共晶合金和/或导电树脂通)常相对于含有镍(Ni)的材料(诸如第一金属层20和第三金属层24的NiCr等)具有较差的浸润性,钎焊材料32很难渗透进过孔10a内。相应地,在过孔10a内形成空洞60。
从图2A到图7C示出了根据本发明的实施例的形成半导体器件100的方法。该方法首先通过金属蒸镀和剥离技术(lift-off technique)的顺序工艺在基板10的顶面上形成栅极焊盘12、源极焊盘14和漏极焊盘16以及栅极叉指13、源极叉指15和漏极叉指17。在附图中,仅示出了源极焊盘14。然后,如图2A所示,该方法使用蜡42将基板10附接到可以由玻璃制成的支撑基板40,从而使基板10的顶面面向支撑基板40。如图2B所示将基板10的背面研磨到例如约100μm(确切地为100±10μm的厚度),然后,如图2C所示依次地将由NiCr和Au制成的金属层44沉积在基板10的包括其边缘的整个背面以及支撑基板40的顶面上,其中,NiCr与基板10接触。
然后,在金属层44上制备具有条纹图案46的光阻剂。如图3A所示,条纹图案与基板10的顶面的源极焊盘14重叠。然后,如图3B所示,使用金属层44作为供应电流的晶种金属的电镀在除光阻剂的条纹图案46之外的区域中形成金属掩模48。如图3C所示,去除光阻剂的条纹图案46,金属掩模48留在金属层44上。
如图4A所示,通过作为蚀刻掩模的金属掩模48对金属层44和基板10进行刻蚀,可以在与源极焊盘14重叠的位置处形成过孔10a。由于在半导体加工的领域中要刻蚀的基板10的厚度的缘故而使得过孔10a的形成相当困难,本实施例的方法需要制备耐刻蚀的掩模。因此,本实施例的方法留有由金属制成的掩模48。如图4B所示,继过孔10a的形成之后实施的刻蚀去除了金属掩模48和金属层44。然后,如图4C所示,通过在基板10的整个背面、过孔10a的内壁以及过孔10a的底部(即,源极焊盘14上)依次溅射NiCr和Au来沉积第一金属层20。NiCr优选地具有200nm的厚度,同时,金(Au)优选地也具有200nm的厚度。
然后,如图5A所示,通过光阻剂50形成另一条纹图案。光阻剂50覆盖基板10的周边以及要形成刻线的区域10b。如图5B所示,电镀可以使用第一金属层20作为在电镀期间供应电流的晶种金属而形成镀敷金属22。镀敷金属22形成在从光阻剂50露出的区域。如图5C所示去除光阻剂50,镀敷金属22在要形成刻线10b的区域使第一金属层20露出。
然后,溅射可以将可以由NiCr制成的第三金属层24沉积在镀敷金属22的包括过孔10a的内壁的整个表面上以及从镀敷金属22露出的第一金属层20上。即,如图6A所示,第一金属层20、镀敷金属22和第三金属层24这三层留在基板10的包括过孔10a的深侧端(deepend)和内壁的整个背面上,同时,第一金属层20和第三金属层24这两层留在要形成刻线的区域。
然后,如图6B所示,将第三光阻剂52图案化为覆盖过孔10a和过孔10a周边。然后含有碘(I)的刻蚀剂可以去除从第三光阻剂52露出的镀敷金属22上的第三金属层24。由于第一金属层20的顶部具有金(Au),因此本刻蚀不能去除第一金属层20中的NiCr。因此,刻线10b留有由NiCr/Au制成的第一金属层20,这可以提高基板10相对于钎焊材料32的结合强度,这如图6C所示。另外,第三金属层24留在过孔10a的内壁的顶部、深侧端的顶部以及过孔的周边。
以上描述集中于分别由NiCr/Au和NiCr制成的第一金属层20和第三金属层24的组合;而其它材料也可适用于第一金属层20和第三金属层24。例如,第一金属层20的顶部可以设置有铜(Cu),即,第一金属层具有NiCr/Cu的堆叠。在该情况下,第三金属层24可以由钛(Ti)制成,并且使用氩(Ar)离子的离子铣削和/或使用含有氟(F)的气体的刻蚀可以选择性地去除第三金属层24中的钛(Ti)。第三金属层24中的钛(Ti)可以适用于由NiCr/Au的堆叠金属制成的第一金属层20。另外,除溅射以外,还可以通过蒸镀来实施这些金属的沉积。
参考图7A,随后该方法去除第三光阻剂52。然后,通过将温度升至100至200℃,即,通过熔化蜡42,可以将基板10从支撑基板40拆下,这如图7B所示。通过有机溶剂清洗基板10并且将基板10附接到扩展带54上,使得基板10的背面面向扩展带54并与扩展带54接触,如图7C所示,通过沿刻线10b切割(dicing)而将基板10划分成各个半导体器件100。刻线10b优选地具有比通过切割切出的宽度W2大的宽度W1,宽度W2大致等于切割刀片的厚度。因此,第一金属层20可以留在半导体器件100的各个芯片的周边。即,在半导体器件100的各个芯片的背面中,第三金属层24使镀敷金属22在芯片的周边露出,并且镀敷金属22使第一金属层20也在各个芯片的周边露出。当基板10的背面与由AnSn的共晶合金制成的钎焊材料32接触时,钎焊材料32散布到第一金属层20和镀敷金属22上。尽管第一金属层20包括相对于钎焊材料32具有较小浸润性的NiCr,但由于第一金属层20的顶部的金(Au)的缘故而使得钎焊材料32也会散布到第一金属层20上。因此,使钎焊材料32固化,半导体器件100的芯片可以与组装基板30组装或安装在组装基板30上。
图8A和图8B示出了与上述实施例可比较的组装根据常规技术的半导体器件200的方法。常规方法在要形成刻线10b的区域中同时去除第一金属层20和第三金属层24。即,如图8A所示,在去除第三金属层24之后,第一金属层未留在刻线中。沿刻线10b切割基板10,半导体器件的各个芯片的周边未留有第一金属层20而是使基板10的背面露出,这如图8B所示。
图9放大了如图8A和图8B所示的如此加工的半导体器件200,其中,半导体器件200组装在组装基板30上。与镀敷金属22相比,基板10和含有镍(Ni)的第三金属层24相对于共晶合金的钎焊材料32通常具有较小浸润性。如图9所示,钎焊材料32散布到镀敷金属22上,但无法散布到(被排斥)第三金属层24和基板10的背面上。因此,当基板10的背面的大部分设置有相对于钎焊材料32表现出较小浸润性的区域时,基板10不能稳定地与组装基板30接触并且表现出较小的结合强度。
与上述常规布置相反,在本发明的实施例中,基板10的刻线10b即使在去除第三金属层24之后也可以留有第一金属层20。由于第一金属层20的顶部在该实施例中设置有金(Au)或在可选实施例中设置有铜(Cu),因此不仅刻线10b中的镀敷金属22而且还有第一金属层20表现出相对于钎焊材料32的高浸润性。因此,钎焊材料32可以在基板10的周边散布,这可以使组装基板30上的管芯结合(die-bonding)稳定化并且提高结合强度。
在第三金属层24的去除中,必须留下刻线10b中的第一金属层20。因此,第一金属层20的至少顶部优选地具有相对于用于第三金属层24的刻蚀剂的耐受性。在实例中,第一金属层20的顶部优选地由金(Au)制成,同时第三金属层由NiCr制成。在该情况下,除了含碘(I)刻蚀剂之外的氯酸(HCl)也可以用作用于选择性地去除NiCr的刻蚀剂。
如图1B所示,基板10设置有:过孔10a;以及设置在过孔10a内和过孔10a周边的第一金属层20、镀敷金属22和第三金属层24的三层结构。由于与镀敷金属22和第一金属层20相比,第三金属层24相对于钎焊材料32表现出较小浸润性,因此钎焊材料32很难渗透进过孔10a内。当钎焊材料32渗透进过孔10a内并在该处固化时,由于材料的热膨胀系数的差异,钎焊材料32可能导致在镀敷金属22中产生裂缝。在本发明的实施例中,留在过孔10a的周边和过孔10a内的第三金属层24可以有效地防止钎焊材料32渗透进过孔10a内。
在本发明的实施例中,第一金属层20可以包括镍(Ni),同时第三金属层24可以包括镍(Ni)或钛(Ti)。第一金属层20的顶部和镀敷金属22可以包括彼此相同的材料。例如,第一金属层20的顶部和镀敷金属22可以包括相对于钎焊材料32表现出良好浸润性的金(Au)。第一金属层20的顶部和镀敷金属22的可以包括除金(Au)之外的铜(Cu),同时第三金属层24可以包括钛(Ti)。第一金属层20的顶部、镀敷金属22和第三金属层24的这些组合在相对于钎焊材料32表现出良好的浸润性时可以表现出对于仅去除第三金属层24的优良选择性。
从镀敷金属22露出的第一金属层20优选地具有比基板10的整个背面大10%的面积,以便提高通过钎焊材料32对组装基板30的结合强度。
外延层19可以包括氮化物半导体层,诸如氮化镓(GaN)、铝镓氮(AlGaN)、铟镓氮(InGaN)、氮化铟(InN)、铟铝镓氮(InAlGaN)等。基板10还可以包括含砷材料,诸如砷化镓(GaAs)、砷化镓铝(GaAlAs)等。基板10的绝缘基板11可以包括用于以上列举的氮化物半导体的碳化硅(SiC)、硅(Si)、蓝宝石(Al2O3),以及用于含砷半导体的砷化镓(GaAs)。
尽管已在某些具体示例性实施例中描述了本发明,但许多附加的修改和变化对于本领域的技术人员将是显而易见的。因此,应理解的是,该发明可以以不同于具体描述的实施例的方式被实施。因此,本发明的各实施例在所有的方面应被视为示例性的而不是限制性的;相应地,本发明的范围应通过所附权利要求书及其等同内容来确定。
本申请要求2017年2月22日提交的日本专利申请No.2017-031525的优先权,该专利申请通过引用的方式并入本文。
Claims (15)
1.一种形成半导体器件的方法,所述半导体器件包括利用钎焊材料安装在安装基板上的半导体芯片,所述方法包括以下步骤:
制备包括顶面和与所述顶面相反的背面的基板,所述顶面上具有外延层;
在所述基板的整个所述背面上沉积第一金属层,所述第一金属层含有镍(Ni)和在所述第一金属层的顶部中的金属材料,所述金属材料相对于所述钎焊材料表现出浸润性;
使所述第一金属层镀敷有第二金属层,从而使所述第一金属层的与划分所述半导体芯片的刻线对应的部分露出;
在所述第二金属层上以及所述刻线中的从所述第二金属层露出的所述第一金属层上沉积第三金属层,所述第三金属层含有镍(Ni)和钛(Ti)中的至少一者;
去除所述第三金属层,从而将所述第一金属层留在所述刻线中并将所述第二金属层留在除所述刻线以外的区域中;
沿所述刻线切割所述基板,从而形成所述半导体芯片;以及
利用所述钎焊材料将所述半导体芯片安装在所述安装基板上,
其中,切割所述基板的步骤包括如下步骤:切割所述第一金属层的至少一部分,从而所述第一金属层在半导体基板的背面露出。
2.根据权利要求1所述的方法,
其中,镀敷所述背面的步骤包括:通过将所述第一金属层作为晶种金属而电镀出由金(Au)制成的所述第二金属层的步骤。
3.根据权利要求1所述的方法,
其中,沉积所述第一金属层的步骤包括:依次沉积镍(Ni)和铬(Cr)的合金以及所述合金上的金(Au)的步骤。
4.根据权利要求3所述的方法,
其中,沉积所述第一金属层的步骤包括:依次沉积50至200nm的厚度的所述合金和50至200nm的厚度的所述合金上的金的步骤。
5.根据权利要求3所述的方法,
其中,沉积所述第三金属层的步骤包括:沉积10至50nm的厚度的镍(Ni)和铬(Cr)的合金的步骤,并且
去除所述第三金属层的步骤包括:使用含碘(I)的刻蚀剂刻蚀所述第三金属层的步骤。
6.根据权利要求3所述的方法,
其中,沉积所述第三金属层的步骤包括:沉积10至50nm的厚度的钛(Ti)的步骤,并且
去除所述第三金属层的步骤包括:使用含氟(F)的活性气体刻蚀所述第三金属层的步骤。
7.根据权利要求1所述的方法,
其中,沉积所述第一金属层的步骤包括:依次沉积镍(Ni)和铬(Cr)的合金以及所述合金上的铜(Cu)的步骤。
8.根据权利要求7所述的方法,
其中,沉积所述第一金属层的步骤包括:依次沉积50至200nm的厚度的所述合金和50至200nm的厚度的所述铜(Cu)的步骤。
9.根据权利要求7所述的方法,
其中,沉积所述第三金属层的步骤包括:沉积10至50nm的厚度的镍(Ni)和铬(Cr)的合金的步骤,并且
去除所述第三金属层的步骤包括:使用氩离子铣削所述第三金属层的步骤。
10.根据权利要求7所述的方法,
其中,沉积所述第三金属层的步骤包括:沉积10至50nm的厚度的钛(Ti)的步骤,并且
去除所述第三金属层的步骤包括:使用含氟(F)的活性气体刻蚀所述第三金属层的步骤。
11.根据权利要求1所述的方法,
其中,安装所述半导体芯片的步骤包括:使用金-锡(AuSn)的共晶合金安装所述半导体芯片的步骤。
12.根据权利要求1所述的方法,
其中,安装所述半导体芯片的步骤包括:使用导电树脂安装所述半导体芯片的步骤。
13.根据权利要求1所述的方法,
其中,镀敷所述第二金属层的步骤包括:使所述第一金属层电镀有5至10μm的厚度的金(Au)的步骤。
14.一种形成半导体器件的方法,所述半导体器件包括利用钎焊材料安装在安装基板上的半导体芯片,所述方法包括以下步骤:
制备包括顶面和与所述顶面相反的背面的基板,所述顶面上具有外延层;
在所述基板的整个所述背面上沉积第一金属层,所述第一金属层含有镍(Ni)和在所述第一金属层的顶部中的金属材料,所述金属材料相对于所述钎焊材料表现出浸润性;
使所述第一金属层镀敷有第二金属层,从而使所述第一金属层的与划分所述半导体芯片的刻线对应的部分露出;
在所述第二金属层上以及所述刻线中的从所述第二金属层露出的所述第一金属层上沉积第三金属层,所述第三金属层含有镍(Ni)和钛(Ti)中的至少一者;
去除所述第三金属层,从而将所述第一金属层留在所述刻线中并将所述第二金属层留在除所述刻线以外的区域中;
沿所述刻线切割所述基板,从而形成所述半导体芯片;以及
利用所述钎焊材料将所述半导体芯片安装在所述安装基板上,
其中,沉积所述第一金属层的步骤包括:依次沉积镍(Ni)和铬(Cr)的合金以及所述合金上的金(Au)的步骤,
镀敷所述背面的步骤包括:通过将所述第一金属层作为晶种金属而电镀出由金(Au)制成的所述第二金属层的步骤,
镀敷所述第二金属层的步骤包括:使所述第一金属层电镀有5至10μm的厚度的金(Au)的步骤,并且
安装所述半导体芯片的步骤包括:使用金-锡(AuSn)的共晶合金安装所述半导体芯片的步骤,
其中,切割所述基板的步骤包括如下步骤:切割所述第一金属层的至少一部分,从而所述第一金属层在半导体基板的背面露出。
15.根据权利要求1至14中任一项所述的方法,
还包括在沉积所述第一金属层之前的以下步骤:
研磨所述基板的背面直至厚度为100±10μm,以及
形成从所述基板的背面贯穿到所述基板的顶面的过孔,
其中,所述第一金属层、所述第二金属层以及所述第三金属层覆盖所述过孔的内侧,并且
去除所述第三金属层的步骤包括:将所述第三金属层留在所述过孔内和所述过孔周围的步骤。
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