CN108449002B - Control method and device of three-phase inverter, driving system and storage medium - Google Patents

Control method and device of three-phase inverter, driving system and storage medium Download PDF

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CN108449002B
CN108449002B CN201810438095.3A CN201810438095A CN108449002B CN 108449002 B CN108449002 B CN 108449002B CN 201810438095 A CN201810438095 A CN 201810438095A CN 108449002 B CN108449002 B CN 108449002B
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output power
voltage vector
equivalent
svpwm
calculated output
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CN108449002A (en
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王堃
许升
谢军
虞朝丰
宋洪强
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Qingdao Haier Smart Technology R&D Co Ltd
Haier Smart Home Co Ltd
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Qingdao Haier Smart Technology R&D Co Ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02PCONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P27/00Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
    • H02P27/04Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
    • H02P27/06Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters
    • H02P27/08Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation
    • H02P27/12Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation pulsing by guiding the flux vector, current vector or voltage vector on a circle or a closed curve, e.g. for direct torque control

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Abstract

The embodiment of the invention discloses a control method of a three-phase inverter, and belongs to the technical field of motor driving. The method comprises the following steps: acquiring a regular hexagon of Space Vector Pulse Width Modulation (SVPWM); acquiring a set output power; confirming an equivalent voltage vector terminal point on the boundary of a regular hexagon of the SVPWM; wherein, the calculated output power at the end point of the equivalent voltage vector is equivalent to the set output power; and adjusting input pulses of the three-phase inverter according to the equivalent voltage vector end point. By adopting the technical scheme, when the SVPWM is in overmodulation, the actual output power of the three-phase inverter does not deviate from the set output power. The embodiment of the invention also discloses a control device, a driving system and a storage medium of the three-phase inverter.

Description

Control method and device of three-phase inverter, driving system and storage medium
Technical Field
The present invention relates to the field of motor driving technologies, and in particular, to a method and an apparatus for controlling a three-phase inverter, a driving system, and a storage medium.
Background
The direct current bus of a PMSM (permanent magnet synchronous motor) driving system without electrolytic capacitor has less energy storage, and the output power of the inverter can influence the input power of a network side, so that the output power of the inverter is controlled to indirectly improve the current waveform of the network side. Due to the fact that a bus of the PMSM driving system without the electrolytic capacitor is lack of a flat-wave capacitor with a large capacitance value, the voltage of a direct-current bus output by the unidirectional rectifier bridge pulsates periodically, and the control method of Space Vector Pulse Width Modulation (SVPWM) enters an overmodulation region periodically.
The current overmodulation control method changes the actual output power of the inverter so that the actual output power deviates from the set output power.
Disclosure of Invention
The embodiment of the invention provides a control method of a three-phase inverter, and when SVPWM is in an overmodulation region, the actual output power of the three-phase inverter does not deviate from the set output power.
The following presents a simplified summary in order to provide a basic understanding of some aspects of the disclosed embodiments. This summary is not an extensive overview and is intended to neither identify key/critical elements nor delineate the scope of such embodiments. Its sole purpose is to present some concepts in a simplified form as a prelude to the more detailed description that is presented later.
According to a first aspect of embodiments of the present invention, there is provided a control method of a three-phase inverter.
In some optional embodiments, the method for controlling the three-phase inverter includes:
acquiring a regular hexagon of Space Vector Pulse Width Modulation (SVPWM);
acquiring a set output power;
confirming an equivalent voltage vector terminal point on the boundary of the regular hexagon of the SVPWM; wherein the calculated output power at the end point of the equivalent voltage vector is equivalent to the set output power;
and adjusting the input pulse of the three-phase inverter according to the equivalent voltage vector end point.
In some optional embodiments, the identifying an equivalent voltage vector end point on the regular hexagon of the SVPWM includes:
confirming a first set voltage vector equivalent interval on a first boundary of a regular hexagon of the SVPWM;
acquiring first calculation output power and second calculation output power at two end points of the first set voltage vector equivalent interval;
acquiring third calculation output power at the midpoint of the first set voltage vector equivalent interval;
determining a second set voltage vector equivalent interval according to the first calculated output power, the second calculated output power, the third calculated output power and the set output power;
acquiring fourth calculation output power at the midpoint of the second set voltage vector equivalent interval;
and when the error between the fourth calculated output power and the set output power is within a set error range, confirming that the middle point of the second set voltage vector equivalent interval is the equivalent voltage vector end point.
In some optional embodiments, the first boundary comprises:
the boundary of the sector where the SVPWM is overmodulating; or the like, or, alternatively,
and the boundary of the sector adjacent to the sector where the SVPWM is overmodulating.
In some optional embodiments, the identifying an equivalent voltage vector end point on the boundary of the regular hexagon of the SVPWM includes:
when the set output power exceeds the maximum output power of the three-phase inverter, taking a first vertex of a regular hexagon of the SVPWM as the equivalent voltage vector terminal point; wherein an error between the calculated output power and the set output power at the first vertex is smaller than errors between the calculated output errors and the set output power at other vertices of the SVPWM.
According to a second aspect of the embodiments of the present invention, there is provided a control apparatus of a three-phase inverter.
In some optional embodiments, the control device of the three-phase inverter includes:
the first acquisition module is used for acquiring a regular hexagon of Space Vector Pulse Width Modulation (SVPWM);
the second acquisition module is used for acquiring the set output power;
the first confirming module is used for confirming an equivalent voltage vector terminal point on the boundary of the regular hexagon of the SVPWM; wherein the calculated output power at the end point of the equivalent voltage vector is equivalent to the set output power;
and the first calculation module is used for adjusting the input pulse of the three-phase inverter according to the equivalent voltage vector end point.
In some optional embodiments, the first confirmation module comprises:
a first confirming unit, configured to confirm a first set voltage vector equivalent interval on a first boundary of a regular hexagon of the SVPWM;
a first obtaining unit configured to obtain first and second calculated output powers at two end points of the first set voltage vector equivalent interval;
a second acquisition unit configured to acquire a third calculated output power at a midpoint of the first set voltage vector equivalent interval;
a second confirming unit configured to confirm a second set voltage vector equivalent interval based on the first calculated output power, the second calculated output power, the third calculated output power, and the set output power;
a third obtaining unit, configured to obtain a fourth calculated output power at a midpoint of the second set voltage vector equivalent interval;
and a third confirming unit configured to confirm that a midpoint of the second set voltage vector equivalent section is the equivalent voltage vector end point when an error between the fourth calculated output power and the set output power is within a set error range.
In some optional embodiments, the first boundary in the first acknowledgment cell comprises:
the boundary of the sector where the SVPWM is overmodulating; or the like, or, alternatively,
and the boundary of the sector adjacent to the sector where the SVPWM is overmodulating.
In some optional embodiments, the first confirmation module is further configured to:
when the set output power exceeds the maximum output power of the three-phase inverter, taking a first vertex of a regular hexagon of the SVPWM as the equivalent voltage vector terminal point; wherein an error between the calculated output power and the set output power at the first vertex is smaller than errors between the calculated output errors and the set output power at other vertices of the SVPWM.
According to a third aspect of embodiments of the present invention, there is provided a drive system.
In some optional embodiments, the drive system comprises the above control device;
the control device is used for controlling the three-phase inverter to pulsate at a set frequency.
According to a fourth aspect of embodiments of the present invention, there is provided a computer-readable storage mechanism.
In some alternative embodiments, the computer-readable storage medium has stored thereon a computer program which, when executed by a processor, implements the aforementioned control method of the three-phase inverter.
The embodiment of the invention has the beneficial effects that: when SVPWM is in overmodulation, the actual output power of the three-phase inverter does not deviate from the set output power. When the set output power does not exceed the maximum output power of the three-phase inverter, one or more equivalent voltage vector end points can be always confirmed on the boundary of the regular hexagon of the SVPWM, the equivalent voltage vector end points represent voltage vectors, and the inner product of the voltage vectors and the corresponding current vectors can be taken to obtain the calculated output power, wherein the calculated output power is equivalent to the set output power, namely, the calculated output power is the same as the set output power, or the error between the calculated output power and the set output power is in a set error range. Therefore, the strategy in the technical scheme is adopted to adjust the set voltage vector, the actual output power of the three-phase inverter cannot be changed, the actual output power of the three-phase inverter cannot deviate from the set output power, and the actual output power of the three-phase inverter can well follow the set output power.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention.
FIG. 1 is a schematic diagram illustrating a regular hexagon of an SVPWM according to an exemplary embodiment;
FIG. 2 is a flow diagram illustrating a method of controlling a three-phase inverter in accordance with an exemplary embodiment;
FIG. 3 is a schematic diagram illustrating an end point of an equivalent voltage vector being identified on a regular hexagon of SVPWM, according to an exemplary embodiment;
FIG. 4 is a circuit topology schematic of a three-phase inverter shown in accordance with an exemplary embodiment;
FIG. 5 is a block schematic diagram of a control apparatus for a three-phase inverter shown in accordance with an exemplary embodiment;
FIG. 6 is a circuit topology diagram illustrating a drive system according to an exemplary embodiment.
Detailed Description
The following description and the drawings sufficiently illustrate specific embodiments of the invention to enable those skilled in the art to practice them. The examples merely typify possible variations. Individual components and functions are optional unless explicitly required, and the sequence of operations may vary. Portions and features of some embodiments may be included in or substituted for those of others. The scope of embodiments of the invention encompasses the full ambit of the claims, as well as all available equivalents of the claims. Embodiments may be referred to herein, individually or collectively, by the term "invention" merely for convenience and without intending to voluntarily limit the scope of this application to any single invention or inventive concept if more than one is in fact disclosed. Herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed. The embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. For the structures, products and the like disclosed by the embodiments, the description is relatively simple because the structures, the products and the like correspond to the parts disclosed by the embodiments, and the relevant parts can be just described by referring to the method part.
When SVPWM enters overmodulation, the magnitude, or both the magnitude and phase, of the set voltage vector needs to be modified so that the three-phase inverter can output the voltage vector. In the existing control method, although it can be ensured that the three-phase inverter can output one voltage vector, the amplitude, or the amplitude and the phase of the voltage vector are changed, so that the output power of the three-phase inverter is changed, and the output power is different from the set output power. Wherein the set output power is obtained by calculating an inner product of a set voltage vector and a corresponding current vector. For example, when overmodulation occurs in SVPWM, the constant phase overmodulation algorithm adopts a strategy of reducing the length of the set voltage vector without changing the phase of the set voltage vector so that the end point of the changed voltage vector falls on the boundary of the regular hexagon of SVPWM. Therefore, the set output power of the three-phase inverter is changed by the adjusting strategy of the constant-phase overmodulation algorithm, so that the actual output power of the three-phase inverter cannot well follow the set output power. The regular hexagon of the SVPWM is shown in fig. 1. Wherein, the regular hexagon is divided into six sectors: sector I, sector II, sector III, sector IV, sector V, and sector VI.
According to a first aspect of embodiments of the present invention, there is provided a control method of a three-phase inverter.
As shown in fig. 2, in some alternative embodiments, the control method of the three-phase inverter includes:
s201, obtaining a regular hexagon of Space Vector Pulse Width Modulation (SVPWM);
s202, acquiring set output power;
s203, confirming an equivalent voltage vector terminal point on the boundary of the regular hexagon of the SVPWM; wherein, the calculated output power at the end point of the equivalent voltage vector is equivalent to the set output power;
s204, adjusting input pulses of the three-phase inverter according to the equivalent voltage vector end point;
in S204, the input pulse of the three-phase inverter is adjusted to obtain a voltage vector having an equivalent voltage vector end point as an end point, it being understood that the start point of the voltage vector is the center of the regular hexagon of SVPWM.
By adopting the technical scheme, when the SVPWM is in overmodulation, the actual output power of the three-phase inverter does not deviate from the set output power. When the set output power does not exceed the maximum output power of the three-phase inverter, one or more equivalent voltage vector end points can be always confirmed on the boundary of the regular hexagon of the SVPWM, the equivalent voltage vector end points represent voltage vectors, and the inner product of the voltage vectors and the corresponding current vectors can be taken to obtain the calculated output power, wherein the calculated output power is equivalent to the set output power, namely, the calculated output power is the same as the set output power, or the error between the calculated output power and the set output power is in a set error range. Therefore, the strategy in the technical scheme is adopted to adjust the set voltage vector, the actual output power of the three-phase inverter cannot be changed, the actual output power of the three-phase inverter cannot deviate from the set output power, and the actual output power of the three-phase inverter can well follow the set output power.
In S203, the inner product of the corresponding voltage vector and the corresponding current vector of the output power finger is calculated. The calculation formula for obtaining the output power is as follows:
pinv=1.5(udid+uqiq)=1.5|u||i|cosθ
wherein p isinvTo calculate the output power, u is the voltage vector, ud、uqD and q components of the voltage vector; i is a current vector, id、iqIs the d, q component of the current vector and theta is the angle between the voltage vector and the net side current vector, as shown in figure 1.
As shown in fig. 3, in some alternative embodiments, in S203, the end point of the equivalent voltage vector is identified on the regular hexagon of SVPWM, which includes:
s301, confirming a first set voltage vector equivalent interval on a first boundary of a regular hexagon of the SVPWM;
the first set voltage vector equivalent interval comprises an equivalent voltage vector terminal.
S302, acquiring first calculation output power and second calculation output power at two end points of a first set voltage vector equivalent interval;
in S302, two endpoints of the first set voltage vector equivalent interval are respectively marked as a first endpoint and a second endpoint;
s303, acquiring third calculated output power at the midpoint of the first set voltage vector equivalent interval;
in S303, the midpoint of the first set voltage vector equivalent interval is marked as a third endpoint;
s304, determining a second set voltage vector equivalent interval according to the first calculated output power, the second calculated output power, the third calculated output power and the set output power;
in S304, the two endpoints of the second set voltage vector equivalent interval may be the first endpoint and the third endpoint, or the two endpoints of the second set voltage vector equivalent interval may be the second endpoint and the third endpoint. Under the condition that the first calculated output power is larger than the second calculated output power, if the third calculated output power is larger than the set output power, taking a second endpoint and a third endpoint as a second set voltage vector equivalent interval, and if the third calculated output power is smaller than the set output power, taking the first endpoint and the third endpoint as the second set voltage vector equivalent interval; and under the condition that the first calculated output power is smaller than the second calculated output power, if the third calculated output power is larger than the set output power, taking the first endpoint and the third endpoint as a second set voltage vector equivalent interval, and if the third output power is smaller than the set output power, taking the second endpoint and the third endpoint as a second set voltage vector equivalent interval.
S305, obtaining fourth calculation output power at the midpoint of the second set voltage vector equivalent interval;
s306, when the error between the fourth calculated output power and the set output power is within the set error range, determining the middle point of the second set voltage vector equivalent interval as an equivalent voltage vector end point;
in S306, an error range is set as an allowable error range determined by the user according to the actual application.
In the technical scheme, the calculated output power at the midpoint of the set voltage vector equivalent interval is compared with the set output power every time, namely, half of the set voltage vector equivalent interval can be abandoned every time, and the equivalent voltage vector end point can be rapidly confirmed in the set voltage vector equivalent interval, so that the input pulse of the three-phase inverter is regulated according to the equivalent voltage vector end point.
Optionally, the method for determining the equivalent voltage vector end point on the regular hexagon of the SVPWM further includes:
and S307, when the error between the fourth calculated output power and the set output power is out of the set error range, taking the second set voltage vector equivalent interval as the first set voltage vector equivalent interval, and executing S302.
The efficiency of the operation of the method of fig. 3 can be measured in terms of time complexity t (N), where N represents the scale of the problem. The time complexity only considers the growth rate of N, and generally only needs to obtain the order of N. The time complexity of the method in fig. 3 is logarithmic, so the technical scheme can very quickly find the equivalent voltage vector end point meeting the precision. For example, when the net side voltage is a power supply with an effective value of 220V, the maximum interval length is 207V at the net side voltage peak value, and therefore, the voltage precision of 0.8V can be achieved by repeating the technical scheme for 8 times at most.
In some optional embodiments, the first boundary comprises:
the boundary of the sector where the SVPWM is overmodulating; or the like, or, alternatively,
the boundary of the sector adjacent to the sector where the SVPWM overmodulation occurs.
In some optional embodiments, the first boundary is used as a first set voltage vector equivalent interval; it includes: taking the boundary of a sector where SVPWM overmodulation occurs as a first set voltage vector equivalent interval; or, the boundary of the sector adjacent to the sector where the SVPWM is overmodulating is used as the first setting voltage vector equivalent interval.
The first setting voltage vector equivalent interval is confirmed on the first boundary of the regular hexagon of the SVPWM, and the complete boundary (the boundary of the sector) is directly confirmed as the first setting voltage vector equivalent interval for confirming the first setting voltage vector equivalent interval for the first time, so that the first setting voltage equivalent interval can be conveniently and quickly confirmed. Meanwhile, the terminal point of the equivalent voltage vector in the confirmed equivalent interval of the first set voltage vector can be ensured to be included, and the error rate is reduced.
In some optional embodiments, in S203, identifying an equivalent voltage vector endpoint on the boundary of the regular hexagon of SVPWM includes:
when the set output power exceeds the maximum output power of the three-phase inverter, taking a first vertex of a regular hexagon of the SVPWM as an equivalent voltage vector terminal point; and the error between the calculated output power and the set output power at the first vertex is smaller than the error between the calculated output power and the set output power at other vertices of the regular hexagon of the SVPWM.
In the technical scheme, when the set output power exceeds the maximum output power of the three-phase inverter, the error between the output power of the three-phase inverter and the set output power can be ensured to be minimum.
Fig. 4 shows a circuit topology of a three-phase inverter.
As shown in fig. 1 and 4, in some optional embodiments, the adjusting the input pulse of the three-phase inverter according to the equivalent voltage vector end point in S204 includes:
confirming an equivalent voltage vector u' according to the equivalent voltage vector end point; in the regular hexagon of SVPWM, an equivalent voltage vector u' takes the center of the regular hexagon as a starting point and takes an equivalent voltage vector end point as an end point;
confirming a sector where the equivalent voltage vector is located; the sector comprises a sector I, a sector II, a sector III, a sector IV, a sector V and a sector VI;
adjusting the switching sequence and switching time of the thyristor according to the sector where the equivalent voltage vector u' is located; wherein, the thyristor includes: thyristors BG1, BG2, BG3, BG4, BG5 and BG 6.
In fig. 1, u is a set output voltage vector, u ' is an equivalent voltage vector, i is a set output current vector, and u1, u2, u3, u4, u5 and u6 are 6 safe unit output voltage vectors that can be output by controlling the thyristors in fig. 4, and an arbitrary equivalent voltage vector u ' can be obtained by a combination of the 6 safe unit output voltage vectors, and the equivalent voltage vector u ' and the set output current vector i drive the motor M to operate.
According to a second aspect of the embodiments of the present invention, there is provided a control apparatus of a three-phase inverter.
As shown in fig. 5, in some alternative embodiments, the control device of the three-phase inverter includes:
the first obtaining module 10 is configured to obtain a regular hexagon of space vector pulse width modulation SVPWM;
a second obtaining module 20, configured to obtain a set output power;
the first confirming module 30 is used for confirming an equivalent voltage vector terminal point on the boundary of a regular hexagon of the SVPWM; wherein, the calculated output power at the end point of the equivalent voltage vector is equivalent to the set output power;
and the first calculation module 40 is used for adjusting the input pulse of the three-phase inverter according to the equivalent voltage vector terminal.
In some optional embodiments, the first confirmation module comprises:
the SVPWM control device comprises a first confirming unit, a second confirming unit and a control unit, wherein the first confirming unit is used for confirming a first set voltage vector equivalent interval on a first boundary of a regular hexagon of SVPWM;
the first acquisition unit is used for acquiring first calculation output power and second calculation output power at two end points of a first set voltage vector equivalent interval;
a second acquisition unit configured to acquire a third calculated output power at a midpoint of the first set voltage vector equivalent interval;
a second confirming unit for confirming a second set voltage vector equivalent interval according to the first calculated output power, the second calculated output power, the third calculated output power and the set output power;
a third acquisition unit configured to acquire a fourth calculation output power at a midpoint of the second set voltage vector equivalent interval;
and a third confirming unit, configured to confirm a midpoint of the second set voltage vector equivalent interval as an equivalent voltage vector end point when an error between the fourth calculated output power and the set output power is within a set error range.
In some optional embodiments, the first confirming module further includes a fourth confirming unit, configured to take the second setting voltage vector equivalent interval as the first setting voltage vector equivalent interval when an error between the fourth calculated output power and the setting output power is outside a setting error range.
In some optional embodiments, the first boundary in the first acknowledgment cell comprises:
the boundary of the sector where the SVPWM is overmodulating; or the like, or, alternatively,
the boundary of the sector adjacent to the sector where the SVPWM overmodulation occurs.
In some optional embodiments, the first determining unit is further configured to use the first boundary as a first set voltage vector equivalent interval; it includes: taking the boundary of a sector where SVPWM overmodulation occurs as a first set voltage vector equivalent interval; or, the boundary of the sector adjacent to the sector where the SVPWM is overmodulating is used as the first setting voltage vector equivalent interval.
In some optional embodiments, the first confirmation module is further configured to:
when the set output power exceeds the maximum output power of the three-phase inverter, taking a first vertex of a regular hexagon of the SVPWM as an equivalent voltage vector terminal point; and the error between the calculated output power and the set output power at the first vertex is smaller than the error between the calculated output error and the set output power at other vertices of the SVPWM.
In some alternative embodiments, the method comprises:
a processor;
a memory for storing processor-executable instructions;
wherein the processor is configured to:
acquiring a regular hexagon of Space Vector Pulse Width Modulation (SVPWM);
acquiring a set output power;
confirming an equivalent voltage vector terminal point on the boundary of a regular hexagon of the SVPWM; wherein, the calculated output power at the end point of the equivalent voltage vector is equivalent to the set output power;
and adjusting input pulses of the three-phase inverter according to the equivalent voltage vector end point.
Alternatively, the aforementioned control method and apparatus for the three-phase inverter may be implemented in a network-side server, or may also be implemented in a mobile terminal, or implemented in a dedicated control device.
According to a third aspect of embodiments of the present invention, there is provided a drive system.
Fig. 6 is a circuit topology diagram of a drive system.
In some alternative embodiments, the drive system includes the control device described above;
the control device is configured to control the three-phase inverter 601 to pulsate at a set frequency.
Optionally, the control device is for controlling the three-phase inverter to (sin θ)g)2The frequency is pulsed.
In some alternative embodiments, the drive system further comprises a rectifying device 602, which is connected to the output and to the control device, and whose input is adapted to be connected to the grid side 604. Wherein the grid side 604 may provide an electrical energy source for the drive system.
The current at the network side and the voltage at the network side can be controlled to be sine waves with the same phase, and the driving system can operate with high power factor.
In a PMSM drive system without electrolytic capacitors, the bus capacitor 603 is typically a few microfarads, the bus voltage will ripple at twice the power frequency (100Hz), and the three-phase inverter output power will also ripple. The output power of the three-phase inverter 601 may be approximately equal to the grid side 604 input power, ignoring the power on the bus capacitor 603.
Thus, the net side input current is:
Figure GDA0002439102580000111
wherein igFor net side input current, pgFor net side input power, VgIs the amplitude of the input voltage on the network side, when pgTo (sin theta)g)2When the frequency is pulsating, igIn sin θgThe frequency is pulsed, and the frequency is the same as that of the input voltage on the network side, so that the driving system can operate at a high power factor.
In the driving system, the maximum value of the output voltage vector of the three-phase inverter is limited by the bus voltage, and the maximum value is as follows:
Figure GDA0002439102580000112
wherein v isoutIs the output voltage vector, v, of a three-phase inverterdcIs the bus voltage. When the bus voltage can not meet the requirement of the formula, the inverter can not output voutAt this point, SVPWM will enter the overmodulation region.
In the case where the motor is operated at a high speed,
Figure GDA0002439102580000113
wherein the content of the first and second substances,
Figure GDA0002439102580000114
is a permanent magnet flux linkage, Ld、LqD, q-axis inductances, id、iqD-axis and q-axis currents, respectively. It follows that the rotation speed increases and the output voltage vector v of the three-phase inverter increasesoutThe larger the overmodulation region.
According to a fourth aspect of embodiments of the present invention, there is provided a computer-readable storage medium.
In some alternative embodiments, a computer-readable storage medium stores a computer program which, when executed by a processor, implements the aforementioned control method of the three-phase inverter. The computer-readable storage medium includes a Read Only Memory (ROM), a Random Access Memory (RAM), a magnetic tape, an optical storage device, and the like.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention. It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the system and the apparatus described above may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
It is to be understood that the present invention is not limited to the procedures and structures described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the invention is limited only by the appended claims.

Claims (6)

1. A method of controlling a three-phase inverter, comprising:
acquiring a regular hexagon of Space Vector Pulse Width Modulation (SVPWM);
acquiring a set output power;
confirming an equivalent voltage vector terminal point on the boundary of the regular hexagon of the SVPWM; wherein the calculated output power at the end point of the equivalent voltage vector is equivalent to the set output power;
confirming an equivalent voltage vector according to the equivalent voltage vector end point;
confirming a sector where the equivalent voltage vector is located;
adjusting the switching sequence and switching time of the thyristor according to the sector where the equivalent voltage vector is located;
wherein, confirming the equivalent voltage vector terminal point on the boundary of the regular hexagon of the SVPWM comprises:
confirming a first set voltage vector equivalent interval on a first boundary of a regular hexagon of the SVPWM; the first boundary comprises a boundary of a sector where the SVPWM is overmodulating, or a boundary of a sector adjacent to the sector where the SVPWM is overmodulating;
acquiring first calculation output power and second calculation output power at two end points of the first set voltage vector equivalent interval;
acquiring third calculation output power at the midpoint of the first set voltage vector equivalent interval;
determining a second set voltage vector equivalent interval according to the first calculated output power, the second calculated output power, the third calculated output power and the set output power, and specifically comprising: under the condition that the first calculated output power is larger than the second calculated output power, if the third calculated output power is larger than the set output power, taking a second endpoint and a third endpoint as a second set voltage vector equivalent interval, and if the third calculated output power is smaller than the set output power, taking the first endpoint and the third endpoint as a second set voltage vector equivalent interval; under the condition that the first calculated output power is smaller than the second calculated output power, if the third calculated output power is larger than the set output power, taking a first endpoint and a third endpoint as a second set voltage vector equivalent interval, and if the third calculated output power is smaller than the set output power, taking the second endpoint and the third endpoint as the second set voltage vector equivalent interval; two end points of the first set voltage vector equivalent interval are respectively marked as the first end point and the second end point, and the middle point of the first set voltage vector equivalent interval is marked as the third end point;
acquiring fourth calculation output power at the midpoint of the second set voltage vector equivalent interval;
and when the error between the fourth calculated output power and the set output power is within a set error range, confirming that the middle point of the second set voltage vector equivalent interval is the equivalent voltage vector end point.
2. The control method according to claim 1, wherein the identifying an equivalent voltage vector end point on the boundary of the regular hexagon of the SVPWM further comprises:
when the set output power exceeds the maximum output power of the three-phase inverter, taking a first vertex of a regular hexagon of the SVPWM as the equivalent voltage vector terminal point; wherein an error between the calculated output power and the set output power at the first vertex is smaller than errors between the calculated output errors and the set output power at other vertices of the SVPWM.
3. A control device for a three-phase inverter, comprising:
the first acquisition module is used for acquiring a regular hexagon of Space Vector Pulse Width Modulation (SVPWM);
the second acquisition module is used for acquiring the set output power;
the first confirming module is used for confirming an equivalent voltage vector terminal point on the boundary of the regular hexagon of the SVPWM; wherein the calculated output power at the end point of the equivalent voltage vector is equivalent to the set output power;
the first calculation module is used for confirming an equivalent voltage vector according to an equivalent voltage vector end point, confirming a sector where the equivalent voltage vector is located, and adjusting the switching sequence and the switching time of the thyristor according to the sector where the equivalent voltage vector is located;
wherein the first confirmation module comprises:
a first confirming unit, configured to confirm a first set voltage vector equivalent interval on a first boundary of a regular hexagon of the SVPWM; the first boundary comprises a boundary of a sector where the SVPWM is overmodulating, or a boundary of a sector adjacent to the sector where the SVPWM is overmodulating;
a first obtaining unit configured to obtain first and second calculated output powers at two end points of the first set voltage vector equivalent interval;
a second acquisition unit configured to acquire a third calculated output power at a midpoint of the first set voltage vector equivalent interval;
a second determining unit, configured to determine a second set voltage vector equivalent interval according to the first calculated output power, the second calculated output power, the third calculated output power, and the set output power, and specifically includes: under the condition that the first calculated output power is greater than the second calculated output power, if the third calculated output power is greater than the set output power, taking a second endpoint and a third endpoint as the second set voltage vector equivalent interval, and if the third calculated output power is less than the set output power, taking the first endpoint and the third endpoint as the second set voltage vector equivalent interval; under the condition that the first calculated output power is smaller than the second calculated output power, if the third calculated output power is larger than the set output power, taking a first endpoint and a third endpoint as a second set voltage vector equivalent interval, and if the third calculated output power is smaller than the set output power, taking the second endpoint and the third endpoint as the second set voltage vector equivalent interval; two end points of the first set voltage vector equivalent interval are respectively marked as the first end point and the second end point, and the middle point of the first set voltage vector equivalent interval is marked as the third end point;
a third obtaining unit, configured to obtain a fourth calculated output power at a midpoint of the second set voltage vector equivalent interval;
and a third confirming unit configured to confirm that a midpoint of the second set voltage vector equivalent section is the equivalent voltage vector end point when an error between the fourth calculated output power and the set output power is within a set error range.
4. The control apparatus of claim 3, wherein the first confirmation module is further configured to:
when the set output power exceeds the maximum output power of the three-phase inverter, taking a first vertex of a regular hexagon of the SVPWM as the equivalent voltage vector terminal point; wherein an error between the calculated output power and the set output power at the first vertex is smaller than errors between the calculated output errors and the set output power at other vertices of the SVPWM.
5. A drive system characterized by comprising the control device of claim 3 or 4;
the control device is used for controlling the three-phase inverter to pulsate at a set frequency.
6. A computer-readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the control method of a three-phase inverter according to claim 1 or 2.
CN201810438095.3A 2018-05-09 2018-05-09 Control method and device of three-phase inverter, driving system and storage medium Active CN108449002B (en)

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