CN108365018B - Transverse gallium nitride power rectifier and manufacturing method thereof - Google Patents
Transverse gallium nitride power rectifier and manufacturing method thereof Download PDFInfo
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- 229910002601 GaN Inorganic materials 0.000 title claims abstract description 37
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title claims abstract description 26
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 20
- 238000005530 etching Methods 0.000 claims abstract description 99
- 230000004888 barrier function Effects 0.000 claims abstract description 88
- 238000002161 passivation Methods 0.000 claims abstract description 48
- 239000000758 substrate Substances 0.000 claims abstract description 26
- 229910052751 metal Inorganic materials 0.000 claims description 57
- 239000002184 metal Substances 0.000 claims description 57
- 229910002704 AlGaN Inorganic materials 0.000 claims description 31
- 238000000034 method Methods 0.000 claims description 23
- 238000000151 deposition Methods 0.000 claims description 21
- 239000000463 material Substances 0.000 claims description 19
- 229910018072 Al 2 O 3 Inorganic materials 0.000 claims description 6
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 5
- 239000000956 alloy Substances 0.000 claims description 5
- 229910045601 alloy Inorganic materials 0.000 claims description 5
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 2
- 238000002347 injection Methods 0.000 abstract description 4
- 239000007924 injection Substances 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 8
- 239000004065 semiconductor Substances 0.000 description 7
- 229910004298 SiO 2 Inorganic materials 0.000 description 5
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- 238000000231 atomic layer deposition Methods 0.000 description 4
- 229910003460 diamond Inorganic materials 0.000 description 4
- 239000010432 diamond Substances 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 4
- 238000011065 in-situ storage Methods 0.000 description 4
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 4
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- 238000005240 physical vapour deposition Methods 0.000 description 4
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 4
- 229910052594 sapphire Inorganic materials 0.000 description 4
- 239000010980 sapphire Substances 0.000 description 4
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 4
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- 238000001039 wet etching Methods 0.000 description 4
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- 239000000243 solution Substances 0.000 description 3
- 230000008021 deposition Effects 0.000 description 2
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- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66143—Schottky diodes
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Abstract
The invention provides a transverse gallium nitride power rectifying device, which comprises a substrate, a buffer layer, a barrier layer and a passivation dielectric layer, wherein: the two ends of the barrier layer are respectively provided with a first etching groove and a second etching groove, one end of the passivation medium layer close to the first etching groove is provided with a third groove adjacent to the first etching groove, the depth of the third groove reaches the surface of the barrier layer, anode structures are formed in the first etching groove and the third groove, and a cathode structure is formed in the second etching groove. The invention also provides a manufacturing method of the transverse gallium nitride power rectifying device. The invention can avoid the etching or injection damage of the anode, improve the reliability of the diode and prolong the service life of the diode.
Description
Technical Field
The invention relates to the technical field of semiconductor processes, in particular to a transverse gallium nitride power rectifying device and a manufacturing method thereof.
Background
Modern technology continuously puts higher requirements on the aspects of volume, reliability, voltage resistance, power consumption and the like of semiconductor power devices. With the reduction of the feature size of the transistor, the mainstream silicon-based material and the CMOS technology are developing to a 10nm process node due to the physical laws such as the short channel effect and the limitation of the manufacturing cost, and thus are difficult to be continuously promoted. Gallium nitride has the properties of wider forbidden bandwidth, high thermal conductivity, strong atomic bond, good chemical stability, high working temperature, high breakdown voltage, strong irradiation resistance and the like, and is suitable for photoelectrons, high-temperature high-power devices, high-frequency microwave devices and the like. Therefore, gallium nitride is considered as a new generation of semiconductor material for integrated circuits, and has a wide application prospect.
Diodes are of paramount importance in the field of power electronics, where forward biasing allows current to pass through the diode in a single direction, and reverse biasing blocks current from passing through the diode in the reverse direction, and therefore are commonly used for rectification. The Schottky Barrier Diode (SBD) is a metal-semiconductor device made of a positive electrode made of a noble metal such as gold, silver, aluminum, platinum, etc., and a negative electrode made of an N-type semiconductor, and has rectifying characteristics by using a Barrier formed on a contact surface of the positive electrode and the negative electrode, and has the advantages of high switching frequency and low forward voltage drop.
The anode schottky metal of a conventional AlGaN or GaN schottky diode (SBD) is usually deposited directly on the surface of a barrier layer, and electrons do not need to overcome the schottky barrier but need to flow through the high-resistance barrier layer during conduction, so that the turn-on voltage is higher. In order to reduce the turn-on voltage and the on-resistance of the AlGaN or GaN heterojunction diode, diodes with various novel anode structures continuously appear, and a great breakthrough is made. However, most of various novel anode structures adopt a method of etching a barrier layer and injecting or depositing a dielectric layer to prepare the anode structure of the diode, the production process is complex, and the reliability needs to be improved.
Therefore, it is desirable to design a novel lateral gan power rectifier device and a method for manufacturing the same, which can avoid etching of the anode structure of the diode and improve the lifetime and reliability of the device on the basis of reducing the turn-on voltage and the on-resistance of the diode.
Disclosure of Invention
The transverse gallium nitride power rectifying device and the manufacturing method thereof provided by the invention can overcome the defects in the prior art, and adopt a thin potential barrier epitaxial wafer etching and graphical deposition method to avoid anode etching damage of a conventional gallium nitride diode and reduce the process complexity.
In a first aspect, the present invention provides a lateral gallium nitride power rectifier device, including a substrate, a buffer layer on the surface of the substrate, a barrier layer on the surface of the buffer layer, and a passivation dielectric layer on the surface of the barrier layer, wherein:
the passivation structure comprises a barrier layer and a passivation medium layer, wherein the barrier layer is provided with a first etching groove and a second etching groove at two ends respectively, the passivation medium layer is provided with a third groove adjacent to the first etching groove at one end close to the first etching groove, the depth of the third groove reaches the surface of the barrier layer, anode structures are formed in the first etching groove and the third groove, and a cathode structure is formed in the second etching groove.
Optionally, the first etching groove and the third groove are deposited with anode metal.
Optionally, a first anode metal is deposited in the first etching groove, and a second anode metal is deposited in the third groove.
Alternatively, the anode metal may be an ohmic alloy such as Ti, al, ni, or TiN.
Optionally, the barrier layer is made of AlGaN or GaN.
Optionally, the etching depth of the first etching groove and the second etching groove is 1/5-2/3 of the thickness of the barrier layer.
Optionally, the passivation dielectric layer is made of SiN, alN or SiO 2 Or Al 2 O 3 And the like.
In another aspect, the present invention provides a method for manufacturing the silicon nitride power rectifier device, including:
the method comprises the following steps: providing an epitaxial wafer, wherein the epitaxial wafer sequentially comprises a substrate, a buffer layer, a barrier layer and a passivation dielectric layer from bottom to top;
step two: opening the passivation dielectric layer for the first time and etching the barrier layer, and respectively forming a first etching groove and a second etching groove at two ends of the barrier layer;
step three: opening the passivation dielectric layer for the second time, defining a Schottky region of the device, and forming a third groove adjacent to the first etching groove;
step four: and depositing anode metal in the first etching groove and the third groove, and depositing cathode metal in the second etching groove.
Optionally, the step of depositing the anode metal in the first etching groove and the step of depositing the cathode metal in the second etching groove in the fourth step may be before the step three.
Alternatively, the metal structures of the anode metal and the cathode metal are the same.
The transverse gallium nitride power rectifying device and the manufacturing method thereof provided by the invention can avoid the complex process of preparing the anode structure in the conventional GaN-based power diode, avoid the etching or injection damage of the anode, improve the reliability of the diode, prolong the service life, are compatible with the CMOS technology, and are suitable for industrial application of the GaN-based power diode.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic diagram of an overall structure of a lateral gan power rectifier device according to an embodiment of the present invention;
fig. 2 is a schematic diagram illustrating an overall structure of a lateral gan power rectifier device according to another embodiment of the present invention;
fig. 3A-3D are schematic diagrams illustrating steps of manufacturing a lateral gan power rectifier device according to an embodiment of the invention;
fig. 4 is a flowchart of a method for manufacturing a lateral gan power rectifier device according to an embodiment of the present invention;
fig. 5A-5E are structural diagrams illustrating steps of manufacturing a lateral gan power rectifier device according to another embodiment of the present invention;
fig. 6 is a flowchart of a method for manufacturing a lateral gan power rectifier device according to another embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, belong to the protection scope of the present invention.
In a first aspect, the invention provides a transverse gallium nitride power rectifier, which comprises a substrate, a buffer layer positioned on the surface of the substrate, and a barrier layer positioned on the surface of the buffer layer, wherein a first etching groove and a second etching groove are formed at two ends of the barrier layer, a passivation dielectric layer is arranged on the surface of the barrier layer between the first etching groove and the second etching groove, a third groove adjacent to the first etching groove is formed at one end, close to the first etching groove, of the passivation dielectric layer, and the depth of the third groove reaches the surface of the barrier layer. An anode structure is formed in the first etching groove and the third groove, and a cathode structure is formed in the second etching groove.
Fig. 1 shows an overall structural diagram of a lateral gallium nitride power rectifier device according to an embodiment of the present invention. As shown, the lateral gallium nitride power rectifier device includes a substrate 100, and the material of the substrate 100 includes, but is not limited to, silicon carbide, sapphire, diamond, or the like.
A buffer layer 101 is grown on the surface of the substrate 100 to alleviate the difference between the physical and chemical properties of the substrate 100 material and the barrier layer 102 material. Typically, the buffer layer 101 is preferably made of a material having a lattice similar to that of the barrier layer 102, a thermal expansion coefficient between the substrate 100 and the barrier layer 102, and a good chemical stability, such as AlN. Preferably, the buffer layer 101 may include a plurality of high-temperature and low-temperature AlN buffer layers.
A barrier layer 102 is formed on a surface of the buffer layer 101, and a material of the barrier layer 102 includes, but is not limited to, alGaN or GaN. Specifically, in the present embodiment, the AlGaN barrier layer 102 has a thickness of 3 to 10nm, and the composition ratio of al is 1% to 40%.
A passivation dielectric layer 103 is formed on the surface of the barrier layer 102. The passivation dielectric layer 103 is made of SiN, alN, or SiO 2 Or Al 2 O 3 . Typically, passivationThe dielectric layer 103 may be deposited by in-situ dielectric or by PVD, LPCVD, PECVD, ALD, etc.
The first end of the barrier layer 102 has a first etching groove etched deeply into the AlGaN barrier layer, and typically, the first etching groove is formed by dry etching or wet etching, and the etching depth is 2nm to 5nm. A third groove is opened at one end of the passivation layer 103 adjacent to the first etched groove, the depth of the third groove is from the surface of the passivation layer 103 to the surface of the barrier layer 102, the first etched groove and the third groove are adjacent to form an L-shaped groove, and the L-shaped groove is filled with anode metal 107.
A second etching groove etched deeply into the AlGaN barrier layer is formed at the second end of the barrier layer 102, and is typically formed by dry etching or wet etching, and the etching depth is 2nm to 5nm. Within the second etched recess, a cathode metal 108 is filled.
Fig. 2 is a schematic diagram illustrating an overall structure of a lateral gan power rectifier device according to another embodiment of the present invention. As shown, the lateral gallium nitride power rectifier device includes a substrate 100, and the material of the substrate 100 includes, but is not limited to, silicon carbide, sapphire, diamond, or the like.
A buffer layer 101 is grown on the surface of the substrate 100 to alleviate the difference between the physical and chemical properties of the substrate 100 material and the barrier layer 102 material. Typically, the buffer layer 101 is preferably made of a material having a lattice similar to that of the barrier layer 102, a thermal expansion coefficient between the substrate 100 and the barrier layer 102, and a good chemical stability, such as AlN. Preferably, the buffer layer 101 may include a plurality of high temperature and low temperature AlN buffer layers.
A barrier layer 102 is formed on a surface of the buffer layer 101, and a material of the barrier layer 102 includes, but is not limited to, alGaN or GaN. Specifically, in the present embodiment, the AlGaN barrier layer 102 has a thickness of 3 to 10nm and a composition ratio of al of 1% to 40%.
A passivation dielectric layer 103 is formed on the surface of the barrier layer 102. The passivation dielectric layer 103 is made of SiN, alN, or SiO 2 Or Al 2 O 3 . Typically, the passivation dielectric layer 103 may be formed by an in-situ dielectricOr by PVD, LPCVD, PECVD, ALD, etc.
The first end of the barrier layer 102 has a first etching groove etched deeply into the AlGaN barrier layer, and typically, the first etching groove is formed by dry etching or wet etching, and the etching depth is 2nm to 5nm. A third groove is opened at one end of the passivation layer 103 adjacent to the first etched groove, and the depth of the third groove is from the surface of the passivation layer 103 to the surface of the barrier layer 102. The first etching groove is filled with a first anode metal 1071, and the third groove is filled with a second anode metal 1072.
A second etching groove etched deeply into the AlGaN barrier layer is formed at the second end of the barrier layer 102, and is typically formed by dry etching or wet etching, and the etching depth is 2nm to 5nm. Within the second etched recess, a cathode metal 108 is filled.
The transverse gallium nitride power rectifying device provided by the embodiment of the invention has the advantages that the anode structure is not damaged by etching and injection, the transverse gallium nitride power rectifying device is compatible with a CMOS (complementary metal oxide semiconductor) process, the reliability is high, the service life of the device is long, and the transverse gallium nitride power rectifying device is suitable for industrial application of a gallium nitride-based power diode.
On the other hand, the invention provides a manufacturing method of a transverse gallium nitride power rectifying device, which comprises the following steps: providing an epitaxial wafer, wherein the epitaxial wafer sequentially comprises a substrate, a buffer layer, an AlGaN barrier layer and a passivation dielectric layer from bottom to top; step two: opening the passivation dielectric layer for the first time and etching the AlGaN barrier layer, and respectively forming a first etching groove and a second etching groove at two ends of the AlGaN barrier layer; step three: opening the passivation dielectric layer for the second time, defining a Schottky region, and forming a third groove adjacent to the first etching groove; step four: and depositing anode metal in the first etching groove and the third groove, and depositing cathode metal in the second etching groove. Wherein the step of depositing the anode metal in the first etching groove and the step of depositing the cathode metal in the second etching groove in the fourth step may be located before the step three.
Fig. 3A-3D are block diagrams illustrating steps for fabricating a lateral gan power rectifier device according to an embodiment of the present invention.
As shown in fig. 3A, an epitaxial wafer is provided with an AlGaN barrier layer 102. The semiconductor device comprises a substrate 100, a buffer layer 101, a barrier layer 102 and a passivation dielectric layer 103. The material of the substrate 100 includes, but is not limited to, silicon carbide, sapphire, diamond, or the like. AlN is preferably used as the material of the buffer layer 101. On the surface of the buffer layer 101, there is a barrier layer 102, and the material of the barrier layer 102 includes, but is not limited to, alGaN or GaN. Specifically, in the present embodiment, the AlGaN barrier layer 102 has a thickness of 3 to 10nm and a composition ratio of al of 1% to 40%. A passivation dielectric layer 103 is formed on the surface of the barrier layer 102. The passivation dielectric layer 103 is made of SiN, alN, or SiO 2 Or Al 2 O 3 . Typically, the passivation dielectric layer 103 can be deposited by an in-situ dielectric or by PVD, LPCVD, PECVD, ALD, etc.
As shown in fig. 3B, the passivation dielectric layer 103 is opened and the AlGaN barrier layer 102 is etched once. As shown, the device may be etched using a dry or wet process. Typically, the AlGaN barrier layer 102 is etched to a depth of 2-5nm. A first etching groove 10701 is formed at one end of the AlGaN barrier layer 102, and a second etching groove 1080 is formed at the other end.
The device is masked and patterned by illumination to define schottky regions, as shown in fig. 3C. The passivation dielectric layer 103 is further opened to form a third groove 10702. The third recess 10702 is adjacent to the first etched recess 10701, together forming a cross-sectional L-shaped space for deposition of the anode metal.
As shown in fig. 3D, an anode metal 107 is deposited in the space formed by the first etching groove 10701 and the third groove 10702, and a cathode metal 108 is deposited in the space formed by the second etching groove 1080. Typically, the anode and cathode metals are ohmic alloys such as Ti, al, ni, tiN, etc.
Fig. 4 is a flowchart illustrating a method for manufacturing a lateral gan power rectifier device according to an embodiment of the present invention. As shown in the figure, S41 represents providing an epitaxial wafer, which includes, in order from bottom to top, a substrate, a buffer layer, an AlGaN barrier layer, and a passivation dielectric layer; s42, opening the passivation dielectric layer for the first time and etching the AlGaN barrier layer, and respectively forming a first etching groove and a second etching groove at two ends of the AlGaN barrier layer, wherein the AlGaN barrier layer can be etched by a dry method or a wet method; s43, opening the passivation dielectric layer for the second time, defining a Schottky region, and forming a third groove adjacent to the first etching groove; and S44, depositing anode metal in the first etching groove and the third groove, and depositing cathode metal in the second etching groove.
Fig. 5A-5E are block diagrams illustrating steps of fabricating a lateral gan power rectifier device according to another embodiment of the present invention.
As shown in fig. 5A, an epitaxial wafer with an AlGaN barrier layer 102 is provided. Which comprises a substrate 100, a buffer layer 101, a barrier layer 102 and a passivation dielectric layer 103. The material of the substrate 100 includes, but is not limited to, silicon carbide, sapphire, diamond, or the like. AlN is preferably used as the material of the buffer layer 101. On the surface of the buffer layer 101, there is a barrier layer 102, and the material of the barrier layer 102 includes, but is not limited to, alGaN or GaN. Specifically, in the present embodiment, the AlGaN barrier layer 102 has a thickness of 3 to 10nm and a composition ratio of al of 1% to 40%. A passivation dielectric layer 103 is formed on the surface of the barrier layer 102. The passivation dielectric layer 103 is made of SiN, alN, or SiO 2 Or Al 2 O 3 . Typically, the passivation dielectric layer 103 can be deposited by in-situ dielectric or by PVD, LPCVD, PECVD, ALD, etc.
As shown in fig. 5B, the passivation dielectric layer 103 is opened and the AlGaN barrier layer 102 is etched once. As shown, the device may be etched using a dry or wet process. Typically, the AlGaN barrier layer 102 is etched to a depth of 2-5nm. A first etching groove 10710 is formed at one end of the AlGaN barrier layer 102, and a second etching groove 1080 is formed at the other end.
As shown in fig. 5C, a first anode metal 1071 is deposited in the space formed by the first etching groove 10710, and a cathode metal 108 is deposited in the space formed by the second etching groove 1080. Typically, the first anode and cathode metal are made of ohmic alloy such as Ti, al, ni, tiN, etc.
The device is masked and patterned by illumination to define schottky regions, as shown in fig. 5D. The passivation dielectric layer 103 is further opened to form a third recess 10720. The third groove 10720 is adjacent to the first anodic metal 1071 for deposition of the second anodic metal 1072.
As shown in fig. 5E, a second anodic metal 1072 is deposited in the third recess 10720. Typically, the material of the second anode metal is an ohmic alloy such as Ti, al, ni, tiN, etc.
Fig. 6 is a flowchart illustrating a method for manufacturing a lateral gan power rectifier device according to another embodiment of the present invention. As shown in the figure, S61 represents providing an epitaxial wafer, which includes, in order from bottom to top, a substrate, a buffer layer, an AlGaN barrier layer, and a passivation dielectric layer; s62, opening the passivation dielectric layer for the first time and etching the AlGaN barrier layer, and respectively forming a first etching groove and a second etching groove at two ends of the AlGaN barrier layer, wherein the AlGaN barrier layer can be etched by a dry method or a wet method; s63, depositing first anode metal in the first etching groove and depositing cathode metal in the second etching groove; s64, opening the passivation dielectric layer for the second time, defining a Schottky region, and forming a third groove adjacent to the first etching groove; s65 represents depositing a second anodic metal in the third recess.
The method for manufacturing the transverse gallium nitride power rectifying device provided by the embodiment of the invention can avoid a complex process for preparing an anode structure in a conventional GaN-based power diode, and avoid etching or injection damage of an anode, thereby improving the reliability and the service life of the device.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are also within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (6)
1. A transverse gallium nitride power rectifier device, including the substrate, the buffer layer locating on the surface of the said substrate, the barrier layer locating on the surface of the said buffer layer, and the passivation dielectric layer locating on the surface of the said barrier layer, characterized in that:
the two ends of the barrier layer are respectively provided with a first etching groove and a second etching groove, the passivation medium layer is provided with a third groove adjacent to the first etching groove at one end close to the first etching groove, the first etching groove is deeply etched in the barrier layer, the depth of the third groove reaches the surface of the barrier layer, the third groove defines a Schottky region, the first etching groove and the third groove are adjacent to form an L-shaped groove, an anode structure is formed in the first etching groove and the third groove, and a cathode structure is formed in the second etching groove;
the thickness of the barrier layer is 3-10nm; a first anode metal is deposited in the first etching groove, and a second anode metal is deposited in the third groove; the metal structures of the anode metal and the cathode metal are the same;
the buffer layer comprises a plurality of high-temperature and low-temperature AlN buffer layers; the first anode metal, the cathode metal and the second anode metal are made of Ti, al, ni and TiN ohmic alloy; the first anode metal and the second anode metal are made of the same material;
the etching depth of the first etching groove and the second etching groove is 1/5-2/3 of the thickness of the barrier layer.
2. The lateral gallium nitride power rectifier device of claim 1, wherein the first etched recess and the third recess have anodic metal deposited therein.
3. The lateral gallium nitride power rectifier device of claim 1, wherein the barrier layer is of AlGaN or GaN.
4. The lateral gallium nitride power rectifier device of claim 1, wherein the passivation dielectric layer is made of SiN, alN, siO 2 Or Al 2 O 3 And so on.
5. A method of fabricating a lateral gallium nitride power rectifier device according to claim 1, for fabricating a silicon nitride power rectifier device according to any of claims 1 to 4, the method comprising:
the method comprises the following steps: providing an epitaxial wafer, wherein the epitaxial wafer sequentially comprises a substrate, a buffer layer, a barrier layer and a passivation dielectric layer from bottom to top; wherein the barrier layer has a thickness of 3-10nm;
step two: opening the passivation dielectric layer for the first time and etching the barrier layer, and respectively forming a first etching groove and a second etching groove at two ends of the barrier layer;
step three: opening the passivation dielectric layer for the second time, defining a Schottky region of the device, and forming a third groove adjacent to the first etching groove;
step four: depositing anode metal in the first etching groove and the third groove, and depositing cathode metal in the second etching groove; a first anode metal is deposited in the first etching groove, and a second anode metal is deposited in the third groove; the metal structure of the anode metal and the cathode metal is the same.
6. The method of claim 5, wherein said step four of depositing an anode metal in said first etched recess and said step four of depositing a cathode metal in said second etched recess are performed before said step three.
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| Current transport mechanism of AlGaN/GaN;Yao Yao et al;《Japanese Journal of Applied Physics》;20141231;第54卷(第1期);第1页第1段-第5页第2段，图1 * |
| Yao Yao et al.Current transport mechanism of AlGaN/GaN.《Japanese Journal of Applied Physics》.2014,第54卷(第1期), * |
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