CN108336752A - The capacitor voltage balance method of the uncontrollable pre-charging stage of modularization multi-level converter - Google Patents
The capacitor voltage balance method of the uncontrollable pre-charging stage of modularization multi-level converter Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
- H02J3/36—Arrangements for transfer of electric power between ac networks via a high-tension dc link
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/4835—Converters with outputs that each can have more than two voltages levels comprising two or more cells, each including a switchable capacitor, the capacitors having a nominal charge voltage which corresponds to a given fraction of the input voltage, and the capacitors being selectively connected in series to determine the instantaneous output voltage
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/60—Arrangements for transfer of electric power between AC networks or generators via a high voltage DC link [HVCD]
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Abstract
The capacitor voltage balance method of the uncontrollable pre-charging stage of modularization multi-level converter of the present invention is related to modularization multi-level converter, especially suitable for MMC（Modularization multi-level converter）Uncontrollable pre-charging stage capacitor voltage balance method.The control circuit of flyback draw-out power supply is improved, the controling circuit structure of improvement part includes control unit, light-coupled isolation unit and gate cell and MOS field-effect transistors, is connected respectively with the output end of the output end of control unit and light-coupled isolation unit with two input terminals of gate cell；It is connected with the grid grade end of MOS field-effect transistors by resistance R2 with the output end of gate cell.It is improved by control circuit to traditional flyback draw-out power supply and traditional submodule capacitor voltage detection method, improved voltage detection method reduces the frequency/voltage conversion circuit in conventional method, and the frequency voltage signal for embodying capacitance voltage amplitude is directly sent into FPGA.
Description
Technical field
The capacitor voltage balance method of the uncontrollable pre-charging stage of modularization multi-level converter of the present invention is related to modularization
Multilevel converter, especially suitable for MMC（Modularization multi-level converter）Uncontrollable pre-charging stage capacitance voltage it is flat
Weighing apparatus method.
Background technology
Modularization multi-level converter is since its output waveform quality is high, switching loss is low, quick failover capability
And the advantages that higher reliability, so that it is more and more extensive in the application of high-voltage dc transmission electrical domain.Currently, China has
Two MMC-HVDC such as five end of three end of Nanao, Guangdong Province and Zhoushan Of Zhejiang Province（Flexible direct current based on modularization multi-level converter is defeated
Electricity）Project inputs are run, and achieve preferable operational effect and economic benefit.But due to modularization multi-level converter
Each bridge arm is made of multiple submodule cascade, therefore the imbalance of submodule capacitor voltage seriously threatens MMC-HVDC（It is based on
The flexible DC power transmission of modularization multi-level converter）The safe and stable operation of system.
In MMC（Modularization multi-level converter）Controllable pre-charging stage and normal operating phase, submodule switch letter
Number delay difference be to cause the uneven main cause of submodule capacitor voltage.In MMC（Modularization multi-level converter）'s
Uncontrollable pre-charging stage, the difference of draw-out power supply are to cause the unbalanced main cause of submodule capacitor voltage.
Currently, have lot of documents proposes more effective balance method for the problem, distribution can be divided them into
Formula closed loop voltage controls and two classes such as centralized submodule selection control.But these are both for controllable precharge and normal operation
What the stage proposed, in uncontrollable pre-charging stage since submodule in blocking can not play balanced action.
International standard IEC62501 requires at least keep 10 minutes capacitor voltage balances in the uncontrollable charging stage
It just can prove that the correctness of submodule design.For the capacitor voltage balance problem of uncontrollable pre-charging stage, document（A.
Ajami, H. Shokri and A. Mokhberdoran, “Parallel switch-based chopper circuit
for DC capacitor voltage balancing in diode-clamped multilevel inverter,” IET
power Electron.）It is proposed to be that submodule capacitance configures paralleling switch chopper circuit, achieves preferable balance of voltage effect
Fruit, but on the one hand this method increases the usage quantity of switching device, on the other hand result in current conversion station active loss
Increase；Document（Gum Tae Son, Hee-Jin Lee, Tae Sik Nam, Uk-Hwa Lee etc. Design and
Control of a Modular Multilevel HVDC Converter With Redundant Power Modules
for Noninterruptible Energy Transfer[J]）It is proposed that submodule capacitor voltage passes through cascade in same bridge arm
Transformer realizes balance, but the use of cascade transformer can be such that the design difficulty of MMC submodules greatly increases, and this method is every
A submodule configures unidirectional chopper and single coupling inductance constitutes balanced loop, and different balanced loops use phase-shifting carrier wave tune
System, has effectively achieved the balance of capacitance voltage, but when the more MMC systems of this method level number, system hardware cost and
Control complexity will greatly increase.
Invention content
The purpose of the present invention is place provides a kind of uncontrollable precharge of modularization multi-level converter against the above deficiency
The capacitor voltage balance method in stage is a kind of novel capacitor voltage balance side suitable for the uncontrollable pre-charging stages of MMC
Method carries out qualitative analysis for the energy imbalance of uncontrollable pre-charging stage capacitance voltage；By to traditional draw-out power supply control
Circuit and capacitance voltage detection method processed is improved, and forms the capacitor voltage balance method based on draw-out power supply；And when passing through
The feasibility and validity of the carried balance of voltage method of domain simulating, verifying.
The present invention takes following technical scheme to realize：
The capacitor voltage balance method of the uncontrollable pre-charging stage of modularization multi-level converter, the control to flyback draw-out power supply
Circuit is improved, and the controling circuit structure of improvement part includes control unit, light-coupled isolation unit and gate cell and MOS
Field-effect transistor, with two input terminals of gate cell respectively with the output end of control unit and the output end of light-coupled isolation unit
It is connected；It is connected with the grid grade end of MOS field-effect transistors by resistance R2 with the output end of gate cell.
Described control unit uses UC3842 chips.
The light-coupled isolation unit uses commercially available light-coupled isolation chip, is made of light emitting diode and photelectric receiver.
The MOS field-effect transistors use commercially available MOS field-effect transistors, for realizing copped wave function.
It is described to use commercially available and door chip with gate cell.
Unlike traditional flyback sourse control circuit, the signal PWM of control unit generationkIn improved circuit
Do not directly drive MOS field-effect transistors, but pass through linear optical coupling isolation and withBy with drive MOS after operation logic
Field-effect transistor.
Analyze above-mentioned improved circuit it is found that MOS field-effect transistors actual drive signal PWMk' be calculated as follows：
(8)
Wherein,d kIt is the increased draw-out power supply of the submodule for the uncontrollable pre-charging stage capacitor voltage balance control algolithms of FPGA
Signal is controlled, value is ' 1 ' or ' 0 '；Ford kValue " negating ", i.e., ' 1 ' negate after become ' 0 ', ' 0 ' negate after become ' 1 '.
The capacitor voltage balance method of the uncontrollable pre-charging stage of modularization multi-level converter, includes the following steps：
1）The control of change of current station level is completed using dsp software unit, the change of current station level control includes voltage and current closed-loop control
Two parts, voltage measurement signal pass through the rings such as bleeder circuit, low-pass filter, voltage to frequency converter and photoelectric converter successively
Section；DC capacitor voltage is acquired by the electric resistance partial pressure of bleeder circuit, low-pass filter filters out aforementioned collected capacitance
After interference high-frequency signal in voltage, capacitance voltage signal is converted to frequency signal by voltage to frequency converter；Photoelectric converter
Foregoing frequency signal is converted into optical signal, modulating wave is exported in the form of optical signal to step 2）Valve level controller；
2）It is completed to step 1 using the FPGA software units in valve level controller）Obtained optical signal carries out valve grade control；
The optical signal passes through optical electrical conversion links, frequency/voltage conversion links and A/D sampling elements successively, passes through optical electrical
Conversion links convert light signals into frequency signal, and foregoing frequency signal is converted to capacitance voltage by frequency/voltage conversion links
The capacitance voltage signal of digital signal form is converted to analog voltage current signal by signal, A/D sampling elements；
3）According to step 1）Modulating wave that middle change of current Substation level provides, step 2）In obtained each submodule capacitor voltage and
Each submodule electric current in the block realizes modulation and the submodule capacitor voltage balance control of MMC.
In view of the requirement of electrical isolation and real-time communication, in step 1）In submodule side by capacitance voltage measure believe
Number frequency signal is converted to by voltage to frequency converter, the optical signalling of same frequency is then converted to by optic fibre connector and through light
Fibre is transferred to step 2）Valve level controller；In valve level controller side, optic fibre connector will come from step 1）Optical frequency signal
After the electric signal for being converted to same frequency, voltage magnitude signal is converted to by the conversion circuit of frequency/voltage conversion links, is then passed through
FPGA software units are sent into for the use of valve grade control algolithm after crossing AD samplings.
N counter is configured in FPGA software units, n is each bridge arm submodule number, and n is no more than 400
Natural number；After the optic fibre connector of valve level controller receives optical signal, it is converted into electric signal, is exactly so-called " frequency electric pulse
Signal ".Counter counts the frequency electric impulse signal that optic fibre connector exports, when any one counter increases
When to predetermined value, interrupt signal corresponding with submodule is generated, and execute the method for the present invention.
The method of the present invention often detects that a counter interrupts, that is, executes one cycle algorithm, is configured until detecting
'snA counter generates interruption, by all counter resets, and starts simultaneously at the counting of new a cycle.
Advantages of the present invention：Pass through control circuit to traditional flyback draw-out power supply and traditional submodule capacitor voltage detection
Method is improved, and improved voltage detection method reduces the frequency/voltage conversion circuit in conventional method, and directly by body
The frequency voltage signal of existing capacitance voltage amplitude is sent into FPGA.With the uncontrollable pre-charging stage balancing control algorithm phase proposed
Cooperation, effectively can be balanced control to the submodule capacitor voltage in same bridge arm.Compared with existing method, have such as
Lower advantage：
(1) without the usage quantity of increase device for power switching；
(2) magnitude relationship that submodule capacitor voltage is distinguished by FPGA counters avoids complicated capacitance voltage sequence；
(3) with less active loss, more preferable capacitor voltage balance effect is achieved.
Description of the drawings
Below with reference to attached drawing, the invention will be further described：
Fig. 1 is the topology diagram of MMC of the present invention；
Fig. 2 is the circuit topology figure of each submodule in MMC；
Fig. 3 is that MMC uses DC bus into bridge arm circuit working condition chart when line precharge；
Fig. 4 is traditional flyback sourse electric operation control circuit figure；
Fig. 5 is the local flyback sourse electric operation control circuit figure after the present invention is improved Fig. 4；
Fig. 6 is traditional submodule capacitor voltage detection method schematic diagram；
Fig. 7 is the improved traditional submodule capacitor voltage detection method schematic diagram of the present invention；
Fig. 8 is the uncontrollable pre-charging stage capacitor voltage balance control method flow chart of the present invention；
Fig. 9 is the capacitance voltage curves using four submodules of bridge arm in A phases after conventional voltage balance method；
Figure 10 is the active loss growth curve using bridge arm in A phases after conventional voltage balance method（I.e. each submodule capacitance
The sum of off-energy）；
Figure 11 is the capacitance voltage curves using four submodules of bridge arm in A phases after the method for the present invention；
Figure 12 is the active loss growth curve using bridge arm in A phases after the method for the present invention.
Specific implementation mode
As shown in Figure 1, being modularization multi-level converter (Modulate Multilevel Converter, MMC)
Topological structure is made of three phase elements, and each phase element includes upper and lower two bridge arms, at the same each bridge arm bynA complete phase
Same submodule (Sub Modulate, SM) and a smoothing reactor is constituted.
The circuit topology of each submodule is as shown in Fig. 2, in engineering in MMC, each submodule by a by-pass switch S,
One protection thyristor VT, two IGBT（VT1、VT2）And distinguish the diode of reverse parallel connection therewith（VD1、VD2）, one
DC capacitorC, an equivalent resistanceRIt is constituted with a draw-out power supply；On the one hand by-pass switch S protects son in sub-module fault
On the other hand module ensures the continuity of bridge arm current；Thyristor VT is connected when short trouble occurs for MMC systems to protect two
Pole pipe VD2；Draw-out power supply is from DC capacitorCOn take electricity, provide working power for the driving and control circuit of submodule.In order to drop
Influence of the low high-voltage side fault to sub- module drive and control circuit, the design of draw-out power supply, which generally uses, includes transformer isolation
Inverse-excitation converting topology.Wherein, resistanceROn the one hand contribute to the balance of maintenance submodule capacitor voltage, be on the other hand used for son
Capacitance is discharged when module failure and system-downCThe energy of storage.
MMC normal work before, submodule capacitor voltage very it is low either it is almost nil need introduce DC bus or
AC system is to sub- module capacitance into line precharge.Regardless of submodule carries out preliminary filling by DC bus, still pass through exchange
System is pre-charged, this process can always be divided into uncontrollable precharge and controllably two pre-charging stages of precharge.
If Fig. 3 is by taking MMC is pre-charged using DC bus as an example, the circuit operating mode of some bridge arm is given.Due to
All submodules are in blocking, then DC bus is by charging resistor and the diode VD2 of each submodule, to 2nIt is a
Concatenated capacitance charges.When not considering submodule redundancy condition, even if charging resistor is removed, the pre-charging stage knot
Each submodule capacitor voltage is only the 50% of its rated voltage when beam.
In uncontrollable pre-charging stage, all submodules uncontrolled so that MMC controllers can not utilize bridge arm current into
Row capacitor voltage balance controls.Simultaneously because resistanceR dAnd the difference of draw-out power supply etc. so that the capacitance voltage in this stage
Energy imbalance is more serious.
Fig. 3 bridge arm electric currentsi paIt can be expressed as：
i pa=i ck+i dk+i pk (1)
It is further represented as：
(2)
In formula (2)k=1,2 ... ..., 2n,u ckIndicate thekThe capacitance voltage of a submodule,i ckIndicate filling for the submodule capacitance
Discharge current（To flow into capacitance as positive direction）,i dkFor equivalent resistanceR dDischarge current,i pkIndicate the electricity of inflow draw-out power supply
Stream.
Different submodule draw-out power supply electric currents in formula (1) and formula (2)i pkDifference be to cause uncontrollable pre-charging stage
The principal element of module capacitance Voltage unbalance.It, can be right in a switch periods further to analyze the influence of draw-out power supply
Draw-out power supply establishes following averaging model：
(3)
Wherein,DFor metal-oxide-semiconductor VT in draw-out power supplykDuty ratio,nFor transformer primary secondary coil turn ratio,U COIt is draw-out power supply
Output voltage,R OIt is the equivalent resistance of submodule driving and controlling circuits.
Analysis mode (2) and formula (3) are if it is found that the output equivalent resistance of some submodule draw-out power supplyR OLess than other submodules
The output equivalent resistance of block draw-out power supply, then the submodule draw-out power supply output voltageU COWill be taken less than other submodules can electricity
Source output voltage.And in order to maintainU COIt is constant, then it should increase electric currenti pk, andi pkIncrease can cause submodule capacitance electricity
Pressureu ckReduction.But the effect of the constant output characteristic and flyback sourse automatic control system due to draw-out power supply,u ckReduction
It will cause duty ratioDIncrease, andDIncrease further exacerbatei pkIncrease.By being analyzed above it is found that submodule
The uneven degree of capacitance voltage will increase over time.
For submodule capacitor voltage imbalance problem caused by draw-out power supply, conventional method is generally by matching equivalent electricity
ResistanceR dMethod inhibit the diverging of capacitance voltage, be specifically introduced below.
It, can be by electric current after formula (2) is substituted into formula (1)i ckIt is expressed as：
(4)
If by Automatic Control Theory it is found that submodulekCapacitance voltage be able to maintain that in average voltage, then formula (4) must
The following conditions must be met：
(5)
If the power of draw-out power supply is usedp sIt indicates, then electric current in formula (5)i pkCan approximate representation be：
(6)
Formula (6), which is substituted into formula (5), can obtain equivalent resistanceR dValue range be：
(7)
In addition, submodule draw-out power supply is required reliably to be exported in wider input voltage range in engineering, thus it is equivalent
ResistanceR dValue should also consider the input characteristics of draw-out power supply simultaneously.
Although the equivalent resistance selected after the value range and consideration draw-out power supply input characteristics that are provided according to formula (7)R d
The diverging of capacitance voltage can be effectively inhibited, but the method is calculatedR dValue is generally too small, it will increases the MMC changes of current
The active loss stood, therefore study the smaller capacitor voltage balance method of active loss with most important theories meaning and apply valence
Value.
If Fig. 4 is traditional flyback sourse control circuit, the W1 windings of high frequency transformer T1 are input winding, W2 be output around
Group, W3 are feedback winding.It inputs winding side R1, capacitance C1, crystal diode D1 and forms RCD absorbing circuits, output winding side R8
For the equivalent load of draw-out power supply.Signal PWMk is switching tube MOS field-effect transistors Q1 in k-th of submodule draw-out power supply
Drive signal, it is generated by control chip and directly controls the work of draw-out power supply k.
The generation side that thes improvement is that MOS field-effect transistor Q1 drive signal of the present invention to draw-out power supply control circuit
Method, improved control circuit are as shown in Figure 5.The controling circuit structure of improvement part include control unit UCC3842, optocoupler every
From unit U2, with gate cell AND and MOS field-effect transistor Q1, with two input terminals of gate cell AND respectively with control unit
The output end of UCC3842 and the output end of light-coupled isolation unit U2 are connected；With the output end of gate cell AND by resistance R2 with
The grid grade end of MOS field-effect transistors Q1 is connected.The light-coupled isolation unit is made of light emitting diode and photelectric receiver.Flyback
The signal PWMk that circuit control chip control chip generates does not directly drive MOS field-effect transistors in improved circuit
Q1, but pass through linear optical coupling isolation and withBy with MOS field-effect transistors Q1 is driven after operation logic.It analyzes improved
Circuit is it is found that the actual drive signal of MOS field-effect transistors Q1 can be calculated as follows：
(8)
Wherein,d kIt is the increased draw-out power supply of the submodule for the uncontrollable pre-charging stage capacitor voltage balance control algolithms of FPGA
Signal is controlled, value is ' 1 ' or ' 0 '；Ford kControl signal value negate, i.e., ' 1 ' negate after become ' 0 ', ' 0 ' negate after
Become ' 1 '.
Traditional MMC control systems use DSP+FPGA dual-core controller frameworks；Change of current station level is completed by dsp software unit
Control, including current and voltage feedback control two parts, and export modulating wave and give valve grade control layer；It is completed by FPGA software units
Valve grade controls, modulating wave, each submodule capacitor voltage and the bridge arm current direction provided according to change of current Substation level, realizes
The modulation of MMC and submodule capacitor voltage balance control.
Traditional submodule capacitor voltage detection method is as shown in Figure 6.In view of the requirement of electrical isolation and real-time communication,
Capacitance voltage measuring signal voltage-frequency is converted into frequency signal in submodule side, the light of same frequency is then converted to by optic fibre connector
It learns signal and is transferred to valve level controller through optical fiber.In valve level controller side, optic fibre connector is converted to this optical frequency signal
After the electric signal of same frequency, voltage magnitude signal is converted to by frequency-voltage conversion circuit, is then sent into FPGA for valve grade after AD samplings
Control algolithm uses.
The present invention is improved traditional submodule capacitor voltage detection method, is that the present invention is improved as shown in Figure 7
Traditional submodule capacitor voltage detection method schematic diagram.
The capacitor voltage balance method of the uncontrollable pre-charging stage of modularization multi-level converter, includes the following steps：
1）The control of change of current station level is completed using dsp software unit, the change of current station level control includes voltage and current closed-loop control
Two parts, voltage measurement signal pass through the rings such as bleeder circuit, low-pass filter, voltage to frequency converter and photoelectric converter successively
Section；DC capacitor voltage is acquired by the electric resistance partial pressure of bleeder circuit, low-pass filter filters out aforementioned collected capacitance
After interference high-frequency signal in voltage, capacitance voltage signal is converted to frequency signal by voltage to frequency converter；Photoelectric converter
Foregoing frequency signal is converted into optical signal, modulating wave is exported in the form of optical signal to step 2）Valve level controller；
2）It is completed to step 1 using the FPGA software units in valve level controller）Obtained optical signal carries out valve grade control；
The optical signal passes through optical electrical conversion links, frequency/voltage conversion links and A/D sampling elements successively, passes through optical electrical
Conversion links convert light signals into frequency signal, and foregoing frequency signal is converted to capacitance voltage by frequency/voltage conversion links
The capacitance voltage signal of digital signal form is converted to analog voltage current signal by signal, A/D sampling elements；
3）According to step 1）Modulating wave that middle change of current Substation level provides, step 2）In obtained each submodule capacitor voltage and
Each submodule electric current in the block realizes modulation and the submodule capacitor voltage balance control of MMC.
Improved voltage detection method reduces the frequency/voltage conversion circuit in conventional method, and will directly embody electricity
The frequency voltage signal for holding voltage magnitude is sent into FPGA.It is configured in FPGA simultaneouslynA counter, to optic fibre connector output
Frequency electric impulse signal is counted, and interruption letter corresponding with submodule is generated when counter increases to predetermined value
Number, and execute uncontrollable precharge balance control algolithm.
It is the uncontrollable precharge balance control algolithm flow chart of the present invention as shown in Figure 8, balancing control algorithm often detects
One counter interrupts, execute one cycle algorithm, is configured until detectingnA counter generates interruption, will own
Counter resets, and start simultaneously at the counting of new a cycle.
According to the basic principle of voltage/frequency conversion circuit it is found that the voltage the high, the frequency signal frequency that is converted into more
Height, the voltage pulse signal frequency for being transferred to valve level controller side are also higher.Due to FPGA configurationsnA counter sets phase
Same predetermined value, therefore the submodule that capacitance voltage is higher, it is more early that corresponding counter generates the time interrupted；Capacitance electricity
The lower submodule of pressure, it is more late that corresponding counter generates the time interrupted.In this way, capacitance voltage is largern- 1 son
Module, the control signal of draw-out power supplyd kIt is set to 1；The submodule of capacitance voltage minimum, the control signal of draw-out power supplyd kQuilt
It sets to 0.In conjunction with improved draw-out power supply control circuit it is found that the minimum submodule draw-out power supply of capacitance voltage will be stopped,
Its input impedance increases, and output current reduces, and submodule capacitor voltage will increase；And other submodule draw-out power supplies continue normally
It works and takes electricity from submodule capacitance, the capacitance voltage of these submodules will reduce.So over time, finally will
Lead in same bridge arm mutually approaching for different submodule capacitor voltages.
Simulating, verifying：
In order to verify the feasibility and validity of put forward capacitor voltage balance method, built in Matlab/Simulink as
Single-ended three-phase MMC simulation models shown in FIG. 1, each bridge arm include 4 submodules, and using DC bus to each submodule into
Line precharge, while the input voltage range for requiring draw-out power supply to work normally is 300-2700V.Setting simulation step length is 1us,
Two groups of contrast simulation experiments are carried out successively, are existed with comparing the conventional method based on matching equivalent resistance and carried novel method herein
Two aspect differences such as balance of voltage effect and system active loss.
The capacitance voltage that first group of emulation experiment carries out uncontrollable pre-charging stage using the method for matching equivalent resistance is flat
The selection of weighing apparatus control, matching equivalent resistance Rd should meet the following conditions：
(9)
The submodule capacitor voltage steady-state value 1100V of uncontrollable pre-charging stage, which is substituted into formula (9), can obtain Rd<60.8kΩ.Therefore
Here the equalizing resistance of one 60 k Ω of each submodule capacitance parallel connection is given.Fig. 9 is using in A phases after conventional voltage balance method
The capacitance voltage of four submodules of bridge arm, Figure 10 are to be increased using the active loss of bridge arm in A phases after conventional voltage balance method
Curve（The sum of i.e. each submodule capacitance loss energy）.
Second group of emulation experiment carries out the capacitance electricity of uncontrollable pre-charging stage using the Novel balance method carried herein
Weighing apparatus control is flattened, while to the resistance of one 100k Ω of each submodule capacitance parallel connection to ensure submodule capacitance in the system failure
And there are discharge loops when shutting down.
Figure 11 be using after context of methods in A phases four submodules of bridge arm capacitance voltage, Figure 12 be using context of methods
Afterwards in A phases bridge arm active loss growth curve.Comparison diagram 9, Figure 10 and Figure 11, Figure 12 are it is found that although the method for the present invention is adopted
With the equalizing resistance of bigger resistance value, but preferably balance control effect, display are achieved with lower system active loss
Validity and superiority of the method for the present invention in uncontrollable pre-charging stage capacitor voltage balance control aspect.
Claims (8)
1. a kind of capacitor voltage balance method of the uncontrollable pre-charging stage of modularization multi-level converter, it is characterised in that：It is right
The control circuit of flyback draw-out power supply is improved, and the controling circuit structure of improvement part includes control unit, light-coupled isolation list
Member, with gate cell and MOS field-effect transistors, with two input terminals of gate cell respectively with the output end of control unit and optocoupler
The output end of isolated location is connected；It is connected with the grid grade end of MOS field-effect transistors by resistance R2 with the output end of gate cell.
2. the capacitor voltage balance side of the uncontrollable pre-charging stage of modularization multi-level converter according to claim 1
Method, it is characterised in that：Described control unit uses UC3842 chips.
3. the capacitor voltage balance side of the uncontrollable pre-charging stage of modularization multi-level converter according to claim 1
Method, it is characterised in that：The light-coupled isolation unit uses light-coupled isolation chip, is made of light emitting diode and photelectric receiver.
4. the capacitor voltage balance side of the uncontrollable pre-charging stage of modularization multi-level converter according to claim 1
Method, it is characterised in that：It is described to be used and door chip with gate cell.
5. the capacitor voltage balance side of the uncontrollable pre-charging stage of modularization multi-level converter according to claim 1
Method, it is characterised in that：The signal that control unit generates does not directly drive MOS field-effect transistors in improved circuit；Control
Unit generate signal pass through linear optical coupling isolation, with draw-out power supply control signal inverted value by with driven after operation logic
MOS field-effect transistors.
6. a kind of capacitor voltage balance method of the uncontrollable pre-charging stage of modularization multi-level converter, which is characterized in that packet
Include following steps：
1）The control of change of current station level is completed using dsp software unit, the change of current station level control includes voltage and current closed-loop control
Two parts, voltage measurement signal pass through the rings such as bleeder circuit, low-pass filter, voltage to frequency converter and photoelectric converter successively
Section；DC capacitor voltage is acquired by the electric resistance partial pressure of bleeder circuit, low-pass filter filters out aforementioned collected capacitance
After interference high-frequency signal in voltage, capacitance voltage signal is converted to frequency signal by voltage to frequency converter；Photoelectric converter
Foregoing frequency signal is converted into optical signal, modulating wave is exported in the form of optical signal to step 2）Valve level controller；
2）It is completed to step 1 using the FPGA software units in valve level controller）Obtained optical signal carries out valve grade control；
The optical signal passes through optical electrical conversion links, frequency/voltage conversion links and A/D sampling elements successively, passes through optical electrical
Conversion links convert light signals into frequency signal, and foregoing frequency signal is converted to capacitance voltage by frequency/voltage conversion links
The capacitance voltage signal of digital signal form is converted to analog voltage current signal by signal, A/D sampling elements；
3）According to step 1）Modulating wave that middle change of current Substation level provides, step 2）In obtained each submodule capacitor voltage and
Each submodule electric current in the block realizes modulation and the submodule capacitor voltage balance control of MMC.
7. the capacitor voltage balance side of the uncontrollable pre-charging stage of modularization multi-level converter according to claim 6
Method, it is characterised in that：In step 1）In submodule side capacitance voltage measuring signal is converted to by voltage to frequency converter
Then frequency signal is converted to the optical signalling of same frequency by optic fibre connector and is transferred to step 2 through optical fiber）Valve grade control
Device；In valve level controller side, optic fibre connector will come from step 1）Optical frequency signal be converted to the electric signal of same frequency after, by
The conversion circuit of frequency/voltage conversion links is converted to voltage magnitude signal, and FPGA software lists are then sent into after AD is sampled
Member is used for valve grade control algolithm.
8. the capacitor voltage balance side of the uncontrollable pre-charging stage of modularization multi-level converter according to claim 7
Method, it is characterised in that：N counter is configured in FPGA software units, n is each bridge arm submodule number, n for no more than
400 natural number；After the optic fibre connector of valve level controller receives optical signal, it is converted into electric signal, i.e. frequency electric impulse signal；
Counter counts the frequency electric impulse signal that optic fibre connector exports, when any one counter increases to
When predetermined value, interrupt signal corresponding with submodule is generated, and execute the method for the present invention；
The method of the present invention often detects that counter interrupts, that is, execute one cycle algorithm, is configured until detectingnIt is a
Counter generates interruption, by all counter resets, and starts simultaneously at the counting of new a cycle.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108683348A (en) * | 2018-06-19 | 2018-10-19 | 西安交通大学 | C-MMC static state voltage equipoise control methods based on draw-out power supply control |
| CN111404410A (en) * | 2019-12-27 | 2020-07-10 | 华北电力大学（保定） | Multi-port AC-DC converter based on MMC and control method thereof |
| CN111830313A (en) * | 2020-07-07 | 2020-10-27 | 国网福建省电力有限公司电力科学研究院 | Transient overvoltage broadband monitoring system for modular multilevel converter |
| CN112366745A (en) * | 2020-10-10 | 2021-02-12 | 中国电建集团华东勘测设计研究院有限公司 | Centralized modular DC Chopper topology and control method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103840478A (en) * | 2014-02-27 | 2014-06-04 | 国家电网公司 | Pre-charging method for modularized multi-level converter direct-current transmission system |
| CN106018941A (en) * | 2016-05-23 | 2016-10-12 | 华中科技大学 | Pulse high-voltage measuring platform based on voltage-to-frequency conversion technology |
| CN107154741A (en) * | 2017-05-18 | 2017-09-12 | 北京交通大学 | A kind of control system and method based on MMC topological structures |
-
2018
- 2018-04-04 CN CN201810300896.3A patent/CN108336752B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103840478A (en) * | 2014-02-27 | 2014-06-04 | 国家电网公司 | Pre-charging method for modularized multi-level converter direct-current transmission system |
| CN106018941A (en) * | 2016-05-23 | 2016-10-12 | 华中科技大学 | Pulse high-voltage measuring platform based on voltage-to-frequency conversion technology |
| CN107154741A (en) * | 2017-05-18 | 2017-09-12 | 北京交通大学 | A kind of control system and method based on MMC topological structures |
Non-Patent Citations (1)
| Title |
|---|
| 李静怡等: "MMC 预充电子模块电容电压均衡特性仿真建模", 《电网技术》 * |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108683348A (en) * | 2018-06-19 | 2018-10-19 | 西安交通大学 | C-MMC static state voltage equipoise control methods based on draw-out power supply control |
| CN108683348B (en) * | 2018-06-19 | 2019-12-24 | 西安交通大学 | C-MMC static voltage-sharing control method based on energy-taking power control |
| CN111404410A (en) * | 2019-12-27 | 2020-07-10 | 华北电力大学（保定） | Multi-port AC-DC converter based on MMC and control method thereof |
| CN111830313A (en) * | 2020-07-07 | 2020-10-27 | 国网福建省电力有限公司电力科学研究院 | Transient overvoltage broadband monitoring system for modular multilevel converter |
| CN112366745A (en) * | 2020-10-10 | 2021-02-12 | 中国电建集团华东勘测设计研究院有限公司 | Centralized modular DC Chopper topology and control method |
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