CN108321195A - 一种具有阳极夹断槽的短路阳极soi ligbt - Google Patents

一种具有阳极夹断槽的短路阳极soi ligbt Download PDF

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CN108321195A
CN108321195A CN201810113223.7A CN201810113223A CN108321195A CN 108321195 A CN108321195 A CN 108321195A CN 201810113223 A CN201810113223 A CN 201810113223A CN 108321195 A CN108321195 A CN 108321195A
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罗小蓉
杨洋
魏杰
欧阳东法
王晨霞
樊雕
赵哲言
孙涛
邓高强
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University of Electronic Science and Technology of China
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Abstract

本发明属于功率半导体技术领域，涉及一种具有阳极夹断槽的短路阳极SOI LIGBT。本发明与传统短路阳极LIGBT相比，阳极端引入连接阳极电位的阳极槽，其导电材料里面是高浓度的P型掺杂，且在槽壁一侧引入低浓度的N型掺杂区；器件关断时，阳极槽外壁积累电子，提供低阻通道，加快了存储在漂移区内电子的抽取，减小关断时间和关断损耗；器件刚开启时，阳极槽内P型杂质使低浓度N型掺杂区耗尽，阻碍电子被N+阳极抽取，消除了电压折回效应，同时增强了电导调制作用，降低了导通压降。本发明的有益效果为，相比于传统LIGBT，具有更快的关断速度和更低的损耗；相比于传统短路阳极LIGBT，本发明在更小的横向元胞尺寸下，消除了电压折回现象，同时具有更低的导通压降。

Description

一种具有阳极夹断槽的短路阳极SOI LIGBT
技术领域
本发明属于功率半导体技术领域，涉及一种具有阳极夹断槽的短路阳极SOILIGBT(Lateral Insulated Gate Bipolar Transistor，横向绝缘栅双极型晶体管)。
背景技术
IGBT是金属氧化物半导体场效应晶体管(简称MOSFET)和双极结型晶体管(简称BJT)组成的复合型功率半导体器件，它结合了MOSFET的高输入阻抗和BJT电导调制的特点，其具有导通电压低、驱动功耗低、电流能力强、耐压特性高、热稳定性好等优点。其中横向IGBT(LIGBT)易于集成在硅基、尤其是SOI基的功率集成电路中，SOI基LIGBT可完全消除体硅LIGBT衬底空穴电子对注入，且采用介质隔离的SOI技术易实现器件的完全电气隔离，促使SOI LIGBT广泛应用于电力电子、工业自动化、航空航天等高新技术产业。
IGBT在关态时，阳极区的电子势垒迫使存储在漂移区的载流子通过复合消失，使得IGBT的关断速度减慢。而短路阳极技术是在阳极端引入N型阳极区，存储在漂移区内的大量电子可通过其快速抽取，电流拖尾时间减小，关断速度加快，从而减小其关断损耗，进而也获得导通压降和关断损耗的良好折衷。但短路阳极结构的引入，使得器件在开启时进行单极与双极模式之间的转换，给器件带来了电压折回效应，影响器件电流分布的均匀性。同时短路阳极结构的引入会使阳极空穴注入效率低、导通压降大。
发明内容
为了加快器件在关断时的电子抽取速度，减小器件的开关损耗，增强阳极空穴的注入效率，抑制电压折回效应。本发明提出了一种具有阳极夹断槽的短路阳极SOI LIGBT。通过引入高浓度P型掺杂的导电材料与绝缘介质、低浓度掺杂的N型半导体形成的MIS结构的耗尽、积累作用，可在较小的元胞尺寸下消除电压折回效应，同时获得低导通压降和低关断损耗。
本发明采用的技术方案为：
一种具有阳极夹断槽的短路阳极SOI LIGBT，包括自下而上依次层叠设置的P衬底1、埋氧层2和顶部半导体层；所述的顶部半导体层具有N型漂移区3，器件沿N型漂移区3横向方向从一侧到另一侧依次为阴极结构、栅极结构和阳极结构。
所述阴极结构包括P阱区4、位于P阱区4上表面远离阳极结构一侧的P+体接触区5和与所述P+体接触区5相接触的N+阴极区6，且P+体接触区5和N+阴极区6共同引出端为阴极。P+体接触区5和N+阴极区6的边缘与P阱区4的边缘之间有间距。
所述栅极结构由绝缘介质7及其之上的导电材料8共同构成，导电材料8的引出端为栅电极。所述绝缘介质7与顶部半导体层接触，栅极结构一端覆盖于靠阳极一侧的N+阴极区6的部分、跨过部分P阱区4上表面，另一端覆盖于与N型漂移区3。
所述阳极结构包括位于N型漂移区3表面的场截止层9、位于场截止层9靠阴极一侧上表面的P+阳极区10以及P+阳极区10远离阴极结构一侧的阳极槽结构16、N型掺杂区13、N+阳极区14和较高浓度的N型掺杂区15；所述阳极槽结构16由位于槽内壁的绝缘介质11和由绝缘介质11包围的P型掺杂的导电材料12组成，阳极槽16远离阴极结构一侧是与之相接触的N型掺杂区13及位于N型掺杂区13之上的N+阳极区14；较高浓度的N型掺杂区15位于阳极槽16和N型掺杂区13的下方，所述P+阳极区10、P型导电材料12和N+阳极区14的共同引出端为阳极。
进一步的，所述阳极槽栅结构16有两个及两个以上；靠近阴极一侧的一个阳极槽16的位置如权利要求1所述，其余的阳极槽16位于远离阴极结构的一侧，其两侧具有N型掺杂区13及N型掺杂区13之上的N+阳极区14。
本发明的有益效果为，相比于传统LIGBT，具有更快的关断速度和更低的损耗；相比于传统短路阳极LIGBT，本发明在更小的横向元胞尺寸下，消除了电压折回现象，同时具有更低的导通压降。
附图说明
图1为实施例1的结构示意图；
图2和图3为实施例2的结构示意图。
具体实施方式
下面结合附图和实施例进一步详细描述本发明的技术方案。
实施例1
如图1所示，本例的结构包括自下而上依次层叠设置的P衬底1、埋氧层2和顶部半导体层；所述的顶部半导体层具有N型漂移区3，器件沿N型漂移区3横向方向从一侧到另一侧依次为阴极结构、栅极结构和阳极结构。
所述阴极结构包括P阱区4、位于P阱区4上表面远离阳极结构一侧的P+体接触区5和与所述P+体接触区5相接触的N+阴极区6，且P+体接触区5和N+阴极区6共同引出端为阴极。P+体接触区5和N+阴极区6的边缘与P阱区4的边缘之间有间距。
所述栅极结构由绝缘介质7及其之上的导电材料8共同构成，导电材料8的引出端为栅电极。所述绝缘介质7与顶部半导体层接触，栅极结构一端覆盖于靠阳极一侧的N+阴极区6的部分、跨过部分P阱区4上表面，另一端覆盖于与N型漂移区3。
所述阳极结构包括位于N型漂移区3表面的场截止层9、位于场截止层9靠阴极一侧上表面的P+阳极区10以及P+阳极区10远离阴极结构一侧的阳极槽结构16、N型掺杂区13、N+阳极区14和较高浓度的N型掺杂区15；所述阳极槽结构16由位于槽内壁的绝缘介质11和由绝缘介质11包围的P型掺杂的导电材料12组成，阳极槽16远离阴极结构一侧是与之相接触的N型掺杂区13及位于N型掺杂区13之上的N+阳极区14；较高浓度的N型掺杂区15位于阳极槽16和N型掺杂区13的下方，所述P+阳极区10、P型导电材料12和N+阳极区14的共同引出端为阳极。
本例的工作原理为：
与传统短路阳极LIGBT相比，阳极端引入连接阳极电位的阳极槽，其导电材料里面是高浓度的P型掺杂，且在槽壁一侧引入低浓度的N型掺杂区；器件关断时，阳极槽外壁积累电子，提供低阻通道，加快了存储在漂移区内电子的抽取，减小关断时间和关断损耗；器件刚开启时，阳极槽内P型杂质使低浓度N型掺杂区耗尽，阻碍电子被N+阳极抽取，消除了电压折回效应，同时增强了电导调制作用，降低了导通压降。
实施例2
如图2和3所示，本例与实施例1的区别为所述阳极槽栅结构16有两个及两个以上；靠近阴极一侧的一个阳极槽16的位置如权利要求1所述，其余的阳极槽16位于远离阴极结构的一侧，其两侧具有N型掺杂区13及N型掺杂区13之上的N+阳极区14。与实施例1相比，本例中的设计采用了两个及多个阳极槽，增强了阳极槽内P型杂质对低浓度N型掺杂区的耗尽作用，同时，增加了更多积累电子的槽壁，这样不仅可以增强电导调制作用，进一步地降低导通压降，还可以进一步地加快存储在漂移区内电子的抽取，减小关断时间和关断损耗。

Claims (2)

1.一种具有阳极夹断槽的短路阳极SOI LIGBT，包括自下而上依次层叠设置的P衬底(1)、埋氧层(2)和顶部半导体层；所述的顶部半导体层具有N型漂移区(3)，器件沿N型漂移区(3)横向方向从一侧到另一侧依次为阴极结构、栅极结构和阳极结构。
所述阴极结构包括P阱区(4)、位于P阱区(4)上表面远离阳极结构一侧的P+体接触区(5)和与所述P+体接触区(5)相接触的N+阴极区(6)，且P+体接触区(5)和N+阴极区(6)共同引出端为阴极。P+体接触区(5)和N+阴极区(6)的边缘与P阱区(4)的边缘之间有间距。
所述栅极结构由绝缘介质(7)及其之上的导电材料(8)共同构成，导电材料(8)的引出端为栅电极。所述绝缘介质(7)与顶部半导体层接触，栅极结构一端覆盖于靠阳极一侧的N+阴极区(6)的部分、跨过部分P阱区(4)上表面，另一端覆盖于与N型漂移区(3)。
所述阳极结构包括位于N型漂移区(3)表面的场截止层(9)、位于场截止层(9)靠阴极一侧上表面的P+阳极区(10)以及P+阳极区(10)远离阴极结构一侧的阳极槽结构(16)、N型掺杂区(13)、N+阳极区(14)和较高浓度的N型掺杂区(15)；所述阳极槽结构(16)由位于槽内壁的绝缘介质(11)和由绝缘介质(11)包围的P型掺杂的导电材料(12)组成，阳极槽(16)远离阴极结构一侧是与之相接触的N型掺杂区(13)及位于N型掺杂区(13)之上的N+阳极区(14)；较高浓度的N型掺杂区(15)位于阳极槽(16)和N型掺杂区(13)的下方，所述P+阳极区(10)、P型导电材料(12)和N+阳极区(14)的共同引出端为阳极。
2.根据权利要求1所述的一种槽栅短路阳极SOI LIGBT，其特征在于，所述阳极槽栅结构(16)有两个及两个以上；靠近阴极一侧的一个阳极槽(16)的位置如权利要求1所述，其余的阳极槽(16)位于远离阴极结构的一侧，其两侧具有N型掺杂区(13)及N型掺杂区(13)之上的N+阳极区(14)。
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CN110400840A (zh) * 2019-08-06 2019-11-01 电子科技大学 一种抑制电压回折现象的rc-ligbt器件
CN110571264A (zh) * 2019-09-17 2019-12-13 重庆邮电大学 一种具有多通道电流栓的sa-ligbt器件
CN111276537A (zh) * 2020-02-14 2020-06-12 电子科技大学 一种具有多晶硅耐压层的逆导型rc-ligbt器件
CN111326576A (zh) * 2020-02-14 2020-06-23 重庆邮电大学 一种具有纵向分离阳极的sa-ligbt器件
CN113270474A (zh) * 2021-04-08 2021-08-17 西安电子科技大学 一种由阳极耗尽区控制的短路阳极横向绝缘栅双极型晶体管及其制作方法
CN113659014A (zh) * 2021-10-20 2021-11-16 四川洪芯微科技有限公司 一种含有阴极短接槽栅结构的功率二极管
CN114823863A (zh) * 2022-04-24 2022-07-29 电子科技大学 一种具有阳极槽的低功耗横向功率器件
WO2024001197A1 (zh) * 2022-06-30 2024-01-04 无锡华润上华科技有限公司 阳极短路横向绝缘栅双极型晶体管及其制造方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5654561A (en) * 1994-12-21 1997-08-05 Mitsubishi Denki Kabushiki Kaisha Insulated gate bipolar transistor with multiple buffer layers
CN1374703A (zh) * 2001-03-07 2002-10-16 株式会社东芝 具有绝缘栅型双极晶体管的半导体器件及其制造方法
US20080135972A1 (en) * 2006-12-11 2008-06-12 Matsushita Electric Industrial Co., Ltd. Lateral insulated gate bipolar transistor having a retrograde doping profile in base region and method of manufacture thereof
CN103413824A (zh) * 2013-07-17 2013-11-27 电子科技大学 一种rc-ligbt器件及其制作方法
CN104299990A (zh) * 2013-07-19 2015-01-21 无锡华润上华半导体有限公司 绝缘栅双极晶体管及其制造方法
CN106783989A (zh) * 2017-01-16 2017-05-31 电子科技大学 一种具有阳极短路槽的rb‑igbt

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5654561A (en) * 1994-12-21 1997-08-05 Mitsubishi Denki Kabushiki Kaisha Insulated gate bipolar transistor with multiple buffer layers
CN1374703A (zh) * 2001-03-07 2002-10-16 株式会社东芝 具有绝缘栅型双极晶体管的半导体器件及其制造方法
US20080135972A1 (en) * 2006-12-11 2008-06-12 Matsushita Electric Industrial Co., Ltd. Lateral insulated gate bipolar transistor having a retrograde doping profile in base region and method of manufacture thereof
CN103413824A (zh) * 2013-07-17 2013-11-27 电子科技大学 一种rc-ligbt器件及其制作方法
CN104299990A (zh) * 2013-07-19 2015-01-21 无锡华润上华半导体有限公司 绝缘栅双极晶体管及其制造方法
CN106783989A (zh) * 2017-01-16 2017-05-31 电子科技大学 一种具有阳极短路槽的rb‑igbt

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
LINHUA HUANG, XIAORONG LUO, JIE WEI, ET AL: "A Snapback-Free Fast-Switching SOI LIGBT With Polysilicon Regulative Resistance and Trench Cathode", 《IEEE TRANSACTIONS ON ELECTRON DEVICES》 *
SIYANG LIU, RAN YE, WEIFENG SUN, ET AL: "Electrical Parameters Degradations and Optimizations of SOI-LIGBT Under Repetitive Unclamped-Inductive-Switching Conditions", 《IEEE TRANSACTIONS ON ELECTRON DEVICES》 *

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110400840A (zh) * 2019-08-06 2019-11-01 电子科技大学 一种抑制电压回折现象的rc-ligbt器件
CN110571264A (zh) * 2019-09-17 2019-12-13 重庆邮电大学 一种具有多通道电流栓的sa-ligbt器件
CN110571264B (zh) * 2019-09-17 2023-03-24 重庆邮电大学 一种具有多通道电流栓的sa-ligbt器件
CN111276537A (zh) * 2020-02-14 2020-06-12 电子科技大学 一种具有多晶硅耐压层的逆导型rc-ligbt器件
CN111326576A (zh) * 2020-02-14 2020-06-23 重庆邮电大学 一种具有纵向分离阳极的sa-ligbt器件
CN113270474A (zh) * 2021-04-08 2021-08-17 西安电子科技大学 一种由阳极耗尽区控制的短路阳极横向绝缘栅双极型晶体管及其制作方法
CN113659014A (zh) * 2021-10-20 2021-11-16 四川洪芯微科技有限公司 一种含有阴极短接槽栅结构的功率二极管
CN114823863A (zh) * 2022-04-24 2022-07-29 电子科技大学 一种具有阳极槽的低功耗横向功率器件
CN114823863B (zh) * 2022-04-24 2023-04-25 电子科技大学 一种具有阳极槽的低功耗横向功率器件
WO2024001197A1 (zh) * 2022-06-30 2024-01-04 无锡华润上华科技有限公司 阳极短路横向绝缘栅双极型晶体管及其制造方法

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