CN108319560A - A kind of conversion circuit of TLK2711 coffrets and Camera-Link coffrets - Google Patents
A kind of conversion circuit of TLK2711 coffrets and Camera-Link coffrets Download PDFInfo
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- CN108319560A CN108319560A CN201810215519.XA CN201810215519A CN108319560A CN 108319560 A CN108319560 A CN 108319560A CN 201810215519 A CN201810215519 A CN 201810215519A CN 108319560 A CN108319560 A CN 108319560A
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- 238000006243 chemical reaction Methods 0.000 title claims abstract description 28
- 230000005540 biological transmission Effects 0.000 claims abstract description 36
- 238000012545 processing Methods 0.000 claims abstract description 8
- 238000003860 storage Methods 0.000 claims description 11
- 238000013139 quantization Methods 0.000 claims description 5
- 238000012546 transfer Methods 0.000 abstract description 3
- 238000005516 engineering process Methods 0.000 description 7
- 230000006798 recombination Effects 0.000 description 7
- 238000005215 recombination Methods 0.000 description 7
- 238000003384 imaging method Methods 0.000 description 6
- 241001269238 Data Species 0.000 description 5
- 238000009826 distribution Methods 0.000 description 5
- 239000013078 crystal Substances 0.000 description 4
- 238000013461 design Methods 0.000 description 4
- 238000004891 communication Methods 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 238000011161 development Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 230000001360 synchronised effect Effects 0.000 description 2
- 239000002131 composite material Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000013507 mapping Methods 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 230000003595 spectral effect Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
- G06F13/4072—Drivers or receivers
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/38—Universal adapter
- G06F2213/3852—Converter between protocols
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The present invention provides a kind of conversion circuit of TLK2711 coffrets and Camera Link coffrets, including serial mode input unit, FPGA unit and data outputting unit；Serial mode input unit includes that external connector and at least a piece of TLK2711 receive chip；FPGA unit includes receiving the one-to-one processing unit of chip with TLK2711, and processing unit includes input logic unit, FIFO and output logic unit；Data outputting unit includes receiving the one-to-one Camera Link transmission chips of chip and Camera Link interfaces with TLK2711；TLK2711 receives chip and connects with external connector；The output end that the input terminal of input logic unit receives chip with TLK2711 is connect；The input terminal of FIFO is connect with the output end of input logic unit；The output end of the input terminal and FIFO that export logic unit connects, and the output end for exporting logic unit is connect with the input terminal of Camera Link transmission chips, and Camera Link interfaces are connected with Camera Link transmission chips.The present invention solves actual application problem of the TLK2711 data transmission interfaces to Camera Link standard image transfer interface conversions.
Description
Technical field
The invention belongs to high speed data transfer fields, are related to high-speed serial data and are led to the switch technology of high-speed parallel data
Domain, the especially conversion circuit of TLK2711 coffrets and Camera-Link coffrets.
Background technology
With the development of Chinese Space remote sensing technology, satellite remote sensing increasingly shows high time resolution, high spatial point
The development trend of resolution and high spectral resolution, load data type is more and more diversified, and data volume is increasing, leads to data
Rate, bandwidth etc. by past several Mbps develop at present number Gbps it is even higher.Data transmission also from conventionally employed multichannel LVDS simultaneously
The gradual transition of row coffret is more high bandwidth, higher reliability interface, such as based on high speed serialization/unstring transceiver TLK2711
Application, unicast communication rate is up to 2.5Gbps, while TLK2711 uses motor synchronizing communication mode, utilizes clock and data
Recovery technology replaces synchronous transmitting data and clock, efficiently solves the problems, such as signal and clock skew；In addition, using serial logical
Letter technology makes equipment and cable distribution more simple, and system rejection to disturbance ability is stronger.
The application of TLK2711 facilitates spaceborne high-resolution imaging data transmission, and exists for spaceborne high-resolution imaging equipment
Ground demonstration Qualify Phase but can not directly establish a connection with acquisition storage computer, and (computer general-purpose interface is simultaneously at present
Without this Novel Delivery interface), and Camera-Link interfaces develop with technology for many years, it is upper non-in Image Acquisition transmission
It is often ripe, and there are a large amount of industrialized Camera-Link to turn PCI/PCI-E capture cards in the market.Therefore, design is a kind of efficiently
Realtime image data interface conversion circuit, realize and TLK2711 data-interfaces be converted to the numbers of standard Camera-Link agreements
It is particularly important according to interface, and advantageous technical support can be provided for high-resolution imaging technology.
Invention content
In order to realize that high-speed data universal serial bus TLK2711 interfaces are converted with Camera-Link interface protocols, the present invention carries
It has supplied a kind of conversion circuit of TLK2711 coffrets and Camera-Link coffrets, the conversion circuit to be easily achieved, has been
The real-time storage of TLK2711 transmission datas is shown provides a kind of new technological means and method on computers.
Technical solution of the invention is as follows：
A kind of conversion circuit of TLK2711 coffrets and Camera-Link coffrets, is characterized in that：Packet
Include serial mode input unit, FPGA unit and data outputting unit；
The serial mode input unit includes that external connector and at least a piece of TLK2711 receive chip；
The FPGA unit includes receiving the one-to-one processing unit of chip with TLK2711, and the processing unit includes
Input logic unit, FIFO and output logic unit；
The data outputting unit include with TLK2711 receive the one-to-one Camera-Link transmission chips of chip and
Camera-Link interfaces；
The TLK2711 receives chip and connects with external connector；
The output end that the input terminal of the input logic unit receives chip with TLK2711 is connect, the data that will be transmitted
It is converted into the data mode using pixel as unit；
The input terminal of the FIFO is connect with the output end of input logic unit, and data buffer storage is carried out by pixel；
The input terminal of the output logic unit and the output end of FIFO connect, export the output end of logic unit with
The input terminal of Camera-Link transmission chips connects, and output logic unit is by data according to the size and quantization of real image
Number generates row synchronization, frame synchronization, data valid signal and data and is sent to by Camera-Link Data Transport Protocols
Camera-Link transmission chips；
The Camera-Link interfaces are connected with Camera-Link transmission chips.
Further, in order to output logic unit send command word with to output image format size be adjusted, institute
The conversion circuit of the TLK2711 coffrets stated and Camera-Link coffrets also wraps control input unit and its connector,
It is described control input unit output end with output logic unit input terminal connect, it is described control input unit input terminal and
The output end of connector connects, and the input terminal of the connector is used to connect with the output end of slave computer or calculating and storage device
Connect, i.e., described connector is also a kind of external connector, control the input terminal of input unit by connector and slave computer or
The output end of computer memory device connects.
Further, the external connector is MKHS connectors.
Further, the model XC4VSX55-10FF1148I of the FPGA.
Further, the Camera-Link transmission chips use DS90CR287 chips.
Further, Camera-Link interfaces are MDR26 standard interfaces.
Compared with prior art, the present invention advantage is：
1, the present invention uses FPGA unit, and setting and TLK2711 receive (including the input of chip one-to-one processing unit
Logic unit, FIFO and output logic unit) so that input data is converted into the data mode using pixel as unit, by pixel
Carry out data buffer storage, generate row synchronization, frame synchronization, data valid signal and data, structure formed TLK2711 coffrets with
Conversion circuit between Camera-Link coffrets solves TLK2711 data transmission interfaces to Camera-Link standards
The actual application problem of image transmitting interface conversion provides a kind of new hard for the output of current high-resolution imaging instrument mass data
Part framework.
2, the conversion circuit of TLK2711 coffrets provided by the invention and Camera-Link coffrets can pass through
Control input unit instructs to configure the image size of Camera-Link output interfaces so that the conversion circuit has certain
Versatility, it is reasonable design of the present invention, reliable, the high-speed real-time transmission of 2.98Gbps bandwidth can be completed.
3, the conversion circuit of TLK2711 coffrets and Camera-Link coffrets provided by the invention has image
High resolution, real-time are good, the bit error rate is low；And it is many with small, easy to carry, simple and convenient, stable work in work etc.
Advantage.
4, the conversion circuit of TLK2711 coffrets provided by the invention and Camera-Link coffrets has extensive
Application prospect, may be also used in as：High-resolution imaging spectrometer, tridimensional mapping camera, big bandwidth Visible Light Camera, shortwave are red
In the equipment such as outer camera.
5, the economic, practical property of the present invention is good, and PCI-E image pick-up cards are widely used in board collocation in the market can be square
Performing image display, storing just, user's special acquisition of exploitation that need not spend a lot of time and energy again show software.
Description of the drawings
Fig. 1 is application example principle schematic of the present invention；
Fig. 2 is the composition frame chart of conversion circuit of the present invention；
Fig. 3 is the composite structural diagram of conversion circuit of the embodiment of the present invention.
Specific implementation mode
With reference to specific embodiment, the present invention is described in detail.
It is transmitted to Camera-Link image datas as shown in Figure 1, present invention is generally directed to TLK2711 data transmission interfaces
Interface conversion circuit is designed, and realizes that TLK2711 data transmission interfaces turn to Camera-Link standard image transfer interfaces
It changes.
As Figure 2-3, high speed data transmission interface conversion circuit board provided by the invention, including FPGA unit,
FLASH storage units, serial mode input unit, data outputting unit, control input unit, crystal oscillator unit, power supply and distribution unit
Composition.
(1) serial mode input unit
Serial mode input unit is received chip and is formed by interface connector, TLK2711, and it is height that TLK2711, which receives chip,
Fast serial/unstring transceiver；In concrete application case study on implementation, connector uses the MKHS connectors of AirBorn companies production, root
2 TLK2711 have been used to receive chip, monolithic work clock 100Mhz in being designed according to requirement of engineering；2 TLK2711 receive core
The high-speed serial data respectively inputted is decoded as 16bit parallel datas by piece respectively, 1 road 100Mhz is compiled with road clock, 2 road K/D
Code control signal (this 2 road signal according to originating data format protocol, for determining whether valid data)；TLK2711 is received
Data flow is exported after serial data is unstringed by way of bus and carries out data processing to FPGA unit by chip.
(2) FPGA unit
Data, clock and control signal, the FPGA that FPGA unit receives the input of serial mode input unit are transported by inside
Its internal input logic unit of row software transfer realizes data recombination, after the data of recombination are stored into its internal storage FIFO
In module, for inside output logic unit unit by data according to the size and quantization digit of real image, the synchronization of generation row, frame are same
Step, data valid signal and data are simultaneously sent to data outputting unit by Camera-Link Data Transport Protocols.Specific to this hair
In a bright practical application example, Xilinx companies FPGA model XC4VSX55-10FF1148I, internal input have been selected
Logic unit is to send format according to originator high-resolution imaging instrument data, and the data of 16bit are split as 12bit locating depths again
Each pixel so that data are preserved by pixel when FIFO is preserved, i.e., FIFO bit wides are set as 12bit, and locating depth is according to image
Size is specifically arranged；TLK2711 receives the data that chip 1 receives and is sent out after data recombination, FIFO cachings, output logic unit
Camera-Link transmission chips 1 are given, TLK2711 receives the data that chip 2 receives and caches, exports by data recombination, FIFO
Camera-Link transmission chips 2 are sent to after logic unit；Output logic unit is by image data according to Camera-Link
Video transmission protocol is sent, and using Medium formats in present case, 1 tunnel synchronizing signal of row, 1 road frame are exported respectively per channel
Synchronization, 1 circuit-switched data useful signal, 24bit Parallel image datas (2 pixels), 1 road clock 80Mhz.
FPGA unit also needs to the control command of response control input unit and gives response in time, is adjusted according to command word
Export Camera-Link effective images size (image is arranged to be arranged by m rows × n) so that the present invention has better universality.
Input logic unit in FPGA unit carries out data recombination to the data flow of reception respectively；Part this field skill
Art personnel carry out data recombination according to the transmission agreement of data transmitting terminal, i.e., TLK2711 is received to the 16bit of chip transmission
Data are converted into pixel one by one successively；Such as the image of 12bit quantizations, need every 4 if according to 16bit transmission so
A pixel forms 3 16bit data, and point 3 beats transmit successively, then data recombination seeks to the data weight 3 beats
Group is 4 pixels.This transmits the extensive of image according to this field designer's custom images transformat, that is, to self-defined
It is multiple.
Logic unit is exported in FPGA unit by pixel according to the size and quantization digit of real image, generate row it is synchronous,
Frame synchronization, data valid signal and data are simultaneously sent to Camera-Link transmission cores by Camera-Link Data Transport Protocols
Piece.Part those skilled in the art can implement according to the specific format of the Camerlink transport protocols of selection, such as use
Base, Medium, Full, the design system only supports Base or Medium formats, and specifically actually selects in force
Medium modes.
Control input unit sends command word to realize to output image format size adjustment to FPGA；Control input unit
The command word sent by serial ports from slave computer/computer memory device is received, command word can customize, and be run in FPGA
Logic unit changes it and gives the special transmission chip of Camera-Link interface protocols accordingly according to the control command of reception
Row useful signal, frame useful signal, data valid signal and data, to reach the adjustment to image output size.
(3) data outputting unit
Data outputting unit is made of out connector Camera-Link interfaces, Camera-Link transmission chips, work
It needs power supply and distribution unit to provide operation level in the process, and receives the 1 tunnel synchronizing signal, 1 tunnel frame synchronization, 1 way of FPGA transmissions
According to useful signal, 24bit Parallel image datas, 1 tunnel clock signal.2 DS90CR287 compositions are used specific to the design
Medium formats are as transmission chip, work clock 80Mhz；Camera-Link interfaces use MDR26 standard interfaces.
(4) input unit is controlled
Control input unit is used for sending command word to FPGA unit to realize the adjustment to exporting image format size, adopts
Use serial communication.Specific to present case, control input unit is made of difference transceiver DS90LV019, and baud rate 9600 is right
Outer connector part is inputted by the general Camera-Link transmission cables being incorporated on MDR26 interfaces.
(5) FLASH storage units
FLASH storage units are a kind of non-volatile, electrically erasable programmable read-only memory, are mainly used to open for FPGA
It is dynamic that program load is provided.Specific to present case, the special FLASH configuration chips XCF32P of Xilinx companies has been used.
(6) crystal oscillator unit
The crystal oscillator provides work clock for FPGA, is the source clock of entire board work.Specific to present case, use
100Mhz external crystal-controlled oscillations.
(7) power supply and distribution unit
Power supply and distribution unit includes power interface connector, several pieces power conversion chips, is provided for the work of entire circuit devcie
The power supply of required multiple types.
Claims (7)
1. a kind of conversion circuit of TLK2711 coffrets and Camera-Link coffrets, it is characterised in that：Including data
Serial input unit, FPGA unit and data outputting unit；
The serial mode input unit includes that external connector and at least a piece of TLK2711 receive chip；
The FPGA unit includes receiving the one-to-one processing unit of chip with TLK2711, and the processing unit includes input
Logic unit, FIFO and output logic unit；
The data outputting unit include with TLK2711 receive the one-to-one Camera-Link transmission chips of chip and
Camera-Link interfaces；
The TLK2711 receives chip and connects with external connector；
The output end that the input terminal of the input logic unit receives chip with TLK2711 is connect, and converts the data of transmission to
Using pixel as the data mode of unit；
The input terminal of the FIFO is connect with the output end of input logic unit, and data buffer storage is carried out by pixel；
The input terminal of the output logic unit and the output end of FIFO connect, and export the output end and Camera- of logic unit
The input terminal of Link transmission chips connects, and output logic unit according to the size and quantization digit of real image, generates data
Row synchronization, frame synchronization, data valid signal and data are simultaneously sent to Camera-Link by Camera-Link Data Transport Protocols
Transmission chip；
The Camera-Link interfaces are connected with Camera-Link transmission chips.
2. the conversion circuit of TLK2711 coffrets and Camera-Link coffrets according to claim 1, special
Sign is：
Further include control input unit and its connector, the input of the output end and output logic unit of the control input unit
End connection, the input terminal of the control input unit and the output end of connector connect, the input terminal of the connector be used for
The output end of slave computer or calculating and storage device connects.
3. the conversion circuit of TLK2711 coffrets and Camera-Link coffrets according to claim 1 or 2,
It is characterized in that：The external connector is MKHS connectors.
4. the conversion circuit of TLK2711 coffrets and Camera-Link coffrets according to claim 1 or 2,
It is characterized in that：The model XC4VSX55-10FF1148I of the FPGA.
5. the conversion circuit of TLK2711 coffrets and Camera-Link coffrets according to claim 1 or 2,
It is characterized in that：The Camera-Link transmission chips use DS90CR287 chips.
6. the conversion circuit of TLK2711 coffrets and Camera-Link coffrets according to claim 1 or 2,
It is characterized in that：Camera-Link interfaces are MDR26 standard interfaces.
7. the conversion circuit of TLK2711 coffrets and Camera-Link coffrets according to claim 1 or 2,
It is characterized in that：
The locating depth for the pixel that the input logic unit is converted is 12bit.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810186505X | 2018-03-07 | ||
| CN201810186505 | 2018-03-07 |
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| Publication Number | Publication Date |
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| CN108319560A true CN108319560A (en) | 2018-07-24 |
| CN108319560B CN108319560B (en) | 2024-04-05 |
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| CN201820353941.7U Withdrawn - After Issue CN208156657U (en) | 2018-03-07 | 2018-03-15 | A kind of conversion circuit of TLK2711 coffret and Camera-Link coffret |
| CN201810215519.XA Active CN108319560B (en) | 2018-03-07 | 2018-03-15 | Conversion circuit of TLK2711 transmission interface and Camera-Link transmission interface |
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Cited By (2)
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| CN109491940A (en) * | 2018-12-18 | 2019-03-19 | 中国科学院西安光学精密机械研究所 | A kind of conversion circuit and conversion method of TLK2711 coffret and USB3.0 coffret |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109413354A (en) * | 2018-11-19 | 2019-03-01 | 天津津航技术物理研究所 | A kind of infrared detector interface adaption device |
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| CN109491940A (en) * | 2018-12-18 | 2019-03-19 | 中国科学院西安光学精密机械研究所 | A kind of conversion circuit and conversion method of TLK2711 coffret and USB3.0 coffret |
Also Published As
| Publication number | Publication date |
|---|---|
| CN208156657U (en) | 2018-11-27 |
| CN108319560B (en) | 2024-04-05 |
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