CN108281168B - 半导体存储装置 - Google Patents
半导体存储装置 Download PDFInfo
- Publication number
- CN108281168B CN108281168B CN201710133209.9A CN201710133209A CN108281168B CN 108281168 B CN108281168 B CN 108281168B CN 201710133209 A CN201710133209 A CN 201710133209A CN 108281168 B CN108281168 B CN 108281168B
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- Prior art keywords
- voltage
- program
- memory cell
- word line
- memory device
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/24—Bit-line control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/32—Timing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
- G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
Abstract
Description
Claims (9)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2017-001237 | 2017-01-06 | ||
JP2017001237A JP2018113084A (ja) | 2017-01-06 | 2017-01-06 | 半導体記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN108281168A CN108281168A (zh) | 2018-07-13 |
CN108281168B true CN108281168B (zh) | 2021-08-20 |
Family
ID=62781889
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201710133209.9A Active CN108281168B (zh) | 2017-01-06 | 2017-03-08 | 半导体存储装置 |
Country Status (4)
Country | Link |
---|---|
US (1) | US10153045B2 (zh) |
JP (1) | JP2018113084A (zh) |
CN (1) | CN108281168B (zh) |
TW (1) | TWI657441B (zh) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2019145186A (ja) * | 2018-02-21 | 2019-08-29 | 東芝メモリ株式会社 | 半導体記憶装置 |
JP2020027674A (ja) * | 2018-08-10 | 2020-02-20 | キオクシア株式会社 | 半導体メモリ |
JP2020047346A (ja) * | 2018-09-19 | 2020-03-26 | キオクシア株式会社 | 半導体記憶装置及びデータ書き込み方法 |
JP2020068044A (ja) * | 2018-10-22 | 2020-04-30 | キオクシア株式会社 | 半導体記憶装置 |
US10777286B2 (en) * | 2018-12-28 | 2020-09-15 | Micron Technology, Inc. | Apparatus and methods for determining data states of memory cells |
JP7293060B2 (ja) * | 2019-09-17 | 2023-06-19 | キオクシア株式会社 | 半導体記憶装置 |
JP2021101401A (ja) * | 2019-12-24 | 2021-07-08 | キオクシア株式会社 | 半導体記憶装置 |
EP3899949B1 (en) | 2020-02-26 | 2023-08-16 | Yangtze Memory Technologies Co., Ltd. | Method of programming a memory device and related memory device |
Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1494084A (zh) * | 2002-08-06 | 2004-05-05 | 三星电子株式会社 | 半导体存储器器件的位线预充电电路 |
CN1720587A (zh) * | 2002-11-14 | 2006-01-11 | 柰米闪芯集成电路有限公司 | 使用整合技术的组合式非易失性存储器 |
CN1783343A (zh) * | 2004-10-26 | 2006-06-07 | 三星电子株式会社 | 非易失性存储器件及其编程方法 |
CN101345084A (zh) * | 2007-07-13 | 2009-01-14 | 三星电子株式会社 | 操作非易失性存储装置的方法 |
US7505327B2 (en) * | 2004-10-14 | 2009-03-17 | Kabushiki Kaisha Toshiba | Method of controlling a semiconductor device by a comparison of times for discharge of bit lines connected to different memory cell arrays |
CN101556827A (zh) * | 2008-04-11 | 2009-10-14 | 海力士半导体有限公司 | 使用自升压对闪存器件编程的方法 |
KR20100138540A (ko) * | 2009-06-25 | 2010-12-31 | 주식회사 하이닉스반도체 | 불휘발성 메모리 소자의 프로그램 방법 |
CN101937707A (zh) * | 2009-06-29 | 2011-01-05 | 海力士半导体有限公司 | 对非易失性存储器器件进行编程的方法 |
CN102314941A (zh) * | 2010-07-06 | 2012-01-11 | 三星电子株式会社 | 非易失性存储器件、存储***和执行读操作的方法 |
CN103680632A (zh) * | 2012-08-30 | 2014-03-26 | 华邦电子股份有限公司 | 半导体存储装置 |
CN106062881A (zh) * | 2014-02-20 | 2016-10-26 | 松下知识产权经营株式会社 | 非易失性半导体存储装置 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4405405B2 (ja) | 2004-04-15 | 2010-01-27 | 株式会社東芝 | 不揮発性半導体記憶装置 |
JP5166899B2 (ja) | 2007-02-13 | 2013-03-21 | 株式会社ディスコ | ウエーハの分割方法 |
US7508715B2 (en) * | 2007-07-03 | 2009-03-24 | Sandisk Corporation | Coarse/fine program verification in non-volatile memory using different reference levels for improved sensing |
US7978520B2 (en) * | 2007-09-27 | 2011-07-12 | Sandisk Corporation | Compensation of non-volatile memory chip non-idealities by program pulse adjustment |
JP5253784B2 (ja) | 2007-10-17 | 2013-07-31 | 株式会社東芝 | 不揮発性半導体記憶装置 |
JP2009266946A (ja) | 2008-04-23 | 2009-11-12 | Toshiba Corp | 三次元積層不揮発性半導体メモリ |
KR101513714B1 (ko) * | 2008-07-09 | 2015-04-21 | 삼성전자주식회사 | 플래시 메모리 장치 및 그것의 프로그램 방법 |
KR101487524B1 (ko) | 2008-08-27 | 2015-01-29 | 삼성전자주식회사 | 불휘발성 메모리 장치의 프로그램 방법 |
KR101517597B1 (ko) * | 2009-03-25 | 2015-05-07 | 삼성전자주식회사 | 불휘발성 메모리 장치 및 그것의 프로그램 전압 생성방법 |
KR101635502B1 (ko) | 2009-07-22 | 2016-07-01 | 삼성전자주식회사 | 반도체 메모리 장치 및 그것의 프로그램 방법 |
US9171626B2 (en) * | 2012-07-30 | 2015-10-27 | Micron Technology, Inc.. | Memory devices and programming memory arrays thereof |
KR102016036B1 (ko) * | 2012-08-30 | 2019-08-29 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 및 이의 동작 방법 |
KR102139323B1 (ko) * | 2014-02-03 | 2020-07-29 | 삼성전자주식회사 | 불휘발성 메모리 장치 및 그것의 프로그램 방법 |
US9368222B2 (en) * | 2014-10-01 | 2016-06-14 | Sandisk Technologies Inc. | Bit line pre-charge with current reduction |
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2017
- 2017-01-06 JP JP2017001237A patent/JP2018113084A/ja active Pending
- 2017-02-09 TW TW106104201A patent/TWI657441B/zh active
- 2017-03-08 CN CN201710133209.9A patent/CN108281168B/zh active Active
- 2017-08-28 US US15/688,846 patent/US10153045B2/en active Active
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1494084A (zh) * | 2002-08-06 | 2004-05-05 | 三星电子株式会社 | 半导体存储器器件的位线预充电电路 |
CN1720587A (zh) * | 2002-11-14 | 2006-01-11 | 柰米闪芯集成电路有限公司 | 使用整合技术的组合式非易失性存储器 |
US7505327B2 (en) * | 2004-10-14 | 2009-03-17 | Kabushiki Kaisha Toshiba | Method of controlling a semiconductor device by a comparison of times for discharge of bit lines connected to different memory cell arrays |
CN1783343A (zh) * | 2004-10-26 | 2006-06-07 | 三星电子株式会社 | 非易失性存储器件及其编程方法 |
CN101345084A (zh) * | 2007-07-13 | 2009-01-14 | 三星电子株式会社 | 操作非易失性存储装置的方法 |
CN101556827A (zh) * | 2008-04-11 | 2009-10-14 | 海力士半导体有限公司 | 使用自升压对闪存器件编程的方法 |
KR20100138540A (ko) * | 2009-06-25 | 2010-12-31 | 주식회사 하이닉스반도체 | 불휘발성 메모리 소자의 프로그램 방법 |
CN101937707A (zh) * | 2009-06-29 | 2011-01-05 | 海力士半导体有限公司 | 对非易失性存储器器件进行编程的方法 |
CN102314941A (zh) * | 2010-07-06 | 2012-01-11 | 三星电子株式会社 | 非易失性存储器件、存储***和执行读操作的方法 |
CN103680632A (zh) * | 2012-08-30 | 2014-03-26 | 华邦电子股份有限公司 | 半导体存储装置 |
CN106062881A (zh) * | 2014-02-20 | 2016-10-26 | 松下知识产权经营株式会社 | 非易失性半导体存储装置 |
Also Published As
Publication number | Publication date |
---|---|
JP2018113084A (ja) | 2018-07-19 |
US20180197611A1 (en) | 2018-07-12 |
CN108281168A (zh) | 2018-07-13 |
US10153045B2 (en) | 2018-12-11 |
TW201826269A (zh) | 2018-07-16 |
TWI657441B (zh) | 2019-04-21 |
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Address after: Tokyo Patentee after: Kaixia Co.,Ltd. Address before: Tokyo Patentee before: TOSHIBA MEMORY Corp. Address after: Tokyo Patentee after: TOSHIBA MEMORY Corp. Address before: Tokyo Patentee before: Pangea Co.,Ltd. |
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TR01 | Transfer of patent right | ||
TR01 | Transfer of patent right |
Effective date of registration: 20220304 Address after: Tokyo Patentee after: Pangea Co.,Ltd. Address before: Tokyo Patentee before: TOSHIBA MEMORY Corp. |