CN108227814A - One introduces a collection follows circuit - Google Patents
One introduces a collection follows circuit Download PDFInfo
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- CN108227814A CN108227814A CN201711382679.5A CN201711382679A CN108227814A CN 108227814 A CN108227814 A CN 108227814A CN 201711382679 A CN201711382679 A CN 201711382679A CN 108227814 A CN108227814 A CN 108227814A
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- pipes
- bias current
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- current sources
- source
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
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- Automation & Control Theory (AREA)
- Control Of Electrical Variables (AREA)
- Amplifiers (AREA)
Abstract
The present invention relates to an introduces a collections to follow circuit, by adding in cascade mirror image circuit and common source circuit, has been superimposed a threshold voltage on reference voltage, output voltage not with temperature, process corner variation and change, deviation very little.The present invention follows circuit output voltage to be compensated conventional source, solves the disadvantage that conventional source follows circuit output voltage that can change with temperature, process corner and changes, improves the characteristic of output voltage.The circuit of the present invention is simple, and area overhead can be neglected substantially.
Description
Technical field
The present invention relates to an introduces a collections to follow circuit.
Background technology
Traditional CMOS sources follow circuit, as shown in Figure 1, comprising intrinsic metal-oxide-semiconductor M4, drain electrode connection supply voltage VDD,
Grid connects reference voltage VREF, and source electrode corresponds to output voltage VO UT, and is connect with bias current sources I3.The output voltage
VOUT=VREF-Vth, due to the threshold voltage vt h ≈ 0 of intrinsic metal-oxide-semiconductor, VOUT ≈ VREF.But since Vth can be with temperature
It spends the variation with process corner and changes, VOUT can also change with the variation of temperature and process corner, generate larger deviation：No
During synthermal, process corner, the maximum deviation there are about +/- 0.15V ~ +/- 0.2V.
Invention content
It is an object of the present invention to provide an introduces a collections to follow circuit, can generate not with temperature, process corner change more accurately
Output voltage.
In order to achieve the above object, technical program of the present invention lies in providing an introduces a collection to follow circuit, N-type metal-oxide-semiconductor is included
M0, M1, intrinsic metal-oxide-semiconductor M2, M3, M4, bias current sources I0, I1, I2, I3, resistance R0；
The drain electrode of M2 pipes, the drain electrode of the input terminal of bias current sources I0, M4 pipes, connect respectively with supply voltage VDD；
M0 is managed, the input terminal of the source electrode of M1 pipes connection bias current sources I1, the grid connection reference voltage VREF of M0 pipes；M0 pipes
Drain electrode is connect with the source electrode of M2 pipes；The grid of M1 pipes and drain electrode are connected with the grid of M2 pipes, the source electrode of M3 pipes；
The drain electrode of the output terminal connection M3 pipes of bias current sources I0；The output terminal of bias current sources I0 is also by resistance R0, with M4
The grid of pipe, the grid of M3 pipes, bias current sources I2 input terminal be connected；The output terminal ground connection of bias current sources I1, I2, I3；
The input terminal of the source electrode connection bias current sources I3 of M4 pipes, VOUT=VREF corresponding with output voltage VO UT.
Preferably, the corresponding current values of bias current sources I0, I1, I2 are I0、I1、I2, I1=(I0-I2)*2。
Preferably, M0 pipes are equal with the conducting electric current of M1 pipes, are equal to I1/2。
Preferably, it is managed by M2, M0 pipes, M1 pipes is made to form cascode structure；
Wherein, VA=VREF；Voltage VA be M1 pipes grid and drain electrode, the grid of M2 pipes, M3 pipes the electricity of node that is connected of source electrode
Pressure.
Preferably, M3 pipes work in saturation region；
R0*I2>- Vth, and R0*I2< VDD-VB；
VB=VA+Vth；VOUT=VB-Vth=VA=VREF；
Wherein, the resistance value of resistance R0 is R0；The current value of bias current sources I2 is I2；
Voltage VB is the electricity of node that the resistance is connected with the input terminal of the grid of M4 pipes, the grid of M3 pipes, bias current sources I2
Pressure.
Compared with prior art, the advantage of the invention is that：
For conventional source follow circuit output voltage can with temperature, process corner variation and the shortcomings that change, the present invention carries out
Optimization.Traditional source follows circuit output voltage to subtract a threshold voltage for reference voltage, leads to temperature, process corner characteristic not
It is fine.
The present invention has been superimposed a threshold value by adding in cascade mirror image circuit and common source circuit on reference voltage
Voltage, so as to circuit output voltage be followed to be compensated conventional source.So that output voltage is not with the variation of temperature, process corner
And change, deviation very little.
The present invention compensates for the deviation of temperature and process corner, influences, is only the introduction of smaller little with temperature, process corner
Due to MOS device mismatch caused by deviation：The about +/- 0.03V of deviation.Circuit of the present invention is simple, and area overhead can neglect substantially
Slightly.
Description of the drawings
Fig. 1 is the schematic diagram that conventional source follows circuit；
Fig. 2 is the schematic diagram that source of the present invention follows circuit.
Specific embodiment
The present invention provides a kind of more accurately source and follows circuit, and output voltage does not change with temperature, process corner and changed.
During the present invention follows circuit in source as shown in Figure 2, M0, M1 are N-type metal-oxide-semiconductor；M2, M3, M4 are intrinsic（native）Metal-oxide-semiconductor,
Threshold voltage is close to 0V；I0, I1, I2, I3 are bias current sources, and corresponding current value is I0、I1、I2、I3；Resistance R0, resistance value
For R0。
The source electrode of M0, M1 connect the input terminal of I1, the output terminal ground connection of I1；The grid connection reference voltage VREF of M0；M0's
Drain electrode is connect with the source electrode of M2, corresponding to voltage VD；The grid of M1 and its drain electrode are connected with the grid of M2, the source electrode of M3, corresponding
Voltage VA；The drain electrode connection supply voltage VDD of M2.
The input terminal connection supply voltage VDD of I0, output terminal connects the drain electrode of M3, corresponding to voltage VC；The output terminal of I0
One end of resistance R0 is also connected with, the other end of resistance R0 is connected with the input terminal of the grid of M4, the grid of M3, I2, corresponding to electricity
Press VB；The output terminal ground connection of I2.The drain electrode connection supply voltage VDD of M4, source electrode correspond to output voltage VO UT, and defeated with I3
Enter end connection；The output terminal ground connection of I3.
Design the value of corresponding bias current sources：I1=(I0-I2) * 2 so that M0 and M1 conducting electric currents are equal, are equal to I1/2。
M2 pipes are added in, M0, M1 are made to form cascode structure, it is ensured that VA=VREF.
According to the value of I2, suitable R0 is selected, M3 is made to work in saturation region, i.e. R0*I2>- Vth, and R0*I2 <
VDD-VB.In this way, VB=VA+Vth.Vth is the threshold voltage of intrinsic metal-oxide-semiconductor.
Derive VOUT=VB-Vth=VA=VREF.Therefore, output voltage VO UT is not with the variation of temperature, process corner, more
Precisely.
In conclusion the present invention follows circuit to be optimized in traditional source, solve conventional source and follow circuit output
The shortcomings that voltage can change with temperature, process corner and be changed improves the characteristic of output voltage.The circuit of the present invention is simple, face
Product expense can be neglected.
Although present disclosure is discussed in detail by above preferred embodiment, but it should be appreciated that above-mentioned
Description is not considered as limitation of the present invention.After those skilled in the art have read the above, for the present invention's
A variety of modifications and substitutions all will be apparent.Therefore, protection scope of the present invention should be limited to the appended claims.
Claims (5)
1. an introduces a collection follows circuit, which is characterized in that comprising N-type metal-oxide-semiconductor M0, M1, intrinsic metal-oxide-semiconductor M2, M3, M4, and bias current
Source I0, I1, I2, I3, resistance R0；
The drain electrode of M2 pipes, the drain electrode of the input terminal of bias current sources I0, M4 pipes, connect respectively with supply voltage VDD；
M0 is managed, the input terminal of the source electrode of M1 pipes connection bias current sources I1, the grid connection reference voltage VREF of M0 pipes；M0 pipes
Drain electrode is connect with the source electrode of M2 pipes；The grid of M1 pipes and drain electrode are connected with the grid of M2 pipes, the source electrode of M3 pipes；
The drain electrode of the output terminal connection M3 pipes of bias current sources I0；The output terminal of bias current sources I0 is also by resistance R0, with M4
The grid of pipe, the grid of M3 pipes, bias current sources I2 input terminal be connected；The output terminal ground connection of bias current sources I1, I2, I3；
The input terminal of the source electrode connection bias current sources I3 of M4 pipes, VOUT=VREF corresponding with output voltage VO UT.
2. source as described in claim 1 follows circuit, which is characterized in that
The corresponding current value of bias current sources I0, I1, I2 is I0、I1、I2, I1=(I0-I2)*2。
3. source as claimed in claim 2 follows circuit, which is characterized in that
M0 pipes are equal with the conducting electric current of M1 pipes, are equal to I1/2。
4. source follows circuit as described in claim 1 or 3, which is characterized in that
It is managed by M2, M0 pipes, M1 pipes is made to form cascode structure；
Wherein, VA=VREF；Voltage VA be M1 pipes grid and drain electrode, the grid of M2 pipes, M3 pipes the electricity of node that is connected of source electrode
Pressure.
5. source as claimed in claim 4 follows circuit, which is characterized in that
M3 pipes work in saturation region；
R0*I2>- Vth, and R0*I2< VDD-VB；
VB=VA+Vth；VOUT=VB-Vth=VA=VREF；
Wherein, the resistance value of resistance R0 is R0；The current value of bias current sources I2 is I2；
Voltage VB is the electricity of node that the resistance is connected with the input terminal of the grid of M4 pipes, the grid of M3 pipes, bias current sources I2
Pressure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711382679.5A CN108227814B (en) | 2017-12-20 | 2017-12-20 | Source follower circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711382679.5A CN108227814B (en) | 2017-12-20 | 2017-12-20 | Source follower circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108227814A true CN108227814A (en) | 2018-06-29 |
| CN108227814B CN108227814B (en) | 2020-02-04 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711382679.5A Active CN108227814B (en) | 2017-12-20 | 2017-12-20 | Source follower circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111766506A (en) * | 2020-07-03 | 2020-10-13 | 福建师范大学 | Sensor integrated circuit for detecting CMOS process deviation |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101051821A (en) * | 2007-03-23 | 2007-10-10 | 清华大学 | Voltage follower of small output resistance, large output amplitude |
| JP2010178148A (en) * | 2009-01-30 | 2010-08-12 | Hitachi Kokusai Electric Inc | Buffer circuit |
| US20100214020A1 (en) * | 2009-02-23 | 2010-08-26 | Padraig Cooney | High precision follower device with zero power, zero noise slew enhancement circuit |
| CN203406849U (en) * | 2013-08-29 | 2014-01-22 | 苏州苏尔达信息科技有限公司 | Buffer circuit with high speed and high precision |
| CN104090626A (en) * | 2014-07-03 | 2014-10-08 | 电子科技大学 | High-precision multiple-output voltage buffer |
-
2017
- 2017-12-20 CN CN201711382679.5A patent/CN108227814B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101051821A (en) * | 2007-03-23 | 2007-10-10 | 清华大学 | Voltage follower of small output resistance, large output amplitude |
| JP2010178148A (en) * | 2009-01-30 | 2010-08-12 | Hitachi Kokusai Electric Inc | Buffer circuit |
| US20100214020A1 (en) * | 2009-02-23 | 2010-08-26 | Padraig Cooney | High precision follower device with zero power, zero noise slew enhancement circuit |
| CN203406849U (en) * | 2013-08-29 | 2014-01-22 | 苏州苏尔达信息科技有限公司 | Buffer circuit with high speed and high precision |
| CN104090626A (en) * | 2014-07-03 | 2014-10-08 | 电子科技大学 | High-precision multiple-output voltage buffer |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111766506A (en) * | 2020-07-03 | 2020-10-13 | 福建师范大学 | Sensor integrated circuit for detecting CMOS process deviation |
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| CN108227814B (en) | 2020-02-04 |
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Address after: Room 504, 560 Shengxia Road, Pudong New Area, Shanghai 200000 Patentee after: Praran semiconductor (Shanghai) Co.,Ltd. Address before: 201210 No. 406, No. 560, midsummer Road, Shanghai Free Trade Zone, Shanghai, Pudong New Area Patentee before: PUYA SEMICONDUCTOR (SHANGHAI) Co.,Ltd. |
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