CN108172631B - Thin film transistor, manufacturing method thereof and array substrate - Google Patents
Thin film transistor, manufacturing method thereof and array substrate Download PDFInfo
- Publication number
- CN108172631B CN108172631B CN201810002184.3A CN201810002184A CN108172631B CN 108172631 B CN108172631 B CN 108172631B CN 201810002184 A CN201810002184 A CN 201810002184A CN 108172631 B CN108172631 B CN 108172631B
- Authority
- CN
- China
- Prior art keywords
- thin film
- film transistor
- manufacturing
- region
- semiconductor layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 195
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 64
- 239000000758 substrate Substances 0.000 title claims abstract description 21
- 239000004065 semiconductor Substances 0.000 claims abstract description 100
- 239000000463 material Substances 0.000 claims abstract description 27
- 238000000034 method Methods 0.000 claims description 51
- 239000010408 film Substances 0.000 claims description 28
- 238000005530 etching Methods 0.000 claims description 23
- 230000004888 barrier function Effects 0.000 claims description 10
- 238000009832 plasma treatment Methods 0.000 claims description 3
- 230000003068 static effect Effects 0.000 abstract description 25
- 230000005611 electricity Effects 0.000 abstract description 24
- 239000003990 capacitor Substances 0.000 description 12
- 238000010586 diagram Methods 0.000 description 11
- 230000009286 beneficial effect Effects 0.000 description 5
- 239000002210 silicon-based material Substances 0.000 description 3
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- 206010047571 Visual impairment Diseases 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000000306 component Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 230000001627 detrimental effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000014509 gene expression Effects 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- -1 hydrogen ions Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The invention discloses a thin film transistor, a manufacturing method thereof and an array substrate. The thin film transistor includes: the semiconductor layer comprises a channel region, a source region and a drain region, wherein the source region and the drain region are respectively positioned at two sides of the channel region, and the semiconductor layer is made of an oxide semiconductor material; the thin film transistor further includes a resistance element, one end of the resistance element is electrically connected to the source region, the other end of the resistance element is electrically connected to the drain region, and the resistance element is used for increasing an off-state current of the thin film transistor. A resistance element is connected in parallel between the source electrode and the drain electrode, the off-state current of the oxide thin film transistor is properly increased, the problem that the pixel has residual images when the thin film transistor in the pixel driving circuit is in an off state can be solved, and meanwhile, the static electricity in the static electricity releasing circuit can be released in time.
Description
Technical Field
The invention relates to the technical field of display, in particular to a thin film transistor, a manufacturing method thereof and an array substrate.
Background
Display panels currently mainly include two main categories: LCD Display panels (Liquid Crystal Display panels) and OLED (Organic Light-Emitting Diode) Display panels. In the display panel technology, TFTs (Thin Film transistors) are the core components of the display panel, and are generally fabricated on a substrate in an array configuration as switching devices of pixel units of the display panel. The thin film transistor includes: the gate electrode is applied with voltage, the surface of the active layer is converted from a depletion layer into an electron accumulation layer along with the increase of the voltage of the gate electrode to form an inversion layer, and when the strong inversion is achieved (namely the starting voltage is achieved), the active layer has carriers to move to realize the conduction between the source electrode and the drain electrode. As for the structure, the thin film transistor is generally classified into two structures of a top gate and a bottom gate according to the position of the gate electrode.
The material for forming the active layer in the thin film transistor includes amorphous silicon material, polysilicon material, oxide semiconductor material, etc., wherein the oxide semiconductor thin film transistor becomes one of the best candidates for the thin film transistor material for driving the next generation display such as ultra-fine liquid crystal panel, organic light emitting display panel, and electronic paper. Compared with an amorphous silicon material or polycrystalline silicon material thin film transistor, the oxide semiconductor thin film transistor has lower off-state current, and is beneficial to reducing storage capacitance and power consumption. But also brings other adverse effects in application due to its lower off-state current. For example, in the pixel driving circuit, the display image has a residual image due to too small off-state current; in the electrostatic discharge circuit, the off-state current is too small to discharge the static electricity in time. In short, too small off-state current has a certain effect on the performance reliability of the display panel.
Therefore, it is an urgent problem to be solved in the art to provide a thin film transistor, a method for manufacturing the same, and an array substrate.
Disclosure of Invention
In view of this, the present invention provides a thin film transistor, a method for manufacturing the same, and an array substrate, which solve the technical problem of improving performance reliability.
In a first aspect, to solve the above technical problem, the present invention provides a thin film transistor, including:
the semiconductor layer comprises a channel region, a source region and a drain region, wherein the source region and the drain region are respectively positioned at two sides of the channel region, and the semiconductor layer is made of an oxide semiconductor material;
the thin film transistor further includes a resistance element, one end of the resistance element is electrically connected to the source region, the other end of the resistance element is electrically connected to the drain region, and the resistance element is used for increasing an off-state current of the thin film transistor.
In a second aspect, in order to solve the above technical problem, the present invention provides a method for manufacturing a thin film transistor, including:
manufacturing a grid electrode of the thin film transistor;
manufacturing a source electrode and a drain electrode of the thin film transistor;
manufacturing a semiconductor layer of the thin film transistor, wherein the semiconductor layer comprises a channel region, a source region and a drain region, the source region and the drain region are respectively positioned at two sides of the channel region, and the manufacturing material of the semiconductor layer is an oxide semiconductor material;
and manufacturing a resistance element of the thin film transistor, wherein one end of the resistance element is electrically connected with the source region, and the other end of the resistance element is electrically connected with the drain region.
In a third aspect, to solve the above technical problem, the present invention provides an array substrate including any one of the thin film transistors.
Compared with the prior art, the thin film transistor, the manufacturing method thereof and the array substrate have the following beneficial effects that:
the thin film transistor provided by the invention is characterized in that a resistor element is connected in parallel between the source electrode and the drain electrode, the off-state current of the oxide thin film transistor is properly increased, the problem of image sticking of a pixel when the thin film transistor in a pixel driving circuit is in an off state can be avoided, and meanwhile, the static electricity in the static electricity discharge circuit can be ensured to be timely discharged.
Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.
Fig. 1 is a schematic top view of a thin film transistor according to an embodiment of the present invention;
FIG. 2 is a simplified circuit diagram of a TFT according to an embodiment of the present invention;
FIG. 3 is a schematic top view of an alternative implementation of a thin film transistor provided in an embodiment of the present invention;
FIG. 4 is a schematic cross-sectional view taken at the location of line Q in FIG. 3;
fig. 5 is a diagram illustrating a film structure of an alternative implementation of a thin film transistor according to an embodiment of the present invention;
fig. 6 is a schematic top view of an alternative implementation of a thin film transistor provided in an embodiment of the present invention;
fig. 7 is a diagram illustrating a film structure of another alternative thin film transistor according to an embodiment of the present invention;
fig. 8 is a schematic top view of another alternative implementation of a thin film transistor provided in an embodiment of the present invention;
fig. 9 is a flowchart of a method for fabricating a thin film transistor according to an embodiment of the invention;
fig. 10 is a flowchart of an alternative implementation of a method for fabricating a thin film transistor according to an embodiment of the present invention;
fig. 11 is a flowchart of another alternative implementation of a method for manufacturing a thin film transistor according to an embodiment of the present invention;
fig. 12 is a schematic top view of an array substrate according to an embodiment of the invention.
Detailed Description
Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.
The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.
In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.
The inventor finds that in the related art, the off-state current ratio of the thin film transistor is low, when the display device is turned off or abnormally powered off, the charges stored in the storage capacitor cannot be quickly released, so that the thin film transistor or the display pixel is still in a bias state, and further threshold drift of the thin film transistor or the pixel has an afterimage; the inventors also found that when the leakage current (i.e., off-state current) of the esd protection circuit for esd protection is small in a low gate voltage state, the esd cannot be released in time, which increases the risk of esd protection of the display device. The inventors thus believe that the relatively low off-state current in oxide thin film transistors is in some cases more detrimental, and that increasing the off-state current appropriately can improve the performance reliability of the display device.
The invention relates to a thin film transistor and an array substrate.A resistor is connected in parallel between a source electrode and a drain electrode of an oxide thin film transistor, so that a path for releasing charges in the off state of the thin film transistor can be increased, and the off-state current of the oxide thin film transistor can be increased.
Fig. 1 is a schematic top view of a thin film transistor according to an embodiment of the present invention, and fig. 2 is a simplified circuit diagram of the thin film transistor according to the embodiment of the present invention. It should be noted that the thin film transistor provided by the present invention may be a top gate structure or a bottom gate structure, and fig. 1 illustrates only the bottom gate structure.
As shown in fig. 1, the thin film transistor includes: the semiconductor layer 101 comprises a channel region 1011, a source region 1012 and a drain region 1013, the source region 1012 and the drain region 1013 are respectively located at two sides of the channel region 1011, and the semiconductor layer 101 is made of an oxide semiconductor material; the thin film transistor further includes a resistance element R having one end electrically connected to the source region 1012 and the other end electrically connected to the drain region 1013, the resistance element R being for increasing an off-state current of the thin film transistor. As shown in fig. 2, in the circuit diagram, the resistance element R is equivalent to be connected in parallel with the source S and the drain D of the thin film transistor.
When the array substrate manufactured by the thin film transistor provided by the invention is applied to a pixel driving circuit of a display device, the grid electrode is connected with the scanning line, the drain electrode is connected with the data line, and the source electrode is connected with the pixel electrode. Under the control of the gate, the data line of the drain electrode charges and discharges to the pixel capacitor of the source electrode through the thin film transistor. When the pixel capacitor needs to be charged and discharged, the thin film transistor works in a high-current on state, and when the pixel capacitor does not need to be charged and discharged, the thin film transistor works in a low-current off state, and the low current in the off state influences the leakage rate of the pixel capacitor. The thin film transistor provided by the invention is characterized in that the resistance element is connected in parallel between the source electrode and the drain electrode, when the thin film transistor is in an off state, a path for releasing charges is increased, and off-state current is increased, so that the storage capacitor can be rapidly discharged, and the phenomenon that the display pixel is in a bias state to cause the pixel to have residual images is avoided. Similarly, when the thin film transistor provided by the invention is applied to an electrostatic discharge circuit of a display device, when the thin film transistor is in an off state, a path for releasing charges is increased, off-state current is increased, static can be ensured to be released in time, and the risk of generating static of the display device is reduced.
The thin film transistor provided by the invention is characterized in that a resistor element is connected in parallel between the source electrode and the drain electrode aiming at the condition that the off-state current of the oxide thin film transistor is too small, so that the off-state current of the oxide thin film transistor is properly increased, the problem of residual image of a pixel when the thin film transistor in a pixel driving circuit is in an off state can be avoided, and meanwhile, the static electricity in a static electricity releasing circuit can be ensured to be released in time.
It should be noted that the resistance element in the thin film transistor provided by the present invention may be disposed on the same film layer as the gate electrode, the same film layer as the source/drain electrode, the same film layer as the semiconductor layer, or the resistance element film layer may be separately fabricated during the thin film transistor fabrication. The arrangement mode of connecting a resistance element in parallel between the source electrode and the drain electrode of the thin film transistor for increasing the off-state current is within the protection scope of the invention.
Further, in some alternative embodiments, the resistive element and the semiconductor layer in the thin film transistor provided by the present invention are located in the same film layer. In this embodiment, the resistive element and the semiconductor layer are located in the same film, one end of the resistive element is connected to the source region in the semiconductor layer, and the other end of the resistive element is connected to the drain region in the semiconductor layer. The thin film transistor provided by the embodiment has a simple structure, the process of the via hole is not required to be increased during manufacturing, and the process manufacturing cost is reduced. Meanwhile, in the embodiment, the resistor element is manufactured in the original film layer structure of the thin film transistor, and a new film layer structure is not required to be added during the manufacturing of the thin film transistor, so that the requirement of thinning is met.
Further, in some alternative embodiments, fig. 3 is a schematic top view of an alternative embodiment of a thin film transistor provided in an embodiment of the present invention, and fig. 4 is a schematic cross-sectional view at a position of a tangent line Q in fig. 3. Referring to fig. 3 and 4, the thin film transistor includes a gate G, a source S, a drain D, a semiconductor layer 101, and a resistance element R, the semiconductor layer 101 includes a channel region 1011, a source region 1012, and a drain region 1013, the resistance element R is located in the same layer as the semiconductor layer 101, one end of the resistance element R is electrically connected to the source region 1012, and the other end of the resistance element R is electrically connected to the drain region 1013, it should be noted that fig. 3 only exemplifies the thin film transistor with the bottom gate structure, and this embodiment is also applicable to the thin film transistor with the top gate structure.
In this embodiment mode, the resistance element and the semiconductor layer are in the same layer, and the resistance element may be formed by performing a conductive treatment on an oxide semiconductor material. In this embodiment, the resistor element and the semiconductor layer are made of the same material, the resistor element and the semiconductor layer can be patterned by etching in the same process, the resistor element obtained by etching is an oxide semiconductor with a large resistance, and then the oxide semiconductor is subjected to a conductive treatment to reduce the resistance, so that the resistor element is manufactured. In this embodiment, the resistive element and the semiconductor layerThe method can finish the pattern etching in the same process, the process is simple and easy to implement, no additional process is needed during manufacturing, the implementation mode has good compatibility with the existing oxide thin film transistor process, and the complexity of the process and the structure is slightly increased. Optionally, He, Ar or H may be performed on the pattern of the etched resistive element2The plasma treatment reduces the resistance of the oxide semiconductor material. The type of gas, time and power intensity of the plasma process determine the magnitude of the resistance of the resistive element after the conductive process. The specific treatment process parameters are not limited in the present invention.
Further, in some optional embodiments, the resistance value of the resistor element R in the thin film transistor provided by the present invention is 100M to 100000M Ω/□. When a resistance element is connected in parallel between a source electrode and a drain electrode of the thin film transistor, if the resistance of the resistance element is too large, the current flowing through the resistance element is too small when the thin film transistor is in an off state, and the resistance element cannot play a role as a charge release channel; if the resistance of the resistor element is too small, the current flowing through the resistor element when the thin film transistor is in an off state is too large, and power consumption is increased. The resistance value of the resistor element in the thin film transistor provided by this embodiment is 100M to 100000M Ω/□, which ensures that the resistance value of the resistor element is large enough to avoid the power consumption increase due to the excessive off-state current, and simultaneously ensures that the resistance value of the resistor element is small enough to be used as a channel for releasing the charges when the thin film transistor is in the off-state.
Further, in some alternative embodiments, fig. 5 is a film structure diagram of another alternative embodiment of a thin film transistor according to an embodiment of the present invention. Fig. 6 is a schematic top view of another alternative implementation of a thin film transistor according to an embodiment of the present invention. Referring to fig. 5 and 6 together, the thin film transistor includes: the semiconductor layer 101 comprises a channel region 1011, a source region 1012 and a drain region 1013, the source region 1012 and the drain region 1013 are respectively located at two sides of the channel region 1011, and the semiconductor layer 101 is made of an oxide semiconductor material; the first insulating layer 102 is located between the semiconductor layer 101 and the gate electrode G; the etching barrier layer 103 is positioned on the semiconductor layer 101, and the orthographic projection of the etching barrier layer 103 on the semiconductor layer 101 covers the channel region 1011; the source S and the drain D are located on the semiconductor layer 101, wherein the source S is electrically connected to the source region 1012 and the drain D is electrically connected to the drain region 1013, and the thin film transistor generally further includes a substrate layer 105. As shown in fig. 6, the thin film transistor further includes a resistance element R, one end of which is electrically connected to the source region 1012 and the other end of which is electrically connected to the drain region 1013, the resistance element R being configured to increase an off-state current of the thin film transistor. In fig. 6, only a part of the structure of the thin film transistor is shown for clarity of illustrating the relationship between the resistor R and the source S and drain D.
The embodiment provides an oxide thin film transistor with a bottom gate structure, wherein the orthographic projection of the etching barrier layer on the semiconductor layer covers the channel region, so that the channel region is not conducted when conducting treatment is carried out on a source region and a drain region of the semiconductor layer, and the effectiveness of a thin film transistor device is ensured, wherein the conducting treatment can be that a certain amount of hydrogen ions are doped in the source region and the drain region to enable the source region and the drain region to become conductors. In the embodiment, a resistance element is connected in parallel between the source electrode and the drain electrode of the oxide thin film transistor, when the thin film transistor is in an off state, a path for releasing charges is increased, off-state current is increased, and when the thin film transistor is applied to a pixel driving circuit, storage capacitors in the circuit can be rapidly discharged, so that the phenomenon that the display pixels are in a bias state to cause the pixels to have residual images is avoided; when the thin film transistor is applied to the static electricity releasing circuit, the static electricity can be released in time. Meanwhile, in the embodiment, the resistance element and the semiconductor layer of the thin film transistor can be located on the same layer, optionally, the resistance element and the semiconductor layer are made of materials with the same material, and the etching of the pattern can be completed in the same process. In addition, the resistance element is manufactured in the original film layer structure of the thin film transistor, and a new film layer structure is not needed to be added to the thin film transistor, so that the thin film transistor is beneficial to the requirement of thinning.
Further, in some alternative embodiments, fig. 7 is a film structure diagram of another alternative embodiment of a thin film transistor according to an embodiment of the present invention. Fig. 8 is a schematic top view of another alternative implementation of a thin film transistor according to an embodiment of the present invention. Referring to fig. 7 and 8 together, the thin film transistor includes: the semiconductor layer 101 comprises a channel region 1011, a source region 1012 and a drain region 1013, the source region 1012 and the drain region 1013 are respectively located at two sides of the channel region 1011, and the semiconductor layer 101 is made of an oxide semiconductor material; the first insulating layer 102 is located between the semiconductor layer 101 and the gate electrode G; the second insulating layer 104 is located on the gate G; the source S and the drain D are located on the second insulating layer 104, and are electrically connected to the source region 1012 and the drain region 1013, respectively, through the via K, and generally, the thin film transistor further includes a substrate layer 105. As shown in fig. 8, the thin film transistor further includes a resistance element R, one end of which is electrically connected to the source region 1012 and the other end of which is electrically connected to the drain region 1013, the resistance element R being for increasing an off-state current of the thin film transistor. In fig. 8, only a part of the structure of the thin film transistor is shown for clarity of illustrating the relationship between the resistance element and the source/drain.
The embodiment provides an oxide thin film transistor with a top gate structure, wherein a resistor element is connected in parallel between a source electrode and a drain electrode of the oxide thin film transistor, when the thin film transistor is in an off state, a path for releasing charges is increased, off-state current is increased, and when the thin film transistor is applied to a pixel driving circuit, storage capacitors in the circuit can be rapidly discharged, so that the phenomenon that the display pixels are in a bias state to cause residual images of the pixels is avoided; when the thin film transistor is applied to the static electricity releasing circuit, the static electricity can be released in time. Meanwhile, in the embodiment, the resistance element and the semiconductor layer of the thin film transistor can be located on the same layer, optionally, the resistance element and the semiconductor layer are made of materials with the same material, and the etching of the pattern can be completed in the same process. In addition, the resistance element is manufactured in the original film layer structure of the thin film transistor, and a new film layer structure is not needed to be added to the thin film transistor, so that the thin film transistor is beneficial to the requirement of thinning.
The embodiment of the invention also provides a manufacturing method of the thin film transistor, and the thin film transistor and the manufacturing method of the thin film transistor belong to a general inventive concept.
Fig. 9 is a flowchart of a method for manufacturing a thin film transistor according to an embodiment of the present invention, and as shown in fig. 9, the method for manufacturing a thin film transistor includes:
step S101: manufacturing a grid electrode of the thin film transistor;
step S102: manufacturing a source electrode and a drain electrode of the thin film transistor;
step S103: manufacturing a semiconductor layer of the thin film transistor, wherein the semiconductor layer comprises a channel region, a source region and a drain region, the source region and the drain region are respectively positioned at two sides of the channel region, and the manufacturing material of the semiconductor layer is an oxide semiconductor material;
step S104: and manufacturing a resistance element of the thin film transistor, wherein one end of the resistance element is electrically connected with the source region, and the other end of the resistance element is electrically connected with the drain region.
Fig. 1 shows a schematic plan view of a thin film transistor manufactured according to this embodiment, where a resistor element is connected in parallel between a source and a drain of the thin film transistor manufactured according to this embodiment, when the thin film transistor is in an off state, a path for releasing charges is increased, and off-state current is increased. When the thin film transistor is applied to the pixel driving circuit, the storage capacitor of the thin film transistor can discharge rapidly in an off state, and therefore the phenomenon that the display pixel is in a bias state to cause the pixel to have residual images is avoided. When the thin film transistor is applied to the static electricity releasing circuit of the display device, when the thin film transistor is in an off state, the static electricity can be released in time, and the risk of generating the static electricity by the display device is reduced.
Further, in some optional embodiments, before the step of fabricating the semiconductor layer of the thin film transistor in step S103, the method further includes: manufacturing an oxide semiconductor film; and etching the oxide semiconductor film to form a pattern of a semiconductor layer of the thin film transistor and a pattern of the resistance element. The thin film transistor is manufactured by adopting the embodiment, the resistance element and the semiconductor layer are made of the same material, the etching of the pattern is completed in the same process, namely, the connection between the resistance element and the semiconductor layer is established, the resistance element and the semiconductor layer are in the same film layer, the process of increasing the through hole for connecting the resistance element and the semiconductor is not needed, and the process is simple.
Further, in some optional embodiments, the step of fabricating the resistance element of the thin film transistor in step S104 further includes: and conducting the pattern of the resistance element. In this embodiment, after the pattern of the resistor element is formed by etching, the resistor element is still in a semiconductor state, which is equivalent to a resistor with a relatively large resistance value, and since the resistance value is relatively large, the off-state current of the resistor element cannot be properly increased at this time, and the pattern of the resistor element needs to be subjected to conductive processing to reduce the resistance of the resistor element, optionally, the resistance value of the resistor element after the conductive processing is 100M to 100000M Ω/□, which ensures that the resistance value of the resistor element is large enough to avoid the increase of power consumption due to the excessive off-state current, and at the same time, ensures that the resistance value of the resistor is small enough to be used as a channel for releasing charges when the thin film transistor is in the off-.
Optionally, the step of performing the conductive processing on the pattern of the resistive element specifically includes: using He, Ar or H2The plasma treatment process conducts electricity to the pattern of the resistive element. The type of gas, time and power intensity of the plasma process determine the magnitude of the resistance of the resistive element after the conductive process. In the embodiment, the resistor element and the semiconductor layer can be etched in the same process, no additional process is needed during manufacturing, the embodiment has good compatibility with the existing oxide thin film transistor, and the complexity of the process and the structure is less increased.
Further, fig. 10 is a flowchart of an alternative implementation of a manufacturing method of a thin film transistor according to an embodiment of the present invention, and as shown in fig. 10, the manufacturing method of the thin film transistor includes:
step S201: and manufacturing a grid electrode of the thin film transistor.
Step S202: a first insulating layer is formed over the gate.
Step S203: manufacturing an oxide semiconductor film; and etching the oxide semiconductor film to form a pattern of a semiconductor layer of the thin film transistor and a pattern of the resistance element.
Step S204: manufacturing an etching barrier layer on the semiconductor layer, wherein the orthographic projection of the etching barrier layer on the semiconductor layer covers the channel region; optionally, the etching barrier layer is made of aluminum oxide or titanium oxide, so that the channel region is not electrically conducted when the source region and the drain region of the semiconductor layer are subjected to conductive treatment, and the effectiveness of the thin film transistor device is ensured.
Step S205: and conducting the pattern of the resistance element.
Step S206: and manufacturing a source electrode and a drain electrode on the semiconductor layer, wherein the source electrode is electrically connected with the source region, and the drain electrode is electrically connected with the drain region.
In this embodiment, a step of performing a conductive process on the source region and the drain region is further included, and since the degree of conductivity of the source region and the drain region is different from that of the resistive element, the step of performing the conductive process on the source region and the drain region and the step of performing the conductive process on the pattern of the resistive element should be separately made.
Fig. 5 and fig. 6 are a schematic diagram of a film structure and a schematic diagram of a top view of a thin film transistor manufactured by this embodiment. The oxide thin film transistor with the bottom gate structure is manufactured by adopting the embodiment, the resistor element is connected in parallel between the source electrode and the drain electrode of the oxide thin film transistor, when the thin film transistor is in an off state, a path for releasing charges is increased, the off-state current is increased, and when the thin film transistor is applied to a pixel driving circuit, the storage capacitor in the circuit can be rapidly discharged, so that the phenomenon that the display pixel is in a bias state to cause the pixel to have residual images is avoided; when the thin film transistor is applied to the static electricity releasing circuit, the static electricity can be released in time. In the embodiment, the resistor element and the semiconductor layer are made of the same material, and the etching of the pattern can be completed in the same process, so that an additional process is not required to be added during the manufacturing.
Further, fig. 11 is a flowchart of another alternative implementation of a manufacturing method of a thin film transistor according to an embodiment of the present invention, and as shown in fig. 11, the manufacturing method of the thin film transistor includes:
step S301: manufacturing an oxide semiconductor film; and etching the oxide semiconductor film to form a pattern of a semiconductor layer of the thin film transistor and a pattern of the resistance element.
Step S302: a first insulating layer is formed over the semiconductor layer.
Step S303: and manufacturing a grid electrode of the thin film transistor.
Step S304: and conducting the pattern of the resistance element.
Step S305: and manufacturing a second insulating layer on the grid.
Step S306: forming a via hole in the second insulating layer, the via hole being in communication with the source region and the drain region of the semiconductor layer;
step S307: and manufacturing a source electrode and a drain electrode on the second insulating layer, wherein the source electrode and the drain electrode are respectively connected with the source electrode region and the drain electrode region through the via holes.
In this embodiment, a step of performing a conductive process on the source region and the drain region is further included, and since the degree of conductivity of the source region and the drain region is different from that of the resistive element, the step of performing the conductive process on the source region and the drain region and the step of performing the conductive process on the pattern of the resistive element should be separately made.
Fig. 7 and fig. 8 are a schematic diagram of a film structure and a schematic diagram of a top view of a thin film transistor manufactured by this embodiment. The oxide thin film transistor with the top gate structure is manufactured by adopting the embodiment, the resistor element is connected in parallel between the source electrode and the drain electrode of the oxide thin film transistor, when the thin film transistor is in an off state, a path for releasing charges is increased, the off-state current is increased, and when the thin film transistor is applied to a pixel driving circuit, the storage capacitor in the circuit can be rapidly discharged, so that the phenomenon that the display pixel is in a bias state to cause the pixel to have residual images is avoided; when the thin film transistor is applied to the static electricity releasing circuit, the static electricity can be released in time. In the embodiment, the resistor element and the semiconductor layer are made of the same material, and the etching of the pattern can be completed in the same process, so that an additional process is not required to be added during the manufacturing.
Further, the present invention also provides an array substrate, and fig. 12 is a schematic top view of the array substrate according to the embodiment of the present invention, where the array substrate includes a display area AA and a non-display area BA, the array substrate includes a pixel driving circuit and an electrostatic discharge circuit, and the pixel driving circuit and/or the electrostatic discharge circuit includes the thin film transistor according to any embodiment of the present invention. In the array substrate provided by the invention, the thin film transistor in the pixel driving circuit is connected with the resistor element in parallel between the source electrode and the drain electrode, when the thin film transistor is in an off state, a path for releasing charges is equivalently increased, and off-state current is increased, so that the storage capacitor can be rapidly discharged, and the phenomenon that the display pixel is in a bias state to cause the pixel to have residual images is avoided. The thin film transistor in the static electricity releasing circuit is connected with a resistance element in parallel between the source electrode and the drain electrode, when the thin film transistor is in an off state, a path for releasing charges is increased, off-state current is increased, static electricity can be guaranteed to be released in time, and the risk of static electricity generated by a display device is reduced.
According to the embodiment, the thin film transistor, the manufacturing method thereof and the array substrate of the invention have the following beneficial effects:
the thin film transistor provided by the invention is characterized in that a resistor element is connected in parallel between the source electrode and the drain electrode aiming at the condition that the off-state current of the oxide thin film transistor is too small, so that the off-state current of the oxide thin film transistor is properly increased, the problem of residual image of a pixel when the thin film transistor in a pixel driving circuit is in an off state can be avoided, and meanwhile, the static electricity in a static electricity releasing circuit can be ensured to be released in time.
Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustrative purposes only and are not intended to limit the scope of the present invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.
Claims (12)
1. A thin film transistor, comprising:
the semiconductor layer comprises a channel region, a source region and a drain region, wherein the source region and the drain region are respectively positioned at two sides of the channel region, and the semiconductor layer is made of an oxide semiconductor material;
the thin film transistor further comprises a resistance element, one end of the resistance element is electrically connected with the source region, the other end of the resistance element is electrically connected with the drain region, and the resistance element is used for increasing the off-state current of the thin film transistor;
the resistance value of the resistance element is 100M-100000M omega/□.
2. The thin film transistor according to claim 1,
the resistance element and the semiconductor layer are located on the same film layer.
3. The thin film transistor according to claim 2,
the resistance element is formed by conducting treatment on the oxide semiconductor material.
4. The thin film transistor according to claim 2,
the thin film transistor further includes:
a first insulating layer between the semiconductor layer and the gate electrode;
the etching barrier layer is positioned on the semiconductor layer, and the orthographic projection of the etching barrier layer on the semiconductor layer covers the channel region;
the source and drain electrodes are located over the semiconductor layer, wherein the source electrode is electrically connected to the source region and the drain electrode is electrically connected to the drain region.
5. The thin film transistor according to claim 2,
the thin film transistor further includes:
a first insulating layer between the semiconductor layer and the gate electrode;
a second insulating layer located over the gate;
wherein the source electrode and the drain electrode are located on the second insulating layer, and the source electrode and the drain electrode are electrically connected with the source region and the drain region through vias, respectively.
6. A method for manufacturing a thin film transistor includes:
manufacturing a grid electrode of the thin film transistor;
manufacturing a source electrode and a drain electrode of the thin film transistor;
manufacturing a semiconductor layer of the thin film transistor, wherein the semiconductor layer comprises a channel region, a source region and a drain region, the source region and the drain region are respectively positioned at two sides of the channel region, and the manufacturing material of the semiconductor layer is an oxide semiconductor material;
manufacturing a resistance element of the thin film transistor, wherein one end of the resistance element is electrically connected with the source region, and the other end of the resistance element is electrically connected with the drain region;
the resistance value of the resistance element is 100M-100000M omega/□.
7. The method according to claim 6, further comprising, before the step of forming the semiconductor layer of the thin film transistor:
manufacturing an oxide semiconductor film;
and etching the oxide semiconductor film to form a pattern of a semiconductor layer of the thin film transistor and a pattern of the resistance element.
8. The method for manufacturing a thin film transistor according to claim 7,
the step of manufacturing the resistance element of the thin film transistor further includes:
and conducting treatment is carried out on the pattern of the resistance element.
9. The method for manufacturing a thin film transistor according to claim 8,
the step of conducting the pattern of the resistance element specifically comprises the following steps:
using He, Ar or H2And conducting the pattern of the resistance element by using a plasma treatment process.
10. The method for manufacturing a thin film transistor according to claim 8,
the step of manufacturing the grid of the thin film transistor further comprises the following steps: manufacturing a first insulating layer on the grid; the step of conducting the pattern of the resistive element further comprises: manufacturing an etching barrier layer on the semiconductor layer, wherein the orthographic projection of the etching barrier layer on the semiconductor layer covers the channel region;
the step of conducting the pattern of the resistive element further comprises:
fabricating the source and the drain over the semiconductor layer, wherein the source is electrically connected to the source region and the drain is electrically connected to the drain region.
11. The method for manufacturing a thin film transistor according to claim 8,
the step of conducting the pattern of the resistive element further comprises:
manufacturing a first insulating layer on the semiconductor layer;
the step of conducting the pattern of the resistive element further comprises:
manufacturing a second insulating layer on the grid;
manufacturing a through hole communicated with a source electrode region and a drain electrode region of the semiconductor layer on the second insulating layer;
and manufacturing the source electrode and the drain electrode on the second insulating layer, wherein the source electrode and the drain electrode are respectively connected with the source electrode region and the drain electrode region through via holes.
12. An array substrate, comprising a pixel driving circuit and an electrostatic discharge circuit, wherein the thin film transistor of any one of claims 1 to 5 is included in the pixel driving circuit and/or the electrostatic discharge circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810002184.3A CN108172631B (en) | 2018-01-02 | 2018-01-02 | Thin film transistor, manufacturing method thereof and array substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810002184.3A CN108172631B (en) | 2018-01-02 | 2018-01-02 | Thin film transistor, manufacturing method thereof and array substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108172631A CN108172631A (en) | 2018-06-15 |
| CN108172631B true CN108172631B (en) | 2020-08-25 |
Family
ID=62517125
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810002184.3A Active CN108172631B (en) | 2018-01-02 | 2018-01-02 | Thin film transistor, manufacturing method thereof and array substrate |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108172631B (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11345981A (en) * | 1999-05-19 | 1999-12-14 | Seiko Epson Corp | Manufacture of semiconductor device |
| JP2005338285A (en) * | 2004-05-25 | 2005-12-08 | Sanyo Electric Co Ltd | Liquid crystal display device |
| CN1928681A (en) * | 2005-09-05 | 2007-03-14 | 中华映管股份有限公司 | Thin-film transistor array substrate, its electric static discharge protector and method for making same |
| CN104977599A (en) * | 2014-04-11 | 2015-10-14 | 株式会社东芝 | Photodetector |
| CN107039466A (en) * | 2017-05-04 | 2017-08-11 | 京东方科技集团股份有限公司 | A kind of display base plate and preparation method thereof, display device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI223733B (en) * | 2003-09-25 | 2004-11-11 | Toppoly Optoelectronics Corp | LCD with a multi silicon layer structure |
-
2018
- 2018-01-02 CN CN201810002184.3A patent/CN108172631B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11345981A (en) * | 1999-05-19 | 1999-12-14 | Seiko Epson Corp | Manufacture of semiconductor device |
| JP2005338285A (en) * | 2004-05-25 | 2005-12-08 | Sanyo Electric Co Ltd | Liquid crystal display device |
| CN1928681A (en) * | 2005-09-05 | 2007-03-14 | 中华映管股份有限公司 | Thin-film transistor array substrate, its electric static discharge protector and method for making same |
| CN104977599A (en) * | 2014-04-11 | 2015-10-14 | 株式会社东芝 | Photodetector |
| CN107039466A (en) * | 2017-05-04 | 2017-08-11 | 京东方科技集团股份有限公司 | A kind of display base plate and preparation method thereof, display device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108172631A (en) | 2018-06-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US9685469B2 (en) | Display with semiconducting oxide and polysilicon transistors | |
| TWI535034B (en) | Pixel structure and method of fabricating the same | |
| CN110729313B (en) | Display panel, display panel manufacturing method and display device | |
| JP5096437B2 (en) | Organic EL display device | |
| US20170184892A1 (en) | Array substrate, method for manufacturing the same, and display device | |
| TWI519881B (en) | Array substrate and method of fabricating the same | |
| CN105390551A (en) | Thin film transistor, manufacturing method thereof, array substrate, and display device | |
| US11355519B2 (en) | Array substrate, manufacturing method thereof, and display device | |
| EP2743989A1 (en) | Thin film transistor and fabrication method thereof, array substrate, and display device | |
| CN108417580B (en) | Array substrate, manufacturing method thereof and display panel | |
| KR20130066513A (en) | Array substrate and method of fabricating the same | |
| KR20130041711A (en) | Thin film semiconductor device for display apparatus and method thereof | |
| TWI569421B (en) | Pixel structure and method of making the same | |
| CN111415995B (en) | Display panel, manufacturing method thereof and display device | |
| US10134765B2 (en) | Oxide semiconductor TFT array substrate and method for manufacturing the same | |
| CN110649101A (en) | Thin film transistor, manufacturing method thereof, array substrate and display device | |
| KR102449066B1 (en) | Array Substrate For Display Device And Method Of Fabricating The Same | |
| KR20150093908A (en) | Organic light emitting display apparatus and method for manufacturing the same | |
| CN108172631B (en) | Thin film transistor, manufacturing method thereof and array substrate | |
| KR20080000015A (en) | Active-matrix organic electroluminescent device and method for fabricating thereof | |
| US20190058026A1 (en) | Array substrate and method of fabricating the same | |
| KR102578160B1 (en) | Thin film transistor array substrate and method of manufacturing the same and organic light emitting display device comprising the same | |
| CN108400140B (en) | Array substrate and manufacturing method thereof | |
| CN108346668B (en) | Display substrate, manufacturing method thereof and display device | |
| CN104867945B (en) | Array base palte, manufacturing method of array base plate and display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |