CN108111169B - Combined correction method for linear mismatch and nonlinear mismatch of four-channel TIADC - Google Patents

Combined correction method for linear mismatch and nonlinear mismatch of four-channel TIADC Download PDF

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CN108111169B
CN108111169B CN201810005682.3A CN201810005682A CN108111169B CN 108111169 B CN108111169 B CN 108111169B CN 201810005682 A CN201810005682 A CN 201810005682A CN 108111169 B CN108111169 B CN 108111169B
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谭洪舟
李展强
李宇
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Sun Yat Sen University
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Abstract

The invention provides a method for jointly correcting linear mismatch and nonlinear mismatch of a four-channel time-interleaved analog-to-digital converter (4-TIADC). according to the method, an ideal input signal is slightly oversampled through the 4-TIADC, a frequency response polynomial of a proper order and the linear mismatch characteristic and the nonlinear mismatch characteristic of a Taylor series representation system are respectively adopted, mismatch information on an oversampling band is output by the 4-TIADC system, and real-time edge estimation and edge compensation are designed to be carried out on linear mismatch errors and nonlinear mismatch errors in parallel based on a normalized least mean square error (NLMS) algorithm, so that joint correction output is obtained. The method takes the linear and nonlinear errors of the 4-TIADC system into consideration and adopts a parallel combined correction technology, thereby obtaining a better correction effect of compensating for any single error. The method has the advantages of more comprehensive consideration of mismatch errors of the TIADC system, simplicity, feasibility and good compensation effect.

Description

Combined correction method for linear mismatch and nonlinear mismatch of four-channel TIADC
Technical Field
The invention relates to the technical field of signal sampling and processing, in particular to a joint correction method for linear mismatch and nonlinear mismatch of a four-channel TIADC.
Background
With the continuous development of integrated circuit technology and the popularization of digitization technology, the requirements on the sampling rate and the sampling precision of an analog-to-digital converter (ADC) are higher and higher, and a data acquisition system is required to have high sampling rate and high sampling precision. In practical application, the method has extremely high dependence on real-time sampling rate and sampling precision. However, the maximum sampling rate of an ADC is limited by its resolution, which is a pair of spears between resolution and sampling rate, high sampling rate requires shorter conversion time, and high resolution requires longer conversion time. In order to achieve a higher sampling rate according to the current IC design process, it is necessary to develop an ADC module based on a new structure and a new method. The system capable of realizing ultra-high-speed sampling provided by the prior art is an ADC system (TIADC) using a Time-interleaved (Time-interleaved) structure.
ADC system with the structure has the same sampling rate f by using M chipssThe single ADC modules adopt a parallel structure, and each ADC module is separated by 1/(M f)s) Is sampled at intervals to achieve a sampling rate of M fs(total sampling rate f. M. fs) The effect of (1). Theoretically, the ADC system with M channels sampling in parallel and alternately can enable the sampling rate of the whole system to reach M times of that of a single ADC module. However, due to the inherent disadvantages of the manufacturing process, it is impossible to make each ADC module exactly the same, so that there is a mismatch error between the ADC modules of each channel, and each ADC has its own differential and integral non-linear characteristics, thereby severely reducing the signal-to-noise ratio of the whole ADC system.
Currently, most methods estimate and correct mainly for linear mismatches, such as gain errors, time errors, etc., and some methods estimate and correct for mismatches caused by integral and differential nonlinearities of the analog-to-digital converter (ADC) itself. However, to improve the overall performance of the TIADC, both linear and non-linear mismatches should be taken into account and estimated and corrected. In order to improve the sampling rate of the system to adapt to wider application scenarios, expanding two channels to four or more sampling channels is an effective method with research and research value. Of course, the expansion of the number of sampling channels entails more complicated aliasing errors to be analyzed and corresponding correction algorithms to be designed to compensate.
Disclosure of Invention
The invention provides a combined correction method for linear mismatch and nonlinear mismatch of a four-channel TIADC (time aligned converter), aiming at solving the technical defect of poor correction effect caused by only estimating and compensating linear mismatch errors or nonlinear mismatch errors by the existing TIADC technology.
In order to realize the purpose, the technical scheme is as follows:
a method for joint correction of linear and nonlinear mismatches in a four-channel TIADC includes the steps of:
s1, setting an input signal x (t) to meet the Nyquist sampling theorem, and acquiring the output y [ n ] of a 4-TIADCs system by adopting slight oversampling;
s2, determining the order P of a channel frequency response function, and using a P-order polynomial to characterize the linear frequency response mismatch of the 4-TIADCs system: the discrete frequency response function time domain expression of each channel of the system is
Figure BDA0001538541110000021
M is more than or equal to 0 and less than or equal to 3, wherein alpham,pIs the coefficient of a p-th order polynomial of the mth channel, dp[n]Is a p-stage discrete differentiator;
s3. order
Figure BDA0001538541110000022
Figure BDA0001538541110000023
The expected linearity error can be expressed as
Figure BDA0001538541110000024
Wherein xp[n]＝dp[n]*x[n]；x[n]Is the input to the 4-TIADCs system;
s4, making a linear error coefficient
Figure BDA0001538541110000025
P is 0-1, assuming that it has an estimate of P-1 at a certain time
Figure BDA0001538541110000026
Using y [ n ]]Approximately substitute for x [ n ] in step S3]Reconstructing the linear error to obtain an estimated value of the linear error at a certain time as
Figure BDA0001538541110000027
Wherein
Figure BDA0001538541110000028
yp[n]＝dp[n]*y[n]；
S5, determining the order L of the nonlinear transfer function, and representing by using Taylor seriesNonlinear mismatch characteristic of 4-TIADCs system channel, nonlinear transfer characteristic function of each channel of the system
Figure BDA0001538541110000029
M is more than or equal to 0 and less than or equal to 3, wherein
Figure BDA00015385411100000210
Coefficient, x, of the l-th order of the taylor polynomial of the mth channel of a 4-TIADCs systeml[n]Represents x [ n ]]To the power of l;
s6. order
Figure BDA0001538541110000031
Figure BDA0001538541110000032
The desired non-linearity error can be expressed as:
Figure BDA0001538541110000033
s7, enabling the nonlinear error coefficient
Figure BDA0001538541110000034
L is 2. ltoreq. L, assuming that the estimated value at a certain time is
Figure BDA0001538541110000035
Using y [ n ]]Approximately substitute for x [ n ] in step S6]The nonlinear error is reconstructed to obtain an estimated value of the nonlinear error at a certain moment
Figure BDA0001538541110000036
Wherein
Figure BDA0001538541110000037
yl[n]Represents y [ n ]]To the power of l;
s8, utilizing output y [ n ] of 4-TIADCs system]Subtracting the linear mismatch error reconstructed in the step S4 and the nonlinear mismatch error reconstructed in the step S7 to obtain a compensated result
Figure BDA0001538541110000038
Making an output, i.e. a corrected output at a certain moment
Figure BDA0001538541110000039
Preferably, the estimated value of the linear error coefficient in the step S4
Figure BDA00015385411100000310
And the estimated value of the nonlinear error coefficient in S7
Figure BDA00015385411100000311
The specific estimation process of (2) is as follows:
designing a corresponding high-pass filter f [ n ]]Make the high-pass filter f [ n ]]Is higher than the cut-off frequency of the ideal sampling signal, defining a cost function
Figure BDA00015385411100000312
Wherein
Figure BDA00015385411100000313
When in use
Figure BDA00015385411100000314
And is
Figure BDA00015385411100000315
When is equal to epsilon [ n ]]→ 0, to design NLMS algorithm for linear error coefficient RpAnd a nonlinear error coefficient SlPerforming iterative estimation, wherein the iterative formula is as follows:
Figure BDA00015385411100000316
Figure BDA00015385411100000317
wherein mutAnd muhIs the convergence factor, cont is a very small positive number, avoiding the zero division problem.
Preferably, the differentiator used in the step S3 is a linear phase digital differentiator.
Compared with the prior art, the invention has the beneficial effects that:
the invention solves the technical defect of poor correction effect caused by that the existing TIADC technology only estimates and compensates linear mismatch errors or non-linear mismatch errors independently, and compared with dual-channel sampling, the sampling speed can be improved by expanding the sampling channel to four channels to adapt to wider application scenes. The invention provides a method for jointly correcting linear mismatch and nonlinear mismatch of a four-channel time-interleaved analog-to-digital converter (4-TIADC). according to the method, an ideal input signal is slightly oversampled through the 4-TIADC, a frequency response polynomial of a proper order and the linear mismatch characteristic and the nonlinear mismatch characteristic of a Taylor series representation system are respectively adopted, mismatch information on an oversampling band is output by the 4-TIADC system, and real-time edge estimation and edge compensation are designed to be carried out on linear mismatch errors and nonlinear mismatch errors in parallel based on a normalized least mean square error (NLMS) algorithm, so that joint correction output is obtained. The method takes the linear and nonlinear errors of the 4-TIADC system into consideration and adopts a parallel combined correction technology, thereby obtaining a better correction effect of compensating for any single error. The method has the advantages of more comprehensive consideration of mismatch errors of the TIADC system, simplicity, feasibility and good compensation effect.
Drawings
Fig. 1 is a schematic diagram of a time-interleaved analog-to-digital converter.
FIG. 2 is a schematic diagram of a four-channel TIADC model with linear and non-linear mismatches.
Fig. 3 is a basic block diagram of the joint correction method provided by the present invention.
Fig. 4 is a schematic diagram of an implementation of the adaptive joint correction method provided by the present invention.
FIG. 5 is a flow chart of a calibration method.
Detailed Description
The drawings are for illustrative purposes only and are not to be construed as limiting the patent;
the invention is further illustrated below with reference to the figures and examples.
Example 1
As shown in fig. 5, the method provided by the present invention specifically includes the following steps:
s1, setting an input signal x (t) to meet the Nyquist sampling theorem, and acquiring the output y [ n ] of a 4-TIADCs system by adopting slight oversampling;
s2, determining the order P of a channel frequency response function, and using a P-order polynomial to characterize the linear frequency response mismatch of the 4-TIADCs system: the discrete frequency response function time domain expression of each channel of the system is
Figure BDA0001538541110000051
M is more than or equal to 0 and less than or equal to 3, wherein alpham,pIs the coefficient of a p-th order polynomial of the mth channel, dp[n]Is a p-stage discrete differentiator;
s3. order
Figure BDA0001538541110000052
Figure BDA0001538541110000053
The expected linearity error can be expressed as
Figure BDA0001538541110000054
Wherein xp[n]＝dp[n]*x[n]；
S4. order
Figure BDA0001538541110000055
Assume that it has an estimated value of
Figure BDA0001538541110000056
Using y [ n ]]Approximately substitute for x [ n ] in step S3]Reconstructing the linear error to obtain an estimated value of the linear error at a certain time as
Figure BDA0001538541110000057
Wherein
Figure BDA0001538541110000058
yp[n]＝dp[n]*y[n]；
S5, determining the order L of a nonlinear transfer function, and representing the nonlinear mismatch characteristic of the 4-TIADCs system channel by using the Taylor series, namely the nonlinear transmission characteristic function of each channel of the system
Figure BDA0001538541110000059
M is more than or equal to 0 and less than or equal to 3, wherein
Figure BDA00015385411100000510
Coefficient, x, of the l-th order of the taylor polynomial of the mth channel of a 4-TIADCs systeml[n]Represents x [ n ]]To the power of l;
s6. order
Figure BDA00015385411100000511
Figure BDA00015385411100000512
The expected non-linearity error can be expressed as
Figure BDA00015385411100000513
Wherein v [ n ]]＝x[n]+et[n]Representing the discrete signal of samples of the input signal as a function of the channel frequency response, due to error et[n]Relative input signal x [ n ]]Are very small, so that they add up e under power operationt[n]Can be ignored, i.e. vl[n]＝(x[n]+et[n])l≈xl[n]Then the expected non-linearity error can be approximately expressed as
Figure BDA0001538541110000061
S7. order
Figure BDA0001538541110000062
Assume that the estimated value at a certain time is
Figure BDA0001538541110000063
Using y [ n ]]Approximately substitute for x [ n ] in step S6]Reconstructing the nonlinear error to obtain the nonlinear error at a certain momentThe difference is estimated as
Figure BDA0001538541110000064
Wherein
Figure BDA0001538541110000065
yl[n]Represents y [ n ]]To the power of l;
s8, utilizing output y [ n ] of 4-TIADCs system]Subtracting the linear mismatch error reconstructed in the step S4 and the nonlinear mismatch error reconstructed in the step S7 to obtain a compensated result
Figure BDA0001538541110000066
Making an output, i.e. a corrected output at a certain moment
Figure BDA0001538541110000067
In a specific implementation, the estimated value of the linear error coefficient in step S4
Figure BDA0001538541110000068
And the estimated value of the nonlinear error coefficient in S7
Figure BDA0001538541110000069
The specific estimation process of (2) is as follows:
designing a corresponding high-pass filter f [ n ]]Make the high-pass filter f [ n ]]Is higher than the cut-off frequency of the ideal sampling signal, defining a cost function
Figure BDA00015385411100000610
Wherein
Figure BDA00015385411100000611
When in use
Figure BDA00015385411100000612
And is
Figure BDA00015385411100000613
When is equal to epsilon [ n ]]→ 0, to design NLMS algorithm for linear error coefficient RpAnd a nonlinear error coefficient SlPerforming iterative estimation, wherein the iterative formula is as follows:
Figure BDA00015385411100000614
Figure BDA00015385411100000615
wherein mutAnd muhIs the convergence factor, cont is a very small positive number, avoiding the zero division problem.
Example 2
In this example, a specific experiment was performed based on example 1:
as shown in fig. 1, which is a schematic structural diagram of a time-interleaved analog-to-digital converter, an input signal is input in M channels, each channel samples a high-speed input signal at the same sampling rate but different sampling times (different time between adjacent channels), and finally an output signal is combined, so as to implement analog-to-digital conversion of high-speed sampling. The experiment of this embodiment tests a narrow-band input signal, and obtains the TIADC output y [ n ] before correction by using a 22-frequency multi-tone sinusoidal signal as an input through the four-channel TIADC system shown in fig. 2.
The linear mismatch of the TIADC system is modeled by using a 3-order frequency response polynomial, that is, P is 3, and the channel frequency response function is approximated by using a 3-order (that is, P is 3) linear polynomial, so that the linear error parameter is: r0＝[0.005,0.003,0.01]T，R1＝[-0.01,0.02,-0.003]T，R2＝[0.001,-0.001,0.004]TA first-order differentiator of 40 th order is designed by utilizing a fdantol filter design tool package of matlab, and a higher differentiator is obtained through convolution operation.
The nonlinear characteristic is also described by using a nonlinear polynomial of order 3 (i.e., L ═ 3), and the parameters of each channel are set as follows:
Figure BDA0001538541110000071
Figure BDA0001538541110000072
obtaining a nonlinear error parameter of S2＝10-4[2,-1.5,-3,-0.5]T，S3＝10-4[1.75,-0.75,1.75,2.25]T。
Fig. 3 is a basic block diagram of the embodiment, a parallel method is used to jointly estimate and correct linear mismatch and nonlinear mismatch, fig. 4 is a specific schematic diagram of the adaptive joint correction method, and a convergence factor μ is sett＝0.005,μhA high pass filter of order 40 was designed using the fdatool toolkit, 0.0005.
The iterative process of linear mismatch parameters and nonlinear mismatch parameters is observed in the experimental process, the change amplitude of the convergence curve is larger at the beginning, but the change amplitude is larger from the sampling data point to 104Then, the convergence state is basically achieved, and the main influence parameters can be converged to accurate values within the error tolerance range.
Before the signal is not corrected, there are many signal spikes generated due to aliasing mismatch, that is, there are a lot of noise spikes, and the existence of nonlinear mismatch causes the rise of error plane (at-75 dBc), and the SFDR (spurious free dynamic range) is 34.08dBc at this time, and the SNR is 31.8631 dB. After correction, the signal peak generated by mismatch basically disappears, the noise spectrum is suppressed, the error plane is reduced to-100 dBc from the previous-75 dBc, the corrected SFDR is 54.451dBc, and the SNR is 52.0186dB, and the expected correction effect is basically achieved.
Example 3
In this example, a specific experiment was performed using the same system parameters, differentiator and high-pass filter as those in example 2, based on example 1:
in the experimental test of the present embodiment, a gaussian white noise with a mean value of zero and a variance of 1 is used to pass through a fdatool tool to obtain 0-0.8 fs(fsSampling frequency of the system) low-pass filter (satisfying the system)Oversampling condition), the resulting signal is used as input to the TIADC, and the TIADC output y [ n ] before correction is obtained by the four-channel TIADC system shown in fig. 2].
Setting a convergence factor mut＝0.1,μh0.01, and converting the signal y [ n ]]Through the specific implementation schematic diagram of the adaptive joint correction method shown in fig. 4, the iterative process of the linear mismatch parameter and the nonlinear mismatch parameter is observed in the experimental process, and the change amplitude of the convergence curve is relatively large at the beginning, but the convergence curve is 10 from the sampling data point4Then, the convergence state is basically achieved, and the main influence parameters can be converged to accurate values within the error tolerance range.
Before the signal is not corrected, error signal energy is generated on an oversampling band without the signal energy due to the existence of linear and nonlinear errors, the error plane is approximately-88.99 dBc, and the SNR (signal to noise ratio) is 34.7593 dB; after correction, the error plane on the oversampling band is reduced to about-120 dBc, and the corrected signal-to-noise ratio SNR is 61.2817dB, so that the correction effect is better.
It should be understood that the above-described embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention should be included in the protection scope of the claims of the present invention.

Claims (3)

1. A joint correction method for linear mismatch and nonlinear mismatch of a four-channel TIADC is characterized in that: the method comprises the following steps:
s1, setting an input signal x (t) to meet the Nyquist sampling theorem, and acquiring the output y [ n ] of a 4-TIADCs system by adopting slight oversampling;
s2, determining the order P of a channel frequency response function, and using a P-order polynomial to characterize the linear frequency response mismatch of the 4-TIADCs system: the discrete frequency response function time domain expression of each channel of the system is
Figure FDA0002935377700000011
Wherein alpha ism,pIs the coefficient of a p-th order polynomial of the mth channel, dp[n]Is a p-stage discrete differentiator;
s3. order
Figure FDA0002935377700000012
Figure FDA0002935377700000013
The expected linearity error can be expressed as
Figure FDA0002935377700000014
Wherein xp[n]＝dp[n]*x[n]；x[n]Is the input to the 4-TIADCs system;
s4, making a linear error coefficient
Figure DEST_PATH_BDA0001538541110000025
P is more than or equal to 0 and less than or equal to P-1, and the estimated value of the P at a certain time is assumed to be
Figure FDA0002935377700000016
Using y [ n ]]Approximately substitute for x [ n ] in step S3]Reconstructing the linear error to obtain an estimated value of the linear error at a certain time as
Figure FDA0002935377700000017
Wherein
Figure FDA0002935377700000018
yp[n]＝dp[n]*y[n]；
S5, determining the order L of a nonlinear transfer function, and representing the nonlinear mismatch characteristic of the 4-TIADCs system channel by using the Taylor series, namely the nonlinear transmission characteristic function of each channel of the system
Figure FDA0002935377700000019
Wherein
Figure FDA00029353777000000110
Coefficient, x, of the l-th order of the taylor polynomial of the mth channel of a 4-TIADCs systeml[t]Represents x [ t ]]To the power of l;
s6. order
Figure FDA0002935377700000021
Figure FDA0002935377700000022
The desired non-linearity error can be expressed as:
Figure FDA0002935377700000023
s7, enabling the nonlinear error coefficient
Figure FDA0002935377700000024
L is 2. ltoreq. L, assuming that the estimated value at a certain time is
Figure FDA0002935377700000025
Using y [ n ]]Approximately substitute for x [ n ] in step S6]The nonlinear error is reconstructed to obtain an estimated value of the nonlinear error at a certain moment
Figure FDA0002935377700000026
Wherein
Figure FDA0002935377700000027
yl[n]Represents y [ n ]]To the power of l;
s8, utilizing output y [ n ] of 4-TIADCs system]Subtracting the linear mismatch error reconstructed in the step S4 and the nonlinear mismatch error reconstructed in the step S7 to obtain a compensated result
Figure FDA0002935377700000028
Making an output, i.e. a corrected output at a certain moment
Figure FDA0002935377700000029
2. The method of claim 1, wherein the method comprises: the estimated value of the linear error coefficient in the step S4
Figure FDA00029353777000000210
And the estimated value of the nonlinear error coefficient in S7
Figure FDA00029353777000000211
The specific estimation process of (2) is as follows:
designing a corresponding high-pass filter f [ n ]]Make the high-pass filter f [ n ]]Is higher than the cut-off frequency of the ideal sampling signal, defining a cost function
Figure FDA00029353777000000212
Wherein
Figure FDA00029353777000000213
When in use
Figure FDA00029353777000000214
And is
Figure FDA00029353777000000215
When is equal to epsilon [ n ]]→ 0, to design NLMS algorithm for linear error coefficient RpAnd a nonlinear error coefficient SlPerforming iterative estimation, wherein the iterative formula is as follows:
Figure FDA00029353777000000216
Figure FDA00029353777000000217
wherein mutAnd muhIs the convergence factor, cont is a very small positive number, avoiding the zero division problem.
3. The method of claim 1, wherein the method comprises: the differentiator used in the step S3 is a linear phase digital differentiator.
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