CN107978266A - Drive signal generation circuit and method, display system - Google Patents
Drive signal generation circuit and method, display system Download PDFInfo
- Publication number
- CN107978266A CN107978266A CN201810060427.9A CN201810060427A CN107978266A CN 107978266 A CN107978266 A CN 107978266A CN 201810060427 A CN201810060427 A CN 201810060427A CN 107978266 A CN107978266 A CN 107978266A
- Authority
- CN
- China
- Prior art keywords
- signal
- drive signal
- compared
- goa
- frameworks
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
This disclosure relates to technical field of integrated circuits, more particularly to a kind of drive signal generation circuit, drive signal generation method, display system.The drive signal generation circuit includes：First comparator, for being compared the first input signal of initial signal and a predetermined level to generate comparison signal；Computing circuit, for the comparison signal and an original drive signal performs or computing, to generate a target drives signal.The disclosure avoids the target drives signal at the power supply signal end acted in GOA frameworks from abnormal phenomenon occur, and then avoids display system from occurring sweeping screen phenomenon.
Description
Technical field
This disclosure relates to technical field of integrated circuits, more particularly to the generation of a kind of drive signal generation circuit, drive signal
Method, display system.
Background technology
With the development of optical technology and semiconductor technology, with liquid crystal display (Liquid Crystal Display,
LCD) and organic light emitting diode display (Organic Light Emitting Diode, OLED) be representative FPD
Utensil has the features such as frivolous, energy consumption is low, reaction speed is fast, excitation purity is good and contrast is high, is occupied in display field leading
Status.Display device presented the development trend of high integration and low cost in recent years.Driven with array base palte row
(Gate Driver on Array, GOA) technology is representative, and gate driving circuit is integrated in array base palte using GOA technologies
Neighboring area, while narrow frame design is realized, can effectively reduce manufacture cost, the lifting module technique production of display device
Amount.
At present, in order to ensure the resistance to degree of the letter of GOA products, frequently with the GOA frameworks for including two power supply signal ends.For example,
Including two power supply signal ends, an initial signal end and six clock signal terminals, and the GOA being made of N-type transistor
In framework, when the Vtotal of display system is less than normal (during such as switching on and shutting down), it may appear that drive signal (acts on power supply signal
The signal at end) phenomenon that is not driven high before the rising edge of initial signal, i.e., letter is driven before the rising edge of initial signal
Number it is low level, and then when display system performs switching on and shutting down operation, it may appear that sweep screen (AD, Abnormal Display) etc. no
Good phenomenon.There is also similar problem for the GOA frameworks formed for P-type transistor.
From the foregoing, it will be observed that when display system performs switching on and shutting down operation, since abnormal phenomenon occurs in drive signal, cause to show
Show that system occurs sweeping the bad phenomenons such as screen (AD, Abnormal Display).
It should be noted that information is only used for strengthening the reason to the background of the disclosure disclosed in above-mentioned background section
Solution, therefore can include not forming the information to the prior art known to persons of ordinary skill in the art.
The content of the invention
The purpose of the disclosure is to provide a kind of drive signal generation circuit, drive signal generation method, display system, with
Solve the problems, such as that drive signal is abnormal so that display system occurs sweeping screen (AD, Abnormal Display) phenomenon.
According to one aspect of the disclosure, there is provided a kind of drive signal generation circuit, for believing for the power supply in GOA frameworks
Number end provide drive signal, including：
First comparator, is compared for being compared the first input signal of initial signal and a predetermined level with generating
Signal；
Computing circuit, for the comparison signal and original a drive signal execution or computing, being driven with generating a target
Dynamic signal.
In a kind of exemplary embodiment of the disclosure, the drive signal generation circuit further includes：
Second comparator, is inputted for being compared one second input signal and a reference signal with generating described first
Signal.
It is described by initial signal and the first input signal of a predetermined level in a kind of exemplary embodiment of the disclosure
Be compared is included with generating comparison signal：
If the switching transistor in the GOA frameworks is N-type transistor, by the initial signal and a high level
First input signal is compared to generate the comparison signal.
It is described by initial signal and the first input signal of a predetermined level in a kind of exemplary embodiment of the disclosure
Be compared is included with generating comparison signal：
If the switching transistor in the GOA frameworks is P-type transistor, and the initial signal and one is low level
First input signal is compared to generate the comparison signal.
In a kind of exemplary embodiment of the disclosure, if the switching transistor in the GOA frameworks is N-type crystal
Pipe, then second input signal is more than the reference signal；Or
If the switching transistor in the GOA frameworks is P-type transistor, second input signal is less than the ginseng
Examine signal.
According to one aspect of the disclosure, there is provided a kind of drive signal generation method, for believing for the power supply in GOA frameworks
Number end provide drive signal, including：
The first input signal of initial signal and a predetermined level is compared using first comparator and is compared with generating
Signal；
Using computing circuit is to the comparison signal and an original drive signal performs or computing, to generate a target drives
Signal.
In a kind of exemplary embodiment of the disclosure, the method further includes：
One second input signal and a reference signal are compared to generate first input using the second comparator
Signal.
It is described to utilize first comparator by initial signal and a predetermined level in a kind of exemplary embodiment of the disclosure
The first input signal be compared and included with generating comparison signal：
If the switching transistor in the GOA frameworks is N-type transistor, described will be risen using the first comparator
First input signal of beginning signal and a high level is compared to generate the comparison signal.
It is described to utilize first comparator by initial signal and a predetermined level in a kind of exemplary embodiment of the disclosure
The first input signal be compared and included with generating comparison signal：
If the switching transistor in the GOA frameworks is P-type transistor, described will be risen using the first comparator
Beginning signal and low level first input signal are compared to generate the comparison signal.
According to one aspect of the disclosure, there is provided a kind of display system, including：Driving letter described in above-mentioned middle any one
Number generative circuit.
A kind of drive signal generation circuit of exemplary embodiment offer of the disclosure, drive signal generation method, display system
System.The drive signal generation circuit includes first comparator and computing circuit, by by the of initial signal and a predetermined level
One input signal is compared generation and compares letter, and generates a mesh to comparison signal and original a drive signal execution or computing
Drive signal is marked, abnormal phenomenon occurs in the target drives signal at the power supply signal end for avoiding acting in GOA frameworks, and then avoids
Display system occurs sweeping screen phenomenon.
Brief description of the drawings
It is described in detail its exemplary embodiment by referring to accompanying drawing, the above and other feature and advantage of the disclosure will become
Obtain more obvious.It should be evident that drawings in the following description are only some embodiments of the present disclosure, it is common for this area
For technical staff, without creative efforts, other attached drawings can also be obtained according to these attached drawings.Attached
In figure：
Fig. 1 is the schematic diagram of GOA frameworks in one correlation technique of the disclosure；
Fig. 2 is the structure diagram of the drive signal generation circuit provided in one exemplary embodiment of the disclosure；
Fig. 3 is the sequence diagram provided in one exemplary embodiment of the disclosure；
Fig. 4 is the sequence diagram provided in disclosure another exemplary embodiment；
Fig. 5 is the structure diagram of the second comparator provided in one exemplary embodiment of the disclosure.
Embodiment
Example embodiment is described more fully with referring now to attached drawing.However, example embodiment can be real in a variety of forms
Apply, and be not understood as limited to embodiment set forth herein；On the contrary, these embodiments are provided so that the disclosure will be comprehensively and complete
It is whole, and the design of example embodiment is comprehensively communicated to those skilled in the art.Described feature, structure or characteristic can
To be incorporated in any suitable manner in one or more embodiments.In the following description, there is provided many details from
And provide and embodiment of the disclosure is fully understood.It will be appreciated, however, by one skilled in the art that the disclosure can be put into practice
Technical solution is without one or more in the specific detail, or can use other methods, constituent element, material, dress
Put, step etc..In other cases, it is not shown in detail or describes each side of the known solution to avoid the fuzzy disclosure.
In addition, attached drawing is only the schematic illustrations of the disclosure, not necessarily it is drawn to scale.Identical attached drawing in figure
Mark identifies the same or similar part, thus will omit repetition thereof.
A kind of schematic diagram of GOA frameworks in correlation technique is shown in Fig. 1, which includes two power supply signal ends
(the first power supply signal end and second source signal end), initial signal end and six clock signal terminals, two of which power supply
Signal end receives drive signal, i.e. the first power supply signal end receives the first drive signal VDD1, second source signal end reception the
Two driving signal VDD2, initial signal end receive initial signal STV, and six clock signal terminals receive the first clock signal extremely respectively
6th 1~CLK6 of clock signal clk.VDD1, VDD2, STV, CLK1~CLK6 for needing to illustrate are by TCON (timing
Controller time schedule controllers) export and inputted to the GOA frameworks.
However, for example, GOA frameworks for being formed in Fig. 1 and by N-type transistor, less than normal in the Vtotal of display system
When (during such as switching on and shutting down), it may appear that drive signal (i.e. VDD1 and VDD2) is not drawn before the rising edge of initial signal STV
High phenomenon, i.e., drive signal is low level before the rising edge of initial signal STV, and then performs switching on and shutting down in display system
During operation, it may appear that sweep the bad phenomenons such as screen (AD, Abnormal Display), the GOA frameworks formed for P-type transistor
There are similar problem.In conclusion when display system performs switching on and shutting down operation, abnormal phenomenon occurs in drive signal, into
And display system is caused to occur sweeping the bad phenomenons such as screen (AD, Abnormal Display).
In order to avoid when display system performs switching on and shutting down operation, there is abnormal phenomenon in drive signal, and then causes to show
System occurs putting down phenomenon, this example embodiment provides a kind of drive signal generation circuit, for for the electricity in GOA frameworks
Source signal end provides drive signal, as shown in Fig. 2, the drive signal generation circuit can include：First comparator 10 and computing
Circuit 20, wherein：
First comparator 10, for by the first input signal V1 of initial signal STV and a predetermined level be compared with
Generate comparison signal V2.
In the present example embodiment, the initial signal STV and the first input signal V1 compares for described first
The input signal of device 10, control signal V2 are the output signal of the first comparator 10.The initial signal STV is defeated by TCON
Go out, it is with high level and low level, and low level of the level of the first input signal V1 more than initial signal STV is less than starting
The high level of signal STV.
The predetermined level can be high level, can also be low level, specifically by the switching transistor in GOA frameworks
Determine.
For example, if the switching transistor in GOA frameworks is N-type transistor, predetermined level is high level, i.e., first
Input signal V1 is high level, it is necessary to which explanation, the high level of the first input signal V1 is low more than initial signal STV at this time
Level is less than the high level of initial signal STV.On this basis, as shown in figure 3, by the initial signal STV and a high level
The first input signal V1 be compared to generate the comparison signal V2.Specifically, due to the first input signal V1's
Low level of the high level more than initial signal STV is less than the high level of initial signal STV, is low electricity in initial signal STV therefore
Usually, comparison signal V2 is high level, when initial signal STV is from low transition to high level, i.e., initial signal STV's
During rising edge, comparison signal V2 ultimately generates comparison signal V2 as shown in Figure 3, this compares by high level saltus step low level
Signal V2 is high level before the rising edge of initial signal STV, is low level after the rising edge of initial signal STV.
For another example if the switching transistor in GOA frameworks is P-type transistor, predetermined level is low level, i.e.,
One input signal V1 is low level, it is necessary to which explanation, the low level of the first input signal V1 is more than initial signal STV's at this time
Low level is less than the high level of initial signal STV.On this basis, as shown in figure 4, by the low electricity of the initial signal STV and one
Flat the first input signal V1 is compared to generate the comparison signal V2.Specifically, due to the first input signal V1
Low level more than initial signal STV low level be less than initial signal STV high level, therefore, initial signal STV for height
During level, comparison signal V2 is low level, when initial signal STV is from high level saltus step to low level, i.e., in initial signal STV
Trailing edge when, comparison signal V2 ultimately generates comparison signal V2 as shown in Figure 4, the ratio by low transition high level
Before the trailing edge of initial signal STV it is low level compared with signal V2, is high level after the trailing edge of initial signal STV.
Computing circuit 20, for the original drive signal VDD of the comparison signal V2 and one perform or computing, to generate one
Target drives signal VDD'.
In the present example embodiment, the original drive signal VDD is exported by TCON, for example, being Fig. 1 in GOA frameworks
In show GOA frameworks when, original drive signal VDD can be the first original original drive signals of drive signal VDD1 or second
VDD2, i.e., when original drive signal VDD is the first original drive signal VDD1, the target drives signal VDD' of generation be used for
The first power supply signal end in Fig. 1 provides drive signal, when original drive signal VDD is the second original drive signal VDD2,
The second source signal end that the target drives signal VDD' of generation is used for into Fig. 1 provides drive signal.
The sequence diagram of the target drives signal VDD' is carried out by the sequence diagram of comparison signal V2 and original drive signal VDD
Determine.
For example, if the switching transistor in GOA frameworks is N-type transistor, to the comparison signal V2 and original in Fig. 3
Beginning drive signal VDD is performed or computing is to generate target drives signal VDD', and target drives signal VDD' is inputted to GOA framves
Power supply signal end in structure.It can be seen that since comparison signal V2 is high level before the rising edge of initial signal STV,
It is low level after the rising edge of initial signal STV, and original drive signal VDD is before the rising edge of initial signal STV
It is high level after the rising edge of initial signal STV for low level, therefore, the target drives signal VDD' ultimately generated exists
Be high level before and after the rising edge of initial signal STV, i.e. risings of the target drives signal VDD' in initial signal STV
Along before be driven high, compared with the prior art, avoid occur target drives signal VDD' initial signal STV rising edge it
The preceding phenomenon not being driven high, so that when display system performs switching on and shutting down when operation, avoids the generation for sweeping screen phenomenon.
For another example if the switching transistor in GOA frameworks is P-type transistor, to the comparison signal V2 in Fig. 4 and
Original drive signal VDD is performed or computing is to generate target drives signal VDD', and target drives signal VDD' is inputted to GOA
Power supply signal end in framework.It can be seen that since comparison signal V2 is low electricity before the trailing edge of initial signal STV
It is flat, be high level after the trailing edge of initial signal STV, and original drive signal VDD initial signal STV trailing edge it
Preceding is high level, is low level after the trailing edge of initial signal STV, therefore, the target drives signal VDD' ultimately generated
It is low level before and after the trailing edge of initial signal STV, i.e., target drives signal VDD' is under initial signal STV
Drop is pulled low before, compared with the prior art, avoids the trailing edge for target drives signal VDD' occur in initial signal STV
The phenomenon not being pulled low before, so that when display system performs switching on and shutting down when operation, avoids the generation for sweeping screen phenomenon.
In conclusion by the way that the first input signal V1 of initial signal STV and a predetermined level is compared generation ratio
A target drives signal VDD' is generated compared with letter V2, and to the original drive signal VDD of comparison signal V2 and one execution or computing, is kept away
There is abnormal phenomenon in the target drives signal VDD' at the power supply signal end for exempting to act in GOA frameworks, and then avoids display system
Screen phenomenon is swept in appearance.
In addition, as shown in figure 5, the first input signal V1 can be generated by one second comparator 30, second ratio
Compared with device 30, can be used for one second input signal VIN and a reference signal VREF being compared to generate first input
Signal V1.
In the present example embodiment, the magnitude relationship root of the second input signal VIN and the reference signal VREF
Determined according to the switching transistor in GOA frameworks.
If for example, the switching transistor in the GOA frameworks is N-type transistor, the second input signal VIN is big
In the reference signal VREF, so that the first input signal V1 is high level signal.
If for another example the switching transistor in the GOA frameworks were P-type transistor, the second input signal VIN
Less than the reference signal VREF, so that the first input signal V1 is low level signal.
A kind of drive signal generation method is additionally provided in disclosure exemplary embodiment, for for the electricity in GOA frameworks
Source signal end provides drive signal, and this method can include：
The first input signal of initial signal and a predetermined level is compared using first comparator and is compared with generating
Signal；
Using computing circuit is to the comparison signal and an original drive signal performs or computing, to generate a target drives
Signal.
In disclosure exemplary embodiment, the method can also include：
One second input signal and a reference signal are compared to generate first input using the second comparator
Signal.
It is described defeated by the first of initial signal and a predetermined level using first comparator in disclosure exemplary embodiment
Entering signal and being compared can be included with generating comparison signal：
If the switching transistor in the GOA frameworks is N-type transistor, described will be risen using the first comparator
First input signal of beginning signal and a high level is compared to generate the comparison signal.
It is described defeated by the first of initial signal and a predetermined level using first comparator in disclosure exemplary embodiment
Entering signal and being compared can be included with generating comparison signal：
If the switching transistor in the GOA frameworks is P-type transistor, described will be risen using the first comparator
Beginning signal and low level first input signal are compared to generate the comparison signal.
It is described if the switching transistor in the GOA frameworks is N-type transistor in disclosure exemplary embodiment
Second input signal is more than the reference signal；Or
If the switching transistor in the GOA frameworks is P-type transistor, second input signal is less than the ginseng
Examine signal.
Since each step of above-mentioned drive signal generation method has carried out specifically in drive signal generation circuit
It is bright, therefore details are not described herein again.
A kind of display system is also disclosed in disclosure exemplary embodiment, which includes：Drive described above
Dynamic signal generating circuit.The display device can for example include mobile phone, tablet computer, television set, laptop, digital phase
Any product or component with display function such as frame, navigator.
It should be noted that although some modules or list of the equipment for action executing are referred in above-detailed
Member, but this division is not enforceable.In fact, according to embodiment of the present disclosure, it is above-described two or more
Either the feature of unit and function can embody module in a module or unit.A conversely, above-described mould
Either the feature of unit and function can be further divided into being embodied by multiple modules or unit block.
In addition, although describing each step of method in the disclosure with particular order in the accompanying drawings, still, this does not really want
These steps must be performed according to the particular order by asking or implying, or the step having to carry out shown in whole could be realized
Desired result.It is additional or alternative, it is convenient to omit multiple steps are merged into a step and performed by some steps, and/
Or a step is decomposed into execution of multiple steps etc..
Those skilled in the art will readily occur to the disclosure its after considering specification and putting into practice invention disclosed herein
Its embodiment.This application is intended to cover any variations, uses, or adaptations of the disclosure, these modifications, purposes or
Person's adaptive change follows the general principle of the disclosure and including the undocumented common knowledge in the art of the disclosure
Or conventional techniques.Description and embodiments are considered only as exemplary, and the true scope and spirit of the disclosure are by appended
Claim is pointed out.
Claims (10)
1. a kind of drive signal generation circuit, for providing drive signal for the power supply signal end in GOA frameworks, its feature exists
In, including：
First comparator, compares letter for being compared the first input signal of initial signal and a predetermined level to generate
Number；
Computing circuit, for the comparison signal and original a drive signal execution or computing, being believed with generating a target drives
Number.
2. drive signal generation circuit according to claim 1, it is characterised in that the drive signal generation circuit also wraps
Include：
Second comparator, is believed for being compared one second input signal and a reference signal with generating first input
Number.
3. drive signal generation circuit according to claim 1, it is characterised in that described by initial signal and a default electricity
The first flat input signal is compared to be included with generating comparison signal：
If the switching transistor in the GOA frameworks is N-type transistor, by described in the initial signal and a high level
First input signal is compared to generate the comparison signal.
4. drive signal generation circuit according to claim 1, it is characterised in that described by initial signal and a default electricity
The first flat input signal is compared to be included with generating comparison signal：
It is if the switching transistor in the GOA frameworks is P-type transistor, the initial signal and one is low level described
First input signal is compared to generate the comparison signal.
5. drive signal generation circuit according to claim 2, it is characterised in that
If the switching transistor in the GOA frameworks is N-type transistor, second input signal is more than described with reference to letter
Number；Or
If the switching transistor in the GOA frameworks is P-type transistor, second input signal is less than described with reference to letter
Number.
6. a kind of drive signal generation method, for providing drive signal for the power supply signal end in GOA frameworks, its feature exists
In, including：
The first input signal of initial signal and a predetermined level is compared to generate comparison signal using first comparator；
Using computing circuit is to the comparison signal and an original drive signal performs or computing, to generate target drives letter
Number.
7. drive signal generation method according to claim 6, it is characterised in that the method further includes：
One second input signal and a reference signal are compared to generate first input signal using the second comparator.
8. drive signal generation method according to claim 6, it is characterised in that described to be originated using first comparator
First input signal of signal and a predetermined level is compared to be included with generating comparison signal：
If the switching transistor in the GOA frameworks is N-type transistor, the starting is believed using the first comparator
Number and first input signal of a high level be compared to generate the comparison signal.
9. drive signal generation method according to claim 6, it is characterised in that described to be originated using first comparator
First input signal of signal and a predetermined level is compared to be included with generating comparison signal：
If the switching transistor in the GOA frameworks is P-type transistor, the starting is believed using the first comparator
Number and low level first input signal be compared to generate the comparison signal.
A kind of 10. display system, it is characterised in that including：Drive signal generation in Claims 1 to 5 described in any one
Circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810060427.9A CN107978266B (en) | 2018-01-22 | 2018-01-22 | Driving signal generation circuit and method and display system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810060427.9A CN107978266B (en) | 2018-01-22 | 2018-01-22 | Driving signal generation circuit and method and display system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107978266A true CN107978266A (en) | 2018-05-01 |
| CN107978266B CN107978266B (en) | 2021-03-30 |
Family
ID=62006176
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810060427.9A Active CN107978266B (en) | 2018-01-22 | 2018-01-22 | Driving signal generation circuit and method and display system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107978266B (en) |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101144923A (en) * | 2006-09-12 | 2008-03-19 | 启萌科技有限公司 | Backlight module group drive control device and drive control method |
| CN101783117A (en) * | 2009-01-20 | 2010-07-21 | 联咏科技股份有限公司 | Grid electrode driver and display driver using the same |
| CN103475341A (en) * | 2013-09-16 | 2013-12-25 | 北京京东方光电科技有限公司 | Clock signal generation method, clock signal generation circuit and gate driving circuit |
| US20140204057A1 (en) * | 2013-01-23 | 2014-07-24 | Mstar Semiconductor, Inc. | Capacitive touch control system and driving apparatus thereof |
| CN104346305A (en) * | 2013-08-08 | 2015-02-11 | 联芯科技有限公司 | Method and system for supporting low-impedance SIM card by common SIM card controller |
| CN104795040A (en) * | 2015-04-30 | 2015-07-22 | 京东方科技集团股份有限公司 | Array substrate, display device and shutdown ghost improving circuit for display device |
| CN106297643A (en) * | 2016-10-28 | 2017-01-04 | 京东方科技集团股份有限公司 | A kind of source electrode drive circuit, source driving chip and display device |
| CN206020961U (en) * | 2016-09-12 | 2017-03-15 | 京东方科技集团股份有限公司 | Control circuit and electronic equipment |
| CN106782408A (en) * | 2017-02-16 | 2017-05-31 | 京东方科技集团股份有限公司 | Display panel, GOA circuits and its driving force adjusting means |
| CN106991988A (en) * | 2017-05-17 | 2017-07-28 | 深圳市华星光电技术有限公司 | The over-current protection system and method for GOA circuits |
-
2018
- 2018-01-22 CN CN201810060427.9A patent/CN107978266B/en active Active
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101144923A (en) * | 2006-09-12 | 2008-03-19 | 启萌科技有限公司 | Backlight module group drive control device and drive control method |
| CN101783117A (en) * | 2009-01-20 | 2010-07-21 | 联咏科技股份有限公司 | Grid electrode driver and display driver using the same |
| US20140204057A1 (en) * | 2013-01-23 | 2014-07-24 | Mstar Semiconductor, Inc. | Capacitive touch control system and driving apparatus thereof |
| CN104346305A (en) * | 2013-08-08 | 2015-02-11 | 联芯科技有限公司 | Method and system for supporting low-impedance SIM card by common SIM card controller |
| CN103475341A (en) * | 2013-09-16 | 2013-12-25 | 北京京东方光电科技有限公司 | Clock signal generation method, clock signal generation circuit and gate driving circuit |
| CN104795040A (en) * | 2015-04-30 | 2015-07-22 | 京东方科技集团股份有限公司 | Array substrate, display device and shutdown ghost improving circuit for display device |
| CN206020961U (en) * | 2016-09-12 | 2017-03-15 | 京东方科技集团股份有限公司 | Control circuit and electronic equipment |
| CN106297643A (en) * | 2016-10-28 | 2017-01-04 | 京东方科技集团股份有限公司 | A kind of source electrode drive circuit, source driving chip and display device |
| CN106782408A (en) * | 2017-02-16 | 2017-05-31 | 京东方科技集团股份有限公司 | Display panel, GOA circuits and its driving force adjusting means |
| CN106991988A (en) * | 2017-05-17 | 2017-07-28 | 深圳市华星光电技术有限公司 | The over-current protection system and method for GOA circuits |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107978266B (en) | 2021-03-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106504720B (en) | Shifting register unit and driving method thereof, grid driving device and display device | |
| US9275591B2 (en) | Liquid crystal display | |
| US10068658B2 (en) | Shift register unit, driving circuit and method, array substrate and display apparatus | |
| JP4425556B2 (en) | DRIVE DEVICE AND DISPLAY MODULE HAVING THE SAME | |
| CN107967888A (en) | Gate driving circuit and its driving method, display panel | |
| KR102277072B1 (en) | GOA circuit driving architecture | |
| US10204585B2 (en) | Shift register unit, gate driving device, display device and driving method | |
| US10923060B2 (en) | Shift register unit with power signal terminals having same frequencies and reverse phases, shift register circuit and display panel | |
| WO2016173017A1 (en) | Goa circuit having forward and reverse scan functions | |
| CN107909971B (en) | GOA circuit | |
| CN108962154A (en) | Shift register cell, array substrate gate driving circuit, display and grid drive method | |
| CN104282287A (en) | GOA unit and driving method thereof as well as GOA circuit and display device | |
| CN1369871A (en) | Shift register and liquid crystal display using same | |
| CN106920498B (en) | GIP circuit and its driving method and panel display apparatus | |
| KR20130023488A (en) | Scan driver and organic light emitting display device using thereof | |
| US20170032756A1 (en) | Stage circuit and scan driver using the same | |
| WO2016149994A1 (en) | Pmos gate drive circuit | |
| US11307707B2 (en) | Scan shift circuit, touch shift circuit, driving method and related apparatus | |
| CN107978294A (en) | Shift register cell, shift-register circuit, display panel | |
| CN101114432A (en) | Liquid crystal display and driving method thereof | |
| CN103903581A (en) | Liquid crystal display device and driving method thereof | |
| US10255843B2 (en) | Scan driving circuit and flat display device thereof | |
| CN108694915A (en) | Level shifting circuit, display device and driving method | |
| CN106601207A (en) | Control circuit, source control circuit, driving method, and display device | |
| US9240159B2 (en) | Timing controller and display apparatus having the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |