CN107505485A - Contact probe, semiconductor device testing apparatus and semiconductor element test method - Google Patents
Contact probe, semiconductor device testing apparatus and semiconductor element test method Download PDFInfo
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- CN107505485A CN107505485A CN201710286564.XA CN201710286564A CN107505485A CN 107505485 A CN107505485 A CN 107505485A CN 201710286564 A CN201710286564 A CN 201710286564A CN 107505485 A CN107505485 A CN 107505485A
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- contact
- semiconductor element
- contact probe
- probe
- contact surface
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/073—Multiple probes
- G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
- G01R1/07357—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with flexible bodies, e.g. buckling beams
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Measuring Leads Or Probes (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
The present invention realizes the low resistance contact relative to semiconductor element pad.Semiconductor device testing apparatus possesses contact probe (12), and the contact probe (12) contacts in placing when the semiconductor element (1) of testing stand (11) is tested with emitter stage pad (1b).Contact probe (12) is maintained on contact block (14) with the state separated with plunger pin (18), after contact block (14) declines, make contact probe (12) self uprights on the emitter stage pad (1b) of semiconductor element (1) first.Then, after contact block (14) declines, 1 plunger pin in plunger pin (18) abuts with the protuberance (12d) of contact probe (12), afterwards, other plunger pins (18) abut with the 1st contact surface (12b) around protuberance (12d).Contact probe (12), also can be by keeping its depth of parallelism with semiconductor element (1) to realize low-resistance contact even if being tilted to emitter stage pad (1b).
Description
Technical field
The present invention relates to contact probe, the semiconductor element used in a kind of dynamic characteristic test of semiconductor element (chip)
Part experimental rig and semiconductor element test method.
Background technology
The known semiconductor device testing apparatus tested semiconductor element dynamic characteristic, it typically is provided with experiment electricity
Road, contact block, contact pin and testing stand (for example, referring to patent document 1).Contact block is used as on hookup and testing stand
The component of the unit of semiconductor element electrical connection, has holding tray and base unit.Holding tray is located at placing semiconductor element
Testing stand above, keep multiple contact pins as the contact probe contacted with semiconductor element.The side connection of base unit
The wiring being connected with hookup, opposite side keep multiple plunger pins, the plunger pin in the state of load is applied to contact pin with
Another side contacts.
Semiconductor element is IGBT (Insulated Gate Bipolar Transistor：Insulated gate bipolar crystal
Pipe) as in the case of power device, there is gate pads, emitter stage pad, colelctor electrode pad.When being tested, make to touch
The gate pads and emitter stage pad of pin contacts semiconductor element, and make to be arranged at the electrode and collection of the hookup on testing stand
Electrode pad contacts.Semiconductor element is MOSFET (Metal-Oxide-Semiconductor Field-Effect
Transistor：Metal-Oxide Semiconductor field-effect transistor) in the case of, make contact pin contact gate pads and emitter stage
Pad, and the electrode of testing stand is contacted drain pad.Also, when semiconductor is FWD (Free Wheeling Diode：Afterflow
Diode) in the case of, make contact pin Contact cathod pad, and the electrode of testing stand is contacted anode bond pad.
Herein, contact pin is used as contact probe, is that semiconductor element (silicon etc.) melts because when semiconductor element destroys
Melt thing and be attached to probe front, it is therefore necessary to change probe.Thus, keeping the holding tray of contact pin, be arranged to can on base unit
Dismounting.When needing to change contact pin, holding tray is pulled down from base unit, the contact pin of damage is changed into contact pin preferably, again
It is installed on base unit.
Semiconductor device testing apparatus is when being tested, the assigned position configuring semiconductor member first on testing stand
Part, contact block is set to drop to optional position by moving up and down mechanism, so that contact pin contacts with semiconductor element.Now, touch
Sell and apply the load corresponding with the spring performance of plunger pin possessed spring to semiconductor element.The grid of semiconductor element
Pole, emitter stage (source electrode, negative electrode) pad are electrically connected by contact pin, plunger pin and wiring with hookup, colelctor electrode (drain electrode, sun
Pole) pad electrically connected by the electrode of testing stand and wiring with experimental circuit, progress electrical characteristics experiment.
Now, in order to the uniform electric current of semiconductor element application, voltage, it is necessary to uniformly configured on semiconductor element several
Ten contact pins.The contact pin radical configured on semiconductor element is increased and decreased according to test current.In addition, by cylindric contact pin and
When the contact face radius of semiconductor element is set to R, the sectional area of every is (π R^2), therefore as entirety, with (π R^2) × root
Number determines the contact area with semiconductor element of contact probe.
Herein, because unit in recent years is integrated and the accelerated development of performance boost (rated current raising), semiconductor element
The chip size of part has the tendency of to diminish.And even if chip size diminishes, also require that semiconductor element is carried out with low resistance contact,
And the experiment for the larger current that circulates.Therefore, need to lift the energization performance of contact probe as semiconductor device testing apparatus.Have
2 methods can lift the energization performance, and a method is the material for the contact resistance that selection reduces contact pin and semiconductor element,
Another method is to increase the contact area of contact pin and semiconductor element.
In the past, contact pin used the low electrical resistant materials such as tungsten alloy, copper alloy, silver alloy, palldium alloy, billon, iridium alloy.This
Outside, spacing between the pin by reducing contact pin, more contact pins are configured, so as to increase the contact area with semiconductor element.
As increase and the other method of the contact area of the semiconductor element, it is proposed that by the transmitting with semiconductor element
The contact of pole (source electrode) pad face is used as contact probe so as to the electroconductive resin of contact (for example, referring to patent document 2).By making
Electroconductive resin is formed as the size of emitter stage (source electrode) pad of semiconductor element, and contact area can be significantly increased.
Prior art literature
Patent document
Patent document 1：Japanese Patent Laid-Open 2012-068076 publications
Patent document 2：Japanese Patent Laid-Open 2009-128189 publications
The content of the invention
The technical problems to be solved by the invention
But the knot for making emitter stage (source electrode) pad of semiconductor element and electroconductive resin be contacted in a manner of face-to-face
Structure, i.e., enabled increase large access area, it is also difficult to the transmitting to the semiconductor element on the uneven surface of conductive resin
Pole (source electrode) pad applies uniform load.Accordingly, there exist problems with point, i.e., is welded in the emitter stage (source electrode) of semiconductor element
Contact resistance is uneven on the whole face of disk, and current convergence is in the relatively low region of contact resistance and causes local pyrexia, to semiconductor
Element damages.
Exploitation forms the present invention in view of the above problems, and its object is to provide a kind of pad realization to semiconductor element
Contact probe, semiconductor device testing apparatus and the semiconductor element test method of low resistance contact.
Technical scheme used by solution technical problem
In order to solve above-mentioned problem, the present invention provides a kind of contact probe.The contact probe has the 1st contact surface, and the 1st
Contact surface and multiple plunger pin contacts；And the 2nd contact surface, the 2nd contact surface the side opposite with the 1st contact surface with
Check object plane-plane contact.
The present invention provides a kind of semiconductor device testing apparatus, including：Testing stand, the testing stand placing have semiconductor element
Part；Multiple contact probes, when carrying out the semiconductor element experiment, the plurality of contact probe is with placing on the testing stand
The semiconductor element main electrode contact；Multiple plunger pins, when carrying out the semiconductor element experiment, the plurality of plunger
Pin is contacted with the contact probe, and the contact probe is pressed to the main electrode of the semiconductor element；Place
Disk, when being tested without the semiconductor element, the holding tray lifts the contact probe, make the contact probe be maintained at
The position of the main electrode separation of the semiconductor element, when carrying out the semiconductor element experiment, the holding tray makes institute
State contact probe and utilize and conduct oneself with dignity placing in the assigned position of the main electrode of the semiconductor element；And base unit,
When being tested without the semiconductor element, the base unit makes the plunger pin be maintained at the position separated with the contact probe
Put, when carrying out semiconductor element experiment, the base unit makes the plunger pin contacts and press placing partly to lead described
The contact probe in the main electrode of volume elements part.The contact probe in the semiconductor device testing apparatus has：
The main body of prism-shaped, the main body have the 1st contact surface with multiple plunger pin contacts, and with the 1st contact surface phase
Anti- side, the 2nd contact surface contacted with the main electrode of the semiconductor element；And protuberance, the protuberance protrude
Ground is arranged on the center of the 1st contact surface, and is in contact with one in the plunger pin.
The present invention also provides a kind of semiconductor element test method for the electrical characteristic for evaluating semiconductor element.The semiconductor
Component test method has steps of, and makes multiple contact probes using main electrode of the placing in the semiconductor element of conducting oneself with dignity
On, the plurality of contact probe has protrusion respectively in prism-shaped main body with the central of the contact surface of the side of plunger pin contacts
Portion；Make one in the plunger pin to be abutted with the protuberance of the contact probe respectively, keep the contact probe and
The depth of parallelism of the main electrode of the semiconductor element；And on each contact probe, increase the plunger pin with it is described
Load when protuberance abuts, and other multiple plunger pins is abutted with the 1st contact surface around the protuberance.
Invention effect
The advantages of contact probe of said structure, semiconductor device testing apparatus and semiconductor element test method is,
Contact probe center upper portion and around different load is applied to the contact probe, therefore can be relative to semiconductor element
In inclined pad keeping parallelism degree, realize low-resistance contact.
Brief description of the drawings
Fig. 1 is the figure for the configuration example for representing the semiconductor device testing apparatus involved by the 1st embodiment.
Fig. 2 is the stereoscopic figure for representing contact probe.
Fig. 3 is the top view for the configuration relation for representing semiconductor, contact probe and plunger pin.
Fig. 4 is the explanation figure of the contact area of contact probe, and Fig. 4 (A) shows connecing in the case of column contact probe
Contacting surface is accumulated, and Fig. 4 (B) represents the contact area in the case of needle-like contact probe.
Fig. 5 is the step of brief description makes contact probe make plunger pin be contacted with contact probe after being contacted with semiconductor element
Figure.
Fig. 6 is the action specification figure of semiconductor device testing apparatus, and Fig. 6 (A) shows the holding state before contact at initial stage,
Fig. 6 (B) shows the contact condition with semiconductor element, and Fig. 6 (C) shows the contact condition with protuberance, and Fig. 6 (D) is shown
Full contact state.
Fig. 7 is the figure of the relation for the pressing quantity and load for representing plunger pin.
Fig. 8 is the figure of the balance for the load that explanation puts on contact probe.
Fig. 9 is the figure for the other embodiment for representing contact probe.
Figure 10 is the figure for the configuration example for representing the semiconductor device testing apparatus involved by the 2nd embodiment.
Figure 11 is the top view for the configuration relation for representing semiconductor, contact probe and plunger pin.
Embodiment
Hereinafter, referring to the drawings, embodiments of the present invention are described in detail.First, to the dynamic of semiconductor element (chip)
The overall structure of the semiconductor device testing apparatus of embodiment used in attribute testing illustrates.
Fig. 1 is the figure for the configuration example for representing the semiconductor device testing apparatus involved by the 1st embodiment, and Fig. 2 is to represent
The stereoscopic figure of contact probe.
Semiconductor device testing apparatus possesses：Testing stand 11, the semiconductor element 1 of the placing chip status of testing stand 11；
Contact probe 12,13, the contact probe 12,13 make electrical contact with semiconductor element 1；Contact block 14, the contact block 14 keep this to connect
Feeler inspection pin 12,13；And hookup 15.Herein, it is illustrated IGBT as by the one of the semiconductor element 1 of test body.
In the case of IGBT, semiconductor element 1 is welded using the emitter stage with the gate pads 1a as coordination electrode and as main electrode
Upward, the one side state directed downwardly with colelctor electrode pad is by placing in testing stand 11 for disk 1b one side.
Contact block 14 possesses holding tray 16 and base unit 17.Holding tray 16 configures contact spy according in semiconductor element 1
The position of pin 12,13, through set probe retaining hole 16a, 16b, contact probe 12,13 insert respectively probe retaining hole 16a,
16b.Base unit pair is contacted with contact probe 12,13 and kept by the plunger pin 18 of its pressing.Plunger pin 18 have pair
Contact probe 12,13 applies the spring of given load.
Holding tray 16 is set to load and unload on base unit 17, when needing to change contact probe 12,13, from base list
Holding tray 16 is pulled down in member 17, by the contact probe 12,13 of the replacing of contact probe 12,13 of damage preferably.In addition, in semiconductor
When element 1 is without experiment, contact probe 12,13 is raised by holding tray 16 from semiconductor element 1, and holding and plunger pin
The state of 18 separation.When semiconductor element 1 is tested, holding tray 16 is declined first, contact probe 12,13 is declined simultaneously
With placing of conducting oneself with dignity in semiconductor element 1.Afterwards, by making holding tray 16 further decline, so as to which contact probe 12,13 declines,
Abutted with plunger pin 18.As holding tray 16 further declines, plunger pin 18 applies load to contact probe 12,13, will connect
Feeler inspection pin 12,13 is pressed into semiconductor element 1.
Plunger pin 18 is connected by connecting up 19a, 19b and hookup 15.Testing stand 11 has one end and semiconductor element 1
Lower surface connection wiring 19c, the wiring 19c other end is connected with hookup 15.
Herein, as shown in Fig. 2 the contact probe 12 contacted with the emitter stage pad 1b of semiconductor element 1, has prism-shaped
Main body 12a.The 1st contact surface 12b contacted with plunger pin 18 is formed in main body 12a upper surface, lower surface is formed with partly leading
2nd contact surface 12c of the emitter stage pad 1b faces contact of volume elements part 1.Contact probe 12, which also has, is provided projectingly on the 1st contact surface
Protuberance 12d near 12b centers, plunger pin 18 and protuberance 12d upper surface.Contact probe 12 also connects the 1st
The periphery of contacting surface 12b side has flange part 12e.When contact probe 12, loosely insertion is formed through holding tray 16
During probe retaining hole 16a, flange part 12e is limited to probe retaining hole 16a, prevents contact probe 12 from being taken off from holding tray 16
Fall.Periphery of the contact probe 12 also in the 2nd contact surface 12c side is chamfered, and corner is cut out being in 45 degree of angles.
Fig. 3 is the top view for the configuration relation for showing semiconductor, contact probe and plunger pin, and Fig. 4 is contact probe
The explanation figure of contact area, Fig. 4 (A) show contact area during column contact probe, and Fig. 4 (B) shows that needle-like contact is visited
Contact area during pin.
When semiconductor element 1 is tested, the contact probe 12 and emitter stage pad 1b of quantity corresponding with chip size
Contact.In example as shown in Figure 3,5 contact probes 12 contact with emitter stage pad 1b.Each contact probe 12 and 5 posts
Plug pin 18 contacts.Wherein, 1 plunger pin 18 contacts with the protuberance 12d of contact probe 12, and 4 plunger pins 18 are with encirclement in addition
Protuberance 12d mode, contacted with the 1st contact surface 12d of contact probe 12.
As shown in Fig. 4 (A), the emitter stage pad 1b of contact probe 12 and semiconductor element 1 contact area is visited with contacting
2nd contact surface 12c area equations of pin 12.That is, 4 times (8R) of the diameter of contact probe 13 (2R) as shown in Fig. 4 (B) are set to
In the case of 2nd contact surface 12c transverse direction (a) and longitudinal direction (b) size, the 2nd contact surface 12c contact area is 64R^2.It is another
Aspect, in the case of using 5 pin-shaped contact probes 13, the contact area of 5 is 5 π R^2 (π R^2 × 5 piece).
Herein, compared using the situation and the situation using 1 block contact probe 12 of 5 pin-shaped contact probes 13,
Contact area differs about 4 (=64^2/5 π R^2) times.That is, by by 5 pin-shaped contact probes 13 be changed to 1 it is block
Contact probe 12, so that it is changed into 4 times with the emitter stage pad 1b of the semiconductor element 1 probe contacts area contacted, can
Realize more low-resistance contact.Thus, between by effectively utilizing between the pin that is formed of point contact by existing pin-like contact probe 13
Away from dead angle area, contacted with the emitter stage pad 1b faces of semiconductor element 1, there may come a time when to make contact area be changed into hundred times
Size.
Next, the dynamic characteristic test to carrying out semiconductor element (chip) using above semiconductor device testing apparatus
The step of illustrate.
Fig. 5 is the step of plunger pin contacts with contact probe after brief description makes contact probe be contacted with semiconductor element
Figure.Fig. 6 is the action specification figure of semiconductor device testing apparatus, and Fig. 6 (A) represents the holding state before contact at initial stage, Fig. 6
(B) contact condition with semiconductor element is represented, Fig. 6 (C) represents the contact condition with protuberance, and Fig. 6 (D) represents to completely attach to
State.In addition, in Fig. 5, contact probe 12 is using the periphery of the 2nd contact surface 12c side by the probe of 45 degree of chamferings, Fig. 6
In, contact probe 12 is chamfered to be the probe of curve shape (fillet) using the periphery of the 2nd contact surface 12c side.
As shown in Fig. 5 tops, holding tray 16, which is recessed, is provided with the part of holding contact probe 12, is protected in the depression setting unit
The block contact probe 12 held is separated with plunger pin 18 in not in contact with state.Holding tray 16 has also been provided projectingly holding contact and visited
The part of pin 13, it is maintained at the pin-shaped contact probe 13 for being provided projectingly portion and is nearly at contact condition with plunger pin 18.Such as
This, makes block contact probe 12 and plunger pin 18 not contact, make pin-shaped contact probe 13 and plunger pin 18 almost in contact with
Under state, holding tray 16 is fixed in base unit 17, is acted together with base unit 17.
After declining the contact block 14 of semiconductor device testing apparatus, the 2nd contact surface 12c of block contact probe 12 is carried
It is placed on the emitter stage pad 1b of semiconductor element 1, gate pads 1a of the pin-shaped placing of contact probe 13 in semiconductor element 1
On.
As shown in the lower part of Figure 5, after holding tray 16 is further declined, it is changed into following state, i.e.,：Block contact probe 12
Stay on the emitter stage pad 1b of semiconductor element 1, pin-shaped contact probe 13 stays in the gate pads 1a of semiconductor element 1
On.Now, pin-shaped contact probe 13 by corresponding plunger pin 18 be applied with contact block 14 decline bear accordingly
Lotus.
After holding tray 16 further declines, the protuberance 12d of contact probe 12 abuts with the front end of corresponding plunger pin 18.
Next, make holding tray 16 further decline after, the 1st contact surface 12b of contact probe 12 with before corresponding 4 plunger pins 18
End abuts.After holding tray 16 is further declined and stopped again, supported with the protuberance 12d and the 1st contact surface 12b of contact probe 12
The plunger pin 18 connect applies given load to the protuberance 12d and the 1st contact surface 12b of contact probe 12.
In this way, the holding tray 16 is configured to：By the contact probe 12 of bulk with free state placing in semiconductor element
On, plunger pin 18 is pressed it according to the protuberance 12d and the 1st contact surface 12b of contact probe 12 order afterwards.
Next, the action to semiconductor device testing apparatus is described in detail.In addition, pin-shaped contact probe 13 with
Existing structure is identical, therefore omits diagram and explanation herein.
First, as shown in Fig. 6 (A), under the original state of on-test, the main body 12a of contact probe 12 is by loosely
The probe retaining hole 16a of embedded holding tray 16, flange part 12e are limited to around probe retaining hole 16a.Now, contact is visited
Pin 12 and any plunger pin 18 in the state of freedom by holding tray 16 all not in contact with therefore being risen.
Next, after declining holding tray 16, the main electrode that contact probe 12 is placed on semiconductor element 1 first is sent out
On emitter-base bandgap grading pad 1b.As shown in Fig. 6 (B), after holding tray 16 is further declined, holding tray 16 separates with contact probe 12, connects
Feeler inspection pin 12 keeps stands alone state by conducting oneself with dignity.That is, with the 2nd contact surface 12c of contact probe 12 and semiconductor element 1
The parallel state placing contact probe 12 in emitter stage pad 1b surface.
As shown in Fig. 6 (C), after holding tray 16 is further declined, plunger pin 18 and contact probe 12 is prominent soon
Go out portion 12d abuttings, contact probe 12 is pressed into the emitter stage pad 1b of semiconductor element 1.Thus, contact probe 12 with its
State parallel with the emitter stage pad 1b of semiconductor element 1 surface 2 contact surface 12c, is not pressed into semiconductor element obliquely
The emitter stage pad 1b of part 1.In this way, by making the 2nd whole faces of contact surface 12c of contact probe 12 and the transmitting of semiconductor element 1
Pole pad 1b is uniformly contacted, and so as to obtain large contact area, contact resistance becomes uniform, therefore can avoid because of local electricity
Semiconductor element destroys in adfluxion, caused by heating.Further, since contact probe 12 will not occur with relative to semiconductor element
The 1 inclined states of emitter stage pad 1b press come the one side pressed, therefore can reduce the surface shape in emitter stage pad 1b
The situation of quality is damaged into deeper probe vestige etc..
As shown in Fig. 6 (D), after holding tray 16 is further declined, remaining plunger pin 18 connects with the 1st of contact probe 12
Contacting surface 12b is abutted.In contact probe 12, the protuberance 12d of center upper portion to the emitter stage pad 1b of semiconductor element 1 to hang down
Nogata is in the state of being pressed, and plunger pin 18 that the 1st contact surface 12b around protuberance 12d is left is to semiconductor element
The emitter stage pad 1b of part 1 is pressed.Now, the plunger pin 18 of protuberance 12d forces is compared to being applied around protuberance 12d
The plunger pin 18 of power, spring also shorten the amount (height component) from protuberance 12d the 1st contact surface 12b protrusions.Therefore, connect
In feeler inspection pin 12, compared with the 1st contact surface 12b around it, protuberance 12d has been applied in the overhang phase with protuberance 12d
When stronger load.Thus, plunger pin 18 and contact probe 12 are changed into full contact state, and semiconductor device testing apparatus is changed into
The state that can be tested by hookup 15.In this way, the 2nd contact surface 12c of contact probe 12 and the hair of semiconductor element 1
Emitter-base bandgap grading pad 1b is parallel, therefore contact area increase, is changed into low contact resistance, so as to the experiment suitable for high current.
After the dynamic characteristic test of semiconductor element 1 terminates, the action of semiconductor device testing apparatus is changed into and above-mentioned work
Skill is opposite.That is, from shown in Fig. 6 (D) can trystate, be changed into the state as shown in Fig. 6 (C), i.e.,：Holding tray 16 is set to increase
Afterwards, separated first with the plunger pins 18 abutted of the 1st contact surface 12b around protuberance 12d with the 1st contact surface 12b.Also, put
After putting the rising of disk 16, separated with the protuberance 12d plunger pins 18 abutted with protuberance 12d, be changed into the state shown in Fig. 6 (B).So
Afterwards, after holding tray 16 is further up, holding tray 16 rises contact probe 12, returns to the holding state shown in Fig. 6 (A).
Feeler inspection is docked next, to the spring performance of spring possessed by plunger pin 18, and when being exerted a force by plunger pin 18
The load that pin 12 applies illustrates.
Fig. 7 is the figure of the pressing quantity and load relation that represent plunger pin, and Fig. 8 is the balance of the load applied to contact probe
The figure illustrated.In addition, in the figure 7, transverse axis represents the pressing quantity of plunger pin 18, the longitudinal axis represents what contact probe 12 was applied
Load.
As shown in fig. 7, the load that plunger pin 18 is born to the pressing quantity and contact probe 12 of contact probe 12 is directly proportional, should
The constant of the value of load spring according to possessed by plunger pin 18 determines.
Here, the around the protuberance 12d of face contact probe 12 central plunger pin 18 and pressing protuberance 12d
Plunger pin 18 around 1 contact surface 12b is compared, and pressing quantity goes out greatly the part of protuberance 12d overhang, therefore is born to be high
Lotus.Therefore, when semiconductor device testing apparatus is tested, central plunger pin 18 presses contact probe 12 with high load capacity, surrounding
Plunger pin 18 contact probe 12 is pressed with underload.If the spring performance of all plunger pins 18 is identical, and in contact probe
12 center is nearby provided with protuberance 12d to change pressing quantity, is achieved in the difference of the load.
Like this, the center on the top of contact probe 12 is pressed first, is pressed while by increasing the central load
Around action so that contact probe 12 with large contact area placing semiconductor element 1 inclined emitter stage pad
On 1b surface.That is, as shown in figure 8, in the case of inclined on the emitter stage pad 1b of semiconductor element 1 surface, contact is visited
Pin 12 is to conduct oneself with dignity placing on the emitter stage pad 1b of semiconductor element 1 surface, therefore certainty is relative to emitter stage pad 1b
Surface vertical in vertical direction.
Then, contact probe 12 placing in the state of emitter stage pad 1b surface by center 1 plunger pin 18
Pressing, therefore the 2nd contact surface 12c equably presses emitter stage weldering in the state of keeping parallel with emitter stage pad 1b surface
Disk 1b surface.Afterwards, make the load of the plunger pin 18 in center high by control, during the load of the plunger pin 18 of surrounding is slightly below
The load of the plunger pin 18 of centre, thus contact probe 12 is maintained to the posture agreed with emitter stage pad 1b surface.Pass through
Change the part throttle characteristics of plunger pin 18, make pressing of the contact probe 12 to the emitter stage pad 1b of semiconductor element 1 surface not
Unbalance situation occurs, so as to which deeper probe vestige will not be formed on emitter stage pad 1b surface.In addition, by that will connect
The periphery of 2nd contact surface 12c sides of feeler inspection pin 12 is set to R shapes, can also suppress the formation of probe vestige.
As described above, contact probe 12 unilateral will not press emitter stage pad 1b surface, therefore contact area increase,
As low contact resistance, further increase is entered with the contact area of electrode, as the contact probe 12 of low contact resistance below
Row explanation.
Fig. 9 is the figure for the other embodiment for representing contact probe.
The contact probe 12 is in the combed shape that multiple groove 12f are formed in the 2nd contact surface 12c.Groove 12f for example can be
Form the V grooves of clathrate.Thus, metal soft for example as aluminium the emitter stage pad 1b of semiconductor element 1 is formed
In the case of, when face contact probe 12, the metal being extruded can enter in groove 12f space.As a result the He of contact probe 12
Emitter stage pad 1b contact area increase, is changed into more low contact resistance, can realize the contact suitable for more cranking test
Probe 12.
The contact probe 12 changes groove 12f's according to the metal hardness for the emitter stage pad 1b for forming semiconductor element 1
Spacing and depth, so as to rightly increase and decrease the contact area of contact probe 12 and emitter stage pad 1b.
Figure 10 is the figure for the configuration example for representing the semiconductor device testing apparatus involved by the 2nd embodiment, and Figure 11 is table
Show the top view of the configuration relation of semiconductor, contact probe and plunger pin.In addition, in Figure 10 and Figure 11, pair with Fig. 1 and Fig. 3
The identical or equivalent structural element mark identical label of shown structural element, and detailed description will be omitted.
In the semiconductor device testing apparatus involved by the 2nd embodiment, the contacted with plunger pin 18 the 1st has been used to connect
Contacting surface 12b is formed as the contact probe 20 of flat condition.In the contact probe 20, the 2nd contact surface 12b and emitter stage pad 1b faces
The area of contact is identical with the contact probe 12 that the semiconductor device testing apparatus involved by the 1st embodiment uses.Therefore, should
Semiconductor device testing apparatus involved by 2nd embodiment can also expand contact of the contact probe 20 with emitter stage pad 1b
Area, decline current density.In addition, in the 2nd embodiment, when holding tray 16 is arranged on into base unit 17, keep
Can be with being maintained at the plunger pin contacts of base unit 17 in the contact probe 20 of holding tray 16.
When semiconductor element 1 is tested, in example as shown in figure 11,5 contact probes 20 contact with emitter stage pad 1b.
In addition, each contact probe 20 is contacted by 5 plunger pins 18 with the 1st contact surface 12b.In addition, placing is in semiconductor element 1
The quantity of contact probe 20 on emitter stage pad 1b determines according to contact probe 20 and chip size.In addition, visited with contacting
The plunger pin 18 that the quantity for the plunger pin 18 that pin 20 contacts is kept according to the 1st contact surface 12b size and base unit 17 is set
Interval is put to determine.
Label declaration
1 semiconductor element
1a gate pads
1b emitter stage pads
11 testing stands
12 contact probes
12a main bodys
The contact surfaces of 12b the 1st
The contact surfaces of 12c the 2nd
12d protuberances
12e flange parts
12f grooves
13 contact probes
14 contact blocks
15 hookups
16 holding trays
16a, 16b probe retaining hole
17 base units
18 plunger pins
19a, 19b, 19c are connected up
20 contact probes
Claims (10)
1. a kind of contact probe, has,
1st contact surface, the 1st contact surface and multiple plunger pin contacts；And the 2nd contact surface, the 2nd contact surface is with described
The opposite side of 1 contact surface and check object plane-plane contact.
2. contact probe as claimed in claim 1, it is characterised in that
With protuberance, the protuberance be protrusively provided in the 1st contact surface center near, and with the plunger pin
One is in contact.
3. contact probe as claimed in claim 1 or 2, it is characterised in that
Groove is formed on the 2nd contact surface.
4. contact probe as claimed any one in claims 1 to 3, it is characterised in that
The periphery of 2nd contact surface is chamfered.
A kind of 5. semiconductor device testing apparatus, it is characterised in that including：
Testing stand, the testing stand placing have semiconductor element；
Multiple contact probes, when carrying out the semiconductor element experiment, the plurality of contact probe is with placing in the testing stand
On the semiconductor element main electrode contact；
Multiple plunger pins, when carrying out the semiconductor element experiment, the plurality of plunger pin contacts with the contact probe, and
The contact probe is pressed to the main electrode of the semiconductor element；
Holding tray, when being tested without the semiconductor element, the holding tray lifts the contact probe, makes the contact probe
The position separated with the main electrode of the semiconductor element is maintained at, when carrying out the semiconductor element experiment, this is put
Put the assigned position that disk makes the contact probe using the main electrode of the placing in the semiconductor element of conducting oneself with dignity；And
Base unit, when being tested without the semiconductor element, the base unit make the plunger pin be maintained at it is described
The position of contact probe separation, when carrying out semiconductor element experiment, the base unit make the plunger pin contacts and by
Ballast is placed on the contact probe in the main electrode of the semiconductor element,
The contact probe has：The main body of prism-shaped, the main body have the 1st contact surface with multiple plunger pin contacts,
With in the side opposite with the 1st contact surface, the 2nd contact surface contacted with the main electrode of the semiconductor element；With
And protuberance, the protuberance are protrusively provided in the center of the 1st contact surface, and connect with one in the plunger pin
Touch.
6. semiconductor device testing apparatus as claimed in claim 5, it is characterised in that
The holding tray has through hole, and the contact probe is loosely embedded in the through hole；
Periphery of the contact probe in the 1st contact surface side has flange part, and the flange part prevents the contact from visiting
Pin comes off from the through hole.
7. semiconductor device testing apparatus as claimed in claim 5, it is characterised in that
The contact probe forms groove on the 2nd contact surface.
8. semiconductor device testing apparatus as claimed in claim 5, it is characterised in that
The holding tray handling are mounted freely on can be relative on the base unit that the testing stand lifts.
9. a kind of semiconductor element test method, is evaluated the electrical characteristic of semiconductor element, semiconductor element experiment
Method has steps of：
Making multiple contact probes, the plurality of contact probe is in prism using placing is conducted oneself with dignity in the main electrode of the semiconductor element
Shape main body has protuberance respectively with the central of the contact surface of the side of plunger pin contacts；
Make one in the plunger pin to be abutted with the protuberance of the contact probe respectively, keep the contact probe and
The depth of parallelism of the main electrode of the semiconductor element；And
On each contact probe, increase the load when plunger pin abuts with the protuberance, and make other more
The individual plunger pin abuts with the 1st contact surface around the protuberance.
10. semiconductor element test method as claimed in claim 9, it is characterised in that
The plunger pin has load identical spring, the overhang protruded according to the protuberance from the 1st contact surface, right
The difference for putting on the load of the load of the protuberance and the 1st contact surface put on around the protuberance is set
It is fixed.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2016117565A JP6790477B2 (en) | 2016-06-14 | 2016-06-14 | Semiconductor device test equipment and semiconductor device test method |
| JP2016-117565 | 2016-06-14 |
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| Publication Number | Publication Date |
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| CN107505485A true CN107505485A (en) | 2017-12-22 |
| CN107505485B CN107505485B (en) | 2020-07-31 |
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| Country | Link |
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| CN (1) | CN107505485B (en) |
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| JP6702429B2 (en) * | 2016-11-16 | 2020-06-03 | 富士電機株式会社 | Semiconductor test circuit, semiconductor test apparatus, and semiconductor test method |
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Also Published As
| Publication number | Publication date |
|---|---|
| CN107505485B (en) | 2020-07-31 |
| JP6790477B2 (en) | 2020-11-25 |
| JP2017223480A (en) | 2017-12-21 |
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