CN107431106B - Fluid assembly top contact LED disc - Google Patents

Fluid assembly top contact LED disc Download PDF

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Publication number
CN107431106B
CN107431106B CN201680016233.8A CN201680016233A CN107431106B CN 107431106 B CN107431106 B CN 107431106B CN 201680016233 A CN201680016233 A CN 201680016233A CN 107431106 B CN107431106 B CN 107431106B
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disk
led
diameter
top surface
contact
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CN107431106A (en
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战长青
保罗·约翰·舒勒
马克·艾伯特·克劳德尔
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Iro vision Co., Ltd.
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eLux Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)
  • Led Device Packages (AREA)

Abstract

Methods of forming direct-lit displays are provided. The method provides a transparent substrate having a top surface formed with an array of wells. A fluid stream containing a plurality of upper contact Light Emitting Diode (LED) pucks is provided to the top surface of the substrate. The wells are filled with the LED discs. A first conductive line array is formed on the top surface of the substrate to be connected with the first contact portion of each LED disk, and a second conductive line array is formed on the top surface of the substrate to be connected with the second contact portion of each LED disk. The insulator on the puck exposes the upper puck (e.g., p-doped) contact region. A via is formed through the disk exposing a center contact region of the underlying (e.g., n-doped) disk contact region. A top contact LED puck and a direct lit display are also provided.

Description

Fluid assembly top contact LED disc
Technical Field
The present invention relates generally to Integrated Circuit (IC) fabrication and, more particularly, to a fluid assembly method for disposing a top-contact trigger photodiode on a transparent display substrate.
Background
There are three main processes for the fabrication of gallium nitride (GaN) micro light emitting diode (µ LED) disks for direct light emitting displays. These processes are: manufacturing a GaN mu LED disc; the GaN mu LED discs are distributed on the transparent substrate; and interconnection of GaN mu LED disks.
This makes conventional IC-type contact hole opening/metal interconnect design extremely challenging, since the μ LED disks are randomly distributed within the placement wells of the transparent substrate. Additional tolerances are required in the (opaque) interconnects to address this random distribution, resulting in a significant loss of fill factor for the light emitting areas. Furthermore, the complexity required to make these connections results in low yields and/or high costs.
Fig. 1A and 1B are plan views of a top contact LED disk located in a substrate well (prior art). In FIG. 1A, DdDenotes the diameter of the LED (e.g., gallium nitride (GaN)) disk, DcDenotes the diameter of the microcavity or well into which the mu LED disk has been distributed, DpThe diameter of the p-doped GaN (p-GaN) region is shown, assuming that p-GaN is formed on top of the disk. Region 100 is an n-GaN contact where p-GaN 102 and MQW have been removed by Reactive Ion Etching (RIE). The inner circular region 102 is a complete LED stack with p-GaN on top. Nickel oxide (NiO)x) An Indium Tin Oxide (ITO) layer may be formed on the surface of region 102. The circular region 102 is 2 microns away from the center of the GaN disk, taking into account typical lithographic misalignment tolerances (up to 2 microns (μm)). Since only the region 102 can emit light, the light emitting area fill factor is only about 70.6%. Nearly 30% of the light emitting area is lost due to the n-GaN opening 100.
Fig. 1B shows the working area of the anode terminal connection 104 (Dpc). The connection formed outside the region 104 having a diameter of 24 μm may cause a short circuit or an open circuit. The conventional metal interconnect with the n-GaN region 102 further reduces the light emitting region fill factor. In this example, only 31.4% of the GaN disk area will emit light.
Fig. 2 is a partial cross-sectional view of a bottom cathode contact structure (prior art). This approach avoids the significant loss of light emitting area fill factor associated with conventional top contact LED pucks. The bottom interconnect electrode 200 is first evaporated and patterned on a substrate 202, followed by the formation of microcavities (wells) 204. A thin layer of low-melting metal film 206 is then coated on the bottom electrode surface inside the microcavity 204. The GaN disk 208(n-GaN210/p-GaN 212) is then dispensed into the microcavity 204. After the interlayer insulating film 214 is patterned, the top interconnect electrode 216 is evaporated and patterned to complete the entire process flow.
The process flow described by fig. 2 is relatively simple. With a fine top metal wiring design, the front side light emitting area fill factor can reach a maximum of 85%. The main challenges of this process include bottom contact yield, uniformity, reliability and repeatability, and the tradeoff between bottom contact yield and bottom electrode area if a backside light emitting opening is required.
Disclosure of Invention
Technical problem
It would be advantageous if a high light emitting area fill factor could be obtained using a top-contact LED of simple fabrication method.
Solution scheme
In accordance with the present invention, a top-contact triggered light diode (LED) is provided, the LED including a lower disk comprising a material containing a dopant selected from the group consisting of a p-type dopant or an n-type dopant, the lower disk having a bottom surface and a top surface; a Multiple Quantum Well (MQW) disk covering a top surface of the lower disk; an upper disk comprising a material having an unselected dopant and having a bottom surface, a top surface, and a first diameter overlying the MQW disk; an electrical insulator disk covering the upper disk top surface having a second diameter less than the first diameter to expose the upper disk contact area; and a via formed through the electrical insulator disk, the upper disk, and the MQW disk to expose a center contact region of the top surface of the lower disk. According to the present invention, a direct light emitting display is provided, which includes a transparent substrate having a top surface including an array of wells; top contact LEDs formed in each well, each LED comprising: a lower disk comprising a material containing a dopant selected from the group consisting of a p-type dopant or an n-type dopant, the lower disk having a bottom surface and a top surface; a multi-quantum well (MQW) disk covering a top surface of the lower disk; an upper disk comprising a material having an unselected dopant and having a bottom surface, a top surface, and a first diameter overlying the MQW disk; an electrical insulator disk covering the upper disk top surface having a second diameter less than the first diameter to expose the upper disk contact area; and a via formed through the electrical insulator disk, the upper disk, and the MQW disk to expose a center contact region of the top surface of the lower disk; a first array of conductive lines connected to the LED lower disk contact region; a second array of conductive lines connected to the LED upper disk contact region; and an insulating material interposed between the first and second arrays of conductive lines.
According to the present invention, a method of manufacturing a direct light emitting display is provided: providing a transparent substrate having a top surface on which an array of wells is formed; providing a fluid stream comprising a plurality of top-contacting LED disks to the top surface of the substrate; filling the well with the LED disk; forming an insulating extension covering a portion of an upper disk contact area of the LED; forming a first conductive line array on the top surface of the substrate to connect with the first contact of each LED disk; and forming a second conductive line array on the top surface of the substrate to be connected with the second contact portion of each of the LED disks.
Drawings
Fig. 1A is a schematic plan view of a top contact LED disk located in a well of a substrate (prior art).
Fig. 1B is a schematic plan view of a top contact LED disk located in a well of a substrate (prior art).
Fig. 2 is a partial cross-sectional view of a bottom cathode contact structure.
Fig. 3A is a partial cross-sectional view of a top-contact LED.
Fig. 3B is a schematic plan view of a top-contact LED.
Fig. 4A is a partial sectional view.
Fig. 4B is a plan view of a direct-lit display.
Fig. 4C is a plan view of a direct-lit display.
FIG. 5A is a partial cross-sectional view summarizing the major method steps in an exemplary display manufacturing method.
FIG. 5B is a partial cross-sectional view summarizing the major method steps in an exemplary display manufacturing method.
FIG. 5C is a partial cross-sectional view summarizing the major method steps in an exemplary display manufacturing method.
FIG. 5D is a partial cross-sectional view summarizing the major method steps in an exemplary display manufacturing method.
FIG. 5E is a partial cross-sectional view summarizing the major method steps in an exemplary display manufacturing method.
FIG. 5F is a partial cross-sectional view summarizing the major method steps in an exemplary display manufacturing method.
FIG. 6 is another plan view depicting an LED disk located in a substrate well.
Fig. 7A is a plan view showing eight worst case positions of an LED disk within a microcavity.
Fig. 7B is a plan view showing eight worst case positions of the LED disk within the microcavity.
Fig. 7C is a plan view showing eight worst case positions of the LED disk within the microcavity.
Fig. 7D is a plan view showing eight worst case positions of the LED disk within the microcavity.
Fig. 7E is a plan view showing eight worst case positions of the LED disk within the microcavity.
Fig. 7F is a plan view showing eight worst case positions of the LED disk within the microcavity.
Fig. 7G is a plan view showing eight worst case positions of the LED disk within the microcavity.
Fig. 7H is a plan view showing eight worst case positions of the LED disk within the microcavity.
FIG. 8 is a flow chart illustrating a method for forming a direct-lit display.
Detailed Description
Disclosed herein is a Light Emitting Diode (LED) puck and display design that has the following advantages:
top connection of cathode and anode;
an interconnect process flow that is at least as simple as the bottom contact process flow method;
a minimum number of interlayer Insulators (ILD) and metal layers; and the number of the first and second groups,
limited fill factor loss.
The architecture starts with a new LED μ disk structure. Two features contribute to the implementation of the new method. One is a central contact opening to the lower (e.g., n-doped) disk of the LED, and an annular insulator (e.g., Tetraethylorthosilicate (TEOS) SiO) covering the LED disk2) To expose the upper (e.g., n-doped) disk contact region. The small central hole of the disk disclosed herein results in a fill factor loss of the light emitting region of as little as 3% compared to the same diameter and 30% fill factor loss for the edge annular opening of the n-GaN disk shown in fig. 1A. The completed LED μ disk can be collected using laser lift-off techniques and formed into an ink in a solvent for microfluidic distribution.
Accordingly, a method for forming a direct light emitting display is provided. The method provides a transparent substrate having an array of wells or microcavities formed in a top surface thereof. A fluid stream is provided to a top surface of a substrate comprising a plurality of top-contact Light Emitting Diode (LED) pucks. And the well is filled with an LED disc. After forming the insulating extension to cover a portion of the upper puck contact region, a first array of conductive lines is formed on the top surface of the substrate to connect with a first (e.g., lower puck) contact of each LED puck, and a second array of conductive lines is formed on the top surface of the substrate to connect with a second (e.g., upper puck) contact of each LED puck.
Each LED disk consists of a lower disk formed of a material containing p-type dopants or n-type dopants, the lower disk having a lower surface and a top surface. A Multiple Quantum Well (MQW) disk overlies the lower disk. An upper disk made of a material containing a dopant opposite to that used in the lower disk and having a lower surface overlying the MQW disk, a top surface and a first diameter. An electrical insulator puck overlies the upper puck top surface and has a second diameter that is smaller than the first diameter to expose the upper puck contact region. A via formed through the electrical insulator disk, the upper disk, and the MQW disk to expose a center contact region of the top surface of the lower disk.
If the substrate wells have a third diameter, the first array of conductive lines forms a pair of opposing top disk contact arms within each well to form a connection with the upper disk, each top disk contact arm having a length extending beyond x of the well, where x is greater than (third diameter-first diameter)/2. Further, if the lower disk contact region has a fourth diameter, the second array of conductive lines forms bottom disk contact arms in each well, each bottom disk contact arm having a length of y extending beyond the well and the insulating extension, wherein y is greater than (third diameter + fourth diameter)/2.
Additional details of the above-described method, top-contact LEDs, and direct-lit displays made from top-contact LEDs are provided below.
Fig. 3A to 3B are a partial sectional view and a schematic plan view of a top-contact LED, respectively. The LED300 includes a lower disk 302, the lower disk 302 comprising a material having p-type dopants or n-type dopants, the lower disk 302 having a bottom surface 304 and a top surface 306. A Multiple Quantum Well (MQW) disk 308 covers the lower disk top surface 306. The MQW layer 308 may typically be a series of quantum well shells (typically 5 layers, e.g. 5nm indium gallium nitride (InGaN) alternating with 9nm n-doped GaN (n-GaN)) not shown. There may also be an aluminum gallium nitride (AlGaN) electron blocking layer (not shown) between the MQW layer and the p-doped disk. The outer shell may be p-doped GaN (Mg-doped) about 200nm thick. If a higher indium content is used in the MQW, a high brightness blue LED, or green LED, can be formed.
The upper disk 310 includes a material having a dopant opposite to the dopant used in the lower disk. If the lower disk 302 is p-doped, the upper disk 310 is n-doped. Similarly, if the lower disk 302 is n-doped, the upper disk 310 is p-doped. The upper disk 310 has a bottom surface 312 overlying the MQW disk 308, a top surface 314, and a first diameter 316. The material of the lower disk may be, for example, p-GaN, p-doped indium gallium aluminum phosphide (p-AlGaInP), n-GaN, or n-AlGaInP. The upper disk 310 may be made of the same material but doped oppositely. Note that: this is not an exhaustive list of material types.
An electrical insulator puck 318 covers the upper puck top surface 314 and has a second diameter 320 that is smaller than the first diameter 316, exposing an upper puck contact region 322. Typically, the electrical insulator disc 318 is transparent and may be an insulating material such as TEOS silicon dioxide. A via 324 is formed through the electrical insulator disk 318, the upper disk 310, and the MQW disk 308, exposing a central contact region 326 at the top surface of the lower disk.
In one aspect, as shown, the electrical insulator disc 318 has a center 328 that covers an upper disc center 330. An upper disk contact region 322 is formed around the circumference of the upper disk top surface 314.
Fig. 4A is a partial sectional view, and fig. 4B and 4C are plan views of the direct light emitting display. Fig. 4B depicts an exemplary layout design for a 2 x 3LED disk direct lit display pixel array. Each pixel 430 consists of four LED disks 300 for brightness and redundancy management. The return extensions of the second array 410 wiring are designed to sever "failed" LED disks from the array. However, the design is not dependent on the shape of any particular LED group or wiring interconnection.
As shown in fig. 4A, display 400 includes a transparent substrate 402 having a top surface 404, the top surface 404 including an array of wells or microcavities 406. A top contact LED300 is formed in each well 406. Details of the top contact LED300 are provided in the description of fig. 3A and 3B above and are not repeated here for the sake of brevity. The first array of conductive lines 408 is connected to the LED lower disk contact region 326. The second array of conductive lines 410 is connected to the LED upper disk contact region 322. An insulating material 412 is interposed between the first array 408 and the second array 410 of conductive lines. It should be understood that the order of stacking of the conductive arrays is arbitrary. Typically, the electrical insulator disk (see fig. 3A) and insulator 412 are transparent to the visible light spectrum.
Each well 406 has a third diameter 414. In each well 406, the first array of conductive lines forms a pair of opposing top disk contact arms 416. Each top disk contact arm 416 has a length 418 that extends beyond x of well 406, where x is greater than (third diameter 414-first diameter 316)/2. The lower disc contact area 326 has a fourth diameter 420. In each well 406, a second array of conductive lines forms a bottom disk contact arm 422. Each bottom disk contact arm 422 has a length 424 of y that extends beyond the well 406 and the insulating extension 426, where y is greater than (third diameter 414+ fourth diameter 420)/2. As shown, the bottom disk contact arm 422 is generally orthogonal to both of the top disk contact arms 416 in each well 406.
The process flow of the present manufacturing method is very similar to the bottom contact scheme, which has the advantage of simplicity. The present manufacturing method does not use more insulating film or metal film layers than the bottom contact method and does not require an additional photolithography step. In fact, the top contact fabrication method eliminates the low melting point metal film coating step (see reference numeral 206 of fig. 2) required by the bottom contact process. In summary, the display manufacturing method using the LED disk disclosed herein allows the upper portion of the cathode and anode of each LED to be connected. The interconnect flow is at least as simple as the bottom contact flow method, with a minimum number of ILD and metal layers, and limited fill factor loss.
Fig. 5A to 5F are partial cross-sectional views summarizing major method steps in an exemplary display manufacturing method. Fig. 5A depicts a transparent substrate, in fig. 5B a first array electrical connection 408 (bottom electrode) is formed. Typically, the array is formed using conformal deposition and patterning. The size of a cell or pixel may be, for example, 500 microns by 500 microns. In fig. 5C, a dry film 500 is deposited and patterned to form wells 406. In other methods, the wells may be formed by etching recesses in the top surface of the substrate. In fig. 5D, the LED puck 300 is positioned in a well 406, typically using a fluid dispensing method. In FIG. 5E, an insulator 426, such as polyimide, is deposited and patterned around the edge of the LED, and insulating extensions are also formed on the upper disk contact areas, as shown in FIG. 4C. In fig. 5F, the top metallization forms the bottom disk contact arms 422. The top disk contact arms (not shown) may be formed at this point or in a separate step.
FIG. 6 is another plan view depicting an LED disk located in a substrate well. As an example, the central lower disk contact diameter may be 5 μm, and TEOS SiO2 The insulating disk 318 may have an outer (second) diameter 320 of 30 μm. In comparison to the n-GaN edge ring opening (reference identifier 100) in FIG. 1A, at the same 50 μm diameter GaN microdisc with 30% fill factor loss(μ disk), the small central opening described herein has only as little light emitting area fill factor loss as 3%. Insulating (e.g., polyimide) extensions 426 from the built-in TEOS SiO2 The insulating disks 318 cooperate to form an electrically isolating bridge for the top metal routing (bottom disk contact arms 422) to reach the contacts 326 located on the GaN micro-disk (μ disk). Polyimide (polyimide) extension 426 and SiO on the disk2The ring 318 is designed so that no matter how the GaN microdisk (μ disk) is distributed within the microcavity, it prevents shorting while ensuring effective contact with the LED disk.
Two top disk contact arms 416 are used. As shown, if the LED micro-disk (μ disk) is located in the center of the microcavity, both arms 416 make effective contact with the upper disk 310. Even if the LED disk is off center, at least one arm 416 contacts the upper disk 310 to ensure connection.
With respect to the light emitting area fill factor, there is no fill factor loss for back side lighting applications. For front-emitting applications, the loss is simply the sum of the non-transparent metal wiring areas, which in this design is about 18%. This new design has a light emitting area fill factor similar to the bottom contact structure for front side emission, and a significantly superior light emitting area fill factor for back side emission. This enables more freedom in light management by using dummy metal patterns on the bottom, or on the top, or both.
Fig. 7A to 7H are plan views showing eight worst-case positions of LED disks within a microcavity. In each case, the wiring is always made through each lower disc contact area 326 of the LED. In each case, the insulating extension 426 and insulating disk 318 prevent shorting. At least one top disk contact arm 416 is connected to the upper disk contact region 322 in each LED, wherever possible.
FIG. 8 is a flow chart illustrating a method for forming a direct-lit display. Although the method is depicted as a sequence of numbered steps for clarity, the numbering does not necessarily dictate the order of the steps. It should be understood that some of these steps may be skipped, performed in parallel, or performed without the requirement of maintaining a strict order of sequence. Generally, however, the method follows the numerical order of the steps described, as may be better understood in the context of the description of fig. 3A through 7H. The method starts at step 800.
Step 802 provides a transparent substrate having an array of wells formed on a top surface. The wells or microcavities may be formed by patterned deposition or etching. Step 804 supplies a fluid stream containing a plurality of top-contact LED pucks to the top surface of the substrate. Additionally, step 804 may be performed using a pick-and-place method. Step 806 fills the well with the LED puck. Step 808 forms an insulating extension that covers a portion of the upper puck contact area of the LED. Step 810 forms a first array of conductive lines on the top surface of the substrate to connect with the first contact of each LED disk. Step 812 forms a second array of conductive lines on the top surface of the substrate to connect with the second contact of each LED disk. Note that: in certain aspects, step 812 may be performed before step 810.
Providing an LED puck in step 804 can include providing an LED puck as described in fig. 3A and 3B above. That is, the LED puck includes a lower puck comprising a material having p-type dopants or n-type dopants, the lower puck having a bottom surface and a top surface. A MQW disk overlies the lower disk. The upper disk includes a material having an unselected dopant having a bottom surface overlying the MQW disk, a top surface, and a first diameter. Specific upper and lower disk materials are mentioned above. An electrically insulating (e.g., transparent) disk covers the upper disk top surface and has a second diameter that is smaller than the first diameter. In one aspect, the electrical insulator disk is centered on the upper disk. A via is formed through the electrical insulator disk, the upper disk, the MQW disk, exposing a center contact region of the top surface of the lower disk.
In one aspect, providing the transparent substrate in step 802 includes providing a substrate having a hole of a third diameter. Then, forming the first array of conductive lines in step 810 includes forming a pair of opposing top disk contact arms in each well. Each top disk contact arm has a length extending beyond x of the well, where x is greater than (third diameter-first diameter)/2.
In another aspect, providing the LED puck in step 804 includes providing a lower puck having a lower puck contact region of a fourth diameter. Then, forming a second array of conductive lines in step 812 includes forming a bottom disk contact arm in each well. Each bottom disk contact arm has a length of y extending beyond the well and the insulating extension, where y is greater than (third diameter + fourth diameter)/2.
LED disks, direct-lit displays, and methods of manufacturing direct-lit displays have been provided. Examples of specific materials and method steps have been presented to illustrate the invention. However, the present invention is not limited to only these examples. Other variations and embodiments of the invention will occur to those skilled in the art.
The present application is a partial continuation of the patent application entitled "flat bottom COUNTERBORE Structure for fluid Assembly" (COUNTERBORE POCKET STRUCTUREFOR FLUUIDIC ASSEMBLY) invented by Changqing Zhan et al, serial No. 14/530,230, 10/31/2014, attorney docket No. SLA 3469;
it is a partial continuation of the patent application entitled "LIGHT Emitting Diode (LED) USING THREE-DIMENSIONAL GALLIUM NITRIDE (GaN) PILLAR structure" (LIGHT emitting diode) USING the same-DIMENSIONAL GALLIUM NITRIDE (GaN) diodes, invented by m.albert Crowder et al, serial No. 14/088,374, 11/23/2013 filed, attorney docket No. SLA 3086.2;
it is a partial continuation of the patent application entitled "Light Emitting Diode (LED) USING THREE-DIMENSIONAL GALLIUM NITRIDE (GaN) columnar structure with planar surface" (LIGHT EMITTING diode (LED)) us thick-diode GALLIUM NITRIDE (GaN) WITH PLANAR SURFACES, invented by m.albert Crowder et al, serial No. 13/367,120, 2/6/2012 filed, attorney docket No. SLA 3086.1;
it is a partial continuation of the patent application entitled "METHOD FOR forming three-DIMENSIONAL GALLIUM NITRIDE STRUCTURES with planar SURFACES" (metal FOR FAB-RICATING THREE-DIMENSIONAL GALLIUM NITRIDE STRUCTURES WITH PLANAR SURFACES), invented by m.albert crown et al, serial No. 13/337,843, 12/27/2011, attorney docket No. SLA3086. All of these applications are incorporated herein by reference.

Claims (16)

1. A direct-lit display, comprising:
a transparent substrate having a top surface comprising an array of wells;
top contact LEDs formed in each well, each LED comprising:
a lower disk comprising a material having a dopant selected from the group consisting of a p-type dopant or an n-type dopant, the lower disk having a bottom surface and a top surface;
a multi-quantum well (MQW) disk covering the lower disk;
an upper disk comprising a material with an unselected dopant, having a lower surface overlying the Multiple Quantum Well (MQW) disk, a top surface, and a first diameter;
an electrical insulator disk covering a top surface of the upper disk having a second diameter smaller than the first diameter to expose an upper disk contact area;
a via formed through the electrical insulator disk, the upper disk, the Multiple Quantum Well (MQW) disk to expose a center contact region of a top surface of the lower disk;
a first array of conductive lines connected to a lower disk contact region of the LED;
a second array of conductive lines connected to the upper disk contact region of the LED; and the number of the first and second groups,
an insulating material is interposed between the first and second arrays of conductive lines.
2. The display of claim 1, wherein the electrical insulator disk and insulating material are transparent.
3. The display of claim 1 or 2, wherein the lower disk is a material selected from the group consisting of p-doped gallium nitride (p-GaN), p-doped aluminum gallium indium phosphide (p-AlGaInP), n-doped GaN (n-GaN), and n-AlGaInP; and the number of the first and second groups,
the upper disc is of an unselected material.
4. The display of any one of claims 1 to 2, wherein the electrical insulator disk has a center covering a center of the upper disk; and the number of the first and second groups,
the upper disk contact region is formed around a circumference of the upper disk top surface; and the number of the first and second groups,
the display further includes:
an insulating extension formed over and covering a region of the upper disk contact region.
5. The display of any one of claims 1-2, wherein each well has a third diameter; and the number of the first and second groups,
the first array of conductive lines forms a pair of opposing top disk contact arms in each well, each top disk contact arm having a length x extending beyond the well, wherein x is greater than (third diameter-first diameter)/2.
6. The display of claim 5, wherein the lower disk contact area has a fourth diameter; and the number of the first and second groups,
the second array of conductive lines forms bottom disk contact arms in each well, each bottom disk contact arm having a length y extending beyond the well and the insulating extension, wherein y is greater than (third diameter + fourth diameter)/2.
7. The display of claim 6, wherein the bottom disk contact arm is orthogonal to both top disk contact arms in each well.
8. The display of claim 1, wherein the electrical insulator disk is transparent.
9. A method of manufacturing a direct-lit display, comprising:
providing a transparent substrate having an array of wells formed on a top surface thereof;
supplying a fluid stream comprising a plurality of top-contacting LED disks to the top surface of the substrate;
filling a well with the LED disk;
forming an insulating extension covering a portion of an upper disk contact area of the LED;
forming a first conductive line array on the top surface of the substrate to connect with the first contact of each LED disk; and the number of the first and second groups,
a second array of conductive lines is formed on the top surface of the substrate to connect with the second contact of each LED disk.
10. The method of claim 9, wherein providing the LED pucks comprises each LED puck comprising:
a lower disk comprising a material having a dopant selected from the group consisting of a p-type dopant or an n-type dopant, the lower disk having a bottom surface and a top surface;
a multi-quantum well (MQW) disk covering the lower disk;
an upper disk comprising a material with an unselected dopant, having a lower surface overlying the Multiple Quantum Well (MQW) disk, a top surface, and a first diameter;
an electrical insulator disk covering a top surface of the upper disk having a second diameter smaller than the first diameter to expose an upper disk contact area; and the number of the first and second groups,
a via formed through the electrical insulator disk, the upper disk, and the Multiple Quantum Well (MQW) disk to expose a center contact region of a top surface of the lower disk.
11. The method of claim 10, wherein providing the transparent substrate comprises providing a transparent substrate having a well with a third diameter; and, forming the first array of conductive lines comprises forming a pair of opposing top disk contact arms in each well, each top disk contact arm having a length x extending beyond the well, wherein x is greater than (third diameter-first diameter)/2.
12. The method of claim 11 wherein providing said LED puck comprises a lower puck contact region having a fourth diameter; and the number of the first and second groups,
forming the second array of conductive lines includes forming bottom disk contact arms in each well, each bottom disk contact arm having a length y extending beyond the well and the insulating extension, wherein y is greater than (third diameter + fourth diameter)/2.
13. The method of any one of claims 10 to 12, wherein the lower disc is a material selected from the group consisting of p-doped gallium nitride (p-GaN), p-doped aluminum gallium indium phosphide (p-AlGaInP), n-doped GaN (n-GaN), and n-AlGaInP; and the number of the first and second groups,
the upper disc is of an unselected material.
14. The method of any of claims 10 to 12, wherein the electrical insulator disc has a center overlying a center region of the lower disc; and the number of the first and second groups,
the upper disk contact region is formed at a circumference of a top surface of the upper disk.
15. The method of claim 12, wherein the bottom disk contact arm is orthogonal to both top disk contact arms in each well.
16. A method according to any one of claims 10 to 12 and 15, wherein the electrically insulating disc is transparent.
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