CN107359112B - Manufacturing method of P-type double-sided crystalline silicon battery - Google Patents

Manufacturing method of P-type double-sided crystalline silicon battery Download PDF

Info

Publication number
CN107359112B
CN107359112B CN201710649732.7A CN201710649732A CN107359112B CN 107359112 B CN107359112 B CN 107359112B CN 201710649732 A CN201710649732 A CN 201710649732A CN 107359112 B CN107359112 B CN 107359112B
Authority
CN
China
Prior art keywords
diffusion
silicon wafer
sided
double
chain type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201710649732.7A
Other languages
Chinese (zh)
Other versions
CN107359112A (en
Inventor
张东
张大雨
马立元
杨雄磊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hebei Zhaoneng New Energy Technology Co ltd
Original Assignee
JULI NEW ENERGY CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by JULI NEW ENERGY CO Ltd filed Critical JULI NEW ENERGY CO Ltd
Priority to CN201710649732.7A priority Critical patent/CN107359112B/en
Publication of CN107359112A publication Critical patent/CN107359112A/en
Application granted granted Critical
Publication of CN107359112B publication Critical patent/CN107359112B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251Diffusion into or out of group IV semiconductors
    • H01L21/2252Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Photovoltaic Devices (AREA)

Abstract

The invention discloses a manufacturing method of a P-type double-sided crystalline silicon battery, which comprises the steps of firstly carrying out double-sided texturing on a silicon wafer by utilizing a traditional texturing process, then adopting a slurry printing process and a chain type horizontal diffusion process which take a solid impurity source as a main component, then carrying out double-sided film coating, double-sided printing of a front silver electrode and sintering. Compared with the conventional double-sided battery, the double-sided battery preparation process adopting the method of the invention is simpler, especially the double-sided printing process and the chained diffusion process, ensures that different diffusion sources at the edges are not doped with each other, and simultaneously reduces the leakage rate of the finished battery; compared with the traditional tubular diffusion process, the diffusion time of the chained diffusion process is greatly shortened, and the production efficiency is improved.

Description

Manufacturing method of P-type double-sided crystalline silicon battery
Technical Field
The invention relates to the technical field of solar cell production, in particular to a manufacturing method of a P-type double-sided crystalline silicon cell.
Background
In order to improve the battery conversion efficiency, new double-sided batteries have been produced in recent years. The conventional preparation of the P-type double-sided battery has a complicated double-sided diffusion process, the surface of the first diffusion needs to be protected from contamination while the second diffusion is carried out on the double sides, and more operation processes are needed to obtain the expected effect. Due to the limitation of the process, the crystalline silicon double-sided solar cell cannot be applied to production in a large quantity.
The chinese patent application No. 201310466393.0 discloses a method for manufacturing a P-type double-sided solar cell, but the diffusion process in the technical scheme in the patent application adopts a liquid diffusion source and a tubular diffusion, and the production efficiency is low.
Disclosure of Invention
The invention aims to provide a manufacturing method of a P-type double-sided crystalline silicon battery, which aims to solve the problems in the prior art, so that the manufacturing process of the P-type double-sided crystalline silicon battery is simple and is suitable for large-scale production and use.
In order to achieve the purpose, the invention provides the following scheme:
the invention provides a manufacturing method of a P-type double-sided crystalline silicon battery, which is characterized by comprising the following steps of: the method comprises the following steps:
A. alkali texturing is carried out on the two sides of the silicon wafer;
B. printing boron slurry containing solid impurity boron oxide on the back of the textured silicon wafer, wherein the boron slurry is 0.5-1mm away from the edge of the silicon wafer, and the thickness of the boron slurry is 0.1-0.5 mm;
C. performing horizontal chain type diffusion on the silicon wafer with the boron paste printed on the back surface;
D. carrying out alkali cleaning on the back of the silicon wafer subjected to horizontal chain type diffusion by using a mixed solution of 10-15% of potassium hydroxide and 1-5% of hydrogen peroxide;
E. acid cleaning the silicon wafer subjected to alkali cleaning by using a mixed solution of 10-15% of hydrofluoric acid and 10-15% of hydrochloric acid;
F. printing phosphorus slurry containing P2O5 solid impurities on the front surface of the silicon chip after acid cleaning, wherein the distance between the phosphorus slurry and the edge of the silicon chip is 0.5-1mm, and the thickness of the phosphorus slurry is 0.1-0.5 mm;
G. performing horizontal chain type diffusion on the silicon wafer printed with the phosphorus paste;
H. carrying out acid cleaning on the silicon wafer subjected to horizontal chain type diffusion by using 10% -15% hydrochloric acid solution, and then cleaning and drying by using deionized water;
I. plating silicon nitride antireflection films on the two sides of the dried silicon wafer;
J. printing positive silver electrodes on the two sides of the silicon wafer;
K. and sintering the silicon wafer.
Preferably, in the step C, the horizontal chain type diffusion adopts a roller way type chain type diffusion furnace, the roller way type chain type diffusion furnace is divided into a drying area, a diffusion area and a cooling area, the temperature of the diffusion area is 850-; the temperature of the cooling zone is 150 ℃ and 250 ℃, and the belt speed is 50-100 m/min; the sheet resistance of boron diffusion is 80-100 omega.
Preferably, in the step G, the horizontal chain type diffusion adopts a roller way type chain type diffusion furnace, the roller way type chain type diffusion furnace is divided into a drying area, a diffusion area and a cooling area, the temperature of the diffusion area is 750-900 ℃, and the diffusion time is 10-45 min; the temperature of the cooling zone is 150 ℃ and 250 ℃, and the belt speed is 50-100 m/min; the sheet resistance of the phosphorus diffusion is 80-100 omega.
Preferably, in the step I, the thickness of the antireflection film is 70 to 90nm, and the refractive index is 2.00 to 2.10; the thickness of the back-face and front-face antireflection film is 70-90nm, and the refractive index is 2.00-2.10.
The invention discloses the following technical effects:
according to the invention, the silicon wafer is subjected to double-sided texturing by using a traditional texturing process, then printing on the surface of the silicon wafer by using a solid impurity diffusion source and double-sided diffusion by using a chain type horizontal diffusion process, and then double-sided film coating and double-sided printing of a positive silver electrode are carried out. Compared with the conventional double-sided battery, the double-sided battery preparation process adopting the method of the invention is simpler, and particularly, the printing process and the chain type diffusion process of the silicon chip surface by the solid impurity diffusion source effectively ensure that different diffusion sources at the edge are not doped with each other, and simultaneously reduce the leakage rate of the finished battery; compared with the traditional tubular diffusion process, the diffusion time of the chained diffusion process is greatly shortened, the square resistance of the silicon wafer is more uniform, the continuous production is realized, and the production efficiency is improved.
Detailed Description
The following will clearly and completely describe the technical solutions in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The present invention will be described in further detail with reference to specific embodiments in order to make the above objects, features and advantages more apparent and understandable.
The invention provides a manufacturing method of a P-type double-sided crystalline silicon battery, which comprises the following steps:
A. alkali texturing is carried out on the two sides of the silicon wafer;
B. printing boron slurry containing solid impurity boron oxide on the back of the textured silicon wafer, wherein the boron slurry is 0.5-1mm away from the edge of the silicon wafer, and the thickness of the boron slurry is 0.1-0.5 mm;
C. performing horizontal chain type diffusion on the silicon wafer with the boron paste printed on the back surface; the horizontal chain type diffusion adopts a roller way type chain type diffusion furnace, the roller way type chain type diffusion furnace is divided into a drying area, a diffusion area and a cooling area, the temperature of the diffusion area is 850-950 ℃, and the diffusion time is 10-45 min; the temperature of the cooling zone is 150 ℃ and 250 ℃, and the belt speed is 50-100 m/min; the sheet resistance of boron diffusion is 80-100 omega.
D. Carrying out alkali cleaning on the back of the silicon wafer subjected to horizontal chain type diffusion by using a mixed solution of 10-15% of potassium hydroxide and 1-5% of hydrogen peroxide;
E. acid cleaning the silicon wafer subjected to alkali cleaning by using a mixed solution of 10-15% of hydrofluoric acid and 10-15% of hydrochloric acid;
F. printing phosphorus slurry containing P2O5 solid impurities on the front surface of the silicon chip after acid cleaning, wherein the distance between the phosphorus slurry and the edge of the silicon chip is 0.5-1mm, and the thickness of the phosphorus slurry is 0.1-0.5 mm;
G. performing horizontal chain type diffusion on the silicon wafer printed with the phosphorus paste; the horizontal chain type diffusion adopts a roller way type chain type diffusion furnace, the roller way type chain type diffusion furnace is divided into a drying area, a diffusion area and a cooling area, the temperature of the diffusion area is 750-900 ℃, and the diffusion time is 10-45 min; the temperature of the cooling zone is 150 ℃ and 250 ℃, and the belt speed is 50-100 m/min; the sheet resistance of the phosphorus diffusion is 80-100 omega.
H. Carrying out acid cleaning on the silicon wafer subjected to horizontal chain type diffusion by using 10% -15% hydrochloric acid solution, and then cleaning and drying by using deionized water;
I. plating silicon nitride antireflection films on the two sides of the dried silicon wafer; in the step I, the thickness of the antireflection film is 70-90nm, and the refractive index is 2.00-2.10; the thickness of the antireflection film on the back and the front is 70-90nm, and the refractive index is 2.00-2.10.
J. Printing positive silver electrodes on the two sides of the silicon wafer;
K. and sintering the silicon wafer.
The above-described embodiments are merely illustrative of the preferred embodiments of the present invention, and do not limit the scope of the present invention, and various modifications and improvements of the technical solutions of the present invention can be made by those skilled in the art without departing from the spirit of the present invention, and the technical solutions of the present invention are within the scope of the present invention defined by the claims.

Claims (4)

1. A manufacturing method of a P-type double-sided crystalline silicon battery is characterized by comprising the following steps: the method comprises the following steps:
A. alkali texturing is carried out on the two sides of the silicon wafer;
B. printing boron slurry containing solid impurity boron oxide on the back of the textured silicon wafer, wherein the boron slurry is 0.5-1mm away from the edge of the silicon wafer, and the thickness of the boron slurry is 0.1-0.5 mm;
C. carrying out horizontal chain type diffusion on the silicon wafer with the boron slurry printed on the back surface by adopting a roller way type chain type diffusion furnace;
D. carrying out alkali cleaning on the back of the silicon wafer subjected to horizontal chain type diffusion by using a mixed solution of 10-15% of potassium hydroxide and 1-5% of hydrogen peroxide;
E. acid cleaning the silicon wafer subjected to alkali cleaning by using a mixed solution of 10-15% of hydrofluoric acid and 10-15% of hydrochloric acid;
F. will contain P2O5Printing phosphorus slurry of solid impurities on the front surface of the acid-cleaned silicon wafer, wherein the distance between the phosphorus slurry and the edge of the silicon wafer is 0.5-1mm, and the thickness of the phosphorus slurry is 0.1-0.5 mm;
G. carrying out horizontal chain type diffusion on the silicon wafer printed with the phosphorus slurry by adopting a roller way type chain type diffusion furnace;
H. carrying out acid cleaning on the silicon wafer subjected to horizontal chain type diffusion by using 10% -15% hydrochloric acid solution, and then cleaning and drying by using deionized water;
I. plating silicon nitride antireflection films on the two sides of the dried silicon wafer;
J. printing positive silver electrodes on the two sides of the silicon wafer;
K. and sintering the silicon wafer.
2. The method for manufacturing a P-type double-sided crystalline silicon battery according to claim 1, characterized in that: in the step C, the horizontal chain type diffusion adopts a roller way type chain type diffusion furnace, the roller way type chain type diffusion furnace is divided into a drying area, a diffusion area and a cooling area, the temperature of the diffusion area is 850-; the temperature of the cooling zone is 150 ℃ and 250 ℃, and the belt speed is 50-100 m/min; the sheet resistance of boron diffusion is 80-100 omega.
3. The method for manufacturing a P-type double-sided crystalline silicon battery according to claim 1, characterized in that: in the step G, the horizontal chain type diffusion adopts a roller way type chain type diffusion furnace, the roller way type chain type diffusion furnace is divided into a drying area, a diffusion area and a cooling area, the temperature of the diffusion area is 750-; the temperature of the cooling zone is 150 ℃ and 250 ℃, and the belt speed is 50-100 m/min; the sheet resistance of the phosphorus diffusion is 80-100 omega.
4. The method for manufacturing a P-type double-sided crystalline silicon battery according to claim 1, characterized in that: in the step I, the thickness of the double-sided silicon nitride antireflection film is 70-90nm, and the refractive index is 2.00-2.10.
CN201710649732.7A 2017-08-02 2017-08-02 Manufacturing method of P-type double-sided crystalline silicon battery Expired - Fee Related CN107359112B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201710649732.7A CN107359112B (en) 2017-08-02 2017-08-02 Manufacturing method of P-type double-sided crystalline silicon battery

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710649732.7A CN107359112B (en) 2017-08-02 2017-08-02 Manufacturing method of P-type double-sided crystalline silicon battery

Publications (2)

Publication Number Publication Date
CN107359112A CN107359112A (en) 2017-11-17
CN107359112B true CN107359112B (en) 2021-06-01

Family

ID=60286265

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710649732.7A Expired - Fee Related CN107359112B (en) 2017-08-02 2017-08-02 Manufacturing method of P-type double-sided crystalline silicon battery

Country Status (1)

Country Link
CN (1) CN107359112B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109616554A (en) * 2018-12-13 2019-04-12 杭州海莱德智能科技有限公司 A kind of chain type diffusion system
CN109950347A (en) * 2019-04-02 2019-06-28 河北大学 A kind of preparation method of double-side cell

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103811588A (en) * 2014-01-26 2014-05-21 晶澳太阳能有限公司 Double-faced diffusion technology of solar battery
CN104733555A (en) * 2014-12-31 2015-06-24 江苏顺风光电科技有限公司 Efficient N-type double-sided solar cell and preparation method thereof
JP2016006885A (en) * 2012-01-10 2016-01-14 日立化成株式会社 Method for manufacturing substrate for solar cell and method for manufacturing solar cell element
CN106057951A (en) * 2016-07-27 2016-10-26 青海黄河上游水电开发有限责任公司光伏产业技术分公司 Double-sided solar cell based on P type silicon substrate and preparation method thereof
CN106098807A (en) * 2016-06-27 2016-11-09 泰州乐叶光伏科技有限公司 A kind of N-type crystalline silicon solar battery structure and preparation method thereof
CN106653942A (en) * 2016-11-28 2017-05-10 内蒙古日月太阳能科技有限责任公司 N-type monocrystalline silicon double-sided cell manufacturing method

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016006885A (en) * 2012-01-10 2016-01-14 日立化成株式会社 Method for manufacturing substrate for solar cell and method for manufacturing solar cell element
CN103811588A (en) * 2014-01-26 2014-05-21 晶澳太阳能有限公司 Double-faced diffusion technology of solar battery
CN104733555A (en) * 2014-12-31 2015-06-24 江苏顺风光电科技有限公司 Efficient N-type double-sided solar cell and preparation method thereof
CN106098807A (en) * 2016-06-27 2016-11-09 泰州乐叶光伏科技有限公司 A kind of N-type crystalline silicon solar battery structure and preparation method thereof
CN106057951A (en) * 2016-07-27 2016-10-26 青海黄河上游水电开发有限责任公司光伏产业技术分公司 Double-sided solar cell based on P type silicon substrate and preparation method thereof
CN106653942A (en) * 2016-11-28 2017-05-10 内蒙古日月太阳能科技有限责任公司 N-type monocrystalline silicon double-sided cell manufacturing method

Also Published As

Publication number Publication date
CN107359112A (en) 2017-11-17

Similar Documents

Publication Publication Date Title
CN108054224B (en) Textured structure of crystalline silicon solar cell and preparation method thereof
JP6553731B2 (en) N-type double-sided battery wet etching method
CN110265497B (en) N-type crystalline silicon solar cell with selective emitter and preparation method thereof
CN103178159B (en) A kind of crystal silicon solar energy battery lithographic method
CN105118898A (en) Silicon chip surface passivation method and manufacturing method of N type double-face cell based thereon
CN107675263A (en) The optimization method of monocrystalline silicon pyramid structure matte
CN110416359A (en) A kind of preparation method of TOPCon structure battery
CN101826573A (en) Method for preparing semiconductor secondary grid-metal primary grid crystalline silicon solar battery
CN107190247B (en) A kind of preparation method of solar battery PECVD multilayer passivated reflection reducing membrane
CN107359112B (en) Manufacturing method of P-type double-sided crystalline silicon battery
CN102623563B (en) Manufacturing method for double-face illuminated crystalline silicon solar cell
CN109037112B (en) Method for etching crystalline silicon solar SE battery by using inorganic alkali
CN101635319B (en) Method for manufacturing back aluminium diffused N type solar cell
CN112599636A (en) Preparation method of crystalline silicon solar cell and crystalline silicon solar cell
CN105428453A (en) Preparation method of inter-digital back contact battery
CN104362219B (en) Crystalline solar cell production process
CN104060325A (en) Polycrystalline silicon texturing solution and texturing method thereof
CN116936687B (en) Combined passivation back contact battery and post-texturing method for removing undercut residual mask layer
CN112349802B (en) Manufacturing method of ingot casting single crystal or polycrystalline amorphous silicon heterojunction solar cell
CN101609862A (en) A kind of method that reduces surface reflectivity of texture mono-crystalline silicon chip
CN102945890B (en) Process for implementing qualification of potential-induced decay of crystalline silicon battery assembly
CN105529380A (en) Preparation method for single crystalline silicon solar cell piece with polished back surface
CN115148861B (en) Manufacturing method of heterojunction solar cell
CN102263154A (en) Method for improving texture-making surface conditions of solar cells
CN113257954B (en) Method for solving poor EL of alkali-polished SE-PERC battery

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
TR01 Transfer of patent right

Effective date of registration: 20211122

Address after: 072550 no.4685, Changcheng North Street, Xushui District, Baoding City, Hebei Province

Patentee after: Hebei Zhaoneng New Energy Technology Co.,Ltd.

Address before: 072550 Xushui District, Baoding City, Hebei Province, Juli Road

Patentee before: JULI NEW ENERGY Co.,Ltd.

TR01 Transfer of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20210601

CF01 Termination of patent right due to non-payment of annual fee