CN107342216B - Plasma activated conformal dielectric film deposition - Google Patents

Abstract

The invention provides a plasma activated conformal dielectric film deposition. The present invention provides a method of depositing a film on a substrate surface comprising a surface mediated reaction in which the film is grown through one or more cycles of adsorption of reactants and reaction. In one aspect, the method is characterized by intermittently delivering dopant species to the membrane between cycles of adsorption and reaction.

Description

Plasma activated conformal dielectric film deposition

The present application is a divisional application of a patent application entitled "plasma activated conformal dielectric film deposition" by knowak systems, inc, having application number 201280046487.6, filed on day 2012, 8/29.

Cross Reference to Related Applications

In accordance with 35u.s.c. § 120, this application continues to claim priority as part of U.S. patent application No.13/084,399 filed 4, 11/2011, and U.S. patent application No.13/084,399 claims the benefit of U.S. provisional patent application No. 61/324710 filed 4, 15/2010, U.S. provisional patent application No. 61/372,367 filed 10/2010, U.S. provisional patent application No. 61/379,081 filed 9, 1/2010, and U.S. provisional patent application No. 61/417,807 filed 29/2010. Each of the above-mentioned patent applications is incorporated by reference in its entirety into the present application and is used for all purposes. This application is also a continuation-in-part application of U.S. patent application No.13/084,305, filed on 11/4/2011, the entire contents of which are incorporated by reference into this application and used for all purposes.

Technical Field

The present invention relates to semiconductor manufacturing processes, and more particularly to plasma activated conformal dielectric film deposition.

Background

Various thin film layers for semiconductor devices may be deposited using an Atomic Layer Deposition (ALD) process. However, existing ALD processes may not be suitable for depositing highly conformal dielectric films.

Disclosure of Invention

Various aspects disclosed herein relate to methods and apparatus for depositing films on a substrate surface. In certain embodiments, the method comprises depositing a film by a surface-mediated reaction in which the film is grown through one or more cycles of adsorption of reactants and reaction. In one aspect, the method is characterized by intermittently delivering the dopant species to the membrane between cycles of adsorption and reaction. At some point, the dopant species may be driven across the substrate surface to a doped region of the substrate.

In one aspect, a method is disclosed for depositing a film on a substrate surface in a reaction chamber. The method is characterized by the following operations: (a) introducing a first reactant into the reaction chamber under conditions that allow the first reactant to adsorb to the substrate surface; (b) introducing a second reactant into the reaction chamber while the first reactant is adsorbed on the substrate surface; (c) exposing the substrate surface to a plasma to drive a reaction between the first and the second reactants on the substrate surface to form a portion of the film; (d) repeating (a) - (c) at least once; (e) introducing a dopant-containing material into the reaction chamber under conditions that allow the dopant-containing material to contact the exposed surface of the membrane, but not in (a) - (d); and (f) introducing a dopant from the dopant-containing material into the film. Introducing the dopant into the film can involve exposing the dopant-containing material to a plasma.

In various embodiments, the method additionally includes driving the dopant from the film into features of the substrate surface where the film resides. Driving the dopant from the film may be achieved by annealing the film. In some applications, the film resides on a three-dimensional feature of the substrate surface, and driving dopants from the film causes conformal diffusion of the dopants into the feature. In a particular application, the features have a width of no greater than about 40 nanometers.

In some embodiments, the film is a dielectric film. In some cases, the total film thickness is between about 10-100 angstroms. In various embodiments, the dopant concentration in the film is between about 0.01% to 10% by weight.

In certain embodiments, this aspect of the method further comprises repeating (a) - (c) after (e) or (f). In certain embodiments, this aspect of the method further comprises repeating (a) - (e). In some embodiments, the amount of film deposited in (a) - (c) is between about 0.5 to 1 angstroms.

In certain embodiments, the method further comprises purging the second reactant from the reaction chamber prior to exposing the substrate surface to the plasma. The purging may be accomplished by flowing a gas containing an oxidant into the reaction chamber. In some embodiments, the first and second reactants coexist in the reaction chamber in a gas phase, and the first and second reactants do not significantly react with each other in the reaction chamber until exposed to plasma in (c).

In certain embodiments, the first reactant is an oxidizing agent, for example, nitrous oxide. In certain embodiments, the second reactant is a dielectric precursor, such as (i) an alkylaminosilane (SiH)_x (NR₂)_4-x) Wherein x is 1-3 and R includes an alkyl group, or (ii) a halosilane (SiH)_xY_4-x) Wherein X ═ 1 to 3, and Y include Cl, Br, and I. In one embodiment, the second reactant is BTBAS. In certain embodiments, the dopant-containing material is selected from the group consisting of phosphines, arsines, alkylboron, alkylgalkanes, alkylphosphines, phosphorus halides, arsenic halides, gallium halides, boron halides, alkylboron, and diborane.

In another aspect, a disclosed method deposits a film on a substrate surface in a reaction chamber. The method is characterized by the following operations: (a) flowing an oxidant into the reaction chamber under conditions that allow a first reactant to adsorb onto the substrate surface; (b) introducing a dielectric precursor into the reaction chamber while the oxidant continues to flow into the reaction chamber; (c) exposing the substrate surface to a plasma to drive the dielectric precursor and oxidant on the substrate surface to react to form a portion of the dielectric film; (d) introducing a dopant-containing material into the reaction chamber under conditions that allow the dopant-containing material to contact the exposed surface of the membrane, but not in (a) - (c); and (e) causing dopants from the dopant-containing material to be incorporated into the dielectric film. In one embodiment, the dielectric precursor is BTBAS or other precursor as identified in the previous aspect.

Further, the method may require repeating operations (a) - (c) one or more times. In a specific example, when (a) is initially performed, the oxidant comprises a first ratio of oxygen to nitrogen, and when (a) is subsequently performed, the oxidant comprises a second ratio of oxygen to nitrogen. The second ratio is less than the first ratio. For example, when (a) is initially performed, the oxidizing agent may comprise elemental oxygen, and when (a) is repeated, the oxidizing agent comprises nitrous oxide. In some embodiments, when (c) is initially performed, the substrate is at a first temperature, and when (c) is repeated, the substrate is at a second temperature, the second temperature being higher than the first temperature.

In some cases, the method further includes driving dopants from the dielectric film into the substrate. In some embodiments, the method further comprises contacting the substrate surface with the dopant-containing material prior to (a).

In another aspect, the disclosed method deposits a dielectric film on a substrate surface in a reaction chamber according to the following operations: (a) introducing a dielectric precursor into the reaction chamber under conditions that allow the precursor to adsorb to the substrate surface; (b) thereafter purging the dielectric precursor from the reaction chamber while the precursor remains adsorbed on the substrate surface; (c) exposing the substrate surface to a plasma to drive a reaction of the dielectric precursor on the substrate surface to form a portion of the dielectric film; and (d) introducing a dopant precursor into the reaction chamber under conditions that allow the dopant precursor to contact the dielectric film, without being introduced in (a) - (c). In some embodiments, the method further comprises flowing an oxidant into the reaction chamber before and during (a) - (c). In some cases, the method further comprises reacting the dopant precursor to introduce a dopant into the film.

Yet another aspect of the invention relates to an apparatus for depositing a doped film on a substrate surface. The device is characterized by the following features: a reaction chamber comprising an apparatus for receiving the substrate during deposition of the doped dielectric film; one or more process gas inlets coupled to the reaction chamber; and a controller. The controller is designed or configured to cause the apparatus to perform the following operations: (ii) (a) introducing a first reactant into the reaction chamber under conditions that allow the first reactant to adsorb to the substrate surface; (b) introducing a second reactant into the reaction chamber while the first reactant is adsorbed on the substrate surface; (c) exposing the substrate surface to a plasma to drive a reaction between the first and the second reactants on the substrate surface to form a portion of the film; (d) repeating (a) - (c) at least once; (e) introducing a dopant-containing material into the reaction chamber under conditions that allow the dopant-containing material to contact the exposed surface of the membrane, without introduction in (a) - (d); and (f) introducing a dopant from the dopant-containing material into the film. The controller may be designed or configured to manage the performance of other methods, such as those discussed in accordance with other aspects.

In certain embodiments, the controller is further designed or configured to cause the device to flow an oxidant into the reaction chamber before and during (a) - (d). In certain embodiments, the controller is further designed or configured to repeat (a) - (c) after (e) or (f). In certain embodiments, the controller is further designed or configured to cause the dopant to be driven from the film into a feature of the substrate surface on which the film is located. Driving the dopant from the film may be achieved by annealing the film. In some embodiments, the controller is further designed or configured to cause (e) performance of an interval between one or more repetitions of (a) - (d), wherein the interval is varied during deposition of the film.

In various embodiments, the controller is further designed or configured to cause purging of the second reactant from the reaction chamber prior to exposing the substrate surface to the plasma. In one example, the purging is accomplished by flowing an oxidant-containing gas into the reaction chamber under the direction of the controller.

In particular, some aspects of the invention may be set forth as follows:

1. a method of depositing a film on a non-planar substrate surface in a reaction chamber, the method comprising:

introducing a first reactant into the reaction chamber under non-plasma conditions such that the first reactant adsorbs on the non-planar substrate surface;

introducing a dopant-containing material into the reaction chamber under non-plasma conditions; and

the non-planar substrate surface is then exposed to a plasma to form a doped film conformal with the non-planar substrate surface.

2. The method of clause 1, wherein the first reactant is a silicon-containing reactant.

3. The method of clause 1, wherein the dopant is selected from the group consisting of boron, phosphorus, arsenic, and gallium.

4. The method of clause 1, further comprising introducing a second reactant into the reaction chamber prior to exposing the non-planar substrate surface to the plasma.

5. The method of clause 1, wherein the second reactant is an oxidizing agent.

6. The method of clause 1, wherein the second reactant is a nitrogen-containing reactant.

7. The method of clause 5, wherein the doped film is a film of doped silicon oxide.

8. The method of clause 6, wherein the doped film is a film of doped silicon nitride.

9. The method of clause 1, wherein the doped film is a film of doped silicon carbide.

10. The method of clause 1, further comprising introducing a second reactant into the reaction chamber while adsorbing the first reactant onto the non-flat substrate surface.

11. The method of clause 10, further comprising exposing the non-planar substrate surface to a plasma to drive a reaction between the first and second reactants on the substrate surface to form a portion of the film.

These and other features are described in more detail below with reference to the associated drawings.

Drawings

FIG. 1 schematically illustrates a timing diagram for an example Conformal Film Deposition (CFD) process, according to an embodiment of the disclosure.

Fig. 2 schematically illustrates a timing diagram of another example CFD process, according to an embodiment of the present disclosure.

Fig. 3 schematically illustrates a timing diagram of another example CFD process, according to an embodiment of the present disclosure.

Fig. 4 schematically illustrates a timing diagram of an example CFD process including a plasma processing cycle, according to an embodiment of the disclosure.

Fig. 5 illustrates an example correlation between wet etch rate ratio and deposition temperature of a deposited film, according to an embodiment of the present disclosure.

Fig. 6 illustrates an example correlation between wet etch rate ratio and stress for a deposited film according to embodiments of the present disclosure.

FIG. 7 illustrates an example correlation between film contaminant concentration and deposition temperature for a deposited film, according to an embodiment of the present disclosure.

Fig. 8 schematically illustrates a cross-section of an example of a non-planar substrate containing a plurality of voids.

Fig. 9 schematically illustrates a timing diagram for a CFD process including an example of a transition to a PECVD process, according to an embodiment of the present disclosure.

Fig. 10 schematically shows a cross-section of an example of gap filling containing a keyhole void.

Fig. 11 schematically illustrates a timing diagram for an example CFD process including in-situ etching, according to an embodiment of the disclosure.

Fig. 12A schematically shows a cross-section of an example of a re-entry gap-filling profile.

Fig. 12B schematically illustrates a cross-section of an example of the reentrant gap fill profile of fig. 12A during in-situ etching, in accordance with an embodiment of the present disclosure.

Fig. 12C schematically shows a cross-section of an example of the gap fill profile of fig. 12B during in situ etching, in accordance with an embodiment of the present disclosure.

Fig. 13 schematically illustrates an example processing station, according to an embodiment of the disclosure.

FIG. 14 schematically illustrates an example processing tool including a plurality of processing stations and a controller, according to an embodiment of this disclosure.

Fig. 15 schematically illustrates a cross-sectional view of an example of a through silicon via during a CFD process that includes in-situ etching, in accordance with an embodiment of the present disclosure.

Fig. 16 shows a transistor having a three-dimensional gate structure in which a source and a drain are formed in a thin vertical structure that is difficult to dope by conventional ion implantation techniques.

Fig. 17 presents a baseline CFD operational sequence from left to right as time progresses along the x-axis.

Fig. 18 and 19 depict embodiments in which the dopant is deposited at the interface of the underlying substrate, followed by a CFD cycle interspersed with dopant delivery, and optionally an undoped protective "capping" layer that may be a CFD oxide film.

FIG. 20 shows a typical deposition scheme for synthesizing CFD BSG/PSG films.

FIG. 21 shows the step coverage calculation for CFD films on dense and isolated structures as

。

SIMS data is presented in fig. 22, which shows that the average boron concentration in the CFD film can be adjusted in the range of about 0.5-3.5 wt% boron.

Detailed Description

The fabrication of semiconductor devices typically involves depositing one or more thin films on a non-planar substrate in an integrated manufacturing process. In some aspects of the integration process, it may be useful to deposit thin films that conform to the substrate topography. For example, a silicon nitride film may be deposited on top of an elevated gate stack (elevated gate stack) as a spacer to protect the lightly doped source and drain regions from subsequent ion implantation processes.

In the spacer layer deposition process, a Chemical Vapor Deposition (CVD) process may be used to form a silicon nitride film on a non-planar substrate, which is then anisotropically etched to form the spacer structures. However, as the distance between gate stacks decreases, the material transport limitations of CVD gas phase reactions may lead to "break-loafing" deposition effects. These effects typically result in thicker deposits at the top surface of the gate stack and thinner deposits at the bottom corners of the gate stack. Furthermore, since some dies (die) may have regions of different device densities, the effects of mass transport across the wafer surface may cause variations in film thickness within the die and within the wafer. These thickness variations may result in over-etching in some areas and under-etching in other areas. This may reduce device performance and/or die yield.

Some approaches to these problems include Atomic Layer Deposition (ALD). In contrast to CVD processes that use thermally activated vapor phase reactions to deposit films, ALD processes use surface-mediated deposition reactions to deposit thin films layer-by-layer. In one exemplary ALD process, a substrate surface including a plurality of surface active sites is exposed to a vapor phase distribution of a first film precursor (P1). Some molecules of P1 may form a condensed phase on top of the substrate surface, including chemisorbed species and physisorbed molecules of P1. The reactor was then evacuated to remove the gas phase and physisorbed P1 so that only chemisorbed species remained. A second film precursor (P2) is then introduced into the reactor such that some of the molecules of P2 adsorb to the substrate surface. The reactor may be evacuated again, at which point the unconstrained P2 is removed. Then, the thermal energy provided to the substrate activates the surface reaction between the adsorbed molecules of P1 and P2 to form a film. Finally, the reactor was evacuated to remove reaction byproducts and possibly unreacted P1 and P2, ending the ALD cycle. Other ALD cycles may be included to increase the thickness of the film.

In one example, each ALD cycle may deposit a film layer having a thickness between 0.5 and 3 angstroms, depending on the exposure time of the precursor and the sticking coefficient of the precursor for the dosing step. Thus, the ALD process can be time consuming when depositing films more than a few nanometers thick. In addition, some precursors may have long exposure times to deposit conformal films, which may also reduce the time to wafer throughput.

Conformal films may also be deposited on planar substrates. For example, an antireflective layer in a lithographic patterning application may be formed from a flat stack of layers containing different types of films. Such antireflective layers may be between about 100 to 1000 angstroms thick, making ALD processes less attractive than CVD processes. However, such antireflective layers may also have a lower tolerance for intra-wafer thickness variations than many CVD processes may provide. For example, a 600 angstrom thick antireflective layer may have a tolerance of a thickness range of less than 3 angstroms.

Accordingly, the present invention provides several examples of processes and apparatus for providing plasma activated Conformal Film Deposition (CFD) on non-planar and planar substrates. These examples include various features employed in some, but not all, CFD processes. Among these features are: (1) eliminating or reducing the time required to "purge" one or both reactants from the reaction chamber, (2) providing a continuous flow of at least one reactant while intermittently flowing different reactants into the reaction chamber, (3) igniting a plasma when one of the reactants is in the gas phase, rather than when all of the reactants are purged out of the reaction chamber, (4) treating the deposited CFD film with the plasma to modify the properties of the film, (5) depositing a portion of the film, typically in the same reaction chamber, by PECVD after a first portion of the film is deposited by CFD, (6) etching the partially deposited film between stages of CFD, and (7) doping the CFD film by inserting an impurity delivery cycle only for cycles of deposition of the film. Of course, the above list is not exhaustive. Various other CFD features will be apparent from a study of the remainder of this specification.

The concept of CFD "looping" is relevant to the various examples discussed herein. In general, cycling is the minimum set of operations required to perform a surface deposition reaction once. The result of one cycle is to produce at least a partial film layer on the substrate surface. Typically, a CFD cycle will include only those steps necessary to deliver and adsorb each reactant to the substrate surface, and then allow these adsorbed reactants to form part of the film layer. Of course, the cycle may include several ancillary steps, such as purging one of the reactants or byproducts, and/or treating the deposited portion of the film. Typically, a loop contains a unique sequence of operations for only one case. As an example, one cycle may include the following operations: (i) transporting/adsorbing reactant a, (ii) transporting/adsorbing reactant B, (iii) purging B out of the reaction chamber, and (iv) applying a plasma to drive the surface of a and B to react, thereby forming a partial film layer on the surface.

The above 7 features will now be discussed further. In the following description, a CFD reaction is considered in which one or more reactants adsorb to a substrate surface and then react by interaction with a plasma to form a film on the surface.

Feature 1 (continuous flow of reactant) -when reactant a would not normally flow in conventional ALD, reactant a is allowed to flow continuously to the reaction chamber during one or more portions of the CFD cycle. In conventional ALD, reactant a flows only to allow the reactant to adsorb to the substrate surface. Reactant a does not flow during the other stages of the ALD cycle. However, according to some of the CFD examples described in the present invention, reagent a flows not only during the phase associated with its adsorption, but also at a phase of the CFD cycle outside the operation in which adsorption a is performed. For example, in many instances, the device is dosing a second reactant (referred to herein as reactant B) while reactant a is flowing into the reactor. Thus, during at least a portion of the CFD cycle, reactants a and B coexist in the gas phase. In addition, the reactant a may flow while plasma is applied to drive the reaction at the substrate surface. Note that a continuous flow of reactants may be delivered to the reaction chamber in conjunction with a carrier gas, such as argon.

One advantage of the example of continuous flow is that the formed flow avoids delays and changes in flow caused by the transient start-up and stabilization of flow associated with opening and closing the flow.

As a specific example, the oxide film may be deposited by a conformal film deposition process using a primary reactant (sometimes also referred to as a "solid component" precursor, or simply "reactant B" in this example). Bis (tert-butylamino) silane (BTBAS) is one such primary reactant. In this example, the oxide deposition process involves the delivery of an oxidant, such as oxygen or nitrous oxide, which initially and continuously flows during the delivery of the primary reactant during the various exposure stages. The oxidant also flows continuously during the different plasma exposure stages. See, for example, the sequence shown in figure 1. In contrast, in a conventional ALD process, the flow of the oxidant will stop when the solid component precursor is delivered into the reactor. For example, when reactant B is delivered, the flow of reactant A will stop.

In some specific examples, the continuously flowing reactant is an "auxiliary" reactant. As used herein, a "secondary" reactant is any reactant that is not the primary reactant. As described above, the primary reactant comprises an element that is solid at room temperature for a film formed from CFD. Examples of such elements are metals (e.g., aluminum and titanium), semiconductors (e.g., silicon and germanium), and non-metals or metalloids (e.g., boron). Examples of ancillary reactants include oxygen, ozone, hydrogen, carbon monoxide, nitrous oxide, ammonia, alkylamines, and the like.

The continuous flow of reactants may be provided at a constant flow rate or at a variable but controllable flow rate. In the latter case, as an example, the flow rate of the secondary reactant may decrease during the exposure phase in which the primary reactant is delivered. For example, during oxide deposition, an oxidizing agent (e.g., oxygen or nitrous oxide) may flow continuously throughout the deposition sequence, but its flow rate may drop as the primary reactant (e.g., BTBAS) is delivered. This increases the local pressure during the BTBAS dosing process, thereby reducing the exposure time required to flood the substrate surface. Shortly before the plasma is ignited, the flow of the oxidizer may be increased to reduce the likelihood of BTBAS being present during the plasma exposure phase. In some embodiments, the continuously flowing reactants flow at varying flow rates during two or more deposition cycles. For example, the reactants may flow at a first flow rate during a first CFD cycle and at a second flow rate during a second CFD cycle.

When multiple reactants are employed and one of them is flowing continuously, at least two of them will coexist in the gas phase during a portion of the CFD cycle. Likewise, when no purging step is performed after delivery of the first reactant, both reactants will be present together. Thus, it may be important to use reactants that do not react significantly with each other in the gas phase without the application of activation energy. In general, the reactants should not react until they are present on the substrate surface and exposed to plasma or another suitable non-thermally activated condition. The selection of such reactants involves consideration of at least (1) the thermodynamic suitability of the desired reaction (gibbs free energy <0), and (2) the activation energy of the reaction, which should be sufficiently large so that the reaction at the desired deposition temperature is negligible.

Feature 2 (reduction or elimination of a purge step) -in some embodiments, the process omits or reduces the time associated with a purge step that is typically performed in conventional ALD. In conventional ALD, a separate purge step is performed after each reactant is delivered to and adsorbed onto the substrate surface. In a conventional ALD purge step, little or no adsorption or reaction occurs. This purging step is reduced or eliminated after the delivery of at least one reactant in the CFD cycle. Fig. 1 shows an example of a processing sequence with the purging step removed. A purging step of purging the reactant a from the reaction chamber is not performed. In some cases, no purging step is performed after the CFD cycle delivers the first reactant, but a purging step may optionally be performed after the delivery of the second reactant or the final delivered reactant.

The concept of a "sweeping" step or phase of CFD occurs in the discussion of various embodiments of the present invention. Generally, the purge phase removes or purges one of the gas phase reactants from the reaction chamber and is typically only performed after the delivery of that reactant is complete. In other words, the reactants are no longer transported to the reaction chamber during the purge phase. However, during the purge phase, the reactant remains adsorbed on the substrate surface. Typically, the purge is used to remove any residual gas phase reactants in the chamber after the substrate surface adsorbs the reactants to a desired level. The purge phase may also remove weakly adsorbed species (e.g., certain precursor ligands or reaction byproducts) from the substrate surface. In ALD, the purge phase is considered necessary to prevent gas phase reactions of two reactants or to prevent the interaction of one reactant with heat, plasma or other driving forces for surface reactions. In general, and unless otherwise specified, the purge phase may be accomplished by: evacuating the reaction chamber, and/or (ii) flowing a gas through the reaction chamber that does not contain the species to be purged. In case (ii), such gas may be, for example, an inert gas or an auxiliary reactant, such as a continuously flowing auxiliary reactant.

The elimination of the purge phase may be accomplished with or without a continuous flow of other reactants. In the embodiment shown in fig. 1, reactant a is not swept away after its adsorption onto the substrate surface is complete, but continues to flow in (shown by reference numeral 130).

In various embodiments where two or more reactants are used, the reactant whose purging step is eliminated or reduced is an auxiliary reactant. By way of example, the auxiliary reactant is an oxidant or nitrogen source, while the primary reactant is a silicon-, boron-, or germanium-containing precursor. Of course, scavenging of the primary reactant may also be reduced or eliminated. In some embodiments, the purging step is not performed after the secondary reactant delivery, but is optionally performed after the primary reactant delivery.

As mentioned, the purge phase need not be completely eliminated, but rather is simply of reduced duration compared to conventional ALD process purge phases. For example, during a CFD cycle, a purge phase of a reactant, such as an auxiliary reactant, may be performed for about 0.2 seconds or less, e.g., between about 0.001 and 0.1 seconds.

Feature 3 (ignition of plasma when one of the reactants is present in the gas phase) -for this feature, the plasma is ignited and then all of the reactants are purged from the reaction chamber. This is in contrast to conventional ALD processes, in which a plasma or other reaction-driven operation is activated only after the gas-phase reactants are no longer present in the reaction chamber. Note that such a feature necessarily occurs when reactant a is flowing continuously during the plasma portion of the CFD cycle as depicted in fig. 1. However, the embodiments of the present disclosure are not limited in this way. One or more reactants may flow during the plasma phase of the CFD cycle, but need not flow continuously during the CFD cycle. In addition, the reactant in the gas phase during plasma activation may be the primary reactant or the secondary reactant (when two reactants are employed in the CFD cycle).

For example, the sequence may be (i) introducing reactant A, (ii) purging A, (iii) introducing reactant B and energizing the plasma while B is flowing, and (iv) purging. In such embodiments, the process employs plasma from the gas phase to activate the reactants. This is a general example, where CFD is not limited to a sequence of sequence steps.

If the activating plasma is provided over the time period that the solid component precursor (the primary reactant) is supplied to the reactor, step coverage may become less conformal, but the deposition rate is typically increased. This is not necessarily the case, however, if the plasma activation is only performed during the delivery of one of the auxiliary reactants. The plasma may activate the gas phase auxiliary component to make it more reactive, thereby increasing its reactivity in the conformal film deposition reaction. In certain embodiments, this feature is employed in depositing a silicon-containing film (e.g., an oxide, nitride, or carbide).

Feature 4 (plasma treatment to deposit CFD film) -in these embodiments, the plasma can serve two or more functions in the conformal film deposition process. One of its roles is to activate or drive the film formation reaction in each CFD cycle. Another function is to treat the film after partial or complete deposition of the CFD film through one or more CFD cycles. The purpose of the plasma treatment is to alter one or more properties of the film. Typically, but not necessarily, the plasma treatment stage is carried out under conditions different from those employed to activate (i.e., drive) the film-forming reaction. As an example, the plasma treatment may also be performed in the presence of a reducing or oxidizing environment (e.g., in the presence of hydrogen or oxygen), which is not necessary during activation of the CFD cycle.

The plasma treatment operation may be performed during each cycle of the CFD process, during every other cycle, or on a less frequent basis. This process may be performed periodically, in combination with a fixed number of CFD cycles, or it may be performed variably (e.g., at different intervals of the CFD cycle) or even randomly. In a typical example, several CFD cycles of film deposition are performed to achieve the appropriate film thickness, followed by plasma treatment. Thereafter, film deposition was again performed for several CFD cycles without plasma treatment, and then plasma treatment was again performed. This supersequence of x CFD cycles, followed by plasma treatment (film modification), can be repeated until the film is fully formed by CFD.

In certain embodiments, the plasma treatment may be performed prior to the start of a CFD cycle to alter one or more properties of the surface on which the CFD film is deposited. In various embodiments, the surface is formed of silicon (doped or undoped) or a silicon-containing species. The modified surface is better able to create a high quality interface with a subsequently deposited CFD film. The interface may provide, for example, good adhesion, reliable electrical performance, etc., by reducing failures, for example.

The pre-treatment of the substrate prior to CFD is not limited to any particular plasma treatment. In certain embodiments, the pretreatment involves exposure to a hydrogen plasma, a nitrogen/hydrogen plasma, an ammonia plasma, an argon plasma, a helium anneal, a hydrogen anneal, an ammonia anneal, and a UV-cure in the presence of helium, hydrogen, argon, nitrogen/nitrogen forming gas, and/or ammonia. Plasma treatment may be accomplished with a variety of plasma generators, including, but not limited to, microwave, ICP-remote, ICP-direct (direct), and other means known to those skilled in the art.

In general, this processing may occur before, during, and after a CFD cycle. When occurring during a CFD cycle, the treatment frequency may be selected according to the appropriate deposition conditions. Typically, the frequency with which treatment occurs does not exceed once per cycle.

As an example, consider a process for forming silicon nitride from a precursor in which some carbon is present. Examples of such precursors include BTBAS. As a consequence of the presence of carbon in the precursor, the deposited nitride film includes some carbon impurities, which may reduce the electrical properties of the nitride. To overcome this problem, after several CFD cycles using a carbon-containing precursor, a portion of the deposited film is exposed to hydrogen in the presence of a plasma to reduce and eventually remove carbon impurities.

The plasma conditions used to modify the film surface can be selected to achieve a desired change in film properties and/or composition. In each plasma condition, for the desired modification, the following can be selected and/or tailored: oxidation conditions, reduction conditions, etching conditions, power used to generate the plasma, frequency used to generate the plasma, use of two or more frequencies to generate the plasma, plasma density, distance between the plasma and the substrate, and the like. Examples of properties that CFD films can modify by plasma treatment include: internal film stress, etch resistance, density, hardness, optical properties (refractive index, reflectivity, optical density, etc.), dielectric constant, carbon content, electrical properties (Vfb diffusion, etc.), and the like.

In some embodiments, a process other than a plasma process is used to modify the properties of the deposited film. Such processing includes electromagnetic radiation processing, thermal processing (e.g., annealing or high temperature pulsing), and the like. Any of these treatments may be performed alone or in combination with another treatment including a plasma treatment. Any such treatment may be used in place of any of the plasma treatments described above. In a particular embodiment, the treatment involves exposing the film to ultraviolet radiation. As described below, in one particular embodiment, the method involves applying UV-radiation to the CFD film oxide in situ (i.e., during formation of the film) or to the deposited oxide. Such processing may be used to reduce or eliminate structural defects and provide improved electrical performance.

In certain particular embodiments, UV treatment may be used in conjunction with plasma treatment. These two operations may be performed simultaneously or sequentially. In the sequential execution option, optionally, the UV operation occurs first. In the option of performing simultaneously, the two processes may be configured with different sources (e.g., RF power source for plasma, lamp for UV), or with a single source, such as helium plasma, which produces ultraviolet radiation byproducts.

Feature 5 (deposited by CFD and then transitioning to PECVD) -in such embodiments, the finished film is produced in part by CFD and in part by a CVD process such as PECVD. Typically, the CFD portion of the deposition process is performed first and the PECVD portion is performed second, although this is not required. The hybrid CFD/CVD process may improve step coverage (step coverage) compared to CVD alone, and additionally increase deposition rate compared to CFD alone. In some cases, a plasma or other stimulus is applied while the CFD reactants are flowing to create a parasitic CVD operation to achieve higher deposition rates, different levels of film, and the like.

In certain embodiments, two or more CFD stages may be employed, and/or two or more CVD stages may be employed. For example, an initial portion of the film may be deposited by CFD, followed by a middle portion of the film being deposited by CVD, and a final portion of the film being deposited by CFD. In such embodiments, it may be desirable to modify the CVD portion of the film, such as by plasma treatment or etching, prior to depositing a subsequent portion of the film by CFD.

A transition phase may be employed between the CFD phase and the CVD phase. The conditions used in such a transition phase are different from those used in the CFD phase or CVD phase. Typically, although not necessarily, the conditions allow both CFD surface reactions and CVD-type gas phase reactions. The transition phase typically involves exposure to a plasma, which may be pulsed, for example. Additionally, during the transition phase, one or more reactants may be delivered at a low flow rate (i.e., at a rate significantly lower than that employed during the corresponding CFD phase of the process).

Feature 6 (by CFD deposition, etching and then further by CFD deposition) -in such embodiments, one or more cycles (typically a plurality of cycles) of CFD deposition are performed, and the resulting film is then etched to remove, for example, some excess film at or near the recess entrance (tip) and then further subjected to a CFD deposition cycle. Other embodiments of structural features in the deposited film may be etched in a similar manner. The choice of etchant used for the process will depend on the material being etched. In some cases, a fluorine-containing etchant (e.g., NF) may be used₃) Or hydrogen to perform the etching operation.

In some embodiments, the etchant is generated with a remote plasma. In general, remote plasma etching is more isotropic than direct plasma. Remote plasma generally provides a relatively high proportion of radicals to the substrate. The reactivity of these radicals may vary with vertical position within the recess. At the top of the feature, the radicals are more concentrated and therefore etch at a higher rate, while further down towards the recess and at the bottom, some of the radicals are lost and therefore they etch at a lower rate. This is, of course, an ideal reactivity profile to address the problem of too much deposition occurring at the recess opening. An additional benefit of using a remote plasma in the etch is that the plasma is relatively gentle and therefore unlikely to damage the substrate layer. This is particularly beneficial when the underlying substrate layer is sensitive to oxidation or other damage.

Feature 7 (trimming the composition of the membrane with additional reactants) -many of the embodiments presented herein involve CFD processes that employ one or two reactants. In addition, many examples employ the same reactants in each CFD cycle. However, this is not necessary. First, many CFD processes can use 3 or more reactants. Examples include (i) tungsten CFD using diborane, tungsten hexafluoride, and hydrogen as reactants; and (ii) a silicon oxide CFD using diborane, BTBAS, and oxygen as reactants. Diborane may be removed from the growing film or, if appropriate, it may be incorporated into the film.

Furthermore, some examples may employ additional reactants only in certain CFD cycles. In such an example, the basic CFD process cycle only employs reactants (e.g., silicon oxide or silicon carbide) that create the base film composition. This basic method is performed in all or almost all CFD cycles. However, some CFD cycles are performed as different cycles, and they use different conditions than normal deposition cycles. For example, they may employ one or more additional reactants. These different cycles may also employ the same reactants as those used in the basic CFD process, although this is not necessary.

Such CFD processes are particularly beneficial for preparing doped oxides or other doped materials as CFD films. In some embodiments, the dopant precursor is included as an "extra" reactant for only a small portion of the CFD cycle. The frequency of dopant addition depends on the desired dopant concentration. For example, one cycle may contain a dopant precursor every 10 base material deposition cycles.

Unlike many other deposition processes, particularly those requiring thermal activation, CFD processes can be performed at relatively low temperatures. Typically, the temperature of the CFD is between about 20 and 400 ℃. Such temperatures may be selected to allow deposition in the context of temperature sensitive processes (e.g., deposition on a core of photoresist). In one particular embodiment, temperatures between about 20 and 100 ℃ are used for double patterning applications (using, for example, a core of photoresist). In another embodiment, a temperature between about 200 and 350 ℃ is used for memory fabrication processing.

As described above, CFD is well suited for depositing films at advanced technology nodes. Thus, for example, CFD processes may be integrated into processes at 32 nm nodes, 22 nm nodes, 16 nm nodes, 11 nm nodes, and beyond. These nodes are described in the semiconductor International Technology Roadmap (ITRS), which has been recognized by those skilled in the art for many years as a requirement for microelectronics. Generally, they refer to half the pitch of the memory cells. In one particular example, the CFD process is applied to "2X" devices (devices with features in the 20-29nm range) and to finer devices.

Although the examples of CFD films provided herein are mostly related to silicon-based microelectronic devices, the films may also be used in other areas. Microelectronics or optoelectronics using non-silicon semiconductors, such as GaAs and other group III-V semiconductors, as well as group II-VI materials (e.g., HgCdTe), can benefit from the CFD process disclosed herein. Applications of conformal dielectric films in the solar (e.g., photovoltaic) field, electrochromic field, and other fields are possible.

Fig. 1 schematically shows a timing diagram 100 of an exemplary embodiment of a plasma activated CFD process. Two complete CFD cycles are described. As shown, each includes an exposure to reactant a phase 120A or 120B followed by an exposure to reactant B phase 140A or 140B, a purge reactant B phase 160A or 160B, and a final plasma activation phase 180A or 180B. The plasma energy provided during the plasma activation phases 180A and 180B activates the reaction between the surface adsorbed reactants a and B. In the described embodiment, one reactant (reactant a) is delivered without a purge phase. In fact, such reactants flow continuously during the film deposition process. Thus, when reactant a is in the gas phase, a plasma is ignited. The above-described features 1-3 are embodied in the example of fig. 1.

In the illustrated embodiment, the reactant gases a and B may coexist in the gas phase without reacting with each other. Thus, one or more of the processing steps described in the ALD process may be shortened or eliminated in this example CFD process. For example, the purging step after the a exposure phases 120A and 120B may be eliminated.

The CFD process may be used to deposit any number of different types of films. Although most of the examples presented herein refer to dielectric materials, the disclosed CFD process may also be used to form films of conductive materials and films of semiconductor materials. Nitrides and oxides are characteristic dielectric materials, but carbides, oxynitrides, carbon doped oxides, borides, and the like may also be formed. Oxides include a wide range of materials including Undoped Silicate Glass (USG), doped silicate glass. Examples of doped glasses include boron doped silicate glass (BSG), phosphorus doped silicate glass (PSG), boron phosphorus doped silicate glass (BPSG).

In some embodiments, a silicon nitride film may be formed by a reaction between a silicon-containing reactant and one or more nitrogen-containing reactants and/or a mixture of nitrogen-containing reactants. Examples of silicon-containing reactants include, but are not limited to, bis (tert-butylamino) Silane (SiH)₂(NHC(CH₃)₃)₂Or BTBAS), dichlorosilane (SiH)₂Cl₂) And chlorosilane (SiH)₃Cl). Examples of nitrogen-containing reactants include, but are not limited to, ammonia, nitrogen, and tert-butylamine ((CH)₃)₃CNH₂Or tert-butylamine). Examples of nitrogen-containing reactant mixtures include, but are not limited to, mixtures of nitrogen and hydrogen.

One or more reactants may be selected according to various membrane and/or hardware conditions. For example, in some embodiments, a silicon nitride film can be formed from the reaction of dichlorosilane and plasma-activated nitrogen. Chemisorption of dichlorosilane to a silicon nitride surface can create a silicon-hydrogen terminated surface, releasing hydrogen chloride (HCl). An example of this chemisorption reaction is schematically depicted in reaction 1.

Reaction 1

The cyclic intermediate shown in reaction 1 can then be converted to a silamine-terminated surface by reaction with plasma-activated nitrogen.

However, some molecules of dichlorosilane may chemisorb by other mechanisms. For example, surface topography can hinder the formation of cyclic intermediates depicted in reaction 1. An example of another chemisorption mechanism is schematically shown in reaction 2.

Reaction 2

During the subsequent plasma activation of nitrogen, the remaining chlorine atoms of the intermediate product shown in reaction 2 can be released and can be activated by the plasma. This can result in etching of the silicon nitride surface, possibly causing the silicon nitride film to become rough or hazy. In addition, the residual chlorine atoms may be physically and/or chemically re-adsorbed, possibly contaminating the deposited film. Such contamination can alter the physical and/or electrical properties of the silicon nitride film. In addition, activated chlorine atoms can also cause etch damage to the hardware portions of the processing station, potentially reducing the useful life of the processing station portions.

Thus, in some embodiments, chlorosilanes may be substituted for dichlorosilanes. This may reduce membrane fouling, membrane damage, and/or damage to the processing stations. Reaction 3 schematically shows an example of chlorosilane chemisorption.

Reaction 3

While a chlorosilane is used as the silicon-containing reactant in the example shown in reaction 3, it is to be understood that any suitable monosubstituted halosilane may be used.

As explained above, the described intermediate structure can be reacted with a nitrogen source to form a silicon amine terminated surface of silicon nitride. For example, ammonia can be activated by plasma to form various species of ammonia radicals. The radical species reacts with the intermediate to form a silamine-terminated surface.

However, ammonia can be strongly physically adsorbed to the surfaces of reactant delivery lines, process stations, and exhaust piping, which can result in extended purge and evacuation times. In addition, ammonia may have a high reactivity with some gas phase silicon-containing reactants. Such as dichlorosilane (SiH)₂Cl₂) The gas phase mixture with ammonia may produce unstable species, such as diaminosilane (SiH)₂(NH)₂). These materials can be decomposed in the gas phase and nucleate into small particles. Small particles may also be formed if ammonia reacts with hydrogen chloride produced during the chemisorption of the halosilane. These particles can accumulate in the processing stations where they can contaminate the substrate surface, potentially causing defects in the integrated equipment, and in the processing stations where they can contaminate the processing station hardware, potentially causing down time and cleaning. Small particles may also accumulate in the drain, may clog pumps and blowers, and may require special environmental drain scrubbers and/or cold traps (traps).

Thus, in some embodiments, substituted amines may be used as the nitrogen-containing reactant. For example, various radicals formed from plasma activated alkyl substituted amines (e.g., t-butylamine) can be provided to the processing station. Substituted amines (e.g., t-butylamine) may have a lower sticking coefficient on operating hardware compared to ammonia, which may result in relatively lower rates of physisorption and relatively lower process purge times.

In addition, such nitrogen-containing reactants may form halide salts, which are more volatile than ammonium chloride. For example, tert-butyl ammonium chloride may be more volatile than ammonium chloride. This can reduce down time, equipment failure, and environmental emission reduction costs.

Further, such nitrogen-containing reactants can react through various byproducts to form other ammonia precursors. For example, the reaction of tert-butylamine with dichlorosilane can produce BTBAS. Thus, the by-products may provide an alternative route to silicon nitride formation, potentially increasing film yield. In another example, substituted amines can provide a route to low temperature thermal activation of silicon nitride films. For example, tert-butylamine thermally decomposes at temperatures above 300 ℃ to form isobutene and ammonia.

While the illustrative examples provided above describe: the silicon nitride film is formed using t-butylamine, but it is understood that any suitable substituted amine may be employed within the scope of the present disclosure. In some embodiments, suitable substituted amines may be selected based on thermodynamic characteristics and/or characteristics of the reactivity of the reactants. For example, the relative volatility of the halide salt formed from the reactants may be considered, and the presence and selectivity of various pathways for thermal decomposition at the relevant temperatures may be considered.

Further, while the examples provided above describe the deposition of silicon nitride films, it is understood that the principles discussed above apply generally to the deposition of other films. For example, some embodiments may use a suitable halosilane in combination with a suitable oxygen-containing reactant (e.g., an oxygen plasma) to deposit silicon oxide.

A non-limiting list of reactant, product membranes, and membrane and operating property ranges is provided in table 1.

Fig. 1 also shows an embodiment of the time schedules of various CFD process parameters of an exemplary CFD process stage. Fig. 1 depicts two exemplary deposition cycles 110A and 110B, but it should be understood that the CFD process may include any suitable number of deposition cycles to deposit a desired film thickness. Exemplary CFD process parameters include, but are not limited to, flow rates of inert gases and reactants, plasma power and frequency, substrate temperature, and processing station pressure. Table 2 provides non-limiting parameter ranges for an exemplary silicon dioxide deposition cycle using BTBAS and oxygen.

The CFD cycle typically contains an exposure phase for each reactant. During this "exposure phase", reactants are delivered to the process chamber such that the reactants are adsorbed on the substrate surface. Typically, at the beginning of the exposure phase, no appreciable amount of the reactant is adsorbed on the substrate surface. In fig. 1, reactant a is provided to the processing station at a controlled flow rate to flood the exposed surface of the substrate (saturate) during reactant a exposure phases 120A and B. Reactant a can be any suitable deposition reactant, for example, a primary reactant or a secondary reactant. In one example, where CFD produces a silicon dioxide film, reactant a may be oxygen. In the embodiment shown in FIG. 1, reactant A flows continuously throughout the deposition cycles 110A and 110B. Unlike typical ALD processes, where the exposure of the film precursors is separated to prevent gas phase reactions, in some embodiments of the CFD process, reactants a and B can be mixed in the gas phase. As noted above, in some embodiments, the reactants a and B are selected so that they can coexist in the gas phase without significantly reacting with each other under the conditions that would be encountered in a reactor prior to the application of plasma energy or activation of surface reactions. In some cases, the reactants are selected such that (1) the reaction between them is thermodynamically favorable (i.e., gibbs free energy <0) and (2) the reaction has sufficiently high activation energy that the reaction is negligible at the desired deposition temperature. Combinations of reactants meeting these criteria are identified elsewhere in this specification. Many such combinations include a primary reactant that provides an element that is solid at room temperature, and a secondary reactant that does not provide an element that is solid at room temperature. Examples of auxiliary reactants used in certain combinations include oxygen, nitrogen, alkyl amines, and hydrogen.

In an ALD process, reactant a is first turned on, then stabilized, and exposed to the substrate, then turned off, and finally removed from the reactor, and continuously supplying reactant a to the processing station may reduce or eliminate the flow rate turn-on and stabilization time of reactant a as compared to an ALD process. Although the embodiment shown in fig. 1 depicts reactant a exposure phases 120A and B as having constant flow rates, it is understood that any suitable flow rate of reactant a, including variable flow rates, may be used within the scope of the present disclosure. In addition, while fig. 1 shows that reactant a has a constant flow rate throughout the CFD cycle (deposition cycle 110A), this is not necessary. For example, the flow rate of reactant a may be reduced during the B exposure phases 140A and 140B. This may increase the local pressure of B, thereby increasing the driving force for adsorbing reactant B on the substrate surface.

In some embodiments, the reactant a exposure phase 120A can have a duration that exceeds the time that reactant a spreads across the substrate surface. For example, the embodiment shown in fig. 1 includes a post-reactant a flood exposure time 130 in the reactant a exposure stage 120A. Optionally, reactant a exposure phase 120A includes a controlled inert gas flow rate. Examples of inert gases include, but are not limited to, nitrogen, argon, and helium. Inert gases may be provided to assist in pressure and/or temperature control of the process stations, vaporization of the liquid precursor, faster delivery of the precursor, and/or as purge gases for removing process gases from the process stations and/or process station piping.

In the reactant B exposure phase 140A of the embodiment shown in fig. 1, reactant B is supplied to the processing station at a controlled flow rate to flood the exposed substrate surface. In one example of a silica membrane, reactant B may be BTBAS. Although the embodiment shown in fig. 1 depicts the reactant B exposure phase 140A having a constant flow rate, it should be understood that any suitable flow of reactant B, including variable flow, may be used within the scope of the present disclosure. Further, it is understood that the reactant B exposure phase 140A can have any suitable duration. In some embodiments, the duration of the reactant B exposure phase 140A may exceed the substrate surface flood time of reactant B. For example, the embodiment shown in FIG. 1 depicts the exposure time 150 after reactant B flooding included in the reactant B exposure stage 140A. Alternatively, the reactant B exposure phase 140A may include a suitable controlled flow of inert gas, as described above, which may assist in pressure and/or temperature control of the process station, vaporization of the liquid precursor, faster delivery of the precursor, and may prevent back diffusion of the process station gases. In the embodiment shown in fig. 1, the inert gas is continuously supplied to the processing station throughout the reactant B exposure phase 140A.

In some embodiments, plasma-activated deposition reactions may result in lower deposition temperatures than thermally activated reactions, which may reduce the consumption of the available thermal budget (thermal budget) in the integrated process. For example, in some embodiments, the plasma-activated CFD process may occur at room temperature.

Although the CFD process of the embodiment shown in fig. 1 is plasma activated, it should be understood that other non-thermal energy sources may be used within the scope of the present disclosure. Non-limiting examples of non-thermal energy sources include, but are not limited to, ultraviolet lamps, downstream or remote plasma sources, inductively coupled plasmas, and microwave surface wave plasmas.

Further, many of the examples discussed herein include two reactants (a and B), it being understood that any suitable number of reactants may be employed within the scope of the present disclosure. In some embodiments, a single reactant and inert gas for energizing the plasma to perform a surface decomposition reaction of the reactant may be used. Alternatively, some embodiments may use three or more reactant-deposited films, as discussed above in the context of feature 7.

In some cases, surface adsorbed species of B may be present as discrete islands on the substrate surface, which makes it difficult to achieve surface flooding with reactant B. Various surface conditions may delay the nucleation and flooding of reactant B on the substrate surface. For example, the ligands released upon adsorption of reactant A and/or B may block some surface active sites, preventing further adsorption of reactant B. Thus, in some embodiments, a continuous adsorbed layer (interlayers) of reactant B may be provided by modulating the flow rate and/or pulsing the reactant B into the processing station in discrete applications during the reactant B exposure phase 140A. This may provide additional time for the surface adsorption process and desorption process while protecting reactant B compared to the constant flow rate case.

Additionally or alternatively, in some embodiments, one or more purge stages may be included between successive exposures of reactant B. For example, the embodiment shown in fig. 2 schematically shows a timing diagram 200 of an exemplary CFD process for a deposition cycle 210. In the reactant B exposure phase 240A, reactant B is exposed to the substrate surface. Subsequently, during the purge phase 260A, reactant B is turned off and the gas phase reactant B is removed from the processing station. In one case, the gas phase reactant B may be replaced by a continuous flow of reactant a and/or an inert gas. In another case, the gas phase reactant B may be removed by evacuating the processing station. Removal of the gas phase reactant B can shift the adsorption/desorption process equilibrium, desorbing the ligand, promoting surface rearrangement of the adsorbed B to incorporate discrete islands of adsorbed B. In the reactant B exposure phase 240B, reactant B is again exposed to the substrate surface. While the embodiment shown in FIG. 2 includes one instance of a purge and expose cycle of reactant B, it should be understood that repetition of any suitable number of alternating purge and expose cycles may be employed within the scope of the present disclosure.

Returning to the embodiment of fig. 1, prior to activation by the plasma at 180A, in some embodiments, gas phase reactant B may be removed from the processing station during the purge phase 160A. In addition to the exposure phase described above, the CFD cycle may also include one or more sweep phases. Cleaning the process station avoids gas phase reactions in which reactant B is susceptible to plasma activation. In addition, the cleaning station can remove ligands adsorbed on the surface that would otherwise remain and contaminate the membrane. Examples of purge gases include, but are not limited to, argon, helium, and nitrogen. In the example shown in FIG. 1, the purge gas of purge stage 160A is supplied by a flow of inert gas. In some embodiments, the purge stage 160A may include one or more evacuation sub-stages for evacuating the processing station. Alternatively, it is understood that in some embodiments, purge stage 160A may also be omitted.

Purge phase 160A may have any suitable duration. In some embodiments, increasing the flow rate of the one or more purge gases may reduce the duration of the purge phase 160A. For example, the flow rate of the purge gas, and thus the duration of purge phase 160A, may be adjusted based on the thermodynamic properties of the various reactants and/or the geometry of the process station piping. In one non-limiting example, the duration of the purge phase may be optimized by adjusting the purge gas flow rate. This may reduce the time of the deposition cycle, which may improve the throughput of the substrate.

In addition to the exposure and optional sweeping phases described above, the CFD cycle typically includes an "activation phase". The activation phase is used to drive the reaction of one or more reactants adsorbed on the surface of the substrate. In the plasma activation phase 180A in the embodiment shown in fig. 1, plasma energy is provided to activate a surface reaction between the surface adsorbed reactants a and B. For example, the plasma may directly or indirectly activate gas phase molecules of reactant a to form radicals of reactant a. These radicals can then interact with the surface adsorbed reactant B, leading to a surface reaction that forms a film. The deposition cycle 110A ends with a plasma activation phase 180A, which in the embodiment shown in fig. 1 is followed by a deposition cycle 110B, and a reactant a exposure phase 120B begins.

In some embodiments, the plasma ignited in the plasma activation phase 180A may be formed directly on the substrate surface. This may provide greater plasma density and enhanced surface reaction rates between reactants a and B. For example, a plasma for a CFD process may be generated by applying a Radio Frequency (RF) field to a low pressure gas using two capacitively coupled plates. In an alternative embodiment, the remote plasma may be generated outside the main reaction chamber.

Any suitable gas may be used to form the plasma. In a first example, an inert gas (e.g., argon or helium) may be used to form the plasma. In a second example, a reactant gas such as oxygen or ammonia may be used to form the plasma. In a third example, a purge gas (e.g., nitrogen) may be used to form the plasma. Of course, combinations of these types of gases may be used. Plasma is ignited by the ionization of the gas between the plates by the RF field, generating free electrons in the plasma discharge region. These electrons are accelerated by the RF field and can collide with gas phase reactant molecules. The collisions of these electrons with the reactant molecules can form radical species that participate in the deposition process. It will be appreciated that the RF field may be coupled through any suitable electrode. Non-limiting examples of electrodes include process gas distribution showerheads (showerheads) and substrate support susceptors. It will be appreciated that the plasma for the CFD process may be formed by one or more other suitable methods, in addition to the method of capacitively coupling the RF field to the gas.

The plasma activation phase 180A may have any suitable duration. In some embodiments, the plasma activation phase 180A may have a duration that exceeds the time required for the plasma activated radicals to interact with all exposed substrate surfaces and adsorbates to form a continuous film uppermost on the substrate surface. For example, the embodiment shown in fig. 1 includes a post plasma flood exposure time 190 in the plasma activation stage 180A.

As explained more fully below, and as suggested in the discussion of feature 4 above, extending the plasma exposure time and/or providing multiple plasma exposure stages can provide a post-reaction treatment of the entire deposited film and/or portions of the deposited film near the surface. In one case, reducing surface contamination by plasma treatment can prepare the surface for adsorption of reactant a. For example, a silicon nitride film formed by a reaction between a silicon-containing reactant and a nitrogen-containing reactant may have a surface that is resistant to adsorption of subsequent reactants. Plasma treatment of silicon nitride surfaces can generate hydrogen bonds that facilitate subsequent adsorption and reaction.

In some embodiments, the properties of the film (e.g., film stress, dielectric constant, refractive index, etch rate) can be adjusted by changing plasma parameters, as will be discussed in more detail below. Table 3 provides an exemplary list of various film properties for three exemplary CFD silicon dioxide films deposited at 400 degrees celsius. For ease of reference, table 3 also includes film information for an exemplary PECVD silicon dioxide film deposited at 400 degrees celsius.

For example, fig. 3 schematically shows an embodiment of a CFD process timing diagram 300 that includes a deposition phase 310 followed by a plasma treatment phase 390. It will be appreciated that any suitable plasma may be used during the plasma treatment stage. In the first case, a first plasma gas may be used during the activation of the deposition cycle, and a second, different plasma gas may be used during the plasma processing phase. In a second case, a second, different plasma gas may supplement the first plasma gas during the plasma processing stage. Table 4 provides non-limiting parameter ranges for embodiments of in situ plasma processing cycles.

In the plasma activation stage 380 shown in fig. 3, the substrate surface is exposed to plasma to activate the film deposition reaction. As depicted in the embodiment shown in fig. 3, the processing station is provided with a continuous flow of reactant a, which may be, for example, an auxiliary reactant (e.g., oxygen) and an inert gas during the purge phase 390A of the plasma process. The purge processing station may remove volatile contaminants from the processing station. While FIG. 3 shows a purge gas, it is to be understood that any suitable method of removing reactants may be used within the scope of the present disclosure. During the plasma treatment activation phase 390B, the plasma is ignited to treat the entire newly deposited film and/or the newly deposited film in the near-surface region.

While the embodiment of fig. 3 includes one exemplary CFD cycle that includes a plasma processing stage, it should be understood that any suitable number of iterations may be employed within the scope of the present disclosure. Further, it should be understood that one or more plasma processing cycles may be interposed (regularly or otherwise) at intervals between normal deposition cycles. For example, fig. 4 shows an embodiment of a CFD process timing diagram 400 that includes an intervening plasma treatment phase between two deposition cycles. Although the embodiment of fig. 4 includes a plasma treatment cycle interposed between two deposition cycles, it should be understood that there may be any suitable number of deposition cycles before or after one or more plasma treatment cycles. For example, in one case where a plasma treatment is used to change the density of the film, the plasma treatment cycle may be inserted every ten deposition cycles. In one case, where plasma treatment is used to prepare the surface for adsorption and reaction, the plasma treatment stage may be incorporated into each CFD cycle, for example, after each CFD deposition stage.

Plasma treatment of the deposited film may alter one or more physical properties of the film. In one case, the plasma treatment can densify the newly deposited film. Dense films may be more etch resistant than non-dense films. For example, fig. 5 shows an embodiment of a control 500 comparing etch rates of an exemplary CFD treated silicon dioxide film and a thermally grown silicon dioxide film. The exemplary film embodiment of fig. 5 is deposited by CFD processes 502 and 504 at a temperature range from 50 to 400 degrees celsius.For reference, the relative etch rates for Undoped Silicate Glass (USG) and silicon dioxide spacers (spacers) deposited by a plasma enhanced CVD process are shown in fig. 5. Films produced by process 502 including a one second high frequency oxygen plasma activation phase in each deposition cycle are resistant to dilute hydrofluoric acid wet etch (100: 1H)₂HF) is resistant to wet etching with dilute hydrofluoric acid (100: 1H) of films produced by process 504 including a ten second high frequency oxygen plasma activation phase in each deposition cycle₂O: HF) about half the capacity. Thus, it should be appreciated that the etch rate of the deposited film may be varied by varying one or more aspects of the plasma activation phase and/or including one or more plasma processing cycles.

In another case, plasma treatment of the film may alter the stress characteristics of the film. For example, fig. 6 shows an embodiment of a correlation 600 between wet etch rate ratio and film stress for an exemplary CFD silicon dioxide film. In the embodiment shown in fig. 6, for example, the compressive film stress may be increased by reducing the wet etch rate ratio, for example, by extending the plasma exposure time.

In another case, the plasma treatment of the deposited film may provide transient differential removal to remove trace film contaminants (e.g., hydrogen, nitrogen, and/or carbon in one exemplary silicon dioxide film) relative to other film constituents (e.g., silicon and/or oxygen in one exemplary silicon dioxide film). For example, fig. 7 shows an embodiment of a correlation 700 between deposition temperature, plasma exposure time, and film contaminant concentration. In the embodiment illustrated in fig. 7, CFD silicon dioxide film 704 deposited at the same temperature with a 10 second oxygen plasma activation phase exhibits lower concentrations of hydrogen and carbon than CFD silicon dioxide film 702 deposited at a temperature of 50 degrees celsius with a one second oxygen plasma activation phase. Changes in the membrane contaminant concentration can alter the electrical and/or physical properties of the membrane. For example, adjustment of the carbon and/or hydrogen content may adjust the dielectric constant of the film and/or the etch rate of the film. Thus, it will be appreciated that varying one or more aspects of the plasma activation stage and/or including one or more plasma treatment cycles may provide a means of varying the composition of the film.

Although the plasma treatment discussed above relates to an oxygen plasma treatment, it should be understood that any suitable plasma treatment may be employed without departing from the scope of the present embodiments. For example, in some embodiments, substituted amines may be used as nitrogen-containing reactants in place of NH in a suitable CFD process₃. Although replacing NH by a substituted amine (e.g. an alkylamine such as tert-butylamine)₃Deposition of conformal SiN can provide a number of benefits, but in some cases the deposited film can contain carbon residues from the alkylamine reactant (e.g., from inclusion in individual tert-butylamine molecules (NH)₂-(CH₃)₃) Carbon residue of the three methyl groups in (1). Carbon in such films can lead to electrical leakage and can render the films unusable for some dielectric barrier applications.

Thus, in some embodiments, igniting the hydrogen plasma during SiN film deposition may reduce carbon residue in the SiN film, which may relatively improve the insulating properties of the film. In some examples, the reduction in carbon residue can be readily observed in infrared spectroscopy (FTIR). For example, the SiN: C-H level may be reduced from about 10 atomic% to about 1 atomic%.

Thus, in some embodiments, deposition of a silicon nitride film may be performed with a CFD process using a nitrogen-containing reactant comprising an alkyl amine or a mixture of alkyl amines and one or more cycles of hydrogen plasma treatment. It is understood that any suitable hydrogen plasma may be employed without departing from the scope of this disclosure. Thus, in some embodiments, H₂Mixtures with gases such as He or AI, or other H-containing gases, or active hydrogen atoms generated by a remote plasma source, may be used to treat the deposited film. In addition, in certain embodiments, the carbon content of the film may be adjusted by varying one or more of the number of process pulses and their duration, the process plasma intensity, the substrate temperature, and the process gas compositionTo any suitable concentration.

While the hydrogen plasma treatment discussed above refers to a silicon nitride film, it is understood that the carbon content of other CFD deposited films (including, but not limited to, SiOx, GeOx, SiOxNy) may be adjusted using a suitable hydrogen plasma treatment application.

Certain embodiments disclosed herein relate to ultraviolet treatment (with or without plasma treatment) of oxide CFD films. This process can reduce defects in the oxide and improve electrical properties such as CV characteristics of the gate dielectric layer. Device and packaging applications (package applications) with CFD oxide that can benefit from such processing include through silicon vias, logic technology with gate oxide, Shallow Trench Isolation (STI), thin thermal oxidation formed after STI-photoresist strip, sacrificial oxide (e.g., -60A) before P-well implant, "post-well" thermal oxide growth, gate oxide/channel region oxide, DRAMPMD PECVD oxide.

In some cases, untreated CFD oxide films have been found to have relatively poor electrical performance, believed to be due to fixed charges in the deposited film. For example, some films have been found to have significant intra-wafer Vfb variation. Such problems have been solved by post-deposition treatment using ultraviolet radiation and/or thermal annealing in the presence of hydrogen. It is believed that this method passivates and/or mitigates defects associated with fixed charges (surface charges) in the air at (1) the silicon interface, or (2) within the deposited insulating film, or (3) at the oxide surface. With such a process, the Vfb diffusion of the deposited oxide has narrowed from 8.3V to about 1.5V or so after UV curing.

Although these embodiments are primarily directed to improving oxide films, the disclosed methods may also be applied to processes for the growth of dielectrics, metals, and metals to dielectric interfaces in general. Specific dielectric materials include, for example, silicon oxides (including doped silicon oxides), silicon carbides, silicon oxycarbides, silicon nitrides, silicon oxynitride, and ashable hard mask materials.

Examples of treatment methods that may be applied to improve dielectric properties include the following:

(A) dielectric films synthesized from CFD were post-deposition treated using UV curing and then hydrogen annealed. In the simplest embodiment, UV treatment alone may be used to reduce the fixed charge.

(B) Pre-treatment of the substrate prior to CFD dielectric film deposition using a process technique comprising: on He, H₂、Ar、N₂、H₂/N₂Formed gas, NH₃In the presence of (A) H₂Plasma, N₂Plasma, N₂/H₂Plasma, NH₃Plasma, Ar-plasma, He annealing, H₂Annealing, NH₃Annealing, UV curing. Plasma treatment may be performed using a variety of plasma generators, including, but not limited to, microwave, ICP-remote, ICP-direct, and the like.

(C) Simultaneous processing (curing during deposition) using processing techniques including: on He, H₂、Ar、N₂、H₂/N₂Formed gas, NH₃In the presence of (A) H₂Plasma, N₂Plasma, N₂/H₂Plasma, NH₃Plasma, Ar-plasma, He annealing, H₂Annealing, NH₃Annealing, UV curing. The plasma treatment may be performed using a variety of plasma generators, including, but not limited to, microwave, ICP-remote, ICP-direct, and other means known in the art. Isotropic and directional treatments that may be applied include, but are not limited to, remote plasma, UV exposure, direct plasma, and microwave plasma. An exemplary method includes intermittently treating the membrane between sets of CFD cycles. The set of CFD cycles may vary from about 1 to 10000 cycles. One typical case includes: (1)5 CFD oxide growth cycles followed by (2) one or more film treatments by any of the methods described above (e.g., He-plasma, UV-treatment), followed by (3)5 CFD oxide growth cycles. The method can be used to grow any desired materialFilm of desired thickness.

(D) The UV treatment is a side result of any of the above plasma treatments (e.g., helium plasma emits ultraviolet radiation).

One example of an in situ "curing" step during a CFD cycle involves the following operations:

UV treatment by He-plasma

BTAS dosing

Clearing (purge)

O₂/Ar-RF plasma activation

Cleaning out

Repeating steps 1-5 to produce a film of desired thickness

A range of UV curing conditions may be used in any of the listed environments. Generally, the base temperature will be maintained between about 250 to 500 ℃ during the curing process. For many device fabrication applications, the upper temperature limit is 450 ℃ or even 400 ℃. The environment employed during the curing process may be inert or reactive. Examples of gases that may be present during the curing process include helium, argon, nitrogen, forming gases, and ammonia. The flow rate of such gases may be about 2 to 20,000sccm, preferably about 4000 to 18000 sccm. The power of the ultraviolet lamps may be, for example, about 2-10kW, and preferably between about 3.5 and 7 kW. A suitable duration of exposure to ultraviolet light from such a source is between about 20 seconds and 200 seconds (e.g., about 90 seconds). Finally, the pressure may be maintained at a level between 0torr and about 40 torr.

In a particular embodiment, the following conditions are used to obtain effective treatment of the CFD oxide:

the base temperature is 400 DEG C

He (environment) ═ He

Pressure of 40Torr

Flow rate of 10000sccm

In some embodiments, thermal annealing of the oxide is performed after the UV curing operation. In one example, the following conditions are used in the annealing:

the base temperature is 400 DEG C

Environment ═ H₂+N₂

Pressure 2.5 torr

Flow rate 750sccm H₂；3000sccmN₂。

The physical and electrical properties of the deposited film can also be altered by adjusting other process parameters such as deposition temperature. For example, the example correlation 700 shown in FIG. 7 also shows the relationship between CFD film deposition temperature and film contaminant concentration. As the film deposition temperature increases, the incorporation of film contaminants decreases. In another example, as described above, the embodiment shown in fig. 5 illustrates a decrease in the wet etch rate ratio of an exemplary silicon dioxide CFD film as the deposition temperature increases. Other deposition parameters that may be adjusted to adjust film properties include RF power, RF frequency, pressure, and flow rate. Furthermore, in some embodiments, the membrane properties can be altered by changing the choice of reactants. For example, the hydrogen content of the silica film may be reduced by using tetraisocyanate silane (TICS) as the silicon-containing reactant and oxygen and/or nitrous oxide as the oxygen-containing reactant.

It is appreciated that changes in physical and/or electrical film properties, as discussed above, may provide opportunities to tune device performance and yield, as well as to change various aspects of device fabrication process integration. As one non-limiting example, the ability to adjust the etch rate characteristics of a CFD silicon dioxide film may make the film a candidate for etch stop, hard mask, and other process integration applications. Thus, provided herein are various embodiments of CFD fabricated films that are applied throughout the fabrication process of a semiconductor device.

In one approach, the CFD process may deposit a conformal silicon dioxide film on a non-planar substrate. For example, CFD silicon dioxide films may be used for gap filling of structures, such as trench filling of Shallow Trench Isolation (STI) structures. While the various embodiments described below are directed to gap-fill applications, it will be appreciated that this is merely a non-limiting, illustrative application and that other suitable applications utilizing other suitable film materials may be within the scope of the present disclosure. Other applications for CFD silicon dioxide films include, but are not limited to, inter-layer dielectric (ILD) applications, inter-metal dielectric (IMD) applications, pre-metal dielectric (PMD) applications, dielectric liner Through Silicon Via (TSV) applications, resistive ram (reram) applications, and/or stacked capacitor fabrication applications in DRAM.

Silicon oxide doped with boron, phosphorus, and even arsenic dopants may be used as a diffusion source. For example, boron-doped silicate glass (BSG), phosphorus-doped silicate glass (PSG), or borophosphorus-doped silicate glass (BPSG) may be used. The doped CFD layer can be used to provide conformal doping in, for example, three-dimensional transistor structures such as multi-gate finfets and three-dimensional memory devices. Conventional ion implanters cannot readily dope sidewalls, especially in high aspect ratio structures. CFD doped oxides have various advantages as a diffusion source. First, they provide high conformal capability under low temperature conditions. In contrast, low pressure CVD is known to produce doped TEOS (tetraethyl silicate), but it requires deposition at high temperatures, and sub-atmospheric CVD and PECVD doped oxide films are possible at lower temperatures, but not sufficiently conformal. The conformality of the doping is important, as well as the conformality of the film itself, since the film is typically a sacrificial application and will need to be removed later. Non-conformal films often face more challenges when removed, i.e., certain areas may be over-etched. Furthermore, CFD provides very well controlled doping concentration. As described, the CFD process may be followed by providing a single doped layer after providing some undoped oxide layer. The level of doping can be tightly controlled by the frequency with which the doped layer is deposited and the conditions of the doping cycle. In certain embodiments, the doping cycle is controlled by, for example, using a dopant source with significant steric hindrance. In addition to traditional silicon-based microelectronics, other applications for CFD doping include microelectronics and optoelectronics, photovoltaic devices, flat panel displays, and electrochromic technologies based on III-V semiconductors such as gallium arsenide (GaAs) and II-VI semiconductors such as mercury cadmium telluride (HgCdTe).

Some gap-fill processes involve performing two film deposition steps in different deposition tools, which require vacuum interruption and exposure to air between deposition processes. Fig. 8 schematically illustrates an exemplary non-planar substrate 800 including a plurality of gaps 802. As depicted in fig. 8, the gaps 802 may have different aspect ratios, which may be defined as the ratio of the gap width (W) to the gap depth (H) of each gap 802. For example, logic regions of integrated semiconductor devices may have different aspect ratios corresponding to different logic device structures.

As depicted in fig. 8, a non-planar substrate 800 is covered by a thin, conformal film 804. While conformal film 804 has gap 802A completely filled, gaps 802B and 802C remain open. Closing gaps 802B and 802C with conformal films may result in extended processing times. Thus, in some methods, thicker films may be deposited ex situ by higher deposition rate processes such as CVD and/or PECVD processes. However, ex-situ deposition of gap fill films may reduce wafer throughput in a production line. For example, the time for substrate handling and transfer between deposition tools may reduce some substrate processing activities during production. This may reduce the throughput of the production line and may require the installation and maintenance of additional processing tools in the production line.

Furthermore, while the gap 802C may have an aspect ratio suitable for vapor deposition processes, the 802B may have an aspect ratio that may result in incomplete filling by higher deposition rate processes and may form keyhole voids. For example, fig. 10 illustrates an exemplary high aspect ratio structure 1000 formed in a substrate 1002. As depicted in fig. 10, the bread loaf effect during deposition of the thicker film 1006 has created keyhole voids 1008. The keyhole gap may be reopened and filled with a conductive film in a subsequent process, which may cause a short circuit of the device.

Some approaches to addressing high aspect ratio gaps such as gap 802B include providing device design rules that avoid the creation of such gaps. However, such design rules may require additional mask processing steps, may make device design difficult, and/or may result in increased area of integrated semiconductor devices, which may increase manufacturing costs. Thus, in some embodiments, a CFD process may include an in-situ transition from a CFD process to a CVD and/or PECVD process. For example, fig. 9 shows an embodiment of a timing diagram 900 that has been divided into three stages of a CFD process. CFD process stage 902 depicts an exemplary CFD process cycle. For clarity, a single CFD process cycle is shown in the example shown in fig. 9, but it should be understood that any suitable number of CFD process cycles and plasma treatment cycles may be included in CFD process stage 902. A transition stage 904 follows the CFD process stage 902. As depicted in the example of fig. 9, the transition stage 904 includes aspects of both a CFD process and a PECVD process. Specifically, reactant B is provided to the processing station after the reactant B exposure phase 904A ends, such that both reactants a and B are present in the gas phase during the plasma activation phase 904B. This can provide both PECVD type gas phase reactions and CFD type surface reactions. While the transition phase 904 includes only one iteration of the reactant B exposure phase 904A and the plasma activation phase 904B, it should be understood that the transition phase may include any suitable number of iterations.

In some embodiments, the plasma generator may be controlled to provide intermittent pulses of plasma energy during the plasma activation phase 904B. For example, the plasma may be pulsed at one or more frequencies including, but not limited to, frequencies between 10Hz and 150 Hz. This can enhance step coverage by reducing the directionality of ion bombardment compared to a continuous plasma. In addition, this may reduce ion bombardment damage to the substrate. For example, a photoresist substrate may be eroded by ion bombardment during a continuous plasma. Pulsing the plasma energy can reduce photoresist erosion.

In the embodiment shown in fig. 9, the flow rate of reactant B during the plasma activation phase 904B is less than the flow rate of reactant B during the reactant B exposure phase 904A. Thus, reactant B may "trickle" to the processing station during plasma activation phase 904B. This may provide a gas phase PECVD reaction that complements the CFD-type surface reaction. However, it is understood that in some embodiments, the flow rate of reactant B may vary throughout a single plasma activation phase or a transition phase. For example, during a transition phase comprising two repetitions of reactant B exposure and plasma activation, the flow rate of reactant B during the first plasma activation phase may be lower than the flow rate of reactant B during the second plasma activation phase. Varying the flow rate of reactant B during the plasma activation phase 904B may provide a smooth transition from the step coverage characteristics of the CFD process phase 902 to the deposition rate characteristics of the PECVD process phase 906.

In some embodiments, the CFD process may include an in-situ etch for selectively removing a reentrant portion of a deposited film. Exemplary, non-limiting parameter ranges for a silicon dioxide deposition process including an in-situ etch for a gap fill CFD process are provided in table 5.

Fig. 11 illustrates one embodiment of a timing diagram 1100 for a CFD process including a deposition phase 1102, an etch phase 1104, and a subsequent deposition phase 1106. At deposition stage 1102 in the embodiment shown in fig. 11, a film is deposited on the exposed surface of the substrate. For example, deposition phase 1102 may include one or more CFD process deposition cycles.

In the etch phase 1104 of the embodiment shown in fig. 11, both reactants a and B are turned off and an etching gas is introduced into the processing station. One non-limiting example of an etching gas is Nitrogen Fluoride (NF)₃). In the embodiment shown in fig. 11, the etching gas is activated by an ignited plasma during the etching phase 1104. During the etch phase 1104 for selectively removing reentrant portions of deposited films on non-planar substrates, various process parameters, such as process station pressure, substrate temperature, flow rate of etch gas, may be adjusted. Any suitable etching process may also be employed within the scope of the present disclosure. Other exemplary etching processes include, but are not limited to, reactive ion etching, non-plasma vapor etching, solid phase sublimation, and etching speciesAdsorption and directed activation (e.g., by ion bombardment).

In some embodiments, incompatible gas phases may be removed from the processing station before and after etching the film. For example, the embodiment of fig. 11 includes continued flow of the inert gas during etch phase 1104 after reactants a and B have been turned off and after the etch gas has been turned off.

At the end of the etch phase 1104, a deposition phase 1106 begins to further fill the gaps on the non-planar substrate. The deposition phase 1106 may be any suitable deposition process. For example, the deposition phase 1106 can include one or more of a CFD process, a CVD process, a PECVD process, and the like. Although the embodiment of fig. 11 shows a single etch stage 1104, it is to be understood that multiple in situ etch processes may be interleaved in multiple deposition stages of any suitable type during the gap fill process.

Exemplary cross-sections of a non-planar substrate at various stages of the example in-situ deposition and etch process described above are shown in fig. 12A-12C. Fig. 12A shows a cross-section of an exemplary non-planar substrate 1200, which includes a gap 1202. The gap 1202 is covered by a membrane 1204. The film 1204 is nearly conformal to the gap 1202, but the film 1204 includes a reentrant portion 1206 near the top of the gap 1202.

In the embodiment shown in fig. 12B, the re-entrant portion 1206 of the film 1204 has been selectively removed and the upper region 1204A of the film 1204 is thinner than the lower region 1204B. The selective removal of the reentrant portion and/or sidewall angle adjustment may be achieved by imposing a quality limit and/or a lifetime limit on the activated etch species. In some embodiments, the selective etching at the top of the gap 1202 may also adjust the sidewall angle of the gap 1202 such that the gap 1202 is wider at the top than at the bottom. This may further reduce the bread-loaning effect at subsequent deposition stages. As with the embodiment shown in fig. 12C, after the subsequent deposition phase, the gap 1202 is almost full and exhibits no voids.

Another embodiment of an in-situ etch process is shown in fig. 15, in which a through-silicon via (TSV) for a copper electrode is depicted. Some example TSVs have a depth of about 105 microns, a diameter of about 6 microns, resulting in an aspect ratio of about 17.5:1, and may have an upper thermal budget (thermal budget) of about 200 degrees celsius. As shown in the embodiment of fig. 15, the through silicon via 2500 is covered by a dielectric isolation layer 2502 to electrically isolate the silicon substrate from the metal-filled via. Exemplary dielectric spacer materials include, but are not limited to, silicon oxide, silicon nitride, low-k dielectric materials. In some embodiments, the exemplary etching processes described above may use a suitable sputtering gas, such as argon, to assist the reentrant portion with physical sputtering.

Other exemplary applications for CFD films include, but are not limited to, conformal low-k films (e.g., k about 3.0 or below 3.0 in some non-limiting examples) for interconnect isolation applications at the back end of the line, conformal silicon nitride films for etch stop and spacer layer applications, conformal anti-reflective layers, and adhesion and barrier layers of copper. CFD can be used to prepare many different compositions of low-k dielectrics for post-production line processing. Examples include silicon oxide, oxygen-doped carbides, carbon-doped oxides, oxynitrides, and the like.

In another example, in the case of an integrated process, a silicon dioxide spacer layer may be deposited over the "core" of photoresist. The use of a core of photoresist, rather than another core material (such as a silicon carbide layer), may eliminate the patterning process in the integration process. The process may involve patterning a photoresist using conventional photolithographic techniques, and then depositing a thin layer of CFD oxide directly over the core. A directional dry etch process may then be used to remove the CFD oxide film at the top of the patterned photoresist and leave material at the bottom only along the sidewalls of the patterned photoresist (considering the trench). At this stage, a simple ashing can be used to remove the exposed core, leaving behind the CFD oxide. Where there was a single photoresist line there are now two CFD-oxide lines. In this manner, the process doubles the pattern density, and thus it is sometimes referred to as "double patterning". Unfortunately, the core of the photoresist used may limit the deposition temperature of the spacer layer to less than 70 degrees celsius, which may be lower than the deposition temperature of conventional CVD, PECVD, and/or ALD processes. Thus, in some embodiments, low temperature CFD silicon dioxide films may be deposited at temperatures below 70 degrees celsius. It is understood that there are other potential integrated process applications for suitable CFD-generated films within the scope of the present disclosure. Furthermore, in various embodiments, a nitride, such as the deposited silicon nitride described above, may be employed as a conformal diffusion barrier and/or etch stop at various stages of semiconductor device fabrication.

While the various CFD deposition processes described above are directed to depositing, processing, and/or etching a single film type, it is understood that some CFD processes within the scope of the present disclosure may include in-situ deposition of multiple film types. For example, alternating film layer types may be deposited in situ. In a first aspect, the dual spacer of the gate device may be fabricated by in-situ deposition of a silicon nitride/silicon oxide spacer stack. This may reduce cycle time and increase processing station throughput, which may avoid interlayer defects due to potential film layer incompatibility. In a second approach, an antireflective layer for lithographic patterning applications can be deposited as a stack of SiON or amorphous silicon and SiOC with tunable optical properties.

In some embodiments, the dopant-containing source layer is formed by a conformal film deposition process. This layer is referred to as the "source" layer because it provides a source of dopant (e.g., dopant atoms such as boron, phosphorus, gallium, and/or arsenic). The doped CFD layer serves as a source of dopant for doping the underlying (or overlying) structure in the device. After (or during) formation of the source layer, the dopant species is driven or otherwise incorporated into adjacent structures in the device being fabricated. In certain embodiments, the dopant species is driven by an annealing process operation during or after formation of the conformal dopant source film. The highly conformal nature of CFD allows doping of non-conventional device structures, including structures in which it is desirable to dope three-dimensional structures. The CFD dopant source layer is typically formed by one or more of the processes described herein, but it includes additional processing operations to incorporate dopant species. In some embodiments, the dielectric layer serves as a base layer in which dopant species are contained.

For example, doped silicon oxide may be used as a diffusion source for boron, phosphorus, arsenic, and the like. For example, boron-doped silicate glass (BSG), phosphorus-doped silicate glass (PSG), or borophosphorus-doped silicate glass (BPSG) may be used.

The doped CFD layer can be used to provide conformal doping in, for example, three-dimensional transistor structures such as multi-gate finfets and three-dimensional memory devices. Examples of some three-dimensional structures may be found in "Tri-gate (Intel)", J.Kavaliros et al, Symp.VLSI Tech Pg 50,2006, and "FinFET: Yamashita et al (IBM Alliance), VLSI 2011, both of which are incorporated herein by reference in their entirety. Conventional ion implanters cannot readily dope sidewalls, especially in high aspect ratio structures. Furthermore, in dense array i3D configurations, there can be shadowing effects (shadowing effects) in the implanter for directional ion beams, which adds significant dose retention problems for tilted implantation angles. In addition to traditional silicon-based microelectronics, other applications for CFD doping include microelectronics and optoelectronics, photovoltaic devices, flat panel displays, and electrochromic technologies based on III-V semiconductors such as gallium arsenide (GaAs) and II-VI semiconductors such as mercury cadmium telluride.

Fig. 16 shows a transistor having a three-dimensional gate structure in which a source and a drain are formed in a thin vertical structure that is difficult to dope by conventional ion implantation techniques. However, when a thin layer of CFD oxide doped n-or p-type is formed on the vertical structure, conformal doping is complete. Conformal doping has been observed to increase the current density of three-dimensional devices by 10-25% due to reduced series resistance. See Yamashita et al, VLSI 2011.

CFD doped oxides have various advantages as a diffusion source. First, they provide high conformal capability under low temperature conditions. Because doped films can be sacrificial, non-conformal films often face more challenges when removed, i.e., certain areas may be over-etched. As previously mentioned, CFD provides a highly conformal film. Furthermore, CFD provides extremely well controlled doping concentration. The CFD process may be followed by providing a single doped layer after providing some undoped oxide layer, as desired. The level of doping can be tightly controlled by the frequency used to deposit the doped layer and the conditions of the doping cycle. In certain embodiments, the doping cycle is controlled by, for example, using a dopant source with significant steric hindrance.

Fig. 17 shows a baseline CFD operational sequence from left to right with time advancing along the x-axis. Many variations are supported and the figure is for illustration purposes only. In an initial sequence, in operation a, a gas phase oxidant is introduced into a reaction chamber containing a substrate on which a CFD film is to be deposited. Examples of suitable oxidizing agents include elemental oxygen (e.g., O)₂Or O₃) Dinitrogen monoxide (N)₂O), water, alkyl alcohols such as isopropyl alcohol, carbon monoxide and carbon dioxide. The oxidant is typically supplied with an inert gas such as argon or nitrogen.

Next, in operation B, a dielectric precursor is temporarily introduced into the reaction chamber. The duration of operation B is selected to allow the precursor to adsorb to the substrate surface in an amount sufficient to support one cycle of film growth. In some embodiments, the precursor is distributed across the surface of the substrate. The precursors are selected according to their ability to produce the desired composition for dielectrics. Examples of dielectric compositions include silicon oxides (including silicate glasses), silicon nitrides, silicon oxynitrides, and silicon oxycarbides. Examples of suitable precursors include alkylsilanes (SiH)_x(NR₂)_4-x) Where x is 1-3 and R includes alkyl groups, such as the various isomeric configurations of methyl, ethyl, propyl and butyl) and halosilanes (SiH)_xY_4-x) Wherein x is 1-3 and Y includes Cl, Br and I). More specific examples include dialkylaminosilanes and sterically hindered alkylsilanes. In one particular example, BTBAS is a precursor for the preparation of silicon oxide.

During operation B, the oxidant introduced into the chamber continues to flow during phase a. In some embodiments, it continues to flow at the same rate and at the same concentration during operation a. During the end period of operation B, the flow of dielectric precursor into the chamber is terminated and operation C is started as described. During operation C, the oxidant and inert gas continue to flow as during operations a and B to purge the remaining dielectric precursor in the reaction chamber.

After the removal is complete during operation C, the precursors react on the substrate surface to form a portion of the dielectric film (see operation D). In various embodiments, a plasma is applied to drive the reaction of the adsorbed dielectric precursor. In some examples, the reaction is an oxidation reaction. Some of the oxidizing agent that is first flowed into the reaction chamber, along with the dielectric precursor, can be adsorbed on the surface, thereby providing immediate availability of the oxidizing agent for plasma-mediated surface reactions.

Operations a through D collectively provide a single cycle of the dielectric film deposition process. It should be understood that other CFD implementations described herein may be used in place of the basic cycle described herein. In the depicted embodiment, the deposition cycle (from a to D) is performed without introducing any dopant species. In various embodiments, the cycle represented by operations a through D is repeated one or more times in succession before introducing the dopant species. This is shown in stage E of fig. 17. In some examples, operations a-D are repeated at least once, or at least twice, or at least 5 times before introducing the dopant.

As an example, the dielectric is deposited at a rate of about 0.5 to 1 angstrom/cycle. The oxidant continues to flow into the reaction chamber through each of the one or more cycles (repeats a-D).

At some point in the process, the cycle of dielectric deposition is interrupted by the introduction of a dopant precursor species (e.g., diborane). This is shown as operation F in the figure. Examples of dopants that may be provided in the dielectric source film include valence group III and IV elements, such as boron, gallium, phosphorus, arsenic, and other dopants. Examples of dopant precursors, in addition to diborane, include phosphines and other hydride sources. Non-hydrogenated dopants, such as alkyl precursors (e.g., trimethylgallium), halogen precursors (e.g., gallium chloride), may also be used.

In some variations, the dopant is deposited at the interface of the underlying substrate, followed by CFD cycles, pulsed with the dopant inserted every x number of cycles (as described), and optionally surmounted by an undoped protective "capping" layer, which may be a CFD oxide film. See the example of the resulting stack in fig. 18.

In one embodiment, the dopant precursor is provided to the reaction chamber in admixture with a carrier gas, such as an inert gas (e.g., argon), but not in admixture with an oxidant or other reactant. Thus, in the baseline example, the flow of oxidant was stopped during operation F. In other embodiments, the precursor is introduced with a reducing or oxidizing agent. In certain embodiments, the concentration ratio of dopant to carrier gas is between about 1:5 and 1: 20. In some embodiments, the dopant deposition temperature is between about 300 to 400 ℃. The duration of the dopant exposure step varies depending on the target dopant concentration. In certain embodiments, the exposing step is between about 2.5 seconds and 7.5 seconds. In one specific example, 1000sccm of diborane is flowed into 10000sccm of argon at a pressure of 3 Torr and a temperature of about 400 deg.C.

In certain embodiments, the dopant precursor is concentrated on the substrate surface by a non-surface-defined mechanism. For example, the precursors may be deposited by a CVD type process, rather than an ALD (surface adsorption limited) process.

Optionally, the dopant precursor is purged from the reaction chamber prior to further processing of the dielectric film. In addition, as shown in fig. 17, a dopant precursor is delivered, followed by an optional activation operation G, which may be adjusted by plasma, temperature increase, or the like. In the example of diborane as the dopant precursor, the activation operation converts diborane to elemental boron. After operation G is complete, processing continues with an optional purge (not shown).

In one example, involving CVD diborane dopant, the activation operation is based entirely on temperature decomposition to produce boron. This is a temperature sensitive process. At higher temperatures, a relatively short exposure time may be employed to achieve the same boron concentration per unit thickness. Alternatively, in some processes, such as those employing Trimethylborane (TMB), activation may involve a plasma or thermal oxidation step. For some other precursors, it may be appropriate to employ a "pinning" step to fix the boron-free or other dopant in situ. This can be done using a "pinned" plasma.

In certain embodiments, plasma activation involves RF power of any frequency suitable for incorporating carbon into the film. In some embodiments, the RF power source may be configured to control the high and low frequency RF power sources independently of each other. For example, the low frequency RF power may include, but is not limited to, frequencies between about 200 kilohertz and 1000 kilohertz. For example, the high frequency RF power may include, but is not limited to, frequencies between about 10 megahertz and 80 megahertz (e.g., 13.56 megahertz). Likewise, the RF power supply and matching network may operate at any suitable power to form a plasma. Examples of suitable powers include, but are not limited to, powers between about 100 and 3000 watts for high frequency plasmas and between about 100 and 10000 watts for low frequency plasmas (on a per wafer basis). The RF power source may be operated at any suitable duty cycle. Examples of suitable duty cycles include, but are not limited to, duty cycles between about 5% and 90%. Generally acceptable process pressures are between about 0.5 torr and 5 torr, preferably between about 2 torr and 4 torr. For certain plasma pretreatments (of the underlying substrate) prior to exposure to the dopant, pressures up to about 10 torr (or up to about 9 torr) have been found to work well.

The following table summarizes the ranges of plasma parameters that may be used for various BSG processes:

in the baseline process depicted, as shown in stage H of the figure, a cycle of dielectric deposition and intermittent dopant delivery (operations a through G) may be performed multiple times. The actual number of times this process sequence is repeated depends on the total thickness required for the film and the thickness of the dielectric deposited per cycle, as well as the amount of dopant incorporated into the film. In some embodiments, operations a-G are repeated at least two times, or at least three times, or at least 5 times, or at least about 10 times.

After the dielectric film is fully deposited, it can be used as a source of dopant species for nearby semiconductor structures. This can be accomplished by driving dopants from the deposited film to the device structure as depicted by operation I of fig. 17. In various embodiments, the driving is accomplished by a heat-mediated diffusion process (e.g., annealing). In some cases, particularly those employing ultra shallow junctions, a laser spike annealing process may be used.

Many variations of the baseline process can be implemented. The purpose of some of these variations is to increase the amount of dopant available for diffusion to adjacent semiconductor structures. The purpose of other variations is to control the rate at which the dopant is transported from the source film to the nearby semiconductor structure. Other variations control the direction of dopant species diffusion. Generally, it is desirable to facilitate the diffusion of dopants toward the device structure and away from the opposite side of the film.

In some embodiments, the frequency at which the dopant is introduced to the grown dielectric film is controlled. More frequent dopant precursor delivery cycles result in an overall greater concentration of dopant in the final dielectric film. They also result in a relatively uniform distribution of dopants throughout the film. When fewer dopant precursor delivery cycles are inserted into the deposition process, regions of high doping concentration in the film are more widely separated than when dopant delivery cycles are more frequent.

In one embodiment, the dopant precursor is delivered to the growing dielectric film once for each cycle of dielectric deposition. In another embodiment, the dopant precursor is delivered once every other cycle of dielectric deposition. In other embodiments, less frequent dopant precursor delivery cycles are introduced into the process. For example, the dopant precursor may be delivered once during every third, fourth, or fifth cycle of dielectric deposition. In some cases, the dopant precursor is delivered at a frequency of about once during each 5-20 dielectric deposition cycle.

It should be understood that the frequency of introducing dopant precursors to the growing film during deposition of the dielectric film does not have to be consistent. In this regard, the resulting dielectric film may have a graded composition of dopants such that the average concentration of dopants is non-uniform across the thickness of the deposited dielectric film. In one embodiment, the concentration of dopant is greater on the side of the dielectric film adjacent to the semiconductor device structure to be doped. Of course, the dopant concentration gradient in the dielectric film can be adjusted as desired by carefully varying the frequency of dopant delivery cycles throughout the dielectric layer deposition process.

Another variation of the baseline process involves adjusting the amount of dopant precursor delivered during the dopant precursor delivery cycle. The amount of dopant precursor delivered during a given dopant delivery cycle is determined by the concentration of dopant precursor delivered to the reaction chamber and the duration of exposure of the substrate to which the dopant precursor is to be delivered.

As noted above, certain dopant precursors may be provided to a growing film by a CVD-like process. In this case, the amount of dopant precursor delivered to the growing film in any given cycle is not limited by adsorption or other surface-mediated phenomena. Thus, the amount of dopant precursor provided during any dopant delivery cycle may be relatively large and controllable. To the extent that a greater amount of dopant is delivered during any dopant delivery cycle, the total concentration of dopant in the dielectric film increases. This may counteract the effect of dopant delivery cycles having relatively few frequencies throughout the process. However, it will be appreciated that increasing the amount of dopant delivered during any given dopant precursor delivery cycle may result in a relatively high local concentration of dopant in the film. Of course, such dopant concentration peaks may be softened by annealing or other operations by which the dopant is diffused to make its concentration more uniform in the dielectric film.

In the case of boron as a dopant, the flux of boron delivered in a typical boron precursor delivery cycle can vary from about 7.5ML (Mega-Langmuirs) to 30ML, ML being the unit of flux/exposure, depending on the target membrane concentration.

In some embodiments, the amount of dopant precursor delivered in each precursor delivery cycle is not constant throughout the growth of the dielectric film. Thus, the amount of dopant precursor delivered per cycle can be adjusted to produce a desired dopant concentration gradient in the dielectric film. For example, it may be desirable to provide a greater amount of dopant precursor in the dopant precursor delivery cycles of those occurring relatively close to the location in the dielectric film of the semiconductor device feature to be doped. The resulting concentration gradient has a higher concentration of dopant in the region of the film adjacent to the device structure to be doped.

In some embodiments, the dopant precursor is introduced onto the substrate surface in an adsorptively defined manner. In the presence of such precursors, dopants are introduced into the film via an ALD-like process (rather than a CVD-like approach as described above). Examples of dopant precursors that are attached to the substrate surface by an absorption-mediated process include trimethylborane, and other alkyl precursors, such as trimethylgallium. Examples of dopant precursors deposited on the substrate surface by a CVD-like process include diborane, phosphine, and arsine.

In general, the concentration profile of the dopant in the dielectric film can be appropriately adjusted. In one embodiment, the dopant concentration is ramped up (spike) to a high level at the edge of the film adjacent to the structure to be doped. In some embodiments, the concentration intermittently increases and decreases throughout the thickness of the membrane. In one example, the dopant (e.g., boron) is provided only at the interface between the underlying substrate and the CFD dielectric layer. This doped layer is sometimes referred to as an "abrupt growth layer". In some cases, dopant exposure is pulsed (e.g., CVD exposure to dopant precursors) rather than using a single step to improve uniformity of dopant incorporation within the wafer. In another example, the CFD oxide or other dielectric is interspersed with a dopant (e.g., boron in a doped BSG). See fig. 18 and 19. The interposed doped dielectric may be provided with or without an abrupt increase layer. In yet another example, an undoped CFD oxide or other dielectric cap acts as a protective layer. See again fig. 18 and 19.

The dielectric film in which the dopant species resides may itself be tailored to affect the diffusion of the dopant through the film itself. For example, the density and/or chemical composition of the film may be controlled to produce a desired effect on dopant diffusion. In some approaches, the entire dielectric thickness has the same density or composition, such that the diffusion characteristics of the adjusted dopant are constant throughout the film thickness. In other approaches, the properties of the film are adjusted such that the dopant diffusion varies across the thickness of the film. The inventors have discovered that, for example, the plasma oxidation parameters can be varied to make the CFD oxide less dense to allow greater dopant diffusion through the CFD oxide during annealing.

In certain embodiments, the composition of the dielectric film (or the process gas used to form the film) is tailored to affect dopant diffusion therein. It has been found that the ratio of nitrogen and oxygen in the oxidizer process gas delivered to the reaction chamber during a deposition cycle of the dielectric film, for example, affects the ability of the dopant species to diffuse through the dielectric film. For example, the presence of a relatively large amount of nitrogen in the oxidant gas used during formation of the dielectric film results in the dielectric film having a significant resistance to dopant diffusion. In contrast, the relatively large amount of oxygen present in the gas causes the film to have much less resistance to dopant diffusion. Can be prepared by nitrogen-containing compounds (e.g. N)₂O) or the element nitrogen, N₂In order to provide the nitrogen present in the process gas. In various embodiments, the oxidizing agent that is continuously flowed during the deposition cycle of the dielectric film comprises nitrous oxide.

In some embodiments, the dielectric film is formed by initially using an oxidant gas having a high oxygen content and a relatively low nitrogen content during an initial growth phase of the dielectric film. Thereafter, after the film is partially formed on the structure to be doped, the composition of the oxidant gas is changed so that it is relatively rich in nitrogen. For example, the oxidizer gas used for the dielectric film may contain molecular oxygen throughout the initial deposition cycle. In a subsequent dielectric deposition cycle, the oxidant gas is changed such that oxygen is at least partially replaced with nitrous oxide. This assumes that the goal is to enhance diffusion in the direction toward the bottom of the film and diffusion barrier in the direction toward the top of the film-assuming the device structure to be doped is located below the dielectric film. The inventors have found that if the nitrogen concentration level is greater than about 1E 20 atoms/cubic centimeter (as measured, for example, by SIMS), the barrier effect against boron diffusion is significant. In contrast, at nitrogen concentrations of about 1E19 atoms/cc or less, the barrier effect is effectively eliminated.

From the standpoint of the film composition itself, the nitrogen content in the film may vary from a relatively low level in the portion of the film near the substrate structure to be doped to a relatively higher level in the portion located opposite the structure to be doped.

The deposition temperature employed during the formation of the dielectric film also affects the ability of the dopant atoms to diffuse in the film. In general, it has been found that dielectrics deposited by CFD processing at relatively low temperatures generally allow for relatively high diffusion rates of dopants. An example of a relatively low temperature associated with a relatively high diffusion rate of the dopant may be a temperature in the range of about 300 to 400 ℃, or more specifically between about 350 to 400 ℃. Of course, these temperature ranges depend on the choice of dielectric precursors and other deposition parameters. Although they can employ many precursors, they are particularly suitable for using BTBAS as the dielectric precursor.

In contrast, dielectric deposition at relatively high temperatures tends to resist dopant diffusion. With BTBAS as the dielectric precursor, the relatively high temperature associated with a relatively low diffusion rate of the dopant is in the range of about 350 ℃ to 400 ℃, or more specifically between about 300 ℃ to 380 ℃. Of course, such temperatures may be applied to other precursors. In addition, despite the fact that higher temperatures generally give denser films that resist dopant diffusion, diffusion and/or density may also be controlled by other parameters, such as RF exposure time and power during plasma oxidation. Examples of benchmark parameters that may be employed during CFD oxide growth include (1) high frequency plasma of about 200 and 2500 watts (for 300mm wafers), typically no low frequency plasma, and (2) plasma exposure times in the range of about 0.2 to 1.5 seconds.

In some embodiments, a relatively low temperature is used to deposit the dielectric film adjacent to the device structure to be doped, and a higher temperature is used to deposit portions of the dielectric film remote from the structure. In some embodiments, the temperature used throughout the deposition of the dielectric film is varied, and the ratio of nitrogen to oxygen in the oxidizer gas is varied during the deposition. In this manner, the dopant diffusion properties of the resulting dielectric film may be varied to an exaggerated degree across the thickness of the film.

In various embodiments, the deposition temperature is controlled by heating and/or cooling a susceptor or chuck supporting the substrate during the CFD process. Examples of suitable bases are described in U.S. patent application No.12/435,890 (published application No. US-2009-0277472), filed 5-2009, and U.S. patent application No.13/086,010, filed 13-2011, both of which are incorporated herein by reference in their entirety.

In some embodiments, the device structure on the surface of the substrate to be doped is pretreated prior to deposition of the dielectric film or dopant precursor. In one example, the pre-treatment comprises exposure to a plasma, such as exposure to a reducing plasma. Such processing may be appropriate, for example, when the substrate features to be doped contain silicon. Silicon typically contains a small amount of intrinsic oxide that can act as a barrier to subsequent diffusion of the dopant. In a particular embodiment, the substrate surface is pre-treated with a reducing plasma (e.g., a hydrogen-containing plasma) and then contacted with the dopant precursor in the vapor phase prior to the first cycle of dielectric film deposition. Immediately after the plasma pretreatment is completed, the precursor may be delivered to the reaction chamber. In some examples, the dopant precursor is diborane. In general, the process depicted in fig. 17 may be modified such that dopants or dopant precursors are delivered to the substrate surface prior to the first dielectric deposition cycle.

In various embodiments, the partially formed dielectric film itself is pre-treated with a plasma or other activation treatment prior to exposure to the dopant precursor. This serves to improve within-wafer uniformity by (a) providing thermal uniformity prior to dopant precursor exposure, (b) activating the dielectric surface (e.g., by chemical and/or physical roughening) to enhance dopant precursor adhesion to the dielectric surface.

In certain other embodiments, the chemical state of the dopant species is controlled during the dopant precursor body delivery and/or activation phase of the film deposition process. In some embodiments, the dopant precursor is treated in a manner that "fixes" the dopant in the dielectric film, thereby limiting diffusion of the dopant until it is subsequently activated by such operations as annealing. In one example, certain dopants are fixed by oxidizing them or their precursors during the dopant delivery phase of the dielectric film deposition process. In one particular example, diborane is delivered to the reaction chamber in an oxidizing ambient effective to fix the resulting boron-containing species in the dielectric film. Alternatively, the dopant is fixed by delivering the precursor to the reaction chamber in an inert or reducing environment, and then exposed to an oxidizing environment, and the dopant is located on the dielectric film. In contrast, treating certain dopant precursors with a reducing agent without subsequent oxidation can produce more mobile dopants in the dielectric film.

After the source layer is formed (or during the formation thereof), the dopant species is driven or otherwise incorporated into adjacent structures in the device being fabricated. In certain embodiments, the dopant species is driven by an annealing process during or after formation of the conformal dopant source film. In addition to conventional thermal annealing, for example, flash annealing (flash annealing), laser flash annealing (laser spike annealing) may be used. The time and temperature of the annealing process depends on various parameters including the concentration, amount and type of dopant in the source layer, the composition and morphology of the source layer matrix (e.g., oxide glass), the distance the dopant species must travel to the adjacent device structure, the desired concentration of dopant in the device structure, and the composition and morphology of the device structure. In certain embodiments, the annealing treatment is performed at a temperature between about 900 and 1100 ℃ for about 2 to 30 seconds.

Various devices may be designed to deposit doped dielectric films as described herein. Typically, the apparatus will comprise a process chamber for receiving a substrate during deposition of the doped film. The process chamber will include one or more inlets for receiving process gases including dielectric precursors, oxidants, carrier or inert gases, dopant species, and the like. In various embodiments, the apparatus may additionally include features for generating a plasma having the following properties: suitable for forming a dielectric layer, incorporating dopants into the dielectric layer, treating the dielectric layer to alter the electrical, optical, mechanical, and/or chemical properties of the layer, and driving dopants from the film into the substrate. Typically, the apparatus will include a vacuum pump or a device for connection to such a pump. Still further, the apparatus may have a controller or controllers configured or designed to control the apparatus to implement the sequence of doped dielectric deposition operations described herein. The controller may include instructions for controlling various functions of the apparatus, the apparatus comprising: valve means for delivering process gas and controlling pressure, a power source for generating plasma, and a vacuum source. The instructions may control the timing and sequence of various operations. In various embodiments, the device may have a Vector such as that available from Novellus System of san Jose, Calif^TMFeatures found in a series of deposition tools. Other features of suitable apparatus for depositing doped dielectric films are described elsewhere herein.

Doped CFD film Properties

A dielectric film that serves as a source of dopant species will have various characteristics. In various embodiments, the film has a thickness between about 20 and 200 angstroms. In some cases, such as for the front-channel doping of the source-drain extensions of a three-dimensional transistor structure, the film thickness is between about 50 to 100 angstroms. The average concentration of dopant atoms (or other dopants) in the dielectric film depends on a number of factors, including the total amount of dopant per unit surface area of the film, as well as the diffusion coefficient of the dopant atoms in the film and the application of the doping. In certain embodiments, the dopant concentration in the film is between about 0.01 to 10% by weight. In a further embodiment, the dopant concentration in the film is between about 0.1% to 1% by weight. In yet another embodiment, the concentration of dopant in the film is between about 0.5% to 4% by weight. The techniques described herein allow the dopant concentration to be adjusted over a wide range, for example, between about 0.01 to 10% by weight. For example, it has been demonstrated that boron concentrations in CFD dielectric films can be easily adjusted between about 0.1 to 4.3% by weight. In certain embodiments, 5, 7, 10, and 12 nanometer CFD films are grown with between about 0.1 and 0.5% by weight boron.

CFD doped dielectric films can be characterized by other properties. For example, the sheet resistance (Rs) of CFD deposited films may vary from about 100 to 50000 ohms/square. In some cases, these values are obtained after some or all of the dopant is driven from the doped CFD layer. The further junction depth produced by driving the dopants from the CFD film (e.g., as measured by SIMS) may optionally be modulated up to about 1000 angstroms. Of course, many previous devices require a fairly shallow junction depth, for example, in the range of about 5-50A, which can also be achieved with CFD membranes. The actual junction depth may be controlled by a number of factors including, for example, the interfacial dopant (e.g., boron) concentration, the mobility of the dopant from the bulk and interface into the substrate (e.g., silicon), and the temperature and duration of the anneal used to drive the dopant.

CFD doping applications

The substrate surface on which the dielectric active layer is formed may require highly conformal deposition. In certain examples, the dielectric source film conformally covers features having an aspect ratio of between about 1:0.5 and 1:12 (more specifically between about 1:1 and 1: 8), and has a feature width of no greater than about 60 nanometers (more specifically no greater than about 30 nanometers). Doping using dielectric source layers of the type described herein will find particular application in devices formed in accordance with 45 nanometer technology nodes and technology nodes beyond 45 nanometers (including 22 nanometer technology nodes, 16 nanometer technology nodes, etc.).

The device structures that can be doped using the CFD source layer are conventional doping structures such as CMOS source and drain, source-drain extension regions, capacitor electrodes in memory devices, gate structures, etc. Other structures that may be doped in this manner are non-planar or three-dimensional structures such as the junction of source/drain extensions in gate structures such as those in some three-dimensional gate structures employed in some devices fabricated at 22 nanometer technology nodes. Some three-dimensional structures may be found in "Tri-gate (Intel)", J.Kavaliros et al, Symp.VLSI Tech Pg 50,2006 and "FinFET: Yamashita et al (IBM Alliance), VLSI 2011, which are previously incorporated herein by reference.

Doped CFD films have various other applications, such as providing etchable layers for use at various stages of integrated circuit fabrication. In certain embodiments, the etchable layer is a glass layer with a tunable wet etch rate, where the etch rate is tunable by the doping level. In other words, the level of doping is selected to provide a predefined etch rate. In particular embodiments, the etchable layer is a silicate glass layer containing a dopant such as phosphorus, boron, or a combination thereof.

Example of CFD doping

Films of CFD boron doped silicate glass (BSG) were prepared in complex three-dimensional gate structures and achieved step coverage approaching 100%. Similar results are expected with phosphorus doped silicate glass (PSG). Boron or phosphorus can be driven from such films into the lateral and longitudinal regions of the source and drain junctions under dopant diffusion during a subsequent annealing step that provides conformality/uniformity. FIG. 20 shows a typical deposition scheme for synthesizing CFD BSG/PSG films. The growth cycle of the CFD oxide includes: (a) saturation dose of SiO₂Precursor (BTBAS), (b) inert gas purge toRinsing away residual precursor species, (c) an oxidizing plasma step, and (d) an inert gas purge to remove reaction by-products. This mechanism ensures that the reaction is self-limiting and promotes good conformality maintained with these films. During CFD oxide growth, a boron or phosphorous exposure step is periodically inserted, followed by a pump-down and purge sequence, and an optional rf pinning/curing step (e.g., exposure to plasma), if desired. This deposition frame is repeated as many times as needed depending on the target BSG/PSG thickness. See fig. 20.

While the frequency of the intervening boron or phosphorous exposure modulates the dopant diffusion distance at a given temperature, the length of the exposure controls the overall dopant dose. These two powerful control parameters provide a versatile synthesis scheme to accurately adjust the interface doping concentration.

In experiments, CFD has been demonstrated to have excellent growth characteristics in BSG films. The CFD BSG process uses BTBAS as the silicon source, N₂O plasma for oxidation and 5% diborane (B) in argon₂H₆) For boron doping. Argon and N₂Mixtures of O are used as the purge gas. A growth rate of about 1 angstrom/cycle was obtained, consistent with the results for the undoped CFD oxide, which shows that the exposure step including boron does not adversely affect the CFD growth. The 250 angstrom thick CFD BSG film exhibited near perfect conformality in different test structures as shown by SEM photographs. The step coverage of these films was calculated on dense and isolated structures as

(FIG. 21). Step coverage is defined as referring to the quotient of the film thickness of the sidewalls of the feature divided by the film thickness of the top of the same structure. Table 6 shows the effect of different splits from the initial study to segment boron exposure time, frequency of boron insertion and growth temperature on the final average boron concentration in the film. 25X CFD Ox means 25 CFD doping oxidation cycles per boron insertion phase. The sample was grown to about 500 angstroms, so the entire sequence was repeated about 20 times (giving a growth rate of 1A/cycle for CFD oxide). As given in fig. 22SIMS data from these resolutions indicate that the average boron concentration can be adjusted within the range of about 0.5-3.5 wt% boron to enable tailored doping options.

TABLE 6

Label (Label)	Deposition conditions
		CFDS1	400℃/25x CFD Ox+5s B2H6Exposing
CFDS2	400℃/25x CFD Ox+2.5s B2H6Exposing
		CFDS3	400℃/50x CFD Ox+5s B2H6Exposing
CFDS4	350℃/25x CFD Ox+5s B2H6Exposing

Device for measuring the position of a moving object

It will be appreciated that any suitable processing station may employ one or more of the examples described above. For example, fig. 13 schematically illustrates an embodiment of a CFD processing station 1300. For simplicity, the CFD processing station 1300 is depicted as a stand-alone processing station having a chamber body 1302 for maintaining a low pressure environment. However, it is understood that multiple CFD processing stations 1300 may be included in a common low pressure processing tool environment. While the embodiment depicted in fig. 13 shows one processing station, it should be understood that in some embodiments, multiple processing stations may be included in a processing tool. For example, fig. 14 depicts an embodiment of a multi-station processing tool 2400. Further, it should be understood that in some embodiments, one or more hardware parameters of the CFD processing station 1300, including those discussed in detail below, may be adjusted by one or more computer controller programming (programming).

The CFD processing station 1300 is in fluid communication with a reactant delivery system 1301 for providing process gas to a distribution showerhead 1306. The reactant delivery system 1301 includes a mixing vessel 1304 for mixing and/or conditioning the process gases to be delivered to the showerhead 1306. One or more mixing vessel inlet valves 1320 may control the introduction of process gas into the mixing vessel 1304.

Some reactants, such as BTBAS, may be stored in liquid form, then vaporized, and then transported to a processing station. For example, the embodiment of fig. 13 includes a vaporization station (vaporization station) 1303 for vaporizing the liquid reactant to be supplied to the mixing vessel 1304. In some embodiments, the vaporization station 1303 may be a heated evaporator. Saturated reactant vapors produced from these evaporators can condense in downstream transport lines. Exposure of incompatible gases to condensed reactants produces small particles. These small particles may clog pipes, interfere with the operation of valves, contaminate substrates, and the like. Some approaches to these problems include purging and/or evacuating the transfer line to remove residual reactants. However, cleaning the transfer piping increases the processing station cycle time and decreases the processing station throughput. Thus, in some embodiments, the delivery conduit downstream of the vaporization point 1303 is heat traced. In some embodiments, the mixing vessel 1304 may also be heat traced. In one non-limiting example, the delivery conduit downstream of the vaporization station 1303 has an elevated temperature profile, from about 100 degrees Celsius to about 150 degrees Celsius at the mixing vessel 1304.

In some embodiments, the liquid reactant may be vaporized in a liquid injector. For example, the liquid injector may inject the liquid reactant in pulses into the carrier gas stream upstream of the mixing vessel. In one arrangement, the liquid injector may vaporize the reactants by flashing the liquid from a higher pressure to a lower pressure. In another arrangement, the liquid ejector may atomize the liquid into discrete droplets that are subsequently vaporized in a heated delivery tube. It will be appreciated that smaller droplets may evaporate faster than larger droplets, thereby reducing the delay between liquid ejection and complete vaporization. Faster vaporization may reduce the length of the conduit downstream of vaporization station 1303. In one aspect, a liquid sprayer may be mounted directly to mixing vessel 1304. In another aspect, a liquid injector may be mounted directly to spray head 1306.

The showerhead 1306 and pedestal 1308 are in electrical communication with an RF power source 1314 and a matching network 1316 to power the plasma. In some embodiments, the plasma energy is controlled by controlling one or more of the process station pressure, gas concentration, RF source power, RF source frequency, and plasma power pulse timing. For example, the RF power source 1314 and the matching network 1316 may be operated with any suitable power to form a plasma having a desired combination of radical species. Exemplary suitable powers include, but are not limited to, powers between 100W and 5000W for a 300mm wafer. Likewise, the RF power source 1314 may provide RF power at any suitable frequency. In some implementations, the RF power source 1314 can be configured to control the high and low frequency RF power sources independently of each other. Exemplary low frequency RF frequencies may include, but are not limited to, frequencies between 50 kilohertz and 500 kilohertz. Exemplary high frequency RF frequencies may include, but are not limited to, frequencies between 1.8MHz and 2.45 GHz. It will be appreciated that any suitable parameter may be adjusted, either discretely or continuously, to provide plasma energy for surface reactions. In one non-limiting example, plasma power may be provided intermittently in pulses to reduce ion bombardment of the substrate surface as compared to a plasma that is continuously powered.

In some embodiments, the plasma may be monitored in situ by one or more plasma monitors. In one aspect, the plasma power may be monitored by one or more voltage, current sensors (e.g., VI probes). In another aspect, the plasma density and/or the concentration of the process gas may be measured by one or more optical emission spectroscopy sensors (OES). In some embodiments, one or more plasma parameters are programmatically adjusted based on measurements from such an in situ plasma monitor. For example, an OES sensor can be used in a feedback loop to provide programmed control of plasma power. It will be appreciated that in some embodiments, other monitors may be used to monitor plasma and other process characteristics. These monitors may include, but are not limited to, Infrared (IR) monitors, acoustic monitors, and pressure sensors.

In some embodiments, the susceptor 1308 can be temperature controlled by a heater 1310. Additionally, in some embodiments, pressure control of the CFD processing station 1300 may be provided by a butterfly valve 1318. As shown in fig. 13, butterfly valve 1318 regulates the vacuum provided by a downstream vacuum pump (not shown). However, in some embodiments, the pressure control of the processing station 1300 may also be adjusted by varying the flow rate of one or more gases directed to the CFD processing station 1300.

As described above, a multi-station processing tool may include one or more processing stations. Fig. 14 shows a schematic diagram of an exemplary multi-station operational tool 2400, the multi-station operational tool 2400 having an inner load lock 2402 and an outer load lock 2404, either or both of which may include a remote plasma source. At atmospheric pressure, the robot 2406 is configured to move wafers from cassettes loaded through a pod (pod)2408 into the inner load lock 2402 via an atmospheric port 2410. The wafer is placed on the susceptor 2412 in the inner load lock 2402 by the robot 2406, the atmospheric port 2410 is closed, and the load lock is evacuated. When the inner load lock 2402 includes a remote plasma source, the wafer may be exposed to remote plasma processing in the load lock before being introduced into the process chamber 2414. Additionally, the wafers may also be heated within the load lock 2402 to remove moisture and adsorbed gases, for example. Next, the chamber transfer port 2416 to the processing chamber 2414 is opened and another robot (not shown) places the wafer into the reactor on the susceptor of the first station shown in the reactor for processing. While the embodiment shown in fig. 14 includes a load lock, it will be appreciated that in some embodiments, it may be provided to direct the wafer into the processing station.

The depicted processing chamber 2414 includes four processing stations, numbered 1 through 4 in the embodiment shown in fig. 14. Each station has a heated base (shown at 2418 for station 1), and a gas line inlet. It will be appreciated that in some embodiments, each processing station may have a different purpose or multiple purposes. For example, in some embodiments, the processing station may be switched between a CFD process mode and a PECVD process mode. Additionally or alternatively, in some embodiments, the processing chamber 2414 may include one or more paired CFD and PECVD processing stations. Although the illustrated processing chamber 2414 includes four stations, it is to be understood that the processing chamber described in accordance with the present disclosure can have any suitable number of stations. For example, in some embodiments, the process chamber may have five or more stations, while in other embodiments the process chamber may have three or less stations.

Fig. 14 also depicts an embodiment of a wafer processing system 2490 that transports wafers within the process chamber 2414. In some embodiments, wafer processing system 2490 can transport wafers between various processing stations and/or between processing stations and load locks. It will be appreciated that any suitable wafer processing system may be employed. Non-limiting examples include wafer turntables and wafer handling robots. FIG. 14 also depicts an example system controller 2450 that can be used to control the processing conditions and hardware states of the processing tool 2400. The system controller 2450 can include one or more storage devices 2456, one or more mass storage devices 2454, and one or more processors 2452. The processor 2452 can include a CPU or computer, analog and/or digital input/output connectors, stepper motor controller boards, and the like.

In some embodiments, the system controller 2450 controls all of the activities of the processing tool 2400. The system controller 2450 executes system control software 2458 that is stored in the mass storage device 2454, loaded into the storage device 2456, and executed on the processor 2452. The system control software 2458 can include software for controlling timing, gas mixing, chamber and/or station pressures, chamber and/or station temperatures, wafer temperatures, target power levels, RF power levels, substrate pedestal, chuck and/or susceptor (susceptors) positions, and other parameters of a particular process being performed by the processing tool 2400. The system control software 2458 may be configured in any suitable manner. For example, subroutines or control objects of the various process tool components may be written to control the operations necessary for the process tool components to perform the processing of the various process tools. The system control software 2458 may be encoded in any suitable computer-readable programming language.

In some embodiments, system control software 2458 may include input/output control (IOC) sequencing instructions for controlling the various parameters described above. For example, the stages of the CFD process may include one or more instructions for execution by the system controller 2450. The corresponding CFD recipe phase may include instructions for setting the processing conditions for the CFD process phase. In some embodiments, the CFD recipe phase may be sequenced such that all instructions for the CFD process phase are executed in synchronization with the processing phase.

Other computer software and/or programs stored on the mass storage device 2454 and/or the storage device 2456 associated with the system controller 2450 may be employed in some implementations. Exemplary programs or portions of programs for this purpose include a substrate positioning program, a process gas control program, a pressure control program, a heater control program, and a plasma control program.

The substrate positioning program may include program code for a processing tool assembly for loading a substrate onto the pedestal 2418 and controlling the spacing between the substrate and other components of the processing tool 2400.

The process gas control program may include code for controlling the gas composition and flow rate, and optionally for flowing the gas into one or more processing stations prior to deposition in order to stabilize the pressure in the processing stations. The pressure control routine may include controlling the pressure in the processing station by adjusting, for example, a throttle valve in an exhaust system of the processing station and a gas flow into the processing station.

The heater control program may include code for controlling the current to a heating element for heating the substrate. Alternatively, the heater control program may control the delivery of a hot delivery gas (e.g., helium) to the substrate.

The plasma control program can include code for setting the RF power level applied to the processing electrodes in one or more processing stations.

In some embodiments, there may be a user interface associated with the system controller 2450. The user interface may include a display screen, graphical software displays of the device and/or process conditions, and user input devices such as a pointing device, keyboard, touch screen, microphone, and the like.

In some embodiments, the parameters adjusted by the system controller 2450 may relate to process conditions. Non-limiting examples include the composition and flow rate of the process gas, temperature, pressure, plasma conditions (e.g., RF bias power level), pressure, temperature, and the like. These parameters may be provided to the user in the form of a recipe, which may be entered using a user interface.

Signals for monitoring the process can be provided from various process tool sensors through analog and/or digital input connections of the system controller 2450. Signals for controlling the process can be output at analog and digital output connections of the processing tool 2400. Non-limiting examples of process tool sensors that may be monitored include mass flow controllers, pressure sensors (e.g., pressure gauges), thermocouples, and the like. Suitably programmed feedback and control algorithms can be used with the data from these sensors to maintain process conditions.

The system controller 2450 can provide program instructions for implementing the deposition methods described above. The program instructions may control various process parameters such as DC power level, RF bias power level, pressure, temperature, etc. The instructions may control parameters for operating in situ deposition of a film stack according to various embodiments described herein.

The apparatus/methods described herein above may be combined with lithographic patterning tools or methods, for example, for the manufacture and production of semiconductor devices, displays, LEDs, photovoltaic panels, and the like. Typically, but not necessarily, such tools/methods will be used or operated with common manufacturing facilities. Photolithographic patterning of a film typically involves some or all of the following operations, each initiated with some possible tool: (1) applying a photoresist on a workpiece (i.e., substrate) using a spin-on or spray-on tool; (2) curing the photoresist using a hot plate or oven or UV curing tool; (3) exposing the photoresist to visible or ultraviolet light or X-rays using a tool such as a wafer stepper; (4) developing the photoresist using a tool such as a wet bench (wet bench) to selectively remove the resist for patterning; (5) transferring a resist pattern (resist pattern) onto a substrate film or workpiece by using a dry or plasma assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper (microwave plasma resist stripper).

It is to be understood that the configurations and/or approaches described herein are exemplary in nature, and that these specific embodiments or examples are not to be considered in a limiting sense, because numerous variations are possible. The specific routines or methods described herein may represent one or more of any number of processing strategies. Thus, various operations may be performed in the sequence illustrated, in other sequences, in parallel, or in some cases, truncated. Also, the order of the above-described processes may be changed.

The subject matter of the present disclosure includes all novel and nonobvious combinations and subcombinations of the various processes, systems and devices, and other features, functions, operations, and/or properties disclosed herein, as well as any and all equivalents.

Claims (25)

1. A method of depositing a film on a non-planar substrate surface in a reaction chamber, the method comprising:

introducing a first reactant into the reaction chamber under non-plasma conditions such that the first reactant adsorbs on the non-planar substrate surface, the adsorption being part of an atomic layer deposition process;

introducing a dopant-containing material into the reaction chamber under non-plasma conditions; and

the non-planar substrate surface is then exposed to a plasma to form a doped film conformal with the non-planar substrate surface.

2. The method of claim 1, wherein the first reactant is a silicon-containing reactant.

3. The method of claim 1, wherein the dopant is selected from the group consisting of boron, phosphorus, arsenic, and gallium.

4. The method of claim 1, further comprising introducing a second reactant into the reaction chamber prior to exposing the non-planar substrate surface to the plasma.

5. The method of claim 4, wherein the second reactant is an oxidant.

6. The method of claim 4, wherein the second reactant is a nitrogen-containing reactant.

7. The method of claim 5, wherein the doped film is a film of doped silicon oxide.

8. The method of claim 6, wherein the doped film is a film of doped silicon nitride.

9. The method of claim 1, wherein the doped film is a film of doped silicon carbide.

10. The method of claim 1, further comprising introducing a second reactant into the reaction chamber while adsorbing the first reactant onto the non-flat substrate surface.

11. The method of claim 10, further comprising exposing the non-planar substrate surface to a plasma to drive a reaction between the first and second reactants on the substrate surface to form a portion of the film.

12. A method of depositing a film on a non-planar substrate surface of a reaction chamber, the method comprising:

introducing a first reactant into the reaction chamber under non-plasma conditions such that the first reactant adsorbs onto the non-planar substrate surface, the adsorption being part of an atomic layer deposition process;

introducing a second reactant into the reaction chamber to react with the adsorbed first reactant;

introducing a dopant-containing material into the reaction chamber; and

forming a doped film conformal to the non-planar substrate surface.

13. The method of claim 12, wherein the first reactant is a silicon-containing reactant.

14. The method of claim 12, wherein the dopant is selected from the group consisting of boron, phosphorus, arsenic, and gallium.

15. The method of claim 12, wherein the second reactant is an oxidant.

16. The method of claim 12, wherein the second reactant is a nitrogen-containing reactant.

17. The method of claim 12, further comprising exposing the non-planar substrate surface to a plasma after introducing the dopant-containing material into the reaction chamber.

18. The method of claim 12, further comprising repeating one or more of the following: introducing a first reactant into the reaction chamber under non-plasma conditions such that the first reactant adsorbs onto the non-planar substrate surface, and introducing the second reactant into the reaction chamber to react with the adsorbed first reactant.

19. The method of claim 12, further comprising repeating the introducing the dopant-containing material into the reaction chamber one or more times.

20. The method of claim 19, wherein the dopant-containing material is introduced into the reaction chamber at a lower frequency than the first reactant is introduced into the reaction chamber.

21. The method of claim 19, wherein the dopant-containing material is introduced into the reaction chamber at the same frequency as the first reactant is introduced into the reaction chamber.

22. A method of depositing a doped silicon oxide film on a non-planar substrate surface in a reaction chamber, the method comprising:

introducing a silicon-containing reactant into the reaction chamber under non-plasma conditions such that the silicon-containing reactant adsorbs onto the non-planar substrate surface, the adsorption being part of an atomic layer deposition process;

introducing an oxidant into the reaction chamber to react with the adsorbed silicon-containing reactant; and

introducing a dopant-containing material into the reaction chamber to form a doped silicon oxide film conformal with the non-planar substrate surface.

23. The method of claim 22, wherein a plasma is activated when the oxidant is in a gas phase in the reaction chamber.

24. A method of depositing a doped silicon nitride film on a non-planar substrate surface in a reaction chamber, the method comprising:

introducing a first reactant comprising silicon into the reaction chamber under non-plasma conditions such that the first reactant adsorbs onto the non-planar substrate surface, the adsorption being part of an atomic layer deposition process;

introducing a nitrogen-containing reactant into the reaction chamber to react with the adsorbed first reactant; and

introducing a dopant-containing material into the reaction chamber to form a doped silicon nitride film conformal with the non-planar substrate surface.

25. The method of claim 24, wherein the plasma is activated while the nitrogen-containing reactant is in a gas phase in the reaction chamber.

Images