CN107301845A - 像素驱动电路及其驱动方法 - Google Patents
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Abstract
本发明涉及一种像素驱动电路及其驱动方法。该像素驱动电路包括:第一薄膜晶体管(T1),连接第一节点(g),第二节点(s)和第三节点(p);第二薄膜晶体管(T2),连接扫描信号(Scan1),第四节点(n)和电压输入端(Vdata/Vref1);第三薄膜晶体管(T3),连接扫描信号(Scan1),第一节点(g)和第二参考电位(Vref2);第四薄膜晶体管(T4),连接第一控制信号(EM1),第三节点(p)和电源高电位(OVDD);第五薄膜晶体管(T5),连接第二控制信号(EM2),第二节点(s)和OLED的阳极;OLED的阴极连接电源低电位(OVSS);第一电容(C1)和第二电容(C2)。本发明还提供了相应的像素电路驱动方法。本发明的像素驱动电路及驱动方法消除了阈值电压Vth对发光二极管的影响,可提高面板显示的均匀性,提高发光效率。
Description
技术领域
本发明涉及显示技术领域,尤其涉及一种像素驱动电路及其驱动方法。
背景技术
作为新一代显示技术,有机发光二极管(OLED)显示面板具有低功耗、高色域、高亮度、高分辨率、宽视角、高响应速度等优点,因此备受市场的青睐。
OLED显示装置按照驱动方式可以分为无源矩阵型OLED(Passive Matrix OLED,PMOLED)和有源矩阵型OLED(Active Matrix OLED,AMOLED)两大类。其中,AMOLED具有呈阵列式排布的像素,属于主动显示类型,发光效能高,通常用作高清晰度的大尺寸显示装置。AMOLED是电流驱动器件,亮度由流过OLED自身的电流决定,大部分已有芯片(IC)都只传输电压信号,故AMOLED像素驱动电路要完成将电压信号转变为电流信号的任务。
如图1所示,其为现有OLED(Organic Light Emitting Diode)的2T1C(2transistor 1capacitance)像素驱动电路示意图,2T1C指电路主要包括两个薄膜晶体管(TFT)和一个电容(C),其中一个薄膜晶体管T2为开关TFT,由扫描信号Gate控制,用于控制数据信号Data的进入,是控制电容Cst的充电开关,另一个薄膜晶体管T1为驱动TFT,用于驱动OLED,控制通过OLED的电流,电容Cst主要是用来存储数据信号Data进而控制T1对OLED的驱动电流。扫描信号Gate可以来自于栅极驱动器,对应于某一行扫描线,数据信号Data可以来自于源极驱动器,对应于某一列数据线。OVDD为电源高电位,OVSS为电源低电位。根据晶体管I-V(电流-电压)方程:
Ids,sat=k·(VGS-Vth,T1)2=k·(VG-VS-Vth,T1)2 (1)
其中K为本征导电因子,饱和电流Ids,sat的大小与驱动TFT(T1)的阈值电压Vth有关。
由于面板制程的不稳定性等原因,使得面板内每个子像素(Sub-pixel)的驱动TFT的阈值电压Vth会有差别。因此,即使数据电压(Vdata)相等的施加到各像素的驱动TFT(Driving TFT),也会出现流入有机发光二极管(OLED)的电流不一致的情况,导致显示图像质量的均一性难以实现。
另外,随着驱动TFT驱动时间的推移,会造成TFT材料老化、变异,导致驱动TFT的阈值电压Vth会漂移等问题。并且板内TFT材料的老化程度不同,导致面板内各驱动TFT的阈值电压Vth漂移量不同,也会造成面板显示的不均匀现象,并且随着驱动时间的推移,TFT材料的老化变得更严重。即使驱动电压相同,流经有机发光二极管的发光电流也很可能不同,造成亮度不均匀。加之发光晶体管器件的老化,会使发光晶体管的开启电压上升,流入有机发光二极管的电流逐渐减小,导致面板亮度降低、发光效率下降等问题。
如图1所示现有的OLED的2T1C驱动电路中Ids,sat的大小与驱动TFT的阈值电压Vth有关,此驱动电路会造成面板显示的不均匀现象,且会受到OLED退化的影响。因此,现有技术还提供了如图2所示的OLED的5T2C驱动电路,图3为其时序图,主要包括薄膜晶体管MD,M1至M4,电容C1和C2,控制信号包括Scan1,Scan2,EM,以及data。
图2所示5T2C架构虽然可以消除驱动TFT的阈值电压Vth,但在数据写入(DataWriting)和发光(Emission)阶段节点(Node)A的电位保持Vdata+OVDD-Vth-Vref;由于面板OLED的不均匀性导致各子像素的VOLED不一致,若参考电位Vref过大会使OLED在重置(reset)阶段发光;若参考电位Vref过小,会使上述数据写入(Data Writing)和发光(Emission)阶段节点A的电位过大,导致驱动TFT处于截止状态,所以Vref的大小难以把握。
为消除驱动TFT的阈值电压Vth,现有技术还提供了6T2C像素驱动电路。参见图4,其为现有OLED的6T2C像素驱动电路及时序示意图。上述6T2C架构虽然可以消除驱动TFT的Vth,但所用TFT数量较多(6个),T1至T6,会导致面板像素布局(Pixel Layout)设计复杂、开口率下降等问题;且需要较多的时序控制信号(5条),Scan1,Scan2,Scan3,EM1,以及EM2,导致时序控制器(TCON)变得复杂。
发明内容
因此,本发明的目的在于提供一种像素驱动电路,消除OLED驱动电路中驱动TFT的阈值电压Vth对发光二极管的影响。
本发明的另一目的在于提供一种像素驱动电路的驱动方法,消除OLED驱动电路中驱动TFT的阈值电压Vth对发光二极管的影响。
为实现上述目的,本发明提供了一种像素驱动电路,包括:
第一薄膜晶体管,其栅极连接第一节点,源极和漏极分别连接第二节点和第三节点;
第二薄膜晶体管,其栅极连接扫描信号,源极和漏极分别连接第四节点和电压输入端;
第三薄膜晶体管,其栅极连接扫描信号,源极和漏极分别连接第一节点和第二参考电位;
第四薄膜晶体管,其栅极连接第一控制信号,源极和漏极分别连接第三节点和电源高电位;
第五薄膜晶体管,其栅极连接第二控制信号,源极和漏极分别连接第二节点和OLED的阳极;
OLED的阴极连接电源低电位;
第一电容,其两端分别连接第一节点和第二节点;
第二电容,其两端分别连接第二节点和第四节点。
其中,所述扫描信号,第一控制信号,以及第二控制信号的时序配置为包括数据电压写入及阈值电压存储阶段,电荷分享阶段,以及发光显示阶段。
其中,在数据电压写入及阈值电压存储阶段,所述电压输入端输入数据电压。
其中,在电荷分享阶段,所述电压输入端输入第一参考电位。
其中,在数据电压写入及阈值电压存储阶段,所述扫描信号为高电位,第一控制信号为高电位,第二控制信号为低电位。
其中,在电荷分享阶段,所述扫描信号为高电位,第一控制信号为低电位,第二控制信号为低电位。
其中,在发光显示阶段,所述扫描信号为低电位,第一控制信号为高电位,第二控制信号为高电位。
本发明还提供了上述的像素驱动电路的驱动方法,包括:所述扫描信号,第一控制信号,以及第二控制信号的时序配置为包括数据电压写入及阈值电压存储阶段,电荷分享阶段,以及发光显示阶段。
其中,在数据电压写入及阈值电压存储阶段,所述电压输入端输入数据电压。
其中,在电荷分享阶段,所述电压输入端输入第一参考电位。
综上,本发明的像素驱动电路及其驱动方法消除了阈值电压Vth对发光二极管的影响,可提高面板显示的均匀性,提高发光效率。
附图说明
下面结合附图,通过对本发明的具体实施方式详细描述,将使本发明的技术方案及其他有益效果显而易见。
附图中,
图1为现有OLED的2T1C像素驱动电路示意图;
图2为现有OLED的5T2C像素驱动电路示意图;
图3为图2的时序示意图;
图4为现有OLED的6T2C像素驱动电路及时序示意图;
图5为本发明像素驱动电路一较佳实施例的电路示意图;
图6为本发明像素驱动电路一较佳实施例在数据电压写入及阈值电压存储阶段电路状态及时序示意图;
图7为本发明像素驱动电路一较佳实施例在电荷分享阶段电路状态及时序示意图;
图8为本发明像素驱动电路一较佳实施例在发光显示阶段电路状态及时序示意图。
具体实施方式
参见图5,其为本发明像素驱动电路一较佳实施例的电路示意图。本发明提出一种5T2C的OLED像素驱动电路,用于驱动有机发光二极管,具有较少的TFT数量(5个),较少的时序控制线(3条)。补偿过程主要包括三个阶段,分别为数据电压写入及阈值电压Vth存储阶段,电荷分享阶段,二极管发光显示阶段。补偿电路不会引入VOLED,当OLED老化(Degradation)时,电流不会变小,消除了阈值电压Vth对发光二极管的影响,提高面板显示均匀性,补偿后的电流与OVDD/OVSS无关,不受IR压降(Drop)影响。
该较佳实施例主要包括:薄膜晶体管T1,栅极连接第一节点g,源极和漏极分别连接节点s和节点p;薄膜晶体管T2,栅极连接扫描信号Scan1,源极和漏极分别连接节点n和电压输入端Vdata/Vref1;薄膜晶体管T3,栅极连接扫描信号Scan1,源极和漏极分别连接节点g和参考电位Vref2;薄膜晶体管T4,栅极连接控制信号EM1,源极和漏极分别连接节点p和电源高电位OVDD;薄膜晶体管T5,栅极连接控制信号EM2,源极和漏极分别连接节点s和OLED的阳极,OLED的阴极连接电源低电位OVSS;电容C1两端分别连接节点g和节点s;电容C2两端分别连接节点s和节点n。
参见图6,显示了数据电压写入及Vth存储阶段电路状态,以及相应的电路驱动信号的时序。在数据电压写入及阈值电压Vth存储阶段,Scan1、EM1为高电位,EM2为低电位,T5关闭。
T2打开,此时数据电压Vdata对n点充电至Vn=Vdata。T3打开,参考电位Vref2对g点充电至Vg=Vref2。T4打开,OVDD对s点充电,直到g点和s点的压差为Vth为止,此时Vg-Vs=Vth,并将Vth的电荷存储于电容C1中,Vs=Vg–Vth=Vref2–Vth;且T5关闭,保证发光二极管在此阶段处于不发光状态。
参见图7,显示了电荷分享阶段电路状态,以及相应的电路驱动信号的时序。在电荷分享阶段,Scan1为高电位,EM1、EM2为低电位。
T3打开,g点电位保持Vg=Vref2不变;T2打开,由参考电位Vref1对节点n充电,n点电位由Vdata变为Vn=Vref1,T4、T5关闭,由电荷分享原理可得s点电位由Vref2–Vth变为Vs=Vref2–Vth+δV,其中δV=(Vref1–Vdata)×C2/(C1+C2);g点与s点的压差Vgs=Vref2–(Vref2–Vth+δV)=Vth–δV。且T5关闭,保证发光二极管在此阶段也处于不发光状态。
参见图8,显示了发光显示阶段电路状态,以及相应的电路驱动信号的时序。在发光显示阶段,EM1、EM2为高电位,Scan1为低电位。
T3关闭,g点与s点的电位差与上一阶段一样,T4、T5打开,根据晶体管I-V曲线方程I=k(Vgs–Vth)2=k(Vth–δV–Vth)2=k(–δV)2=k[(Vdata–Vref1)×C2/(C1+C2)]2可知电流与驱动TFT(T1)的阈值电压Vth无关,消除了阈值电压Vth对发光二极管的影响,可提高面板显示的均匀性,提高发光效率。
本发明还相应提供了上述像素驱动电路的驱动方法,可以消除OLED驱动电路中驱动TFT的阈值电压Vth对发光二极管的影响,提高面板显示均匀性,且使面板不会随OLED器件的老化而出现面板亮度降低、发光效率下降等问题,补偿电路不会引入VOLED,当OLED老化时,电流不会变小,补偿后的电流与OVDD/OVSS无关,不受IR压降影响。
综上,本发明的像素驱动电路及其驱动方法消除了阈值电压Vth对发光二极管的影响,可提高面板显示的均匀性,提高发光效率。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。
Claims (10)
1.一种像素驱动电路,其特征在于,包括:
第一薄膜晶体管(T1),其栅极连接第一节点(g),源极和漏极分别连接第二节点(s)和第三节点(p);
第二薄膜晶体管(T2),其栅极连接扫描信号(Scan1),源极和漏极分别连接第四节点(n)和电压输入端(Vdata/Vref1);
第三薄膜晶体管(T3),其栅极连接扫描信号(Scan1),源极和漏极分别连接第一节点(g)和第二参考电位(Vref2);
第四薄膜晶体管(T4),其栅极连接第一控制信号(EM1),源极和漏极分别连接第三节点(p)和电源高电位(OVDD);
第五薄膜晶体管(T5),其栅极连接第二控制信号(EM2),源极和漏极分别连接第二节点(s)和OLED的阳极;
OLED的阴极连接电源低电位(OVSS);
第一电容(C1),其两端分别连接第一节点(g)和第二节点(s);
第二电容(C2),其两端分别连接第二节点(s)和第四节点(n)。
2.如权利要求1所述的像素驱动电路,其特征在于,所述扫描信号(Scan1),第一控制信号(EM1),以及第二控制信号(EM2)的时序配置为包括数据电压写入及阈值电压存储阶段,电荷分享阶段,以及发光显示阶段。
3.如权利要求2所述的像素驱动电路,其特征在于,在数据电压写入及阈值电压存储阶段,所述电压输入端(Vdata/Vref1)输入数据电压(Vdata)。
4.如权利要求2所述的像素驱动电路,其特征在于,在电荷分享阶段,所述电压输入端(Vdata/Vref1)输入第一参考电位(Vref1)。
5.如权利要求2所述的像素驱动电路,其特征在于,在数据电压写入及阈值电压存储阶段,所述扫描信号(Scan1)为高电位,第一控制信号(EM1)为高电位,第二控制信号(EM2)为低电位。
6.如权利要求2所述的像素驱动电路,其特征在于,在电荷分享阶段,所述扫描信号(Scan1)为高电位,第一控制信号(EM1)为低电位,第二控制信号(EM2)为低电位。
7.如权利要求2所述的像素驱动电路,其特征在于,在发光显示阶段,所述扫描信号(Scan1)为低电位,第一控制信号(EM1)为高电位,第二控制信号(EM2)为高电位。
8.一种如权利要求1所述的像素驱动电路的驱动方法,其特征在于,包括:所述扫描信号(Scan1),第一控制信号(EM1),以及第二控制信号(EM2)的时序配置为包括数据电压写入及阈值电压存储阶段,电荷分享阶段,以及发光显示阶段。
9.如权利要求8所述的像素驱动电路的驱动方法,其特征在于,在数据电压写入及阈值电压存储阶段,所述电压输入端(Vdata/Vref1)输入数据电压(Vdata)。
10.如权利要求8所述的像素驱动电路的驱动方法,其特征在于,在电荷分享阶段,所述电压输入端(Vdata/Vref1)输入第一参考电位(Vref1)。
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