CN107170855A - A kind of manufacture method of LED epitaxial slice - Google Patents
A kind of manufacture method of LED epitaxial slice Download PDFInfo
- Publication number
- CN107170855A CN107170855A CN201710212677.5A CN201710212677A CN107170855A CN 107170855 A CN107170855 A CN 107170855A CN 201710212677 A CN201710212677 A CN 201710212677A CN 107170855 A CN107170855 A CN 107170855A
- Authority
- CN
- China
- Prior art keywords
- layer
- low
- pressure
- growth
- temperature
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 35
- 238000000034 method Methods 0.000 title claims abstract description 35
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 54
- 229910002601 GaN Inorganic materials 0.000 claims abstract description 51
- 239000000758 substrate Substances 0.000 claims abstract description 33
- 229910052594 sapphire Inorganic materials 0.000 claims abstract description 31
- 239000010980 sapphire Substances 0.000 claims abstract description 31
- 230000004888 barrier function Effects 0.000 claims abstract description 10
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 3
- 230000000694 effects Effects 0.000 abstract description 13
- 239000004065 semiconductor Substances 0.000 abstract description 3
- 230000007547 defect Effects 0.000 description 27
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 26
- 229910052733 gallium Inorganic materials 0.000 description 13
- 229910052757 nitrogen Inorganic materials 0.000 description 13
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 12
- 229910052738 indium Inorganic materials 0.000 description 11
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 10
- 239000000463 material Substances 0.000 description 8
- 230000009467 reduction Effects 0.000 description 8
- 239000013078 crystal Substances 0.000 description 5
- 230000008859 change Effects 0.000 description 4
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 3
- 239000002019 doping agent Substances 0.000 description 3
- 239000011777 magnesium Substances 0.000 description 3
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 3
- 239000002699 waste material Substances 0.000 description 3
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- 238000002441 X-ray diffraction Methods 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 230000006911 nucleation Effects 0.000 description 2
- 238000010899 nucleation Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 2
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 2
- 229910017083 AlN Inorganic materials 0.000 description 1
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 241001062009 Indigofera Species 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- 230000002776 aggregation Effects 0.000 description 1
- 238000004220 aggregation Methods 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000004040 coloring Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000010437 gem Substances 0.000 description 1
- 229910001751 gemstone Inorganic materials 0.000 description 1
- 125000004435 hydrogen atom Chemical class [H]* 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910000069 nitrogen hydride Inorganic materials 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical group O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
- H01L33/145—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The invention discloses a kind of manufacture method of LED epitaxial slice, belong to technical field of semiconductors.Including：The growing low temperature two-dimensional layer on graphical sapphire substrate；It is 1050 DEG C~1100 DEG C to control growth temperature, and growth pressure is 300torr~600torr, and D High Temperature High Pressure layer is grown on low temperature two-dimensional layer；It is 1000 DEG C~1050 DEG C to control growth temperature, and growth pressure is 100torr~300torr, the growing low temperature low pressure three-dimension layer on D High Temperature High Pressure layer, growth pressure of the growth pressure less than D High Temperature High Pressure layer of low-temp low-pressure three-dimension layer；Grow undoped gallium nitride layer, n type gallium nitride layer, stress release layer, multiple quantum well layer, electronic barrier layer and p-type gallium nitride layer successively in low-temp low-pressure three-dimension layer.The present invention utilizes the quick space filled and led up between the surfacial pattern of graphical sapphire substrate of D High Temperature High Pressure layer, the final antistatic effect for improving light emitting diode.
Description
Technical field
The present invention relates to technical field of semiconductors, more particularly to a kind of manufacture method of LED epitaxial slice.
Background technology
Semiconductor light-emitting-diode (Light Emitting Diode, abbreviation LED) has energy-efficient, environmental protection
Advantage, has a wide range of applications in fields such as traffic instruction, outdoor total colourings.Gallium nitride-based material is LED excellent material,
With energy gap is big, electron drift velocity be difficult that saturation, breakdown field are powerful, dielectric constant is small, good heat conductivity, high temperature resistant,
Anticorrosive the advantages of.
On a sapphire substrate, particularly graphical sapphire substrate is (English for gallium nitride-based material overwhelming majority growth：
Patterned Sapphire Substrate, abbreviation PSS) on.The figure on PSS surfaces can change the angle of emergent light, increase
Plus total reflection, so as to improve LED positive light extraction.Currently in order to PSS increase total reflections are made full use of, the figure on PSS surfaces
Size is increasing.
During the present invention is realized, inventor has found that prior art at least has problems with：
The size of the figure on PSS surfaces is increasing, and the area in the C faces in PSS surfaces is accordingly reduced.Because C faces are most sharp
Cause gallium nitride base growing difficult in the reduction of gallium nitride-based material growth, therefore C faces, the gallium nitride quality grown compared with
Difference, defect concentration increase, LED antistatic effect is decreased.
The content of the invention
Difficult in order to solve prior art gallium nitride base growing, defect concentration increase influences LED antistatic effect to ask
Topic, the embodiments of the invention provide a kind of manufacture method of LED epitaxial slice.The technical scheme is as follows：
The embodiments of the invention provide a kind of manufacture method of LED epitaxial slice, the manufacture method includes：
The growing low temperature two-dimensional layer on graphical sapphire substrate；
It is 1050 DEG C~1100 DEG C to control growth temperature, and growth pressure is 300torr~600torr, in the low temperature two
Tie up growth D High Temperature High Pressure layer on layer；
It is 1000 DEG C~1050 DEG C to control growth temperature, and growth pressure is 100torr~300torr, high in the high temperature
Press growing low temperature low pressure three-dimension layer in three-dimension layer；
Grown successively in the low-temp low-pressure three-dimension layer undoped gallium nitride layer, n type gallium nitride layer, stress release layer,
Multiple quantum well layer, electronic barrier layer and p-type gallium nitride layer.
Alternatively, the growth temperature of the D High Temperature High Pressure layer is 1060 DEG C, the growth of the low-temp low-pressure three-dimension layer
Temperature is 1010 DEG C.
Alternatively, the growth pressure of the D High Temperature High Pressure layer is 600torr, the growth of the low-temp low-pressure three-dimension layer
Pressure is 200torr.
Alternatively, the thickness sum of the D High Temperature High Pressure layer and the low-temp low-pressure three-dimension layer is 1.7 μm~1.8 μ
m。
Alternatively, the thickness ratio of the D High Temperature High Pressure layer and the low-temp low-pressure three-dimension layer is 0.8~1.2.
Alternatively, the thickness of the D High Temperature High Pressure layer is 0.8 μm~1 μm, the thickness of the low-temp low-pressure three-dimension layer
For 0.8 μm~1 μm.
Preferably, the thickness of the D High Temperature High Pressure layer is 1 μm, and the thickness of the low-temp low-pressure three-dimension layer is 0.8 μm.
Alternatively, the growth temperature of the low temperature two-dimensional layer is 540 DEG C.
Alternatively, the thickness of the low temperature two-dimensional layer is 25nm.
Alternatively, described on graphical sapphire substrate before growing low temperature two-dimensional layer, the manufacture method is also wrapped
Include：
The growing aluminum nitride layer on the graphical sapphire substrate.
The beneficial effect that technical scheme provided in an embodiment of the present invention is brought is：
On graphical sapphire substrate after growing low temperature two-dimensional layer, first 1050 DEG C~1100 DEG C high temperature and and
D High Temperature High Pressure layer is grown under 300torr~600torr high pressure, the growth temperature of D High Temperature High Pressure layer is higher, growth
Speed is very fast, the space that can quickly fill and lead up between the surfacial pattern of graphical sapphire substrate, increase gallium nitride-based material life
Long C faces area, make up by graphical sapphire substrate surfacial pattern size increase reduction substrate C faces area, delay
The problem of growth difficulty that thus solution is brought is with defect concentration increase, reduces defect concentration, improves the antistatic of light emitting diode
Ability.The growing low temperature low pressure three-dimension layer under 1000 DEG C~1050 DEG C of low temperature and 100torr~300torr low pressure, low again
The three-dimensional island of warm low pressure three-dimension layer can be two neighboring to tilt upward by the direction of defect from being changed into tilting upward vertically upward
Defect merge after produce and bury in oblivion, reduce the defect concentration of epitaxial wafer, improve the crystal mass of epitaxial wafer.
Brief description of the drawings
Technical scheme in order to illustrate the embodiments of the present invention more clearly, makes required in being described below to embodiment
Accompanying drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the present invention, for
For those of ordinary skill in the art, on the premise of not paying creative work, other can also be obtained according to these accompanying drawings
Accompanying drawing.
Fig. 1 is a kind of flow chart of the manufacture method for LED epitaxial slice that the embodiment of the present invention one is provided；
Fig. 2 is the structural representation for the LED epitaxial slice that the embodiment of the present invention one is provided；
Fig. 3 is a kind of flow chart of the manufacture method for LED epitaxial slice that the embodiment of the present invention two is provided.
Embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with accompanying drawing to embodiment party of the present invention
Formula is described in further detail.
Embodiment one
The embodiments of the invention provide a kind of manufacture method of LED epitaxial slice, referring to Fig. 1, the manufacture method bag
Include：
Step 101：The growing low temperature two-dimensional layer on graphical sapphire substrate.
In the present embodiment, low temperature two-dimensional layer is gallium nitride layer.
Alternatively, before step 101, the manufacture method can also include：
The growing aluminum nitride layer on graphical sapphire substrate.
It is to be appreciated that now low temperature two-dimensional layer grows on aln layer.
Because sapphire main component is aluminum oxide, the composition of low temperature two-dimensional layer is gallium nitride, in graphic sapphire
Aln layer is inserted between substrate and low temperature two-dimensional layer, the lattice mismatch between sapphire and gallium nitride can be reduced, reduction is outer
Prolong the defect concentration of piece, improve the antistatic effect of light emitting diode.
In the specific implementation, reach aln surface gallium nitride atom first can be laid on aln layer, grow low
Warm two-dimensional layer.Due to there is certain lattice mismatch, therefore one layer of tiling between Sapphire Substrate, aluminium nitride and gallium nitride
Afterwards, gallium nitride atom first can be easier the place aggregation nucleation of nucleation, and the gallium nitride atom reached below is gathered in core
Around, core is constantly grown up, grow D High Temperature High Pressure layer (referring to step 102).Core is grown up to a certain extent, can be with phase
Adjacent core merges, and gallium nitride atom is laid in again on aln layer, grows low-temp low-pressure three-dimension layer and (refer to step
103)。
Step 102：It is 1050 DEG C~1100 DEG C to control growth temperature, and growth pressure is 300torr~600torr, low
D High Temperature High Pressure layer is grown on warm two-dimensional layer.
In the present embodiment, D High Temperature High Pressure layer is gallium nitride layer.
It should be noted that the growth conditions of three-dimension layer is low temperature or high pressure, the present embodiment is by by growth pressure
300torr~600torr, so as to realize the growth of three-dimension layer.
Alternatively, the thickness of D High Temperature High Pressure layer can be 0.8 μm~1 μm.If the thickness of D High Temperature High Pressure layer is small
In 0.8 μm, then the space that possibly can not be filled and led up between the surfacial pattern of graphical sapphire substrate can not finally realize that reduction lacks
Fall into density and improve the effect of the antistatic effect of light emitting diode；If the thickness of D High Temperature High Pressure layer is more than 1 μm,
New defect may be introduced due to too thick.
Step 103：It is 1000 DEG C~1050 DEG C to control growth temperature, and growth pressure is 100torr~300torr, in height
Growing low temperature low pressure three-dimension layer in warm high pressure three-dimension layer.
In the present embodiment, low-temp low-pressure three-dimension layer is gallium nitride layer.
Alternatively, the thickness of low-temp low-pressure three-dimension layer can be 0.8 μm~1 μm.If the thickness of low-temp low-pressure three-dimension layer is small
In 0.8 μm, then preferable plane may can not be provided for the growth of subsequent layers due to too thin；If low-temp low-pressure three-dimension layer
Thickness is more than 1 μm, then is likely to result in the waste of material.
Alternatively, the thickness sum of D High Temperature High Pressure layer and low-temp low-pressure three-dimension layer can be 1.7 μm~1.8 μm.If
The thickness sum of D High Temperature High Pressure layer and low-temp low-pressure three-dimension layer is less than 1.7 μm, then may cause final nothing due to too thin
Method realizes reduction defect concentration and improves the effect of the antistatic effect of light emitting diode；If D High Temperature High Pressure layer and it is low
The thickness sum of warm low pressure three-dimension layer is more than 1.8 μm, then is likely to result in the waste of material.
Alternatively, the thickness ratio of D High Temperature High Pressure layer and low-temp low-pressure three-dimension layer can be 0.8~1.2.If high temperature is high
The thickness ratio of three-dimension layer and low-temp low-pressure three-dimension layer is pressed to be less than 0.8, then D High Temperature High Pressure layer is too thin, possibly can not fill and lead up figure
Change the space between the surfacial pattern of Sapphire Substrate, can not finally realize reduction defect concentration and improve light emitting diode
Antistatic effect effect, or low-temp low-pressure three-dimension layer is too thick, causes the waste of material；If D High Temperature High Pressure layer and it is low
The thickness ratio of warm low pressure three-dimension layer is more than 1.2, then D High Temperature High Pressure layer is too thick, introduces new defect, or low-temp low-pressure three
Tie up layer too thin, it is impossible to provide preferable plane for the growth of subsequent layers.
Step 104：Grow undoped gallium nitride layer, n type gallium nitride layer, stress release successively in low-temp low-pressure three-dimension layer
Layer, multiple quantum well layer, electronic barrier layer and p-type gallium nitride layer.
Specifically, the N type dopant in n type gallium nitride layer can be Si.Stress release layer include multiple indium gallium nitrogen layers and
Multiple gallium nitride layers, multiple indium gallium nitrogen layers and multiple gallium nitride layers are alternately laminated to be set.Multiple quantum well layer includes multiple indium gallium nitrogen
Layer and multiple gallium nitride layers, multiple indium gallium nitrogen layers and multiple gallium nitride layers are alternately laminated to be set.Electronic barrier layer is p-type aluminum gallium nitride
Layer.P-type dopant in p-type gallium nitride layer and p-type gallium nitride layer can be Mg.P-type gallium nitride layer include hole provide layer and
Contact layer, the growth temperature of contact layer provides the growth temperature of layer higher than hole, and the thickness of contact layer is less than hole and provides layer.
The structural representation for the epitaxial wafer that Fig. 2 obtains for the manufacture method that use the present embodiment is provided.Wherein, 1 is figure
Change Sapphire Substrate, 2 be low temperature two-dimensional layer, and 3 be D High Temperature High Pressure layer, and 4 be low-temp low-pressure three-dimension layer, and 5 be undoped with nitridation
Gallium layer, 6 be n type gallium nitride layer, and 7 be stress release layer, and 8 be multiple quantum well layer, and 9 be electronic barrier layer, and 10 be p-type gallium nitride
Layer.As shown in Fig. 2 low temperature two-dimensional layer 2, D High Temperature High Pressure layer 3, low-temp low-pressure three-dimension layer 4, undoped gallium nitride layer 5, N-type
Gallium nitride layer 6, stress release layer 7, multiple quantum well layer 8, electronic barrier layer 9, p-type gallium nitride layer 10 are sequentially laminated on graphical indigo plant
On jewel substrate 1.
The embodiment of the present invention is on graphical sapphire substrate after growing low temperature two-dimensional layer, and elder generation is at 1050 DEG C~1100 DEG C
High temperature and with 300torr~600torr high pressure grow D High Temperature High Pressure layer, D High Temperature High Pressure layer growth temperature
Higher, growth rate is very fast, the space that can quickly fill and lead up between the surfacial pattern of graphical sapphire substrate, increases gallium nitride
Sill growth C faces area, make up by graphical sapphire substrate surfacial pattern size increase reduction substrate C faces
Area, alleviates the problem of difficult growth thus brought and defect concentration increase, reduces defect concentration, improve light emitting diode
Antistatic effect.Growing low temperature low pressure is three-dimensional under 1000 DEG C~1050 DEG C of low temperature and 100torr~300torr low pressure again
Layer, the three-dimensional island of low-temp low-pressure three-dimension layer can be two neighboring to incline by the direction of defect from being changed into tilting upward vertically upward
Defect obliquely is produced after merging to be buried in oblivion, and is reduced the defect concentration of epitaxial wafer, is improved the crystal mass of epitaxial wafer.
Embodiment two
The embodiments of the invention provide the manufacturer that a kind of manufacture method of LED epitaxial slice, the present embodiment are provided
Method is implementing for the manufacture method that embodiment one is provided.In the present embodiment, with high-purity hydrogen (H2) or nitrogen (N2) conduct
Carrier gas, with trimethyl gallium (TMGa), trimethyl aluminium (TMAl), trimethyl indium (TMIn) and ammonia (NH3) respectively as Ga, Al,
In, N source, using silane (SiH4), two luxuriant magnesium (Cp2Mg) respectively as N-type, P-type dopant.
Specifically, referring to Fig. 3, the manufacture method includes：
Step 201：Graphical sapphire substrate is annealed in growth temperature is 1050 DEG C of pure hydrogen atmosphere, and
Carry out nitrogen treatment.
Step 202：It is 540 DEG C to control growth temperature, and growth thickness is 25nm low temperature on graphical sapphire substrate
Two-dimensional layer.
Step 203：It is 1060 DEG C to control growth temperature, and growth pressure is 600torr, the growth thickness on low temperature two-dimensional layer
For 1 μm of D High Temperature High Pressure layer.
Step 204：It is 1010 DEG C to control growth temperature, and growth pressure is 200torr, is grown on D High Temperature High Pressure layer
Thickness is 0.8 μm of low-temp low-pressure three-dimension layer.
Step 205：Stopping is passed through TMGa, and it is 1040 DEG C to control growth temperature, and the annealing of 8 minutes is carried out in the original location.
Step 206：Growth thickness is 1 μm of undoped gallium nitride layer on D High Temperature High Pressure layer.
Step 207：Growth thickness is 2 μm of n type gallium nitride layer on undoped gallium nitride layer.
Step 208：It is 300torr to control growth pressure, the growth stress releasing layer on n type gallium nitride layer.
In the present embodiment, the nitrogen that the indium gallium nitrogen layer and 6 thickness that stress release layer includes that 6 thickness are 2nm are 30nm
Change gallium layer, 6 indium gallium nitrogen layers and the alternately laminated setting of 6 gallium nitride layers.
Step 209：Multiple quantum well layer is grown on stress release layer.
In the present embodiment, the indium gallium nitrogen layer and multiple thickness that multiple quantum well layer includes that multiple thickness are 2.5nm are 15nm
Gallium nitride layer, multiple indium gallium nitrogen layers and multiple gallium nitride layers are alternately laminated to be set, the number of plies and the indium gallium nitrogen layer of gallium nitride layer
The number of plies is identical, and the number of plies of indium gallium nitrogen layer is 8~10 layers.
Step 210：Growth thickness is 80nm electronic barrier layer on multiple quantum well layer.
In the present embodiment, electronic barrier layer is p-type gallium nitride layer.
Step 211：Growth thickness is 215nm p-type gallium nitride layer on electronic barrier layer.
It should be noted that after epitaxial growth technology terminates, the temperature of reaction chamber is down into 800 DEG C, in pure nitrogen gas gas
Annealing 10min is carried out under atmosphere, room temperature is then down to, terminates epitaxial growth.Through over cleaning, deposition, photoetching and etching etc. half
After conductor processing technology processing procedure, LED is divided into LED chip.
By the LED epitaxial slice of the manufacture method manufacture provided using the present embodiment with (not had using conventional method
Growth D High Temperature High Pressure layer) manufacture LED epitaxial slice be respectively adopted X-ray diffraction (English：X-ray
Diffraction, referred to as：XRD) detected, testing result is as shown in following table one：
Table one
| Manufacture method | Conventional method | The present embodiment |
| The density of edge dislocation | 177.1 | 147.8 |
| The density of screw dislocation | 267.9 | 201.8 |
As can be seen from Table I, compared with the LED epitaxial slice that conventional method is manufactured, the present embodiment manufacture
The defect concentration (density and the density of screw dislocation that include edge dislocation) of LED epitaxial slice is reduced.Due to
Defect concentration be unit volume epitaxial wafer in defect quantity, therefore the numerical value of defect concentration is lower, shows to lack in epitaxial wafer
Sunken quantity is fewer, and the quality of crystal is higher.So the manufacture method that the present embodiment is provided can reduce defect concentration, hair is improved
The crystal mass of optical diode epitaxial wafer, and then improve the antistatic effect of light emitting diode.
The embodiment of the present invention is on graphical sapphire substrate after growing low temperature two-dimensional layer, and elder generation is at 1050 DEG C~1100 DEG C
High temperature and with 300torr~600torr high pressure grow D High Temperature High Pressure layer, D High Temperature High Pressure layer growth temperature
Higher, growth rate is very fast, the space that can quickly fill and lead up between the surfacial pattern of graphical sapphire substrate, increases gallium nitride
Sill growth C faces area, make up by graphical sapphire substrate surfacial pattern size increase reduction substrate C faces
Area, alleviates the problem of difficult growth thus brought and defect concentration increase, reduces defect concentration, improve light emitting diode
Antistatic effect.Growing low temperature low pressure is three-dimensional under 1000 DEG C~1050 DEG C of low temperature and 100torr~300torr low pressure again
Layer, the three-dimensional island of low-temp low-pressure three-dimension layer can be two neighboring to incline by the direction of defect from being changed into tilting upward vertically upward
Defect obliquely is produced after merging to be buried in oblivion, and is reduced the defect concentration of epitaxial wafer, is improved the crystal mass of epitaxial wafer.
The embodiments of the present invention are for illustration only, and the quality of embodiment is not represented.
The foregoing is only presently preferred embodiments of the present invention, be not intended to limit the invention, it is all the present invention spirit and
Within principle, any modification, equivalent substitution and improvements made etc. should be included in the scope of the protection.
Claims (10)
1. a kind of manufacture method of LED epitaxial slice, it is characterised in that the manufacture method includes：
The growing low temperature two-dimensional layer on graphical sapphire substrate；
It is 1050 DEG C~1100 DEG C to control growth temperature, and growth pressure is 300torr~600torr, in the low temperature two-dimensional layer
Upper growth D High Temperature High Pressure layer；
It is 1000 DEG C~1050 DEG C to control growth temperature, and growth pressure is 100torr~300torr, in the HTHP three
Tie up growing low temperature low pressure three-dimension layer on layer；
Grow undoped gallium nitride layer, n type gallium nitride layer, stress release layer, volume successively in the low-temp low-pressure three-dimension layer
Sub- well layer, electronic barrier layer and p-type gallium nitride layer.
2. manufacture method according to claim 1, it is characterised in that the growth temperature of the D High Temperature High Pressure layer is
1060 DEG C, the growth temperature of the low-temp low-pressure three-dimension layer is 1010 DEG C.
3. manufacture method according to claim 1 or 2, it is characterised in that the growth pressure of the D High Temperature High Pressure layer
For 600torr, the growth pressure of the low-temp low-pressure three-dimension layer is 200torr.
4. manufacture method according to claim 1 or 2, it is characterised in that the D High Temperature High Pressure layer and the low temperature
The thickness sum of low pressure three-dimension layer is 1.7 μm~1.8 μm.
5. manufacture method according to claim 1 or 2, it is characterised in that the D High Temperature High Pressure layer and the low temperature
The thickness ratio of low pressure three-dimension layer is 0.8~1.2.
6. manufacture method according to claim 1 or 2, it is characterised in that the thickness of the D High Temperature High Pressure layer is 0.8
μm~1 μm, the thickness of the low-temp low-pressure three-dimension layer is 0.8 μm~1 μm.
7. manufacture method according to claim 6, it is characterised in that the thickness of the D High Temperature High Pressure layer is 1 μm, institute
The thickness for stating low-temp low-pressure three-dimension layer is 0.8 μm.
8. manufacture method according to claim 1 or 2, it is characterised in that the growth temperature of the low temperature two-dimensional layer is 540
℃。
9. manufacture method according to claim 1 or 2, it is characterised in that the thickness of the low temperature two-dimensional layer is 25nm.
10. manufacture method according to claim 1 or 2, it is characterised in that in the life on graphical sapphire substrate
Before long low temperature two-dimensional layer, the manufacture method also includes：
The growing aluminum nitride layer on the graphical sapphire substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710212677.5A CN107170855B (en) | 2017-04-01 | 2017-04-01 | Manufacturing method of light-emitting diode epitaxial wafer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710212677.5A CN107170855B (en) | 2017-04-01 | 2017-04-01 | Manufacturing method of light-emitting diode epitaxial wafer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107170855A true CN107170855A (en) | 2017-09-15 |
| CN107170855B CN107170855B (en) | 2020-04-07 |
Family
ID=59848969
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710212677.5A Active CN107170855B (en) | 2017-04-01 | 2017-04-01 | Manufacturing method of light-emitting diode epitaxial wafer |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107170855B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108110109A (en) * | 2017-12-29 | 2018-06-01 | 安徽三安光电有限公司 | A kind of light emitting diode |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101771121A (en) * | 2009-12-28 | 2010-07-07 | 山东华光光电子有限公司 | Structure of SiC or Si substrate GaN-based crystal and method for growing same |
| CN104485400A (en) * | 2014-12-15 | 2015-04-01 | 厦门市三安光电科技有限公司 | Epitaxial structure of III-V nitride and growth method thereof |
| CN105576090A (en) * | 2016-01-25 | 2016-05-11 | 华灿光电(苏州）有限公司 | Preparation method of LED epitaxial wafer and LED epitaxial wafer |
-
2017
- 2017-04-01 CN CN201710212677.5A patent/CN107170855B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101771121A (en) * | 2009-12-28 | 2010-07-07 | 山东华光光电子有限公司 | Structure of SiC or Si substrate GaN-based crystal and method for growing same |
| CN104485400A (en) * | 2014-12-15 | 2015-04-01 | 厦门市三安光电科技有限公司 | Epitaxial structure of III-V nitride and growth method thereof |
| CN105576090A (en) * | 2016-01-25 | 2016-05-11 | 华灿光电(苏州）有限公司 | Preparation method of LED epitaxial wafer and LED epitaxial wafer |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108110109A (en) * | 2017-12-29 | 2018-06-01 | 安徽三安光电有限公司 | A kind of light emitting diode |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107170855B (en) | 2020-04-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106410005B (en) | gallium nitride based L ED epitaxial wafer and growth method thereof | |
| CN106784216B (en) | Epitaxial wafer of GaN-based light emitting diode and growth method thereof | |
| CN103337573B (en) | The epitaxial wafer of semiconductor light-emitting-diode and manufacture method thereof | |
| CN105679899B (en) | A kind of LED epitaxial slice and its manufacture method | |
| CN104037287A (en) | LED epitaxial wafer grown on Si substrate and preparation method thereof | |
| TW201540861A (en) | Method of growing Group-III nitride semiconductor and method of forming nitride crystal on substrate | |
| CN108336203A (en) | A kind of gallium nitride based LED epitaxial slice and its manufacturing method | |
| CN106159052B (en) | Light emitting diode epitaxial wafer and manufacturing method thereof | |
| CN106601882B (en) | Epitaxial wafer of light emitting diode and manufacturing method thereof | |
| CN109346576B (en) | Light emitting diode epitaxial wafer and preparation method thereof | |
| CN103811601A (en) | Method for GaN base LED multi-stage buffer layer growth with sapphire substrate serving as substrate | |
| CN109346583A (en) | A kind of LED epitaxial slice and preparation method thereof | |
| CN106159048A (en) | Light emitting diode epitaxial wafer and growth method thereof | |
| CN108878609B (en) | The ALN buffer layer and its epitaxial growth method of LED | |
| CN109326698A (en) | A kind of manufacturing method of LED epitaxial slice | |
| CN108831974A (en) | A kind of LED epitaxial slice and its manufacturing method | |
| CN109473514A (en) | A kind of gallium nitride based LED epitaxial slice and its manufacturing method | |
| CN106848017B (en) | Epitaxial wafer of GaN-based light emitting diode and growth method thereof | |
| CN103117346A (en) | Light emitting diode chip and manufacturing method thereof | |
| CN103824916B (en) | A kind of growing method being combined into stratum nucleare improving gallium nitride quality | |
| CN109346568B (en) | Light emitting diode epitaxial wafer and preparation method thereof | |
| CN109273571B (en) | Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof | |
| CN104617192B (en) | A kind of manufacture method of LED epitaxial slice | |
| Zhao et al. | Recent Progress in Long‐Wavelength InGaN Light‐Emitting Diodes from the Perspective of Epitaxial Structure | |
| CN106711296B (en) | Epitaxial wafer of green light emitting diode and growth method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |